Semiconductor device structure and semiconductor device chip

Abstract

The invention discloses a semiconductor device structure which comprises a substrate and an epitaxial structure formed on the substrate through single epitaxy. The epitaxial structure comprises a P-type doped layer located at a bottom layer, an intrinsic doped layer comprising a multi-quantum well structure and an N-type doped layer located at a top layer which grow in sequence, and further comprises a continuous optical waveguide structure manufactured on the epitaxial structure. The first electro-absorption light modulator and the second electro-absorption light modulator are manufactured on the basis of the partial region of the optical waveguide. The double-section high-speed electro-absorption modulator suitable for differential driving is realized through an electrical isolation method based on ion implantation, and under the condition that the total length of active modulation is fixed, compared with a common single-section electro-absorption light modulator driven at a single end, the effective RC constant of the device can be reduced by half so as to improve the electro-optical modulation bandwidth, and the power consumption of the device is reduced. Therefore, a higher-speed optical transmission scene can be supported.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a semiconductor device structure and a semiconductor device chip. Background Technology

[0002] With the development of artificial intelligence technology and its applications, data center optical networks are rapidly expanding in capacity and speed, with single-wavelength transmission rates evolving from 112Gb / s to 224Gb / s, and beginning to be adopted in next-generation 448Gb / s systems. Electro-absorption modulated lasers (EABs) are currently the mainstream emission source for data center optical networks due to their small size, low power consumption, and high performance. Facing the demands of next-generation 448Gb / s systems, further improving the bandwidth of EABs while suppressing high-frequency crosstalk is a major challenge for the industry.

[0003] Patent document US6914706B2 discloses a differentially driven electroabsorption modulator chip design, which includes two electroabsorption modulator segments connected in series in the circuit and connected by a transparent optical waveguide in the optical path. The document states that its solution can achieve twice the extinction ratio compared to a traditional single-ended driven single-segment modulator. For this design, if only the same extinction ratio needs to be maintained, the length of each of the two electroabsorption modulator segments can be halved, and its equivalent capacitance will be only 1 / 4 of that of the traditional design. Therefore, it can greatly improve the bandwidth of the entire device, making it a potentially feasible solution to meet the requirements of higher-speed systems such as 448Gb / s.

[0004] However, the actual fabrication of this design is not easy. To fabricate the transparent optical waveguide structure and the electro-absorption modulator waveguide structure, and to achieve electrical isolation between the positive and negative terminals of the two electro-absorption modulator segments, multiple epitaxial regeneration processes are required. Furthermore, the two electro-absorption optical modulator segments need to be subjected to bias voltages of opposite polarities. Introducing two three-port biasers on the differential feed line would affect the quality of the input differential signal and increase the wiring difficulty of the drive circuit. Summary of the Invention

[0005] The purpose of this invention is to provide a semiconductor device structure and a semiconductor device chip. This invention realizes a dual-segment high-speed electro-absorption modulator suitable for differential driving on a wafer grown in a single epitaxial growth process using an ion implantation-based electrical isolation method. With a fixed total active modulation length, compared with a conventional single-end driven single-segment electro-absorption optical modulator, the effective RC constant of the device can be reduced by half to improve the electro-optic modulation bandwidth, thus supporting higher-speed optical transmission scenarios. At the same time, this invention adopts an ion implantation-based electrical isolation method, which does not require the use of epitaxial regrowth technology, simplifying the fabrication process. Furthermore, the bias scheme disclosed in this invention does not require the insertion of a three-port biaser on the differential driving side, which simplifies the driving circuit and improves signal quality.

[0006] To achieve the above objectives, the following technical solution is adopted: A semiconductor device structure includes a substrate and an epitaxial structure formed in a single epitaxial step on the substrate. The epitaxial structure includes a P-type doped layer at the bottom, an intrinsic doped layer containing a multiple quantum well structure, and an N-type doped layer at the top, grown sequentially. It also includes a continuous optical waveguide structure fabricated on the epitaxial structure, and a first electro-absorption optical modulator and a second electro-absorption optical modulator fabricated based on a portion of the optical waveguide region. The negative electrode of the first electro-absorption optical modulator and the positive electrode of the second electro-absorption optical modulator are electrically connected to a ground pad on the chip. Two electrically isolated regions are formed between the first electro-absorption optical modulator and the second electro-absorption optical modulator through ion implantation.

[0007] Furthermore, one of the electrically isolated regions is formed between the positive electrode of the first electrically absorbed light modulator and the positive electrode of the second electrically absorbed light modulator by injecting helium ions or protons; the other electrically isolated region is formed between the negative electrode of the first electrically absorbed light modulator and the negative electrode of the second electrically absorbed light modulator by injecting helium ions.

[0008] Furthermore, the electrical isolation resistance between the positive terminal of the first electro-absorption light modulator and the positive terminal of the second electro-absorption light modulator is not less than 500Ω; the electrical isolation resistance between the negative terminal of the first electro-absorption light modulator and the negative terminal of the second electro-absorption light modulator is not less than 5000Ω.

[0009] Furthermore, it also includes a first load resistor and a first on-chip capacitor; one end of the first load resistor is connected to the positive terminal of the first electro-absorption light modulator, and one end of the first on-chip capacitor is connected to the ground pad on the chip; the other end of the first load resistor and the other end of the first on-chip capacitor are connected, and the pad leading out from the connection point is used to connect a negative bias voltage.

[0010] Furthermore, it also includes a second load resistor and a second on-chip capacitor; one end of the second load resistor is connected to the negative terminal of the second electro-absorption light modulator, and one end of the second on-chip capacitor is connected to the ground pad on the chip; the other end of the second load resistor is connected to the other end of the second on-chip capacitor, and the pad leading out from the connection point is used to connect a positive bias voltage.

[0011] Furthermore, the resistance values ​​of the first load resistor and the second load resistor are between 25 and 50 Ω, and the capacitance values ​​of the first on-chip capacitor and the second on-chip capacitor are between 3 and 30 pF.

[0012] A semiconductor device chip is also provided, comprising several sets of the above-mentioned semiconductor device structures, the several sets of semiconductor device structures being arranged in an array, and the several sets of semiconductor device structures sharing the same positive bias voltage source and the same negative bias voltage source.

[0013] By adopting the above solution, the beneficial effects of the present invention are: 1) The present invention is based on an electrical isolation method for ion implantation. For n-type InP layers, helium ion implantation is used, and for p-type InP layers, helium ion implantation or proton implantation is used. The advantage of this approach is that the required differential devices can be fabricated on the epitaxial structure formed by a single epitaxial growth, avoiding the introduction of complex epitaxial regeneration processes, thereby simplifying the wafer fabrication process and improving yield and reliability. 2) With the same total modulation length, the effective RC constant of the present invention is half that of the conventional single-ended electroabsorption modulator. Under the premise of ignoring parasitic effects, the theoretical bandwidth can be doubled. Through this architectural innovation, the design margin of the electroabsorption modulator is greatly expanded, thus adapting to a wider range of application needs. 3) The present invention connects an on-chip matching resistor and a DC blocking capacitor in parallel for each segment of the electro-absorption optical modulator on the chip. By leading out a pad between the resistor and the capacitor and introducing an external bias voltage, compared with the traditional method of inserting a three-port biaser on the differential drive high-frequency transmission line, the quality of the input differential signal can be improved and the driving circuit can be simplified. This is especially helpful for the packaging of multi-channel array chips. Attached Figure Description

[0014] Figure 1 This is a schematic diagram of the structure of the present invention; Figure 2 This is an equivalent circuit diagram of the chip and peripheral circuits of the present invention; The following are explanations of the labels in the attached diagram: 1. Substrate; 2. P-type doped layer; 3. Intrinsic doped layer; 4. N-type doped layer; 5. Optical waveguide structure; 6. First electro-absorption optical modulator; 7. Second electro-absorption optical modulator; 61. First load resistor; 62. First on-chip capacitor; 71. Second load resistor; 72. Second on-chip capacitor. Detailed Implementation

[0015] The present invention will now be described in detail with reference to the accompanying drawings and specific embodiments.

[0016] Reference Figures 1 to 2As shown, the present invention provides a semiconductor device structure, including a substrate 1 and an epitaxial structure formed by a single epitaxial growth on the substrate 1; the epitaxial structure includes a P-type doped layer 2 at the bottom layer, an intrinsic doped layer 3 containing a multiple quantum well structure, and an N-type doped layer 4 at the top layer, which are sequentially grown from the substrate 1. In one embodiment, it further includes a continuous optical waveguide structure 5 fabricated on the epitaxial structure, and a first electro-absorption optical modulator 6 and a second electro-absorption optical modulator 7 fabricated based on a portion of the optical waveguide region; the negative electrode of the first electro-absorption optical modulator 6 and the positive electrode of the second electro-absorption optical modulator 7 are electrically connected to a ground pad on the chip; the first electro-absorption optical modulator 6 and the second electro-absorption optical modulator 7 are formed into two electrically isolated regions by ion implantation.

[0017] In this embodiment, one of the electrically isolated regions is formed between the positive electrode of the first electrically absorbed light modulator 6 and the positive electrode of the second electrically absorbed light modulator 7 by injecting helium ions or protons; the other electrically isolated region is formed between the negative electrode of the first electrically absorbed light modulator 6 and the negative electrode of the second electrically absorbed light modulator 7 by injecting helium ions.

[0018] Preferably, in this embodiment, the electrical isolation resistance between the positive terminal of the first electro-absorption light modulator 6 and the positive terminal of the second electro-absorption light modulator 7 is not less than 500Ω; the electrical isolation resistance between the negative terminal of the first electro-absorption light modulator 6 and the negative terminal of the second electro-absorption light modulator 7 is not less than 5000Ω.

[0019] Preferably, the system further includes a first load resistor 61 and a first on-chip capacitor 62; one end of the first load resistor 61 is connected to the positive terminal of the first electro-absorption light modulator 6, and one end of the first on-chip capacitor 62 is connected to the ground pad on the chip; the other end of the first load resistor 61 is connected to the other end of the first on-chip capacitor 62, and the pad leading out from this connection point is used to connect a negative bias voltage. The system also includes a second load resistor 71 and a second on-chip capacitor 72; one end of the second load resistor 71 is connected to the negative terminal of the second electro-absorption light modulator 7, and one end of the second on-chip capacitor 72 is connected to the ground pad on the chip; the other end of the second load resistor 71 is connected to the other end of the second on-chip capacitor 72, and the pad leading out from this connection point is used to connect a positive bias voltage. The resistance values ​​of the first load resistor 61 and the second load resistor 71 are between 25 and 50 Ω, and the capacitance values ​​of the first on-chip capacitor 62 and the second on-chip capacitor 72 are between 3 and 30 pF.

[0020] like Figure 1As shown, this embodiment employs a stacked material system with an inverted PIN structure. The implementation method is as follows: based on an InP semi-insulating substrate 1, the required layers are sequentially formed through a single epitaxial growth process. In this embodiment, from bottom to top, a P-type InP electrode contact layer is first grown on the substrate 1, followed by an intrinsic layer as the modulated active region. Several periods of quantum well / barrier structures (e.g., AlGaInAs / InP multiple quantum wells) are embedded in this intrinsic layer to enhance the electro-absorption modulation effect. Finally, an N-type InP layer is grown on top of the intrinsic layer as the upper contact layer. After epitaxial growth is completed, photolithography and etching processes are used to... An optical waveguide is formed in the intrinsic layer, which runs through multiple electrically absorbed modulation regions. Then, high-energy ions are introduced at predetermined positions in the middle of the waveguide using ion implantation to form an electrically isolated region. Specifically, at the junction of the two modulator regions, helium ion or proton implantation is performed on the P-type layer and helium ion implantation is performed on the N-type layer. The ion implantation dose and energy are optimized to generate deep-level defects in the semiconductor material of the implanted region, which significantly increases the resistivity, thereby cutting off the conduction path of charge carriers in the region. After this step, the originally continuous P-type layer and N-type layer are separated into two electrically insulated parts at the isolation zone.

[0021] After completing the isolation structure, electrodes are fabricated for each modulator segment. Anode electrodes (P-electrodes) are formed by depositing metal on the P-type layer surfaces of EA1 (first electro-absorption light modulator 6) and EA2 (second electro-absorption light modulator 7), and cathode electrodes (N-electrodes) are formed on the N-type layers of EA1 and EA2. Thus, each EAM segment forms its own PN electrode pair, which can be individually biased. Furthermore, the N-electrode of one EA and the P-electrode of the other EA need to be connected to the on-chip ground electrode via metal wiring. Figure 2 A detailed equivalent circuit diagram of one implementation example is shown.

[0022] The design challenge of differential-driven dual-segment electro-absorption optical modulators lies in the electrical isolation between the two on-chip electro-absorption optical modulators, especially the electrical isolation beneath the optical waveguide. This electrical isolation can be achieved through multiple epitaxial regeneration processes. This method involves first selectively etching away some conductive material, and then embedding low-conductivity intrinsic epitaxial material, semi-insulating epitaxial material, or epitaxial material with opposite doping through epitaxial regeneration to achieve the required electrical isolation. The epitaxial regeneration operation needs to be performed separately for the P-type doped layer and the N-type doped layer, making the fabrication process very complex and prone to introducing impurities, defects, or dislocations at the regeneration interface.

[0023] The ion implantation-based electrical isolation method used in this invention can avoid epitaxial regrowth and has a simple process. However, the implanted ions used for electrical isolation absorb light and introduce impurity energy levels into the material, thus preventing them from penetrating the waveguide core layer. Consequently, the semiconductor doped layer beneath the waveguide is blocked by the waveguide and cannot form a high-resistivity insulating layer through ion implantation. For conventional PIN devices, the N-type doped layer 4 is located below the waveguide core layer. Because its conductivity is relatively high, the resistance of the unisolated channel under the waveguide blockage is low, resulting in poor isolation performance. Considering that the resistivity of P-type InP is an order of magnitude higher than that of N-type InP at the same doping concentration (D. Pasquariello, ESBjorlin, D. Lasaosa, Yi.-J. Chiu, J. Piprek, and JE Bowers, 'Selective undercut etching of InGaAs and InGaAsP quantum wells for improved performance of long-wavelength optoelectronic devices'), J. Lightwave Technol. , vol. 24, no. 3, pp. 1470–1477, Mar. 2006, doi: 10.1109 / JLT.2005.863227 This invention employs an inverted PIN epitaxial structure, sequentially growing a P-type doped layer 2, an intrinsic doped layer 3 containing multiple quantum well structures, and an N-type doped layer 4 starting from the upper surface of substrate 1. This allows the relatively high resistivity of the P-type doped layer 2 to be placed below the optical waveguide core layer. After protecting the waveguide region with photoresist, the ion implantation area is confined outside the waveguide region to avoid affecting the optical insertion loss of the optical waveguide. Although the P-type doped layer 2 below the waveguide is not externally ion-implanted, its relatively high resistivity allows for a sufficiently large isolation resistance to be obtained by defining a certain length of ion-free channel, with a doping concentration of 1e18cm⁻¹. -3 Taking a p-type doped InP layer as an example, its surface resistivity is about 1k / sq, and a channel 20µm long and 4µm wide can provide an isolation resistance of about 5k.

[0024] In addition, a semiconductor device chip is provided, comprising several sets of the aforementioned semiconductor device structures, arranged in an array, wherein the sets of semiconductor device structures share the same positive bias voltage source and the same negative bias voltage source. Because the bias voltage sources are shared, each channel only requires a differential signal input to operate, thereby reducing the number of bias power supplies and wiring, and consequently reducing the package size of the multi-channel optical module.

[0025] The above are merely preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A semiconductor device structure comprising a substrate and an epitaxial structure formed on the substrate in a single epitaxial growth; the epitaxial structure comprising a P-type doped layer at a bottom layer, an intrinsic doped layer containing a multiple quantum well structure and an N-type doped layer at a top layer grown in sequence, characterized in that, Also included is a continuous optical waveguide structure made on the epitaxial structure, and a first electro-absorption optical modulator and a second electro-absorption optical modulator made based on a partial region of the optical waveguide; a negative electrode of the first electro-absorption optical modulator and a positive electrode of the second electro-absorption optical modulator are electrically connected to a ground pad on the chip; two electrically isolated regions are formed between the first electro-absorption optical modulator and the second electro-absorption optical modulator by ion implantation.

2. The semiconductor device structure of claim 1, wherein, One of the electrically isolated regions is formed between the positive electrode of the first electro-absorption optical modulator and the positive electrode of the second electro-absorption optical modulator by implanting helium ions or protons; the other electrically isolated region is formed between the negative electrode of the first electro-absorption optical modulator and the negative electrode of the second electro-absorption optical modulator by implanting helium ions.

3. The semiconductor device structure of claim 2, wherein, The electrically isolated resistance between the positive electrode of the first electro-absorption optical modulator and the positive electrode of the second electro-absorption optical modulator is not less than 500Ω; the electrically isolated resistance between the negative electrode of the first electro-absorption optical modulator and the negative electrode of the second electro-absorption optical modulator is not less than 5000Ω.

4. The semiconductor device structure of claim 1, wherein, Also included are a first load resistor and a first on-chip capacitor; one end of the first load resistor is connected to the positive electrode of the first electro-absorption optical modulator, and one end of the first on-chip capacitor is connected to the ground pad on the chip; the other end of the first load resistor and the other end of the first on-chip capacitor are connected, and a pad led out from the connection point is used to connect a negative bias voltage.

5. The semiconductor device structure of claim 4, wherein, Also included are a second load resistor and a second on-chip capacitor; one end of the second load resistor is connected to the negative electrode of the second electro-absorption optical modulator, and one end of the second on-chip capacitor is connected to the ground pad on the chip; the other end of the second load resistor and the other end of the second on-chip capacitor are connected, and a pad led out from the connection point is used to connect a positive bias voltage.

6. The semiconductor device structure of claim 5, wherein, The resistance values of the first load resistor and the second load resistor are between 25Ω and 50Ω, and the capacitance values of the first on-chip capacitor and the second on-chip capacitor are between 3pF and 30pF.

7. A semiconductor device chip comprising a plurality of groups of semiconductor device structures as claimed in claim 6, the plurality of groups of semiconductor device structures being arranged in an array, characterized in that, Several groups of the semiconductor device structures share the same positive bias voltage source and the same negative bias voltage source.

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