Screen scrolling processing method and device based on display screen and related medium

Abstract

The invention discloses a screen scrolling processing method and device based on a display screen and a related medium, and the method comprises the steps: carrying out the column-by-column configuration of the display storage mapping of a target display screen, and obtaining the column mapping configuration data; setting a pixel column address and a row page range of the column mapping configuration data to obtain a pixel arrangement area; carrying out capacity calculation on the pixel arrangement area to obtain buffer area configuration data; defining a pointer set according to the buffer configuration data; determining a scrolling direction of the target display screen according to the pointer set, and performing displacement updating on the buffer configuration data to generate a scrolling address sequence; and performing data updating on the scrolling address sequence to obtain display cache data. According to the method and the device, the scrolling direction of the target display screen is determined through the pointer set, and the buffer configuration data is updated to obtain the display buffer data, so that cross-page smooth scrolling display is completed under the condition that the buffer data of the whole screen does not need to be recombined, and the resource consumption of a processor is reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of data processing, and in particular to a screen scrolling processing method and device based on a display screen and related media. BACKGROUND

[0002] In the prior art, monochrome OLED display screens are usually driven by MCUs (microprocessors) through SPI or I 2 C interfaces, and common resolutions include 128x32 and 64x32. Monochrome OLED display screens have the characteristics of low power consumption and fast response and are widely used in consumer electronics and industrial control scenarios. There are two main types of existing screen scrolling algorithms: one is a hardware implementation that relies on built-in scrolling instructions of the driving chip, but this method is difficult to implement scrolling switching between two different page patterns and has limited applicability; the other is a software implementation that updates the display buffer through cyclic shifting or array operations, which can support different page switching, but consumes a large amount of memory and processor resources, and the algorithm implementation is complex, and there is currently no technical solution to solve this problem. SUMMARY

[0003] Embodiments of the present application provide a screen scrolling processing method and device based on a display screen and related media, aiming to solve the problem of complex software-implemented screen scrolling algorithms in the prior art, which leads to a large consumption of processor resources.

[0004] In a first aspect, embodiments of the present application provide a screen scrolling processing method based on a display screen, comprising:

[0005] Column-wise configuration is performed on display storage mapping of a target display screen to obtain column mapping configuration data;

[0006] Pixel column addresses and row page ranges of the column mapping configuration data are set to obtain a pixel arrangement area;

[0007] Capacity calculation is performed on the pixel arrangement area, and a buffer area for display data is allocated to obtain buffer area configuration data;

[0008] A first unsigned long pointer and a second unsigned long pointer are defined according to the buffer area configuration data, and a pointer set is integrated;

[0009] The scrolling direction of the target display screen is determined according to the pointer set, and bit shift updating is performed on the buffer area configuration data to generate a scrolling address sequence;

[0010] Data updating is performed on the scrolling address sequence to obtain updated display cache data.

[0011] In a second aspect, embodiments of the present application provide a screen scrolling processing device based on a display screen, comprising:

[0012] a data mapping unit, configured to configure display memory mapping of a target display screen column by column to obtain column mapping configuration data;

[0013] a pixel arrangement unit, configured to set pixel column addresses and row page ranges of the column mapping configuration data to obtain a pixel arrangement area;

[0014] a data allocation unit, configured to perform capacity calculation on the pixel arrangement area and allocate a buffer area for display data to obtain buffer area configuration data;

[0015] a pointer definition unit, configured to define a first unsigned long pointer and a second unsigned long pointer respectively according to the buffer area configuration data, and integrate to obtain a pointer set;

[0016] a displacement updating unit, configured to determine a scrolling direction of the target display screen according to the pointer set, and perform displacement updating on the buffer area configuration data to generate a scrolling address sequence;

[0017] a data updating unit, configured to perform data updating on the scrolling address sequence to obtain updated display cache data.

[0018] In a third aspect, an embodiment of the present application provides a computer device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, and the processor implements the display screen-based screen scrolling processing method of the first aspect when executing the computer program.

[0019] In a fourth aspect, an embodiment of the present application provides a computer readable storage medium, and the computer readable storage medium stores a computer program, and the computer program is executable on a processor to implement the display screen-based screen scrolling processing method of the first aspect.

[0020] The embodiment of the present application provides a screen scrolling processing method based on a display screen, which comprises the following steps: performing column-by-column configuration on display storage mapping of a target display screen to obtain column mapping configuration data; setting a pixel column address and a row page range of the column mapping configuration data to obtain a pixel arrangement area; performing capacity calculation on the pixel arrangement area and allocating a buffer area for display data to obtain buffer area configuration data; defining a first unsigned long pointer and a second unsigned long pointer according to the buffer area configuration data, and integrating to obtain a pointer set; determining a scrolling direction of the target display screen according to the pointer set, and performing bit shift update on the buffer area configuration data to generate a scrolling address sequence; and performing data update on the scrolling address sequence to obtain updated display cache data. The scrolling direction of the target display screen is determined by the pointer set, and the buffer area configuration data is updated to obtain the display cache data, so that the smooth scrolling display across the pages is completed without recombining the full-screen buffer area data, and the consumption of the processor is reduced.

[0021] The embodiment of the present application also provides a screen scrolling processing device based on a display screen, a computer device and a storage medium, which also have the beneficial effects described above. BRIEF DESCRIPTION OF DRAWINGS

[0022] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed in the embodiment description will be briefly introduced. Obviously, the drawings in the following description are some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0023] Figure 1 A flowchart of a screen scrolling method based on a display screen provided by the embodiment of the present application is shown in the figure.

[0024] Figure 2 A schematic block diagram of a screen scrolling device based on a display screen provided by the embodiment of the present application is shown in the figure. DETAILED DESCRIPTION

[0025] The technical solutions in the embodiments of the present application will be described clearly and completely in combination with the drawings in the embodiments of the present application. Obviously, the described embodiments are some embodiments of the present application, not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor are within the protection scope of the present application.

[0026] It should be understood that the terms "comprises" and "comprising," when used in this specification and the following claims, indicate the presence of the described features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0027] It should also be understood that the terms used in the specification of the application herein are only for the purpose of describing particular embodiments and do not intend to limit the application. As used in the specification of the application and the following claims, the singular forms "a," "an," and "the" are intended to include the plural forms unless the context clearly indicates otherwise.

[0028] It should be further understood that the term "and / or" used in the specification of the application and the following claims means any combination of one or more of the associated listed items and all possible combinations, and includes these combinations.

[0029] Please see the following Figure 1 , Figure 1 The flowchart of a display screen-based screen scrolling processing method provided by an embodiment of the application specifically includes steps S101-S106.

[0030] S101, configure the display storage mapping of the target display screen column by column to obtain column mapping configuration data;

[0031] S102, set the pixel column address and row page range of the column mapping configuration data to obtain a pixel arrangement area;

[0032] S103, perform capacity calculation on the pixel arrangement area and allocate a buffer area for display data to obtain buffer area configuration data;

[0033] S104, define a first unsigned long pointer and a second unsigned long pointer according to the buffer area configuration data, respectively, and integrate to obtain a pointer set;

[0034] S105, determine the scrolling direction of the target display screen according to the pointer set, and perform bit shift update on the buffer area configuration data to generate a scrolling address sequence;

[0035] S106, perform data update on the scrolling address sequence to obtain updated display cache data.

[0036] In step S101, the display storage mapping is configured column by column: taking a driving IC (such as SSD1312) as an example, a default page addressing is changed to column-by-column addressing by sending an addressing mode setting instruction, and the obtained column mapping configuration data is recorded.

[0037] In an embodiment, the step S101 comprises:

[0038] parsing a default value of a control register of the addressing mode to obtain an addressing mode parameter table;

[0039] generating a command frame according to the addressing mode parameter table to obtain a command sequence;

[0040] setting a field of the addressing mode to an encoding corresponding to the column-by-column mode in the command sequence to obtain a column-by-column command sequence;

[0041] modifying the addressing mode parameter table according to the column-by-column command sequence to obtain a column mapping initialization sequence;

[0042] recording a current display storage mapping mode based on the column mapping initialization sequence and forming a configuration record to output column mapping configuration data.

[0043] In the embodiment, the control end (MCU) performs addressing mode register parsing and configuration on the driving IC (taking SSD1312 as an example) corresponding to the target display screen after completing the initialization of the basic power supply and the communication bus (SPI or I 2 C). For this purpose, the default configuration is read or adopted, and it is confirmed that the default value of the “memory addressing mode setting” command 0x20 is 0x02 (corresponding to PageAddressing Mode, the default mode in the chip reset state), and the addressing mode parameter table is established according to this, the addressing mode parameter table at least includes: register command address (0x20), field name (A[1:0]), field semantics (addressing mode), default value (0x02, PageAddressing Mode), target value (0x01, COM-Page H-Mode, column-by-column), and allowed legal enumeration (COM-Page H-Mode, PageAddressingMode (RESET), SEG-Page H-Mode). At the same time of establishing the addressing mode parameter table, the array relationship of the dot matrix pin of the driving chip is confirmed in combination with the device specification, for example, the array parameters of SSD1312Z2 are SEG=128, COM=64, the package form is COG, and the related geometric tolerance information of manufacturing and packaging is attached. The above information is used for subsequent mapping mode and physical column number and row number correspondence checking and traceable record.

[0044] Before generating the configuration command, the MCU constructs the command frame based on the addressing mode parameter table to obtain a command sequence. The command sequence contains at least two bytes: the first byte is a command 0x20 (Set Memory Addressing), and the second byte is a target value 0x01 corresponding to the addressing mode coding field A [1:0] (i.e., COM-Page H-Mode, column-by-column mode). Among them, the A [1:0] field is used to select the addressing mode, which can respectively indicate the COM-Page H-Mode, PageAddressing Mode (RESET), and SEG-Page H-Mode three working modes; setting the field to 0x01 indicates switching to column-by-column mapping, and obtaining a column-by-column command sequence. The command write timing follows the command and data distinction rules of the selected bus protocol (for example, I 2 The control byte DC bit of C or the D / C pin of SPI is set to "command" state, and the write is performed according to the minimum setup and hold time; if necessary, a number of clock cycle NOPs can be inserted after the write to meet the time requirement of the internal state machine to complete the mode switching.

[0045] After the command is issued, the MCU updates the addressing mode parameter table to form a column mapping initialization sequence, which at least includes: the target write value 0x01 of the command 0x20, the corresponding mode name (COM-Page H-Mode column-by-column), the effective timestamp, the execution interface (SPI / I 2 C), and the display memory interpretation rules related to the mode (for example, 1 32-bit unsigned long integer unit maps 1 column of pixel data, and the low to high bits correspond to 32 pixels of the column from the low row to the high row). Based on the column mapping initialization sequence, a configuration record is generated in the system configuration area, which further solidifies the physical device information (such as SSD1312Z2: SEG=128, COM=64, COG package and the above-mentioned geometric parameters) targeted by this initialization, and the comparison before and after the mode switching (0x02→0x01), and marks the current display storage mapping mode as column-by-column (COM-Page H-Mode). Through the above process, the switching from the default page addressing mode of the chip to the column-by-column addressing mode is completed, and the column mapping configuration data is output.

[0046] In step S102, the pixel column address and row page range are set based on the column mapping configuration data: for example, the column address range setting instruction and the row page address range setting instruction are sent to a 128x32 panel, so as to obtain the column boundary and page boundary of the pixel arrangement area (such as 8 rows per page, a total of 4 pages).

[0047] In an embodiment, the step S102 comprises:

[0048] addressing parameter analysis is performed on the column mapping configuration data to obtain addressing control information;

[0049] A column address setting command sequence is constructed based on the addressing control information to obtain a column address configuration result.

[0050] A row page address setting command sequence is constructed based on the column address configuration result to obtain a row page address configuration result.

[0051] Pixel column data ranges and pixel page index ranges are calculated based on the row page address configuration result to generate pixel addressing boundaries.

[0052] The pixel addressing boundaries are integrated to output a pixel arrangement area.

[0053] In this embodiment, addressing parameter analysis is performed on the column mapping configuration data to obtain addressing control information. The addressing control information includes address setting commands supported by a driving IC (such as SSD1312) in COM-Page H-Mode and field value ranges and reset default values thereof. Among them, two types of commands related to column and row page boundaries are 0x21 command for setting start and end lines and column addresses and 0x22 command for setting start and end page addresses. In COM-Page H-Mode, the fields A[6:0]B[6:0] of 0x21 are used to set the start / end address of a row, and the range is 0-127 (the reset defaults are 0 and 127, respectively). In SEG-Page H-Mode, A[6:0]B[6:0] of 0x21 is used to set the start / end address of a column, and the range is 0-63 (the reset defaults are 0 and 63, respectively). A[4:0]B[4:0] of 0x22 command in COM-Page H-Mode is used to set the start / end page of COM-Page, and the range is 0-7 (the reset defaults are 0 and 7, respectively). In addition, the column mapping configuration data obtained in the previous embodiment confirms that the arrangement mode of the current display memory has been set to COM-Page H-Mode to ensure that the correspondence relationship between the column / page range and the physical resolution is consistent, and mapping consistency check items are established based on the physical array parameters of the device (such as SSD1312Z2: SEG=128, COM=64) for recording and tracing.

[0054] Further, the column address setting command sequence is constructed based on the addressing control information to obtain a column address configuration result. Considering that the standard resolution of the driving IC is 128x64 and the target panel is 128x32, if the row and column addressing ranges are not limited, 32 pixels (4 bytes) will be formed in a single column, which is inconsistent with the mapping between the single column and the 32-bit unsigned long integer unit. Therefore, the column and row page ranges of the pixel arrangement need to be constrained so that each column corresponds to a 32-bit wide data unit. To this end, the address setting format combination 0x21 command frame is used to limit the start and end ranges of column (or line) addressing to 0-127, and the two or three byte timing of "0x21, 0x00, 0x7F" is written to clearly define the effective access boundary of 128 columns, thereby forming the column address configuration result (W=128).

[0055] Further, the row page address setting command sequence is constructed based on the column address configuration result to obtain a row page address configuration result. The master controls the start and end ranges of the page addressing to 0-3 according to the format of the 0x22 command, i.e., "0x22, 0x00, 0x03", to define four address pages, each of which corresponds to 8 rows, thereby covering the effective display height of 32 rows (H=32).

[0056] Further, the pixel column data range and the pixel page index range are calculated using the row page address configuration result to generate the pixel addressing boundary. Specifically, the pixel column data range is [0, W-1]=[0, 127], and the column step is 1 column (consistent with "single column=32-bit unsigned long integer unit=4 bytes" under the column-by-column mapping); the pixel page index range is [0, H / 8-1]=[0, 3], and the page step is 1 page; at the same time, the total height of the row addressing is confirmed to be 32 rows, which satisfies the one-to-one correspondence between "single column 32-bit" and "panel 32 rows", thereby eliminating the influence of the mismatch between 128x64 and 128x32 on the storage semantics.

[0057] Finally, the column and page addressing boundaries are integrated to output the pixel arrangement area. The pixel arrangement area is indexed by (column, page) in two dimensions: column index col ∈ [0, 127], and page index page ∈ [0, 3]; under the column-by-column (COM-Page H-Mode) semantics, each value of col corresponds to a 32-bit unsigned long integer unit, and the low bits to high bits respectively map the 0-31 row pixels of the column; the value of page determines the page segmentation position of the 8 rows in the video memory. The pixel arrangement area serves as the unified addressing reference for the capacity calculation and double buffer division in the subsequent step S103, and the generation and displacement update of the scrolling address sequence in step S105, and the source and specific command writing sequence are all recorded in the configuration record, which facilitates engineering reproduction and consistency verification.

[0058] In step S103, under the premise of mapping by column, the single-column data is defined as a 32-bit unsigned long integer unit (4 bytes) as a storage basic unit with a height of 32 pixels per column; the number of columns W is obtained from the pixel arrangement area (W=128 for a 128x32 panel and W=64 for a 64x32 panel), and a double-buffer structure (buffer number M=2) can be used. The capacity is calculated according to the formula "capacity per buffer=Wx4 bytes, total capacity=MxWx4 bytes"; when the resolution is 128x32, two buffers of 128x4=512 bytes are allocated, for a total of 1024 bytes; when the resolution is 64x32, two buffers of 64x4=256 bytes are allocated, for a total of 512 bytes. The two buffers are divided in the continuous memory in a 4-byte alignment manner, and are linearly arranged inside according to the column index 0-W-1, with each index corresponding to an unsigned long integer element, and the bits 0-31 of each element map the 32 pixels from low to high in the corresponding column; after the division, buffer configuration data is formed, which records at least the resolution identifier, the number of columns W, the number of bytes per column (4 bytes), the number of buffers (2), the capacity per buffer (Wx4 bytes), the total capacity (2xWx4 bytes), the starting address and length of the two buffers, and the column step (4 bytes), and the two buffers are initialized to zero to ensure the timing consistency and portability of the subsequent column-by-column writing and continuous refreshing process.

[0059] In step S104, a first unsigned long integer pointer and a second unsigned long integer pointer are defined according to the buffer configuration data, respectively pointing to the starting addresses of the two sets of column vector data buffers, and are integrated into a pointer set for subsequent scrolling control.

[0060] In step S105, a scrolling address sequence is generated according to the pointer set and the input scrolling direction, and the displacement is updated; when scrolling horizontally, the address sequence step refreshing mechanism can be used, for example, left scrolling starts from the 0th column of the first pointer and increments by a unit column step to the upper limit of the column, and then seamlessly switches to the starting column of the second pointer to continue the traversal until a screen switch is completed; right scrolling starts from the starting column of the second pointer and decrements by a unit column step, and switches to the first pointer at the end address to continue the traversal. For vertical scrolling, the update method of "column-by-column displacement and cross-buffer bit complement" is used: when scrolling up, all column data pointed to by the first pointer is left shifted by 1 bit, and the low bit of the corresponding column is complemented by the high bit of the column data of the second pointer; after completion, a full-screen refresh is performed, and the column data of the second pointer is left shifted to prepare for the next round of bit complement; when scrolling down, the column data of the second pointer is right shifted by 1 bit, and the high bit of the corresponding column is complemented by the low bit of the column data of the first pointer after refreshing, and then the column data of the first pointer is right shifted to prepare for the next round of bit complement; the above vertical process is repeated for a predetermined number of times (for example, the same number of steps as the row height) to complete the full-screen scrolling.

[0061] In an embodiment, the step S105 comprises:

[0062] The drawing function is called to fill the buffer configuration data, respectively obtaining first buffer display data and second buffer display data;

[0063] Based on the first buffer display data, the starting column of the first unsigned long pointer in the pointer set is refreshed to obtain a starting address parameter;

[0064] The starting address parameter is incrementally traversed by a unit column step until the upper limit of the column data of the first unsigned long pointer is reached to obtain a first-stage address set;

[0065] Based on the second buffer display data, the last address of the first-stage address set is switched across the buffer to set the refresh position as the starting column of the second unsigned long pointer in the pointer set, and the incrementally traversal by a unit column step is continued to obtain a second-stage address set;

[0066] The first-stage address set and the second-stage address set are sequentially spliced to output the scroll address sequence.

[0067] In the embodiment, a monochrome display screen with a resolution of 64x32 is taken as an example, and the horizontal scrolling can be completed by using double buffering and continuous address organization. The buffer configuration data includes buffer 1 and buffer 2. First, a drawing function is called to write two pages of data to be displayed into the two buffers respectively. Buffer 1 stores column-by-column data of page A, and buffer 2 stores column-by-column data of page B. First buffer display data and second buffer display data can be obtained. The two buffers are sequentially adjacent in the physical memory, and each column corresponds to a 32-bit unsigned long integer unit. The 32 pixels of the column are mapped from low to high. By using the continuity of the addresses of the two buffers, the column data is not reorganized or copied, and the scrolling process is driven only by changing the starting address of the display refresh. Taking buffer 1 as the starting point, the starting column pointed to by the first unsigned long integer pointer in the refresh pointer set is refreshed to obtain the starting address parameter required for this refresh. On this basis, the first column is incremented by a unit column step of 1 column: the 0th column is refreshed in the first frame, the 1st column is refreshed in the second frame, and so on until the 63rd column, forming a first-stage address set. After traversing the upper limit of the column, a buffer switching is performed, the refresh position is switched to the starting column of the second unsigned long integer pointer, and the incrementing traversal is continued according to the rule of "advancing by 1 column each time" to the 63rd column of buffer 2, forming a second-stage address set. The address sets of the two stages are spliced in time sequence to obtain the scrolling address sequence of the embodiment; the display control end sets the refresh starting address according to the sequence and triggers the update, so that the animation effect of smoothly scrolling from page A to page B (i.e., the screen scrolls leftward) can be realized. To improve the scrolling speed, an "accelerated stepping" strategy can be selected, that is, the column step is increased from 1 column to 2 columns, the total number of frames is reduced from 64 frames to 32 frames, and the continuity of the buffer switching is maintained. The above process only changes the refresh starting address and does not involve moving and rearranging the entire screen data, thereby reducing the operation and storage access overhead on the processor side.

[0068] In an embodiment, the step S105 further comprises:

[0069] The drawing function is called to fill the buffer configuration data, and first buffer display data and second buffer display data are obtained respectively.

[0070] The starting column of the second unsigned long integer pointer in the refresh pointer set is refreshed based on the second buffer display data to obtain a starting address parameter.

[0071] The starting address parameter is decremented by a unit column step until the upper limit of the column data of the second unsigned long integer pointer is reached to obtain a first-stage address set.

[0072] performing cross-buffer switching on the last address of the first-stage address set based on the display data of the first buffer, setting the refresh position to the start column of the first unsigned long pointer in the pointer set, and continuing to perform decremental traversal by unit column step, to obtain a second-stage address set;

[0073] sequentially splicing the first-stage address set and the second-stage address set to output the rolling address sequence.

[0074] In the embodiment, the buffer configuration data includes buffer 1 and buffer 2. After the column-by-column mapping and the pixel arrangement area setting are completed, a drawing function is called to write two pages of display data into the two buffers respectively. The buffer 1 stores the column-by-column data of page A, and the buffer 2 stores the column-by-column data of page B. The two buffers are sequentially adjacent in the physical memory, and each column corresponds to an unsigned long data unit, which maps 32 pixels of the column from low to high. Further, based on the display data of the second buffer, the start column of the second unsigned long pointer in the pointer set is refreshed to obtain a start address parameter. The start address is taken as a reference to perform decremental traversal by the rule of “one column as a unit column step”, and the refresh start address is sequentially set until the upper limit of the column data corresponding to the pointer is reached, to form a first-stage address set. Since the two buffers are continuous in the address space, the start column of the buffer 2 is physically equivalent to the column after the end of the buffer 1. Therefore, after the first-stage traversal is completed, the column range of the buffer 1 can be seamlessly connected. Then, based on the display data of the first buffer, cross-buffer switching is performed on the last address of the first-stage address set, the refresh position is set to the start column of the first unsigned long pointer in the pointer set, and decremental traversal is continued by the rule of “retreating one column each time”, to sequentially set the refresh start address until the zeroth column of the buffer 1, to form a second-stage address set. Finally, the first-stage address set and the second-stage address set are sequentially spliced in time sequence to output a rolling address sequence. According to the rolling address sequence, the display control end sets the refresh start address frame by frame and triggers updating, to complete the rolling display from page B to page A (i.e. screen rolling to the right). To improve the rolling speed and reduce the refresh times, the embodiment allows an “accelerated stepping” strategy to be used. The step length is adjusted from one column to two columns, and the refresh is sequentially decremented from the start column of the buffer 2, the last column of the buffer 1, the third-to-last column of the buffer 1, and so on, until the zeroth column of the buffer 1. In this way, the total number of frames is halved to 32 frames, while the continuity and visual consistency of the cross-buffer switching are still maintained. In the whole process, the whole-screen data is not rearranged or copied, and the animation output is completed only by changing the refresh start address, so that smooth transition is realized while reducing the operation and storage access overhead on the processor side.

[0075] In an embodiment, the step S105 further includes:

[0076] The drawing function is called to fill the buffer configuration data, and first buffer display data and second buffer display data are obtained respectively;

[0077] Based on the first buffer display data, all column data corresponding to the first unsigned long pointer in the pointer set is left shifted, and the lowest bit of the corresponding column is supplemented to the highest bit of all column data corresponding to the second unsigned long pointer in the pointer set to obtain a first buffer column data set;

[0078] The full-screen refresh function is called to update the data of the first buffer column data set, and based on the second buffer display data, all column data corresponding to the second unsigned long pointer in the pointer set is left shifted to obtain a second buffer column data set;

[0079] The left shifting and refreshing operations are repeated until a preset number of times is reached, and the first buffer column data set and the second buffer column data set are integrated to output a scrolling address sequence.

[0080] In this embodiment, the buffer configuration data includes buffer 1 and buffer 2. After the column-by-column mapping and the pixel arrangement area setting are completed, the drawing function is called to write two pages of data to be displayed into the two buffers respectively: buffer 1 is used for page A, and buffer 2 is used for page B. The two buffers are sequentially adjacent in the physical memory. Under the column-by-column mapping semantics, each column is carried by an unsigned long data unit, and each bit from low to high corresponds to 32 pixel rows of the column. The first unsigned long pointer and the second unsigned long pointer in the pointer set point to the column direction start addresses of the two buffers respectively, which are used for subsequent column-by-column displacement and refreshing. Based on the first buffer display data, all 64 columns corresponding to the first unsigned long pointer are sequentially subjected to a left shifting operation once. At the same time when each column completes the left shifting, the lowest bit of the column is supplemented by the highest bit of the column corresponding to the second unsigned long pointer, so that buffer 1 forms a vertical row-by-row advancement. After the displacement processing is completed, the zeroth column pointed to by the first unsigned long pointer is taken as the refreshing starting point, the full-screen refresh function is called, the current column data of buffer 1 is written into the display cache as a whole, and one full-screen update is completed. After the refreshing is completed, in preparation for the next bit supplement, based on the second buffer display data, all 64 columns corresponding to the second unsigned long pointer are also subjected to a left shifting operation once, so that the new highest bit of each column can continue to provide supplement data for the lowest bit of buffer 1 in the next round, realizing the continuous cooperation between the two buffers at the column level.

[0081] Further, the process of "buffer 1 left bit shift and filling with the highest bit of buffer 2 - full screen refresh - buffer 2 left bit shift" is repeated as a loop unit, and the number of loops can be set to 32 times; when the loop count reaches 32 times, the 64-column data of buffer 1 has been completely transferred to the data of the corresponding column at the initial time of buffer 2, thereby completing a self-downward full screen scrolling (i.e. screen upward scrolling). During the entire process, only the two buffers are shifted and the lowest bit is filled in by column, and the display cache is written uniformly after each round is completed through the full screen refresh function, without involving the moving and rearranging of the full screen data, thereby ensuring stable and smooth upward scrolling display in the double-buffer continuous address space with low processor operation and storage access overhead.

[0082] In an embodiment, the step S105 further comprises:

[0083] The drawing function is called to fill the buffer configuration data, and first buffer display data and second buffer display data are obtained respectively;

[0084] Based on the second buffer display data, all column data corresponding to the second unsigned long pointer in the pointer set are right bit shifted, and the highest bit of the corresponding column is filled to the lowest bit of all column data corresponding to the first unsigned long pointer in the pointer set, to obtain a second buffer column data set;

[0085] The full screen refresh function is called to update the data of the second buffer column data set, and based on the first buffer display data, all column data corresponding to the first unsigned long pointer in the pointer set are right bit shifted to obtain a first buffer column data set;

[0086] The right bit shift and refresh operation are performed in a loop until a preset number of times is reached, the first buffer column data set and the second buffer column data set are integrated, and a scrolling address sequence is output.

[0087] In the embodiment, the buffer configuration data includes buffer 1 and buffer 2. After completing the column-by-column mapping and pixel arrangement area setting, the drawing function is called to write two pages of data to be displayed to the two buffers respectively: buffer 1 is used for page A, and buffer 2 is used for page B. The two buffers are sequentially adjacent in the physical memory, and under the column-by-column mapping semantics, each column is carried by an unsigned long data unit, and the bits thereof from low to high correspond to thirty-two pixel rows of the column. The first unsigned long pointer and the second unsigned long pointer in the pointer set point to the column starting addresses of the two buffers respectively, for subsequent column-based bit shift and refresh.

[0088] Further, based on the display data of the second buffer, a right shift operation is performed on all 64 columns corresponding to the second unsigned long integer pointer in turn; while each column is right shifted, the highest bit of the column is filled into the lowest bit of the corresponding column of the first unsigned long integer pointer, so that the buffer 1 forms a downward push in the vertical direction. After the shift processing is completed, the zeroth column pointed to by the first unsigned long integer pointer is taken as the refresh starting point, a full-screen refresh function is called, the current column data of the buffer 2 is written into the display buffer as a whole, and a whole-screen update is completed. After the refresh is completed, in order to prepare for the next lowest bit filling, based on the display data of the first buffer, a right shift operation is also performed on all 64 columns corresponding to the first unsigned long integer pointer, so that the new lowest bit of each column can continue to receive the filling data from the highest bit of the corresponding column of the buffer 1 in the next round, thereby forming a continuous cooperation at the column level between the two buffers.

[0089] Further, the processing of "right shift of buffer 2 and filling of the highest bit of buffer 2 into the lowest bit of buffer 1 - full-screen refresh - right shift of buffer 1" is repeated as a loop unit, and the number of loops can be set to 32 times; when the loop count reaches 32 times, the 64 columns of data of the buffer 2 have been completely transferred to the data of the corresponding columns of the buffer 1 at the initial time, thereby completing a whole-screen scrolling from top to bottom (i.e., the screen is scrolled downward). In the whole process, only the right shift and bit filling processing is performed on the two buffers by column, and the display buffer is written uniformly after each round is completed through the full-screen refresh function, without involving the moving and rearranging of the whole-screen data. Based on the continuous address space of the double buffer, stable and smooth downward scrolling display is realized with low processor operation and storage access overhead; at the same time, the column starting addresses corresponding to each round of refresh are recorded in time sequence, which can directly form a scrolling address sequence for driving control, for sequentially executing by the data update unit.

[0090] In step S106, the generated scrolling address sequence is written into the display buffer in column order and triggers the update (which can be achieved by DMA or bus continuous writing timing with the full-screen refresh function), to obtain the updated display buffer data, realize smooth scrolling display across pages, and at the same time avoid large-scale reorganization or copying of the whole-screen buffer in the whole process, so as to adapt to display screens with different resolutions with low operation and access overhead.

[0091] In summary, the application realizes smooth scrolling display across pages without rearranging or copying the whole screen data by storing mapping column by column, setting addressing boundary of column and page, combining double buffering and refreshing step by step by column, and assisting with longitudinal displacement and bit compensation mechanism, significantly reduces the storage read and write and operation burden of the microprocessor side, improves the refreshing efficiency and real-time performance; the memory occupation is linearly controllable with resolution, facilitating deployment on 32-bit processors with limited resources, while directly reusable on platforms with sufficient resources (such as Linux system), embodying good portability and engineering adaptability; the related method and parameter configuration are unified, the code structure is simple, facilitating quick integration and maintenance, application verification has been completed in actual products, showing stable and smooth performance, low implementation cost and wide adaptation range, etc. Comprehensive advantages, with significant industrialization and competitiveness.

[0092] In combination Figure 2 As shown, Figure 2 A schematic block diagram of a screen scrolling processing device based on a display screen is provided for an embodiment of the application. The screen scrolling processing device based on the display screen 200 comprises:

[0093] A data mapping unit 201 is configured to configure display storage mapping of a target display screen column by column to obtain column mapping configuration data.

[0094] A pixel arrangement unit 202 is configured to set pixel column addresses and row page ranges of the column mapping configuration data to obtain a pixel arrangement region.

[0095] A data allocation unit 203 is configured to perform capacity calculation on the pixel arrangement region and allocate a buffer area for display data to obtain buffer area configuration data.

[0096] A pointer definition unit 204 is configured to define a first unsigned long pointer and a second unsigned long pointer according to the buffer area configuration data, respectively, and integrate to obtain a pointer set.

[0097] A displacement updating unit 205 is configured to determine a scrolling direction of the target display screen according to the pointer set, and perform displacement updating on the buffer area configuration data to generate a scrolling address sequence.

[0098] A data updating unit 206 is configured to perform data updating on the scrolling address sequence to obtain updated display cache data.

[0099] In an embodiment, the data mapping unit 201 is specifically configured to:

[0100] Parse the default value of the control register of the addressing mode to obtain an addressing mode parameter table;

[0101] Generate a command frame according to the addressing mode parameter table to obtain a command sequence.

[0102] setting a field of an addressing mode in the command sequence to a column-wise corresponding code, to obtain a column-wise command sequence;

[0103] modifying the addressing mode parameter table according to the column-wise command sequence, to obtain a column mapping initialization sequence;

[0104] recording a current display storage mapping mode based on the column mapping initialization sequence, and forming a configuration record to output column mapping configuration data.

[0105] In an embodiment, the pixel arrangement unit 202 is specifically configured to:

[0106] performing addressing parameter analysis on the column mapping configuration data, to obtain addressing control information;

[0107] constructing a column address setting command sequence based on the addressing control information, to obtain a column address configuration result;

[0108] constructing a row page address setting command sequence based on the column address configuration result, to obtain a row page address configuration result;

[0109] calculating a pixel column data range and a pixel page index range respectively by using the row page address configuration result, to generate a pixel addressing boundary;

[0110] integrating the pixel addressing boundary, to output a pixel arrangement region.

[0111] In an embodiment, the displacement updating unit 205 is specifically configured to:

[0112] calling a drawing function to fill the buffer configuration data, to respectively obtain first buffer display data and second buffer display data;

[0113] refreshing a start column of a first unsigned long pointer in the pointer set based on the first buffer display data, to obtain a start address parameter;

[0114] performing incremental iteration of the start address parameter by a unit column step, until reaching an upper limit of column data of the first unsigned long pointer, to obtain a first-stage address set;

[0115] performing cross-buffer switching on a last address of the first-stage address set based on the second buffer display data, setting a refresh position to a start column of a second unsigned long pointer in the pointer set, and continuing the incremental iteration by the unit column step, to obtain a second-stage address set;

[0116] sequentially splicing the first-stage address set and the second-stage address set, to output the scrolling address sequence.

[0117] In an embodiment, the displacement updating unit 205 is further configured to:

[0118] filling the buffer configuration data by calling a drawing function to obtain first buffer display data and second buffer display data respectively;

[0119] refreshing a start column of a second unsigned long pointer in the pointer set based on the second buffer display data to obtain a start address parameter;

[0120] decrementally traversing the start address parameter by a unit column step until reaching an upper limit of column data of the second unsigned long pointer to obtain a first-stage address set;

[0121] based on the first buffer display data, performing cross-buffer switching on a last address of the first-stage address set, setting a refresh position to a start column of a first unsigned long pointer in the pointer set, and continuing to decrementally traverse by a unit column step to obtain a second-stage address set;

[0122] sequentially splicing the first-stage address set and the second-stage address set to output the scrolling address sequence.

[0123] In an embodiment, the displacement updating unit 205 is further configured to:

[0124] filling the buffer configuration data by calling a drawing function to obtain first buffer display data and second buffer display data respectively;

[0125] based on the first buffer display data, left-shifting all column data corresponding to the first unsigned long pointer in the pointer set, and filling the highest bit of all column data corresponding to the second unsigned long pointer in the pointer set with the lowest bit of the corresponding column to obtain a first buffer column data set;

[0126] calling a full-screen refresh function to update the first buffer column data set, and then based on the second buffer display data, left-shifting all column data corresponding to the second unsigned long pointer in the pointer set to obtain a second buffer column data set;

[0127] performing left-shifting and refreshing operations in a loop until a preset number of times is reached, integrating the first buffer column data set and the second buffer column data set, and outputting a scrolling address sequence.

[0128] In an embodiment, the displacement updating unit 205 is further configured to:

[0129] The drawing function is called to fill the buffer configuration data, and first buffer display data and second buffer display data are obtained respectively;

[0130] Based on the second buffer display data, all column data corresponding to the second unsigned long pointer in the pointer set is right shifted, and the highest bit of the corresponding column is filled to the lowest bit of all column data corresponding to the first unsigned long pointer in the pointer set, and first buffer column data set is obtained;

[0131] The full-screen refresh function is called to update the data of the first buffer column data set, and based on the first buffer display data, all column data corresponding to the first unsigned long pointer in the pointer set is right shifted, and second buffer column data set is obtained;

[0132] The right shift and refresh operation are performed in a loop until a preset number of times is reached, the first buffer column data set and the second buffer column data set are integrated, and a scrolling address sequence is output.

[0133] Since the embodiments of the device part correspond to the embodiments of the method part, the embodiments of the device part are described in the description of the embodiments of the method part, and will not be described here.

[0134] The embodiment of the application further provides a computer readable storage medium, which has a computer program stored thereon, and the computer program can implement the steps provided by the above embodiment when executed. The storage medium can include: a U disk, a mobile hard disk, a read-only memory (Read-Only Memory, ROM), a random access memory (Random Access Memory, RAM), a magnetic disk or an optical disk, and various storage program codes.

[0135] The embodiment of the application further provides a computer device, which can include a memory and a processor, the memory has a computer program stored therein, and the processor can implement the steps provided by the above embodiment when calling the computer program in the memory. Of course, the computer device can also include various network interfaces, power supplies and other components.

[0136] The embodiments in the specification are described in a progressive manner, and each embodiment focuses on the difference from other embodiments. The same and similar parts of each embodiment can be referred to each other. For the system disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple, and the related parts can be referred to the method part. It should be pointed out that for ordinary skilled in the art, without departing from the principles of the application, some improvements and modifications can be made to the application, and these improvements and modifications also fall within the protection scope of the claims of the application.

[0137] It is also to be noted that, as used in this specification and the appended claims, the singular forms "a," "an," and "the" include plural referents unless the context clearly dictates otherwise. Further, the terms "comprises," "comprising," and any other variation thereof are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but can also include other elements not expressly listed or inherent to such process, method, article, or apparatus. An element proceeded by "comprises a" does not, without more constraints, exclude the presence of additional identical elements in the process, method, article, or apparatus that comprises the element.

Claims

1. A method of screen scrolling processing based on a display screen, characterized by, The method comprises the following steps: performing column-by-column configuration on display storage mapping of a target display screen to obtain column mapping configuration data; setting pixel column addresses and row page ranges of the column mapping configuration data to obtain a pixel arrangement area; performing capacity calculation on the pixel arrangement area and allocating a buffer area for display data to obtain buffer area configuration data; defining a first unsigned long pointer and a second unsigned long pointer respectively according to the buffer area configuration data, and integrating to obtain a pointer set; determining a scrolling direction of the target display screen according to the pointer set, and performing displacement update on the buffer area configuration data to generate a scrolling address sequence; performing data update on the scrolling address sequence to obtain updated display cache data.

2. The display screen-based screen scrolling processing method of claim 1, wherein, The method of performing column-by-column configuration on display storage mapping of a target display screen to obtain column mapping configuration data comprises the following steps: obtaining an addressing mode parameter table by analyzing default values of control registers of an addressing mode; generating a command frame according to the addressing mode parameter table to obtain a command sequence; setting a field of the addressing mode as a code corresponding to column-by-column configuration in the command sequence to obtain a column-by-column command sequence; modifying the addressing mode parameter table according to the column-by-column command sequence to obtain a column mapping initialization sequence; recording a current display storage mapping mode based on the column mapping initialization sequence, and forming a configuration record to output column mapping configuration data.

3. The display screen based screen scrolling processing method of claim 1, wherein, The method of setting pixel column addresses and row page ranges of the column mapping configuration data to obtain a pixel arrangement area comprises the following steps: obtaining addressing control information by performing addressing parameter analysis on the column mapping configuration data; constructing a column address setting command sequence based on the addressing control information to obtain a column address configuration result; constructing a row page address setting command sequence based on the column address configuration result to obtain a row page address configuration result; calculating a pixel column data range and a pixel page index range respectively by using the row page address configuration result to generate a pixel addressing boundary; integrating the pixel addressing boundary to output a pixel arrangement area.

4. The display screen based screen scrolling processing method of claim 1, wherein, The method of determining a scrolling direction of a target display screen according to a pointer set and performing displacement update on buffer area configuration data to generate a scrolling address sequence comprises the following steps: calling a drawing function to fill the buffer area configuration data to obtain first buffer area display data and second buffer area display data respectively; refreshing a starting column of a first unsigned long pointer in the pointer set based on the first buffer area display data to obtain a starting address parameter; performing incremental iteration of the starting address parameter by a unit column step until reaching an upper limit of column data of the first unsigned long pointer to obtain a first-stage address set; performing cross-buffer switching on a last address of the first-stage address set based on the second buffer area display data, setting a refresh position as a starting column of a second unsigned long pointer in the pointer set, and continuing to perform incremental iteration by a unit column step to obtain a second-stage address set; sequentially splicing the first-stage address set and the second-stage address set to output the scrolling address sequence.

5. The display screen based screen scrolling processing method of claim 1, wherein, The method further comprises: calling a drawing function to fill the buffer configuration data, and obtaining first buffer display data and second buffer display data respectively; based on the second buffer display data, refreshing a starting column of a second unsigned long pointer in the pointer set to obtain a starting address parameter; performing decrement iteration on the starting address parameter by unit column step until reaching an upper limit of column data of the second unsigned long pointer to obtain a first-stage address set; based on the first buffer display data, performing cross-buffer switching on a last address of the first-stage address set, setting a refresh position as a starting column of a first unsigned long pointer in the pointer set, and continuing to perform decrement iteration by unit column step to obtain a second-stage address set; sequentially splicing the first-stage address set and the second-stage address set to output the scroll address sequence.

6. The display screen based screen scrolling processing method of claim 1, wherein, The method further comprises: calling a drawing function to fill the buffer configuration data, and obtaining first buffer display data and second buffer display data respectively; based on the first buffer display data, performing left bit shift on all column data corresponding to the first unsigned long pointer in the pointer set, and filling the lowest bit of the corresponding column to the highest bit of all column data corresponding to the second unsigned long pointer in the pointer set to obtain a first buffer column data set; calling a full-screen refresh function to update the first buffer column data set, and then based on the second buffer display data, performing left bit shift on all column data corresponding to the second unsigned long pointer in the pointer set to obtain a second buffer column data set; performing left bit shift and refresh operation in a loop until a preset number of times is reached, and integrating the first buffer column data set and the second buffer column data set to output the scroll address sequence.

7. The display screen based screen scrolling processing method of claim 1, wherein, The method further comprises: calling a drawing function to fill the buffer configuration data, and obtaining first buffer display data and second buffer display data respectively; based on the second buffer display data, performing right bit shift on all column data corresponding to the second unsigned long pointer in the pointer set, and filling the highest bit of the corresponding column to the lowest bit of all column data corresponding to the first unsigned long pointer in the pointer set to obtain a second buffer column data set; calling a full-screen refresh function to update the second buffer column data set, and then based on the first buffer display data, performing right bit shift on all column data corresponding to the first unsigned long pointer in the pointer set to obtain a first buffer column data set; The right shift and refresh operation are performed cyclically until a preset number of times is reached, the first buffer column data set and the second buffer column data set are integrated, and a rolling address sequence is output.

8. A display screen-based screen scrolling processing apparatus characterized by comprising: The method comprises the following steps: A data mapping unit is configured to configure display memory mapping of a target display screen column by column to obtain column mapping configuration data. A pixel arrangement unit is configured to set pixel column addresses and row page ranges of the column mapping configuration data to obtain a pixel arrangement area. A data allocation unit is configured to perform capacity calculation on the pixel arrangement area and allocate a buffer area for display data to obtain buffer configuration data. A pointer definition unit is configured to define a first unsigned long pointer and a second unsigned long pointer according to the buffer configuration data, and integrate the pointers to obtain a pointer set. A bit shift update unit is configured to determine a rolling direction of the target display screen according to the pointer set, and perform bit shift update on the buffer configuration data to generate a rolling address sequence. A data update unit is configured to perform data update on the rolling address sequence to obtain updated display cache data.

9. A computer device, comprising: The computer readable storage medium stores a computer program, and the computer program is executed by the processor to implement the display screen-based screen rolling processing method according to any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that, The computer readable storage medium stores a computer program, and the computer program is executed by the processor to implement the display screen-based screen rolling processing method according to any one of claims 1 to 7.

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