A test excitation generation method, device, equipment, storage medium and product

Abstract

The application discloses a test excitation generation method, device, equipment, storage medium and product, and belongs to the technical field of artificial intelligence chips. The method comprises the following steps: acquiring a test case, wherein the test case comprises a plurality of pairs of device identifiers, each pair of device identifiers comprises a device identifier of a master device and a device identifier of a slave device; selecting a first excitation constraint set matched with the master device from a master device constraint set according to the device identifier of the master device in each pair of device identifiers; selecting a second excitation constraint set matched with the slave device from a slave device constraint set according to the device identifier of the slave device in each pair of device identifiers; and generating a test excitation according to the first excitation constraint set and the second excitation constraint set corresponding to each pair of device identifiers, wherein the test excitation is used for testing a communication channel from one master device to one slave device. The application realizes the testing of a plurality of communication channels by using a single test case, and significantly reduces the number of test cases.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of artificial intelligence chip, and particularly relates to a test stimulus generation method and device, equipment, storage medium and product. BACKGROUND

[0002] With the continuous expansion of integrated circuit scale, the number of masters and slaves integrated in a system on chip (SoC) increases significantly, and the interconnection structure thereof becomes increasingly complex. To ensure that data can be correctly routed and transmitted among the masters and slaves, fully verifying the interconnection network has become a key link of chip function verification.

[0003] In the prior art, for the interconnection path verification of such a multi-master multi-slave system, a one-to-one path traversal method based on directional testing is generally used. This method develops a test case (Test) for each specific Master→Slave communication path, and runs a test sequence (Sequence) specially configured for this path in the test case to verify the functional correctness of the single path. By executing all possible M N (M is the number of masters, and N is the number of slaves) test cases one by one, the coverage of all routing paths of the entire system is achieved.

[0004] Therefore, with the expansion of chip scale, the number of test cases in the prior art increases exponentially. SUMMARY

[0005] Embodiments of the present application provide a test stimulus generation method, device, equipment, storage medium and product to reduce the number of test cases.

[0006] In a first aspect, embodiments of the present application provide a test stimulus generation method, comprising:

[0007] obtaining a test case, the test case comprising a plurality of pairs of device identifiers, each pair of device identifiers comprising a device identifier of a master and a device identifier of a slave;

[0008] selecting, according to the device identifier of the master in each pair of device identifiers, a first stimulus constraint set matched with the master from a master constraint set, and selecting, according to the device identifier of the slave in each pair of device identifiers, a second stimulus constraint set matched with the slave from a slave constraint set;

[0009] generating a test stimulus according to the first stimulus constraint set and the second stimulus constraint set corresponding to each pair of device identifiers, the test stimulus being used to test a communication path from a master to a slave.

[0010] In some embodiments, for each device identifier in any pair of device identifiers, the device identifier is used to represent a device type and a device characteristic of the any device, and a matched set of stimulus constraints of the any device is determined according to the following steps:

[0011] From a set of device constraints corresponding to the device type of the any device, a set of stimulus constraints matching the device characteristic of the any device is selected.

[0012] In some embodiments, the generating a test stimulus according to a first set of stimulus constraints and a second set of stimulus constraints corresponding to each pair of device identifiers comprises:

[0013] Merging the first set of stimulus constraints, the second set of stimulus constraints, and a preset universal set of stimulus constraints to obtain an effective set of stimulus constraints;

[0014] According to the effective set of stimulus constraints, calling a stimulus generation function to generate the test stimulus.

[0015] In some embodiments, the method further comprises:

[0016] For each target stimulus constraint in the first set of stimulus constraints and the second set of stimulus constraints, if the universal set of stimulus constraints has a universal stimulus constraint of the same constraint type as the target stimulus constraint, performing a constraint conflict analysis on the constraint content of the device stimulus constraint and the universal stimulus constraint;

[0017] According to the conflict analysis result, determining the effective stimulus constraint from the target stimulus constraint and the universal stimulus constraint.

[0018] In some embodiments, the determining the effective stimulus constraint from the target stimulus constraint and the universal stimulus constraint according to the conflict analysis result comprises:

[0019] If the conflict analysis result is no conflict, determining that both the target stimulus constraint and the universal stimulus constraint are effective stimulus constraints;

[0020] If the conflict analysis result is a conflict, determining a decision stimulus constraint based on the target stimulus constraint and the universal stimulus constraint, and determining the decision stimulus constraint as the effective stimulus constraint.

[0021] In some embodiments, the determining a decision stimulus constraint based on the target stimulus constraint and the universal stimulus constraint comprises:

[0022] Obtaining constraint strengths of the target stimulus constraint and the universal stimulus constraint, wherein the constraint strengths include mandatory constraints and recommended constraints;

[0023] If the constraint strengths of the target incentive constraint and the general incentive constraint are different, the incentive constraint with the constraint strength of mandatory constraint is determined as the decision incentive constraint from the target incentive constraint and the general incentive constraint;

[0024] If the constraint strengths of the target incentive constraint and the general incentive constraint are both mandatory constraints, it is determined that the constraint merging fails, and an alarm information is generated.

[0025] If the constraint strengths of the target incentive constraint and the general incentive constraint are both mandatory constraints, it is determined that the constraint merging fails, and an alarm information is generated.

[0026] In a second aspect, an embodiment of the present application provides a test incentive generation device, comprising:

[0027] An acquisition module is configured to acquire a test case, wherein the test case comprises a plurality of pairs of device identifiers, each pair of device identifiers comprises a device identifier of a master device and a device identifier of a slave device;

[0028] A selection module is configured to select a first incentive constraint set matched with the master device from a master device constraint set according to the device identifier of the master device in each pair of device identifiers, and select a second incentive constraint set matched with the slave device from a slave device constraint set according to the device identifier of the slave device in each pair of device identifiers;

[0029] A generation module is configured to generate a test incentive according to the first incentive constraint set and the second incentive constraint set corresponding to each pair of device identifiers, wherein the test incentive is used to test a communication path from a master device to a slave device.

[0030] In a third aspect, an embodiment of the present application provides an electronic device, comprising at least one processor and a memory connected with the at least one processor, wherein:

[0031] The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor to enable the at least one processor to execute any of the above test incentive generation methods.

[0032] In a fourth aspect, an embodiment of the present application provides a storage medium, when a computer program in the storage medium is executed by a processor of an electronic device, the electronic device can execute any of the above test incentive generation methods.

[0033] In a fifth aspect, an embodiment of the present application provides a computer program product comprising a computer program, wherein the computer program is executed by a processor to implement any of the above test incentive generation methods.

[0034] In the embodiments of the present application, a test case is acquired, the test case includes multiple pairs of device identifiers, each pair of device identifiers includes a device identifier of a master device and a device identifier of a slave device; a first excitation constraint set matched with the master device is selected from the master device constraint set according to the device identifier of the master device in each pair of device identifiers, and a second excitation constraint set matched with the slave device is selected from the slave device constraint set according to the device identifier of the slave device in each pair of device identifiers; a test excitation is generated according to the first excitation constraint set and the second excitation constraint set corresponding to each pair of device identifiers, and the test excitation is used to test a communication path from one master device to one slave device. In this way, in the conventional method, an independent test case needs to be configured for each master-slave communication path, which leads to the fact that in a system of M master devices and N slave devices, M*N test cases need to be developed. In the present application, multiple pairs of master-slave device identifiers are designed in a single test case, each pair represents a communication path to be tested, and based on the predefined master device constraint set and the slave device constraint set, the corresponding excitation constraint set is matched and generated for each pair of devices, and then multiple test excitations are generated in parallel. In this way, a single test case is no longer bound to a single communication path, but a group of "master-slave device pairs" is defined, each pair of devices independently matches its excitation constraint set, and the corresponding test excitation is generated in parallel. The technical effect of testing multiple communication paths simultaneously by a single test case is achieved, and the total number of test cases is significantly reduced.

[0035] Other features and advantages of the present application will be set forth in the following description, and in part will become apparent to those skilled in the art from the description, or can be learned by practice of the application. The purposes and other advantages of the present application can be realized and attained by the structure particularly pointed out in the written description and claims, and the appended drawings. BRIEF DESCRIPTION OF DRAWINGS

[0036] The accompanying drawings, which are included to provide a further understanding of the present application and are incorporated in and constitute a part of this application, illustrate embodiments of the present application and serve to explain the present application. In the drawings:

[0037] Figure 1 An application scenario diagram of a test excitation generation method provided by the embodiments of the present application;

[0038] Figure 2 A flowchart of a test excitation generation method provided by the embodiments of the present application;

[0039] Figure 3 A system architecture schematic diagram of a test excitation generation method provided by the embodiments of the present application;

[0040] Figure 4 A structure schematic diagram of a test excitation generation device provided by the embodiments of the present application;

[0041] Figure 5 A hardware structure schematic diagram of an electronic device for implementing test stimulus generation is provided for embodiments of the present application. DETAILED DESCRIPTION

[0042] In order to reduce the number of test cases, the embodiments of the present application provide a test stimulus generation method, device, equipment, storage medium and product.

[0043] The terms "first" and "second" in the specification and claims of the present application and in the above-described drawings are used to distinguish different objects, rather than to describe a specific order. In addition, the term "comprising" and any variations thereof are intended to cover non-exclusive protection. For example, a process, method, system, product or device that includes a series of steps or units is not limited to the listed steps or units, but can optionally include steps or units not listed, or can optionally include other steps or units inherent to the process, method, product or device. "Multiple" in the present application can mean at least two, for example, two, three or more, and the embodiments of the present application are not limited.

[0044] The preferred embodiments of the present application are described below in conjunction with the drawings of the specification, it should be understood that the preferred embodiments described herein are only used to illustrate and explain the present application, and are not used to limit the present application, and the embodiments in the present application and the features in the embodiments can be combined with each other without conflict.

[0045] Before introducing the test stimulus generation method provided by the embodiments of the present application, in order to facilitate understanding, first, the technical background of the embodiments of the present application is introduced in detail.

[0046] With the continuous expansion of the scale of integrated circuits, the number of master devices (Master) and slave devices (Slave) integrated in a system on chip (SoC) increases significantly, and the interconnection structure becomes more and more complex. In order to ensure that data can be correctly routed and transmitted between a large number of master and slave devices, fully verifying the interconnection network has become a key link of chip function verification.

[0047] In the prior art, for the interconnection path verification of such a multi-master multi-slave system, a "one-to-one path traversal" method based on directional testing is generally used. This method develops a test case (Test) for each specific Master→Slave communication path, and runs a test sequence (Sequence) specially configured for this path in the test to verify the correctness of the function of the single path. By executing all possible M N (M is the number of master devices, N is the number of slave devices) test cases, the coverage of all routing paths of the entire system is achieved.

[0048] Therefore, with the expansion of chip scale, there is a problem of exponential growth of the number of test cases in the prior art.

[0049] To this end, an embodiment of the present application provides a new test stimulus generation scheme, by setting multiple pairs of device identifiers in a single test case, and by parallel matching of the stimulus constraint sets of the master and slave devices, multiple test stimuli are generated, which can test multiple communication channels with a single test case, significantly reducing the number of test cases.

[0050] In order to more clearly introduce the method of the embodiments of the present application, the application scenarios of the embodiments of the present application will be introduced first.

[0051] Referring to Figure 1 , Figure 1 The application scenario of the test stimulus generation method provided by the embodiments of the present application includes a terminal device 110 and a server 120.

[0052] In the embodiments of the present application, the terminal device 110 is used for configuration of test cases and viewing of test results by verification engineers or planners, including but not limited to devices such as tablet computers, notebook computers, desktop computers, etc.

[0053] The server 120 is used for test stimulus generation, which can be an independent physical server, a server cluster or a distributed system composed of multiple physical servers, or a cloud server providing basic cloud computing services such as cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communications, middleware services, domain name services, security services, content distribution networks (CDN), and big data and artificial intelligence platforms.

[0054] It should be noted that the test stimulus generation method in each embodiment of this application can be executed by an electronic device, which can be a server 120. The specific method includes: the server 120 obtaining test cases sent by the terminal device 110. Each test case includes multiple pairs of device identifiers, each pair including a master device identifier and a slave device identifier; based on the master device identifier in each pair, selecting a first stimulus constraint set matching the master device from the master device constraint set, and based on the slave device identifier in each pair, selecting a second stimulus constraint set matching the slave device from the slave device constraint set; generating test stimuli based on the first and second stimulus constraint sets corresponding to each pair of device identifiers. These test stimuli are used to test a communication path from a master device to a slave device. Finally, the test results of the master-slave communication path tested using the test stimuli can be sent to the terminal device 110. The master device constraint set and the slave device constraint set can be stored in the database of the server 120.

[0055] In one alternative implementation, the terminal device 110 and the server 120 can communicate via a communication network.

[0056] In one alternative implementation, the communication network is a wired network or a wireless network.

[0057] It should be noted that, Figure 1 The examples shown are merely illustrative; in reality, the number of terminal devices and servers is unlimited and is not specifically limited in the embodiments of this application.

[0058] See Figure 2 , Figure 2 A flowchart of a test stimulus generation method provided in this application embodiment, the method being applied to Figure 1 In server 120, the method includes the following steps.

[0059] In step 201, test cases are obtained. Each test case includes multiple pairs of device identifiers, and each pair of device identifiers includes a device identifier of a master device and a device identifier of a slave device.

[0060] Among them, multiple master devices (Master) and slave devices (Slave) are integrated in a system on chip (System on Chip, SoC), and inter-module communication is realized through a high-speed bus or network on chip (Network-on-Chip, NoC). SoC includes but is not limited to the following master devices: video decoder (Video Decoder), video encoder (Video Encoder), stream processor cluster (Stream Processor Cluster, SPC), whose master port is recorded as SPC_M, transfer control unit (Transfer Control Unit, TCU), master port of level 2 cache (Level 2 Cache Master Port, L2_M), die-to-die controller (Die-to-Die Controller, D2D), peer-to-peer interconnection master port (Peer-to-Peer Master Port, P2P_M), system controller (System Controller, System_ctrl), input / output controller based on UCIe protocol (I / O Ultra Chip Interconnect Express, IO_ucie), host endpoint (Host Endpoint, HOST_ep), system direct memory access controller (System Direct Memory Access, SDMA) and the like.

[0061] SoC includes but is not limited to the following slave devices: stream processor cluster slave port (Stream Processor Cluster Slave Port, SPC_S), high bandwidth memory controller or address space (High Bandwidth Memory, HBM), level 2 cache slave port (Level 2 Cache Slave Port, L2_S), peer-to-peer interconnection slave port (Peer-to-Peer Slave Port, P2P_S), PCIe slave device interface or address space (PCI Express Slave, PCIe_S).

[0062] Each master device is connected with one or more slave devices through an interconnection network to realize data transmission and control access, such as SPC_M can access HBM and L2_S for data read and write of large-scale parallel computing; SDMA can initiate data transfer to PCIe_S through NoC to realize peripheral communication; D2D controller can access HBM for memory access of remote Die in Chiplet architecture.

[0063] Among them, for the device identifier of any device in each pair of device identifiers, the device identifier is used to represent the device type and device characteristics of any device. The device type refers to the functional role of the device in the system on a chip, such as a central processing unit (CPU), a direct memory access controller (DMA), a graphics processing unit (GPU), an artificial intelligence accelerator (NPU), etc. The device characteristics include but are not limited to: interface protocol type (such as AXI4, AHB-Lite), communication bandwidth capability, maximum transmission delay, supported packet size, power domain affiliation, clock frequency range, address space distribution, etc.

[0064] According to the device type and device characteristics of any device, the device identifier of each device is pre-configured, such as directly encoding the device type and device characteristics into the device identifier, for example, SDMA_0_AXI4_BW12G represents an AXI4 interface SDMA controller with a bandwidth of 12GB / s. The device identifier can also be named using a concise number, such as MST00_0 representing the 0th interface of the 0th master device. The system pre-configures a device registry to map each device identifier to its device type (such as SDMA, SPC_M, D2D, etc.) and device characteristics (such as interface protocol AXI4, bandwidth 12GB / s, maximum delay 50ns, etc.).

[0065] In specific implementation, after the device identifiers of each master device and each slave device are pre-defined, the test case can be obtained in the following ways: manually created by a verification engineer through a configuration interface; generated by an automated test generation tool based on SoC architecture information; dynamically generated by a coverage analysis system according to un-covered paths, etc. The test case includes multiple pairs of device identifiers, each pair of device identifiers consisting of a device identifier of a master device and a device identifier of a slave device, representing a "master device -> slave device" communication path to be verified.

[0066] For example, the content of test case A is shown in Table 1:

[0067] Table 1

[0068]

[0069] As shown in Table 1 above: test case A represents the need to simultaneously verify the access of the stream processor cluster to the HBM, the write of the system DMA to the PCIe, and the read of the inter-chip interconnection to the remote memory.

[0070] In actual implementation, the number of device identification pairs in each test case can be determined according to simulation resources and simulation time, which is not limited herein.

[0071] In step 202, according to the device identification of the master device in each pair of device identifications, a first stimulus constraint set matched with the master device is selected from the master device constraint set, and according to the device identification of the slave device in each pair of device identifications, a second stimulus constraint set matched with the slave device is selected from the slave device constraint set.

[0072] The stimulus constraint refers to a set of rules pre-configured for limiting the generation range of the test stimulus to make it conform to the interface protocol, performance capability, functional features and system environment requirements of a specific hardware module.

[0073] In actual implementation, the stimulus constraint set of the master device can include request types (such as read operation, write operation), request sizes (such as 4 bytes, 8 bytes), request lengths (such as 256 times), address types (such as physical address, virtual address), user signals (user-defined additional information such as security attribute, thread ID, QoS level) and the like; the stimulus constraint set of the slave device can include address ranges (such as 0x8000_0000 ~ 0x8FFF_FFFF), supported maximum delay (such as response time ≤ 50 ns), bypass control signals, cache control signals and the like.

[0074] In actual implementation, a stimulus constraint mapping table corresponding to each master device identification can be pre-maintained, and then the first stimulus constraint set corresponding to the master device identification is searched from the mapping table, and a stimulus constraint set mapping table corresponding to each slave device identification is pre-maintained, and then the second stimulus constraint set corresponding to the slave device identification is searched from the mapping table.

[0075] For example, the content of the master device stimulus constraint mapping table is { (master device 1: stimulus constraint 1, stimulus constraint 2, stimulus constraint 3); (master device 2: stimulus constraint 4, stimulus constraint 5, stimulus constraint 6); (master device 3: stimulus constraint 7, stimulus constraint 8, stimulus constraint 9)…}, assuming that the device identification of the master device is 1, then the first stimulus constraint set searched is (stimulus constraint 1, stimulus constraint 2, stimulus constraint 3).

[0076] For another example, the content of the slave device stimulus constraint mapping table is { (slave device 1: stimulus constraint 11, stimulus constraint 21, stimulus constraint 31); (slave device 2: stimulus constraint 41, stimulus constraint 51, stimulus constraint 61); (slave device 3: stimulus constraint 71, stimulus constraint 81, stimulus constraint 91)…}, assuming that the device identification of the slave device is 2, then the second stimulus constraint set searched is (stimulus constraint 41, stimulus constraint 51, stimulus constraint 61).

[0077] In implementation, for the device type and device characteristics represented in the device identifier corresponding to each device, a set of excitation constraints corresponding to the device characteristics of any device can also be selected from the set of device constraints corresponding to the device type of any device.

[0078] For example, a device excitation constraint set template library is pre-maintained, in which a plurality of constraint templates are organized according to device types (such as stream processor cluster SPC_M and high bandwidth memory HBM). Each template contains a plurality of pre-defined excitation constraint configurations, corresponding to different device characteristic combinations respectively.

[0079] The device constraint set template library can be as shown in Table 2:

[0080] Table 2

[0081]

[0082] When the device identifier of a master device (such as "SPC_M_0_AXI5_BW16G") is obtained, the device type (SPC_M) and device characteristics (interface protocol AXI5 and bandwidth 16GB / s) are first parsed; then the corresponding master device constraint set (set 1 and set 2) is loaded from the device constraint set template library according to the device type; and in the set 1 and set 2, the configuration item matching the device characteristics is filtered out, i.e. set 2 is taken as the first excitation constraint set of the master device.

[0083] Similarly, for the slave device identifier (such as "HBM_0_AXI4_LAT35ns"), the device type (HBM) and characteristics (protocol AXI4 and maximum delay 35ns) are parsed, and then the corresponding slave device constraint set (set 11 and set 21) is loaded from the device constraint set template library according to the device type, and the set 21 is taken as the second excitation constraint set of the slave device according to the device characteristics from set 11 and set 21 that conforms to the protocol AXI4 and the maximum delay is less than or equal to 35ns.

[0084] In this way, the application realizes dynamic and fine matching of excitation constraints, without the need to configure constraints for each device instance separately, thereby improving the scalability and automation level of the system.

[0085] In step 203, a test excitation is generated according to the first excitation constraint set and the second excitation constraint set corresponding to each pair of device identifiers, and the test excitation is used to test the communication path from a master device to a slave device.

[0086] The test stimulus refers to a simulation stimulus signal or a transaction-level data packet injected into an input end of a system under test in a communication channel verification process, used to simulate a communication behavior in a real scene, trigger a system response, and verify the correctness of the function.

[0087] In specific implementation, the first stimulus constraint set corresponding to the master device is used to constrain the response rule of the master device, and the second stimulus constraint set corresponding to the slave device is used to constrain the application rule of the slave device. In order to further enhance the strategy control at the system level, a general stimulus constraint set is also provided in the present application. The general stimulus constraint set is a set of preset system-level rules, which is applicable to the communication channel between all master devices and slave devices, including but not limited to the constraint set of the master device, the constraint set of the slave device, and the constraint set at the system level (such as illegal address range, maximum number of concurrent master devices, global timeout threshold, data integrity check enable flag, power domain access rule, etc.). The general stimulus constraint set is used to ensure that all communication behaviors conform to the overall running environment, security policy and verification target of the SoC, and avoid the generation of test stimulus that may be "grammatically correct but semantically incorrect", leading to false positives, false negatives, simulation crashes or security risks.

[0088] Therefore, first, the first stimulus constraint set, the second stimulus constraint set, and the preset general stimulus constraint set can be merged to obtain an effective stimulus constraint set; and then, according to the effective stimulus constraint set, a stimulus generation function is called to generate a test stimulus.

[0089] In specific implementation, the process of merging the first stimulus constraint set, the second stimulus constraint set, and the preset general stimulus constraint set is actually not a simple splicing, but a constraint fusion process with clear rules, executability, and verifiability. Since the general stimulus constraint set includes but is not limited to the constraint set of the master device, the constraint set of the slave device, and the constraint set at the system level, and different general stimulus constraint sets can be set according to the device types of the master device and the slave device, such as the general stimulus constraint set 1 corresponding to the master device of device type 1 and the slave device of device type 2, the general stimulus constraint set 2 corresponding to the master device of device type 2 and the slave device of device type 3, etc. Therefore, in the merging process, each target stimulus constraint in the first stimulus constraint set and the second stimulus constraint set may have a constraint conflict with the stimulus constraint in the general stimulus constraint set. For example, when the first stimulus constraint set and the general stimulus constraint set make incompatible and mutually exclusive requirements on the same resource (such as address space) that cannot be satisfied at the same time, it constitutes a "constraint conflict". For example, the address range in the first stimulus constraint set is "0x7000_0000~0x9FFF_FFFF", and the address range in the general stimulus constraint set is "0x8000_0000~0x8FFF_FFFF", that is, there is a conflict between the valid address of the master device and the system valid address.

[0090] In this case, the effective incentive constraint can be determined according to the following steps.

[0091] Step 1: For each target incentive constraint in the first incentive constraint set and the second incentive constraint set, if the general incentive constraint set has a general incentive constraint of the same constraint type as the target incentive constraint, perform a constraint conflict analysis on the constraint content of the device incentive constraint and the general incentive constraint.

[0092] For example: the target incentive constraint is interface protocol: AXI5, and the general incentive constraint set has a general incentive constraint of the same constraint type (interface protocol) as the target incentive constraint: interface protocol: AXI4.

[0093] For another example: the target incentive constraint is address range: 0x7000_0000 ~ 0xFFFF_FFFF, and the general incentive constraint set has a general incentive constraint of the same constraint type (address range) as the target incentive constraint: address range: 0x8000_0000 ~ 0x8FFF_FFFF.

[0094] Step 2: According to the conflict analysis result, determine the effective incentive constraint in the target incentive constraint and the general incentive constraint.

[0095] In specific implementation, if the conflict analysis result is no conflict, it is determined that the target incentive constraint and the general incentive constraint are both effective incentive constraints; wherein, no conflict means that the requirements of the target incentive constraint and the general incentive constraint on the same constraint type can be met at the same time, and the combined constraint set is non-empty, legal and executable.

[0096] For example, taking the target incentive constraint as interface protocol: AXI5 and the general incentive constraint set having a general incentive constraint of the same constraint type (interface protocol) as the target incentive constraint: interface protocol: AXI4 as an example, if the system topology supports protocol downgrade or protocol conversion between AXI5 master device and AXI4 slave device, it is determined that there is no conflict; at this time, the target incentive constraint interface protocol: AXI5 and the general incentive constraint interface protocol: AXI4 are both effective incentive constraints.

[0097] In specific implementation, if the conflict analysis result is conflict, the decision incentive constraint is determined based on the target incentive constraint and the general incentive constraint, and the decision incentive constraint is determined as the effective incentive constraint.

[0098] In implementation, the constraint strength of the target incentive constraint and the general incentive constraint can be acquired, wherein the constraint strength includes mandatory constraint and suggested constraint; here, the mandatory constraint is a system-level rule that must be met, and the suggested constraint is an optimization target that is suggested to be met, for example, the mandatory constraint is that access to illegal addresses is prohibited, the ECC must be turned on, and the protocol version is compatible, and the suggested constraint is burst length, QoS range, maximum concurrency, etc. If the constraint strength of the target incentive constraint and the general incentive constraint is different, the incentive constraint with the constraint strength of mandatory constraint in the target incentive constraint and the general incentive constraint is determined as the decision incentive constraint.

[0099] For example, the target incentive constraint is an interface protocol AXI5, and the general incentive constraint set includes a general incentive constraint with the same constraint type (interface protocol) as the target incentive constraint, for example, the interface protocol AXI3; if AXI5 is incompatible with AXI3, then the conflict analysis result is that there is a conflict.

[0100] At this time, it is assumed that the interface protocol in the target incentive constraint is a mandatory constraint, and the interface protocol in the general incentive constraint set is a suggested constraint, and then the interface protocol AXI5 in the target incentive constraint can be determined as the decision incentive constraint.

[0101] In implementation, if the constraint strength of the target incentive constraint and the general incentive constraint is both mandatory constraint, it is determined that the constraint merging fails, and an alarm information is generated.

[0102] For example, the target incentive constraint is an address range 0x1000_0000~0x1FFF_FFFF, and is a mandatory constraint, and the general incentive constraint is an address range 0x8000_0000~0x8FFF_FFFF, and is a mandatory constraint; at this time, the constraint merging fails, and an alarm information is generated.

[0103] If the constraint strength of the target incentive constraint and the general incentive constraint is both suggested constraint, the target incentive constraint and the general incentive constraint are fused, and the fused incentive constraint is determined as the decision incentive constraint.

[0104] For example, the target incentive constraint is a QoS range [0, 15], and is a suggested constraint, and the general incentive constraint is a QoS range [0, 7], and is a suggested constraint; the target incentive constraint and the general incentive constraint are fused, for example, the intersection [0, 7] is taken, and the fused incentive constraint [0, 7] is determined as the decision incentive constraint.

[0105] For another example, the target incentive constraint is a QoS range [0, 7], and is a suggested constraint, and the general incentive constraint is a QoS range [8, 15], and is a suggested constraint; the target incentive constraint and the general incentive constraint are fused, at this time, there is no intersection, and a default value can be taken, for example, QoS=0 is determined as the decision incentive constraint.

[0106] In implementation, assuming that the effective incentive constraint set is, then the test incentive can be generated by calling the incentive generation function, such as calling the incentive generation function to randomize each effective incentive constraint in the effective incentive constraint set, wherein the randomization process refers to a process of assigning a determined value to the variable corresponding to all effective incentive constraints, such as the effective incentive constraint: the QoS range is [8, 15], then the QoS range obtained after randomization can be QoS=10.

[0107] The present application obtains test cases, each test case including a plurality of pairs of device identifiers, each pair of device identifiers including a device identifier of a master device and a device identifier of a slave device; according to the device identifier of the master device in each pair of device identifiers, selecting a first incentive constraint set matched with the master device from the master device constraint set, and according to the device identifier of the slave device in each pair of device identifiers, selecting a second incentive constraint set matched with the slave device from the slave device constraint set; according to the first incentive constraint set and the second incentive constraint set corresponding to each pair of device identifiers, generating a test incentive, the test incentive being used to test a communication path from one master device to one slave device. In this way, for a system including M master devices and N slave devices in the conventional method, M×N test cases need to be developed to implement path testing. The present application includes a plurality of pairs of device identifiers in a single test case, and generates multiple test incentives by parallel matching of the incentive constraint sets of the master devices and the slave devices, so that a single test case can test multiple communication paths, thereby significantly reducing the number of test cases.

[0108] The scheme of the embodiment of the present application will be introduced below in combination with specific examples.

[0109] Referring to Figure 3 , Figure 3 The system architecture diagram of a test incentive generation method provided by the embodiment of the present application includes three parts, which are determining the to-be-tested communication path in each test case, determining the master device incentive constraint and the slave device incentive constraint in each to-be-tested communication path, and merging the master device incentive constraint and the slave device incentive constraint with the general incentive constraint to obtain the effective incentive constraint.

[0110] The three parts will be introduced in detail below.

[0111] The first part: determining the to-be-tested communication path in each test case.

[0112] Firstly, the number and characteristics of the Master in the system to be tested can be analyzed, and the string corresponding to the name of each Master is defined to distinguish the access selection of different Masters, for example, MST00_0 represents the zeroth layer interface of Master 0, so that the target path to be tested in the test case can be identified by the string, and the subsequent string parsing function can be well identified. According to the naming method of Master, the string corresponding to the name of each Slave is defined to distinguish the access selection of different Slaves; for example, SLV00_0 represents Slave 0.

[0113] Then, according to the simulation resources and simulation time, the number of Master access Slave paths tested by each test case is reasonably allocated, such as 10, 12.

[0114] Finally, under different test cases, the following simulation parameters are added: Master path selection, Slave path selection; and support for passing in multiple Master and multiple Slave paths; among them, multiple Master / Slave strings can be separated by a separator, such as ".".

[0115] For example, there are 4 Masters and 4 Slaves in the system to be tested, the Masters are the zeroth layer of SPC, the first layer of SPC, the second layer of SPC and the third layer of SPC, and the Slaves are l2c0, l2c1, l2c2 and l2c3; each Master can access each Slave.

[0116] Firstly, according to the device type and device characteristics of Master and Slave, for example, each Master and Slave is named as follows:

[0117] Master: SPC00_0, SPC00_1, SPC00_2, SPC00_3;

[0118] Slave: L2000_0, L2000_1, L2000_2, L2000_3.

[0119] Then, it is assumed that according to the simulation resources and simulation time, it is determined that each test case can test 4 communication paths.

[0120] So test case 1 can be as follows:

[0121] “test1”

[0122] “+ Master _name=” “SPC00_0.SPC00_0. SPC00_1. SPC00_1”

[0123] “+ Slave _name=” “L2000_0.L2000_1.L2000_2.L2000_3”

[0124] Since the device identifiers in the test case appear in pairs, test1 is used to test four communication paths: SPC00_0 to L2000_0, SPC00_0 to L2000_1, SPC00_1 to L2000_2, and SPC00_1 to L2000_3.

[0125] Second part: determine the master excitation constraint and the slave excitation constraint in each communication path to be tested.

[0126] First, get test1, and then the base test module (a module that performs actual excitation generation) calls the parse function to parse the communication paths to be tested in test1. After parsing, the parsed results can be stored in the corresponding Master queue and Slave queue. Optionally, the base test can be written in system-level verification language or System Verilog (SV).

[0127] For example, the Master queue is: SPC00_0 SPC00_0 SPC00_1 SPC00_1.

[0128] The Slave queue is: L2000_0 L2000_1 L2000_2 L2000_3.

[0129] Then, according to the Master queue and the Slave queue, traverse each Master in the Master queue and each Slave in the Slave queue to determine the communication paths to be tested, i.e., the four communication paths: SPC00_0 to L2000_0, SPC00_0 to L2000_1, SPC00_1 to L2000_2, and SPC00_1 to L2000_3. For each communication path, the base test selects the excitation constraint sequence constrain (first excitation constraint set) matching the identifier of each Master from the pre-set master constraint set through master selection mst select, and selects the excitation constraint sequence constrain (second excitation constraint set) matching the identifier of each Slave from the pre-set slave constraint set through slave selection slv select, and passes the selected constraints to the base sequence.

[0130] The first set of stimulus constraints includes, for example, some or all of a request type, a request size, a request length, an address type, and a user signal, and the second set of stimulus constraints includes, for example, some or all of an address range, a maximum supported latency, a bypass control signal, and a cache control signal.

[0131] The third part: merging the master device stimulus constraints (the first set of stimulus constraints) and the slave device stimulus constraints (the second set of stimulus constraints) with the common sequence (the common set of stimulus constraints) to obtain effective stimulus constraints.

[0132] For example, the first set of stimulus constraints is {stimulus constraint 1, stimulus constraint 2, and stimulus constraint 3}, the second set of stimulus constraints is {stimulus constraint 4, stimulus constraint 5, and stimulus constraint 6}, and the common set of stimulus constraints is a set of preset system-level rules applicable to all communication paths between master devices and slave devices, including but not limited to the constraint set of the master device, the constraint set of the slave device, and the constraint set at the system level (such as an illegal address range, a maximum number of concurrent master devices, a global timeout threshold, a data integrity check enable flag, and a power domain access rule). For example, the common set of stimulus constraints is {stimulus constraint 6, stimulus constraint 7, and stimulus constraint 8}, and the base sequence calls a stimulus generation function according to the effective set of stimulus constraints (the first set of stimulus constraints sequence constrain and the second set of stimulus constraints sequence constrain) and the common set of stimulus constraints common sequence to generate a test stimulus.

[0133] Optionally, applying the first set of stimulus constraints and the second set of stimulus constraints to the unified common set of stimulus constraints can be achieved by using a constraint application mechanism in a universal verification methodology (UVM), including using an apply_constraints() function or a uvm_do_with macro. The above test stimulus generation method can be executed in a UVM verification environment, and the base sequence is a basic sequence, which can be a UVM sequence.

[0134] Specifically, each stimulus constraint can be randomized. If there is a conflict among the stimulus constraints in the first set of stimulus constraints, the second set of stimulus constraints, and the common set of stimulus constraints, the randomization can fail. Therefore, the stimulus constraints that can cause conflicts can be set as suggested constraints (soft constraints), so that when merging, if there is a conflict, the soft constraint will be overwritten by a higher-priority mandatory constraint (hard constraint). Finally, the test stimulus is sent to the system under test.

[0135] The application can quickly obtain the incentive constraint conditions of different master-slave device combinations by maintaining the incentive constraint sets corresponding to the master device identifiers and the slave device identifiers, and generates the target test incentive for testing the communication path by combining the preset general incentive constraint with the test incentive. This method can quickly generate a new test incentive by changing the configuration or constraint condition in the test case, thereby improving the efficiency of test preparation and the flexibility of test scenarios.

[0136] Meanwhile, the application establishes a hierarchical test architecture by combining the parameterized configuration information, the modularized constraint set and the general incentive constraint. When the system topology or device behavior changes, only the configuration information needs to be updated or the corresponding constraint set needs to be modified, thereby converting the maintenance work from complex code-level modification to simple configuration-level adjustment, and significantly reducing the maintenance cost and the related error risk.

[0137] In addition, the general incentive constraint of the application is independent of the specific system topology, and has strong reusability. Meanwhile, the constraint set of the master device and the slave device is designed in a modularized manner, and can also be transplanted and reused in different projects.

[0138] Figure 4 A structural schematic diagram of a test incentive generation device provided by an embodiment of the application includes:

[0139] The acquisition module 401 is configured to acquire a test case, and the test case includes multiple pairs of device identifiers, each pair of device identifiers including a device identifier of a master device and a device identifier of a slave device.

[0140] The selection module 402 is configured to select, according to the device identifier of the master device in each pair of device identifiers, a first incentive constraint set matched with the master device from a master device constraint set, and select, according to the device identifier of the slave device in each pair of device identifiers, a second incentive constraint set matched with the slave device from a slave device constraint set.

[0141] The generation module 403 is configured to generate a test incentive according to the first incentive constraint set and the second incentive constraint set corresponding to each pair of device identifiers, and the test incentive is used to test a communication path from a master device to a slave device.

[0142] In some embodiments, for the device identifier of any device in each pair of device identifiers, the device identifier is used to represent the device type and the device characteristics of the any device.

[0143] The selection module 402 is specifically configured to determine the incentive constraint set matched with the any device according to the following steps:

[0144] From the device constraint set corresponding to the device type of the any device, select the incentive constraint set matched with the device characteristics of the any device.

[0145] In some embodiments, the generating module 403 is specifically configured to:

[0146] merge the first set of excitation constraints, the second set of excitation constraints, and a preset universal set of excitation constraints to obtain an effective set of excitation constraints;

[0147] According to the effective set of excitation constraints, call an excitation generation function to generate the test excitation.

[0148] In some embodiments, the method further comprises:

[0149] The analysis module 404 is configured to, for each target excitation constraint in the first set of excitation constraints and the second set of excitation constraints, if the universal set of excitation constraints has a universal excitation constraint of the same constraint type as the target excitation constraint, perform constraint conflict analysis on the constraint content of the device excitation constraint and the universal excitation constraint.

[0150] According to the conflict analysis result, determine the effective excitation constraint from the target excitation constraint and the universal excitation constraint.

[0151] In some embodiments, the analysis module 404 is specifically configured to:

[0152] If the conflict analysis result is no conflict, determine that both the target excitation constraint and the universal excitation constraint are effective excitation constraints.

[0153] If the conflict analysis result is a conflict, determine a decision excitation constraint based on the target excitation constraint and the universal excitation constraint, and determine the decision excitation constraint as the effective excitation constraint.

[0154] In some embodiments, the analysis module 404 is specifically configured to:

[0155] Obtain the constraint strength of the target excitation constraint and the universal excitation constraint, wherein the constraint strength includes mandatory constraints and recommended constraints.

[0156] If the constraint strength of the target excitation constraint and the universal excitation constraint is different, determine the excitation constraint with mandatory constraint strength as the decision excitation constraint from the target excitation constraint and the universal excitation constraint.

[0157] If the constraint strength of the target excitation constraint and the universal excitation constraint is both mandatory, determine that the constraint merging fails, and generate an alarm information.

[0158] If the constraint strength of the target incentive constraint and the constraint strength of the general incentive constraint are both suggested constraints, the target incentive constraint is fused with the general incentive constraint, and the fused incentive constraint is determined as a decision incentive constraint.

[0159] The division of the modules in the embodiments of the present application is illustrative, and is merely a logical function division. In actual implementation, another division manner can be used. In addition, the function modules in the embodiments of the present application can be integrated in one processor, or can be physically separated, or two or more modules can be integrated in one module. The coupling between the modules can be realized through some interfaces. The interfaces are usually electrical communication interfaces, but can also be mechanical interfaces or other form interfaces. Therefore, the modules described as separate components can be or can not be physically separated, and can be located in one place or distributed to different locations of the same or different devices. The integrated modules can be realized in the form of hardware or in the form of software function modules.

[0160] After introducing the test incentive generation method and device of the example embodiments of the present application, next, the electronic device according to another example embodiment of the present application is introduced.

[0161] The electronic device 130 implemented according to this embodiment of the present application is described below with reference to Figure 5 Figure 5 The displayed electronic device 130 is only an example, and should not bring any limitation to the functions and use range of the embodiments of the present application.

[0162] As shown in Figure 5 The electronic device 130 is shown in the form of a general electronic device. The components of the electronic device 130 can include, but are not limited to, the at least one processor 131, the at least one memory 132, and the bus 133 connecting different system components (including the memory 132 and the processor 131).

[0163] The bus 133 represents one or more of several types of bus structures, including a memory bus or memory controller, a peripheral bus, a processor or local bus using any of a variety of bus structures.

[0164] The memory 132 can include a readable medium in the form of a volatile memory, such as a random access memory (RAM) 1321 and / or a cache memory 1322, and can further include a read-only memory (ROM) 1323.

[0165] ​The memory 132 can also include a program / utility 1325 having a set (at least one) of program modules 1324, including but not limited to, an operating system, one or more application programs, other program modules, and program data, each of which can govern, for example, the operation of the network environment.

[0166] The electronic device 130 can also communicate with one or more external devices 134 such as a keyboard or a pointing device, by way of I / O interface 135. Additionally, the electronic device 130 can communicate to one or more devices that enable user interaction with the electronic device 130, and / or one or more devices that enable communication of the electronic device 130 to other devices (such as a router, a modem, etc.). Such communication can occur via an I / O interface 135. Also, the electronic device 130 can communicate to one or more networks (such as a local area network (LAN), a wide area network (WAN), and / or the Internet) through a network adapter 136. It will be appreciated that the network adapter 136 can be communicatively coupled to the other

[0167] In an example embodiment, the electronic device of the present application can at least include at least one processor, and a memory connected to the at least one processor in communication, wherein the memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor to enable the at least one processor to perform the steps of any of the test stimulus generation methods provided by the embodiments of the present application.

[0168] In an example embodiment, a storage medium is also provided, and when a computer program in the storage medium is executed by a processor of an electronic device, the electronic device can perform any of the test stimulus generation methods described above. Optionally, the storage medium can be a non-transitory computer readable storage medium, for example, the non-transitory computer readable storage medium can be a ROM, a random access memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, and an optical data storage device, etc.

[0169] In an example embodiment, a computer program product is also provided, and when the computer program is executed by a processor, any of the test stimulus generation methods provided by the present application is implemented.

[0170] It should be noted that, although several modules or sub-modules of the apparatus are mentioned in the above detailed description, such a division is merely exemplary and not mandatory. Indeed, according to an embodiment of the application, the features and functionalities of two or more modules described above can be embodied in one module. Conversely, the features and functionalities of one module described above can be further divided into modules.

[0171] Moreover, although the operations of the method(s) herein can be described in a particular, sequential order, this order is not meant to be a limitation and is not intended to imply that

[0172] Those of skill in the art would understand that embodiments of the present application can be provided as a method, a system, or a computer program product. Accordingly, the present application can take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present application can take the form of a computer program product on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROMs, optical storage devices, and the like) embodying computer-readable program code.

[0173] While the preferred embodiments of the application have been described above, it should be understood that they have been presented by way of example only, and not limitation. Numerous changes to the embodiments can be made by those skilled in the art without departing from the spirit and scope of the application. Accordingly, the appended claims encompass all such modifications of the preferred embodiments as fall within the scope of the application.

[0174] Obviously, many modifications and variations of the present application are possible in light of the above teachings. It is, therefore, to be understood that within the scope of the appended claims and their equivalents, the application can be practiced otherwise than as specifically described.

Claims

1. A method for generating test stimuli, characterized in that, include: Obtain test cases, which include multiple pairs of device identifiers, each pair of device identifiers including a device identifier of a master device and a device identifier of a slave device; Based on the device identifier of the master device in each pair of device identifiers, a first set of incentive constraints matching the master device is selected from the master device constraint set, and based on the device identifier of the slave device in each pair of device identifiers, a second set of incentive constraints matching the slave device is selected from the slave device constraint set. Test stimuli are generated based on the first and second incentive constraint sets corresponding to each pair of device identifiers. These test stimuli are used to test the communication path from a master device to a slave device. For each pair of device identifiers, the device identifier is used to characterize the device type and characteristics of that device, and the set of incentive constraints matching that device is determined according to the following steps: From the set of device constraints corresponding to the device type of any device, select a set of incentive constraints that matches the device characteristics of any device.

2. The method as described in claim 1, characterized in that, The step of generating test stimuli based on the first and second stimulus constraint sets corresponding to each pair of device identifiers includes: The first set of incentive constraints, the second set of incentive constraints, and the preset set of general incentive constraints are merged to obtain the effective set of incentive constraints. Based on the set of effective incentive constraints, the incentive generation function is invoked to generate the test incentives.

3. The method as described in claim 2, characterized in that, The method further includes: For each target incentive constraint in the first incentive constraint set and the second incentive constraint set, if there is a general incentive constraint in the general incentive constraint set that has the same constraint type as the target incentive constraint, then a constraint conflict analysis is performed on the constraint content of the target incentive constraint and the general incentive constraint. Based on the conflict analysis results, determine the effective incentive constraints among the target incentive constraints and the general incentive constraints.

4. The method as described in claim 3, characterized in that, The step of determining the effective incentive constraints among the target incentive constraints and the general incentive constraints based on the conflict analysis results includes: If the conflict analysis result is that there is no conflict, then both the target incentive constraint and the general incentive constraint are determined to be effective incentive constraints. If the conflict analysis results indicate that a conflict exists, then based on the target incentive constraint and the general incentive constraint, a decision incentive constraint is determined, and the decision incentive constraint is identified as the effective incentive constraint.

5. The method as described in claim 4, characterized in that, The step of determining decision incentive constraints based on the target incentive constraints and the general incentive constraints includes: Obtain the constraint strength of the target incentive constraint and the general incentive constraint, wherein the constraint strength includes mandatory constraints and suggested constraints; If the target incentive constraint and the general incentive constraint have different constraint strengths, then the incentive constraint with a mandatory constraint strength among the target incentive constraint and the general incentive constraint shall be determined as the decision incentive constraint. If both the target incentive constraint and the general incentive constraint are mandatory constraints, then the constraint merging is determined to have failed, and an alarm message is generated. If the constraint strength of both the target incentive constraint and the general incentive constraint is a suggestion constraint, then the target incentive constraint and the general incentive constraint are merged, and the merged incentive constraint is determined as the decision incentive constraint.

6. A test stimulus generation device, characterized in that, include: The acquisition module is used to acquire test cases, which include multiple pairs of device identifiers, each pair of device identifiers including a device identifier of a master device and a device identifier of a slave device. The selection module is used to select a first set of incentive constraints that matches the master device from the master device constraint set based on the master device's device identifier in each pair of device identifiers, and to select a second set of incentive constraints that matches the slave device from the slave device constraint set based on the slave device's device identifier in each pair of device identifiers; The generation module is used to generate test stimuli based on the first and second incentive constraint sets corresponding to each pair of device identifiers. The test stimuli are used to test the communication path from a master device to a slave device. For each pair of device identifiers, the device identifier is used to characterize the device type and device characteristics of that device; The selection module is specifically used to determine the set of excitation constraints that match any of the devices according to the following steps: From the set of device constraints corresponding to the device type of any device, select a set of incentive constraints that matches the device characteristics of any device.

7. An electronic device, characterized in that, include: At least one processor, and a memory communicatively connected to said at least one processor, wherein: The memory stores a computer program that can be executed by the at least one processor to enable the at least one processor to perform the method as described in any one of claims 1-5.

8. A storage medium, characterized in that, When the computer program in the storage medium is executed by the processor of the electronic device, the electronic device is able to perform the method as described in any one of claims 1-5.

9. A computer program product, characterized in that, Includes a computer program that, when executed by a processor, implements the method of any one of claims 1-5.

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