Temperature compensation circuit of LC voltage-controlled oscillator

Abstract

The invention discloses a temperature compensation circuit of an LC voltage-controlled oscillator, which relates to an analog integrated circuit and comprises a temperature sensor used for collecting environment temperature; the analog-to-digital converter is used for converting the environment temperature into a decimal temperature T; the digital mapping code table is used for converting the decimal temperature T into a binary code C; the digital-to-analog converter is used for converting the binary code C into a controlled current I and calculating the controlled current I according to the binary code C and the controlled current I; the current mirror is used for copying the controlled current I and enabling the copied current to flow through a resistor so as to generate an output voltage VTUNE; and the output voltage VTUNE is output to an adjustable compensation capacitor array in the LC voltage-controlled oscillator for frequency drift compensation of the LC voltage-controlled oscillator. According to the invention, a linear part in a C-V characteristic curve of the varactor can be more effectively utilized, so that the temperature compensation precision is greatly improved, and the voltage-controlled oscillator can adapt to various working frequencies and process conditions of the voltage-controlled oscillator.

Description

Technical Field

[0001] This invention relates to analog integrated circuits, and more specifically, to a temperature compensation circuit for an LC voltage-controlled oscillator. Background Technology

[0002] Any commercial application requires circuits and systems to operate continuously over a wide temperature range. In high-speed data link systems with significant temperature variations, the frequency offset of the voltage-controlled oscillator in the phase-locked loop (PLL) is a critical design issue.

[0003] In an LC oscillator, the oscillation frequency is determined by the inductance and effective capacitance. A lossy LC oscillator can be modeled as follows: Figure 1 As shown, the inductor and capacitor are modeled as an ideal capacitor and an ideal inductor in series with parasitic resistance. Its resonant frequency is:

[0004]

[0005] in, Furthermore, due to the parasitic resistance R of the on-chip capacitor C The parasitic resistance R is much smaller than that of the on-chip inductor. L [1] Therefore, equation (2.1) can be simplified to:

[0006]

[0007] Considering the temperature effect, the effective series resistance of a lossy inductor can be modeled as:

[0008]

[0009] Where R0 is the resistance value at temperature T0, and α R It is the first-order temperature coefficient of resistance.

[0010] Substituting equation 2.3 into equation 2.2, the resonant frequency can be approximated as:

[0011]

[0012] For metallic copper, its first-order temperature coefficient of resistance α R =3×10 -3 K -1 The oscillation frequency of the LC oscillator exhibits a negative temperature coefficient. 0 .

[0013] When the frequency drift exceeds the tuning range of the LC voltage controlled oscillator, the phase-locked loop will be unlocked. In order to avoid the phase-locked loop being unlocked due to the frequency drift, the industry usually adopts the following three methods: (1) interrupting the phase-locked loop and re-calibrating the frequency band; (2) using a high-gain voltage controlled oscillator, so that the frequency-temperature drift is less than half of the fine-tuning frequency range of the voltage controlled oscillator; (3) using a low-gain voltage controlled oscillator and performing temperature compensation 00000 . Since the phase-locked loop cannot be interrupted in code division multiple access (CDMA) type application scenarios, method (1) is not available; high VCO gain will reduce the spurious and phase noise performance of the phase-locked loop, so method (2) is not available; therefore, it is of great significance to study method (3) 0 .

[0014] Since the frequency drift of the voltage controlled oscillator caused by temperature change will change greatly under different working frequencies and process conditions, in order to ensure that the frequency-temperature drift of the voltage controlled oscillator is small under various conditions, the temperature compensation circuit of the voltage controlled oscillator needs to be reconfigurable.

[0015] The traditional temperature compensation circuit is to set one or more sets of varactor diodes for temperature compensation in the voltage controlled oscillator, and use a positive temperature coefficient (PTAT) current source to form a negative temperature coefficient (NTC) voltage source, and the voltage source reversely biases the varactor diode 0 . The temperature characteristics of the above NTC voltage source and the reverse bias varactor diode circuit are that as the temperature increases, the voltage provided by the voltage source is lower, the voltage difference between the two sides of the varactor diode is larger, and then the temperature compensation varactor diode capacitance value is reduced, thereby increasing the oscillation frequency of the voltage controlled oscillator, and compensating the characteristic that the oscillation frequency decreases as the temperature rises.

[0016] As shown in Figure 2 , when no compensation is performed, the oscillation frequency of the VCO decreases as the temperature rises, and the descending slope is relatively uniform, which is approximately linear. As shown in Figure 3 , the C-V characteristic curve of the varactor diode is obtained by simulating the compensation varactor diode in the VCO according to the actual working mode (gate connected to power supply, substrate connected to adjustment voltage), and it can be seen that the capacitance value decreases as the adjustment voltage increases, and the slope of the C-V curve changes greatly. The slope (absolute value) of the C-V characteristic curve changes as follows: as the adjustment voltage increases, the slope of the C-V curve first increases and then decreases, and the slope on the side close to the power supply voltage is larger, and the adjustment effect on the VCO working frequency is more obvious. It can be seen that setting the compensation varactor diode has a good effect on temperature compensation.

[0017] But the conventional structure only sets switches at the varactor and PTAT current source group of the voltage controlled oscillator, and the frequency-temperature drift compensation effect is poor under different working frequencies and process conditions. If the compensation effect of the conventional structure is to be improved, multiple groups of compensation varactors need to be set, which will reduce the highest oscillation frequency and phase noise of the voltage controlled oscillator.

[0018] Specifically, as shown in Figure 4 is a typical PTAT (proportional to absolute temperature) temperature compensation circuit. The principle is: through the characteristic that the base-emitter voltage difference of two bipolar transistors is proportional to absolute temperature, a PTAT current source is designed to obtain a current proportional to absolute temperature:

[0019] I PTAT = I REF + K I (T-T0).

[0020] Through the current synthesis circuit composed of the current mirror, an output current I NTC proportional to absolute temperature is generated:

[0021] I NTC = I ZTC0 + <reg>+1) (I ZTC1 -I PTAT1 ) = I ZTC0 - <reg>+1)K I (T-T0).

[0022] The regulation voltage is then obtained through a current mirror and a resistor:

[0023] VTUNE = VDD - I NTC *R.

[0024] The final expression for VTUNE is:

[0025] VTUNE = (VDD - I ZTC0 x R) + ( <reg>+1)K I R(T-T0).

[0026] where I ZTC is a zero temperature coefficient reference current; I PTAT is a positive temperature coefficient reference current; I REF is the value of I PTAT at room temperature; K I is the slope of the PTAT current with temperature in A / °C; I ZTC0 is the value of the reference current; I ZTC1 and I PTAT1 are equal at room temperature, (I ZTC1 -I PTAT1 ) can provide a negative temperature coefficient current that is zero at room temperature, where REG is a variable used to adjust the temperature coefficient of the PTAT current.

[0027] As the temperature increases, I PTAT1 increases, I NTC decreases, VTUNE increases, and the varactor capacitance C tc <z:0>As the voltage decreases, the VCO oscillation frequency increases, thus compensating for the frequency drop caused by temperature. A schematic diagram of the change curve of its regulating voltage VTUNE versus temperature is shown below. Figure 5 As shown.

[0028] As described above, the variable REG can adjust the slope of the output voltage of a conventional PTAT temperature compensation circuit as a function of temperature. Increasing REG increases the slope and expands the output voltage range. This design can adapt to the frequency compensation requirements of voltage-controlled oscillators under different operating conditions.

[0029] However, the PTAT temperature compensation circuit uses the characteristic that the voltage difference between the base and emitter of two bipolar transistors is proportional to the absolute temperature. The poly resistors used have a low temperature coefficient, and their resistance increases with temperature. The presence of two temperature-dependent variables in the circuit reduces the accuracy of the PTAT current source.

[0030] References

[0031] [1]ALSLoke et al., "AVersatile 90-nm CMOS charge-pump PLL for SerDes transmitter clocking," IEEE J.Solid-State Circuits, vol.41, no.8, pp.1894–1907, Aug.2006.

[0032] [2]Akima H, Dec A, Merkin T, et al.A10GHz frequency-drift temperaturecompensated LC VCO with fast-settling low-noise voltage regulator in 0.13μmCMOS[J].IEEE,2010.DOI:10.1109 / CICC.2010.5617448.

[0033] [3] Hsieh, Cheng-En, Liu, et al. A 2.4-GHz Frequency-Drift-Compensated Phase-Locked Loop With 2.43 ppm / °C Temperature Coefficient [J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2019, 27(3): 501-510. DOI: 10.1109 / TVLSI.2018.2880477.

[0034] [4] Liu T, Wang X, Wang R, et al. A Temperature Compensated Triple-Path PLL With K VCO Non-Linearity Desensitization Capable of Operating at 77 K [J]. IEEE Transactions on Circuits & Systems I Regular Papers, 2017: 1-9. DOI: 10.1109 / TCSI.2017.2704023.

[0035] [5] Wu Y, Aparin V. A temperature stabilized CMOS VCO for zero-IF cellular CDMA receivers [J]. IEEE, 2005. DOI: 10.1109 / VLSIC.2005.1469413.

[0036] [6] Cho L C, Chang H H, Marques A, et al. A 1.22 / 6.7 ppm / °C VCO with frequency-drifting compensator in 60 nm CMOS [J]. IEEE, 2011. DOI: 10.1109 / ASSCC.2011.6123614. SUMMARY

[0038] The technical problem solved by the present application is to provide an LC voltage-controlled oscillator temperature compensation circuit, which can effectively utilize the linear part of the C-V characteristic curve of the varactor, thereby greatly improving the temperature compensation accuracy and adapting to various working frequencies and process conditions of the voltage-controlled oscillator.

[0039] The LC voltage-controlled oscillator temperature compensation circuit comprises:

[0040] A temperature sensor is arranged to collect the ambient temperature.

[0041] An analog-to-digital converter is arranged to convert the ambient temperature into a decimal temperature T.

[0042] A digital mapping code table is arranged to convert the decimal temperature T into a binary code C.

[0043] A digital-to-analog converter is arranged to convert the binary code C into a controlled current I, and calculate the controlled current I according to the binary code C and the controlled current I.

[0044] A current mirror is arranged to copy the controlled current I, and make the copied current flow through a resistor to generate an output voltage VTUNE.

[0045] The output voltage VTUNE is output to an adjustable compensation capacitor array in the LC voltage-controlled oscillator, and is used for frequency drift compensation of the LC voltage-controlled oscillator.

[0046] Preferably, the output voltage VTUNE is represented by the following formula:

[0047] VTUNE=(VDD-2 N-1 I0MY>R)+K I <x>(T - T0) I0 <y>R;

[0048] wherein K I <x>is the adjustable slope of the digital mapping code table, where X is a variable; T0 is a reference temperature; VDD is the power supply voltage of the circuit; N is the number of bits of the digital-to-analog converter; IOUT and are the complementary output currents of the digital-to-analog converter; I0 <y>is the adjustable output current range of the digital-to-analog converter, where Y is a variable; R is the resistance value of the resistor.

[0049] Preferably, the expression of converting the decimal temperature T into the binary code C is:

[0050] C = 2 N-1 + K I <x>(T - T0);

[0051] where N is the number of bits of the digital-to-analog converter; K I <x>is the adjustable slope of the digital mapping code table, where X is a variable.

[0052] Preferably, the controlled current is calculated as:

[0053]

[0054] Preferably, the controlled current I is expressed as:

[0055] I = C * I0 <y>.

[0056] Preferably, the output voltage VTUNE is outputted to the adjustable compensation capacitor array after being filtered by a low-pass filter.

[0057] Advantages

[0058] The present application has the advantages of:

[0059] 1. By using the adjustable mapping code table between the ADC and the DAC and the adjustable output current range of the DAC, the range of the adjustment voltage VTUNE can be flexibly set, the existing compensation capacitors can be fully utilized, the smallest possible adjustment voltage range is selected, the slope of the C-V characteristic curve of the varactor tube changes less in the adjustment voltage range, the slope adjustment effect on the VCO is more uniform, and thus the frequency-temperature drift compensation capability is improved.

[0060] 2. The temperature compensation circuit composed of the temperature sensor, the ADC, the adjustable mapping code table and the DAC is used, the output voltage has high precision and good linearity in the change with temperature, and is less affected by the process. BRIEF DESCRIPTION OF DRAWINGS

[0061] Figure 1 It is a schematic diagram of a lossy LC oscillation model;

[0062] Figure 2 It is a frequency-temperature characteristic curve diagram of the VCO without temperature compensation;

[0063] Figure 3 It is a C-V characteristic curve and curve slope diagram of the compensation varactor tube;

[0064] Figure 4 It is a schematic diagram of a conventional PTAT temperature compensation circuit;

[0065] Figure 5 It is an output voltage change curve diagram of the conventional PTAT temperature compensation circuit;

[0066] Figure 6 It is a schematic diagram of the temperature compensation circuit of the present application;

[0067] Figure 7 It is an output voltage curve diagram of the temperature compensation circuit of the present application;

[0068] Figure 8 It is a frequency-temperature drift curve diagram of the LC voltage-controlled oscillator of the present application after temperature compensation under the condition of each process angle at 7GHz in the TSMC 22nm process;

[0069] Figure 9 It is a frequency-temperature drift curve diagram of the LC voltage-controlled oscillator of the present application after temperature compensation under the condition of each process angle at 11.6GHz in the TSMC 22nm process. DETAILED DESCRIPTION

[0070] The application will be further described with reference to the following examples, but the application is not limited to any of the examples. Any person skilled in the art can make limited modifications within the scope of the claims of the application, and the modifications are still within the scope of the claims of the application.

[0071] Referring to Figure 6 , a temperature compensation circuit of an LC voltage-controlled oscillator of the application, Figure 6 The part enclosed by the dashed line is the overall structure of the temperature compensation circuit, and the part outside the dashed line is the LC voltage-controlled oscillator. The temperature compensation circuit comprises a temperature sensor, an analog-to-digital converter (ADC), a slope-adjustable digital mapping code table (hereinafter referred to as an adjustable mapping code table), a digital-to-analog converter (DAC) with adjustable output current range, a current mirror, a low-pass filter, and an adjustable compensation capacitance array (i.e., a compensation varactor) for frequency drift compensation in the LC voltage-controlled oscillator.

[0072] The principle of the temperature compensation circuit of the application will be described in detail as follows: As shown in Figure 6 , the temperature sensor and the ADC convert the ambient temperature into a decimal temperature T, and the adjustable mapping table converts T into a binary code C, and the conversion mathematical expression is:

[0073] C = 2 N-1 + K I <x>(T - T0).

[0074] The DAC converts C into a controlled current I and and the output current range of the DAC is adjustable, denoted by Y, assuming the DAC has N bits, I and The expression is:

[0075] I = C * I0 <y>,

[0076]

[0077] After copying through the current mirror, the current flows through a resistor to generate an output voltage VTUNE for tuning the varactor array C tc <z>, VTUNE expression is:

[0078]

[0079] VTUNE final expression is:

[0080] VTUNE = (VDD - 2 N-1 I0 <y>R) + K I <x>(T - T0) I0 <y>R.

[0081] where: T is the decimal temperature of the temperature sense and ADC output; C is the binary output of the adjustable mapping table; K I <x>is the adjustable slope of the adjustable mapping code table, which can adjust the mapping relationship between the binary code C and the decimal temperature T, where X is a variable; N is the bit number of the DAC; IOUT and is the complementary output current of the DAC, the maximum range of which can be adjusted by adjusting the bias current S <y>adjustment; I0is the minimum output current of the DAC; S <y>is the adjustable output current range of the DAC, where Y is a variable; C tc <z:0>is an adjustable compensation capacitor array for frequency-temperature drift compensation, where Z is a variable whose number of open groups can be adjusted.

[0082] As temperature increases, T increases, C increases, decreases, VTUNE increases, the adjustable compensation capacitor array capacitance C tc <z:0>The VCO oscillation frequency is reduced, so as to compensate the frequency reduction caused by temperature. A schematic diagram of the variation curve of the adjustment voltage VTUNE with temperature is shown in Figure 7 Figure 7 In the formula, the variable X is used to adjust the slope of the VTUNE voltage variation with temperature, and the variable Y is used to adjust not only the slope but also the center point of the VTUNE voltage variation (the voltage value corresponding to T0). This design can flexibly adjust the variation range of the VTUNE voltage, can fully utilize the existing compensation capacitor, and select the smallest adjustment voltage range as possible, so as to improve the compensation accuracy.

[0083] The temperature compensation circuit of the present application will be further introduced in combination with a specific process.

[0084] The temperature compensation circuit of the present application is designed in Cadence Virtuoso using TSMC 22nm process. As shown in Figure 8 and Figure 9 At the frequency of 7GHz, the frequency-temperature drift of the compensated LC-VCO is 5.6MHz (TTRV), 6.1MHz (SSLV), and 7.1MHz (FFHV); at the frequency of 11.6GHz, the frequency-temperature drift of the compensated LC-VCO is 7.7MHz (TTRV), 9.9MHz (SSLV), and 6.5MHz (FFHV).

[0085] As shown in Table 1 below, at 7GHz, the temperature drift coefficient of the compensated LC-VCO is 4.85ppm / ℃ (TTRV), 5.28ppm / ℃ (SSLV), and 6.67ppm / ℃ (FFHV); at the frequency of 11.6GHz, the temperature drift coefficient of the compensated LC-VCO is 4.02ppm / ℃ (TTRV), 5.17ppm / ℃ (SSLV), and 3.4ppm / ℃ (FFHV).

[0086] Table 1: Simulation results obtained by combining the LC-VCO with the temperature compensation circuit of the present application

[0087]

[0088] The above-described is only the preferred embodiment of the present application, and it should be noted that for those skilled in the art, without departing from the structure of the present application, a number of modifications and improvements can be made, which will not affect the effect and practicality of the present application.​ < / y> < / y> < / x> < / y> < / x> < / y> < / z> < / y> < / x> < / y> < / x> < / x> < / y> < / x> < / y> < / x> ​ < / reg> < / reg> < / reg>

Claims

1. A temperature compensation circuit for an LC voltage controlled oscillator, characterized by, Comprising of: a temperature sensor for collecting ambient temperature; an analog-to-digital converter for converting the ambient temperature into a decimal temperature T; a digital mapping code table for converting the decimal temperature T into a binary code C; a digital-to-analog converter for converting the binary code C into a controlled current I, and calculating the controlled current I from the binary code C and the controlled current I a current mirror for copying the controlled current and flowing the copied current through a resistor to generate an output voltage VTUNE. the output voltage VTUNE is outputted to an adjustable compensation capacitance array in an LC voltage-controlled oscillator for frequency drift compensation of the LC voltage-controlled oscillator.

2. The temperature compensation circuit for LC voltage controlled oscillator according to claim 1, wherein, the output voltage VTUNE is represented by the following equation: VTUNE = (VDD - 2 N-1 I0 <y>R) + K I <x>(T - T0) I0 <y> R；< / y> < / x> < / y> In the formula, K I <x>is the adjustable slope of the digital mapping code table, where X is a variable; T0 is a reference temperature; VDD is the power supply voltage of the circuit; N is the number of bits of the digital-to-analog converter; IOUT and are the complementary output currents of the digital-to-analog converter; I0 <y>is the adjustable output current range of a digital-to-analog converter, where Y is a variable; R is the resistance value of a resistor.< / y> < / x> 3. The temperature compensation circuit for LC voltage controlled oscillator according to claim 2, wherein, the expression of the decimal temperature T converted into a binary code C is: C=2 N-1 +K I <x>(T-T0);< / x> where N is the number of bits of the digital-to-analog converter; K I <x>is the adjustable slope of the digital mapping code table, where X is a variable.< / x> 4. The temperature compensation circuit for LC voltage controlled oscillator according to claim 3, wherein, The controlled current is calculated as 5. The temperature compensation circuit for LC voltage controlled oscillator according to claim 4, wherein, the controlled current I is represented by: I = C * I0 <y> 。< / y> 6. The temperature compensation circuit for LC voltage controlled oscillator according to claim 1, wherein, the output voltage VTUNE is outputted to an adjustable compensation capacitance array after being filtered by a low-pass filter.

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