Method beneficial to realizing digital signal frequency offset correction in engineering

Abstract

The invention discloses a method beneficial to realizing digital signal frequency offset correction in engineering, which relates to the technical field of digital communication signal processing, and comprises the following steps: when an input signal comprises a main carrier, carrying out orthogonal frequency conversion on the input signal so as to move signals near the main carrier to zero intermediate frequency; calculating the frequency spectrum of the input signal; performing peak detection on the frequency spectrum of the input signal to obtain a maximum peak point, and determining the carrier frequency of the input signal; filtering the input signal by a low-pass filter to obtain a main carrier signal; and obtaining a stable and reliable carrier frequency through a phase-locked loop according to the determined main carrier signal. The problem of main carrier tracking locking is solved, and the problem that deviation exists between the input carrier frequency and the actually set carrier frequency in the existing digital signal processing process is solved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of digital communication signal processing, in particular to a method for facilitating engineering implementation of digital signal frequency offset correction. BACKGROUND

[0002] In digital communication, many communication signals themselves have the characteristic of carrier frequency variation, such as telemetry signals. The received signals often also have frequency deviation from the transmitted signals due to uncertain factors in the communication channel, such as noise interference, Doppler shift, etc. When the communication equipment processes digital signals, operations such as channelization will also cause a certain frequency shift of the digital signals. The existence of these factors affects the determination of the frequency of the digital communication signal, and further affects the overall performance of the communication signal processing system. SUMMARY

[0003] The present application aims to provide a method for facilitating engineering implementation of digital signal frequency offset correction, to solve the problem of carrier frequency variation in digital communication signals in the prior art.

[0004] The present application solves the above problems by the following technical solutions:

[0005] A method for facilitating engineering implementation of digital signal frequency offset correction, comprising:

[0006] Step S1, when the input signal contains a main carrier, quadrature frequency conversion is performed on the input signal, for moving the signal near the main carrier to zero intermediate frequency;

[0007] Step S2, calculating the frequency spectrum of the input signal;

[0008] Step S3, peak detection is performed on the frequency spectrum of the input signal to obtain the maximum peak point and determine the carrier frequency of the input signal;

[0009] Step S4, the input signal is filtered by a low-pass filter to obtain a main carrier signal;

[0010] Step S5, according to the determined main carrier signal, a stable and reliable carrier frequency is obtained through a phase-locked loop.

[0011] Further, the step S1 is specifically: generating a digital single frequency signal through the cordic IP core of the FPGA, and inputting the input signal and the digital single frequency signal into a multiplier for mixing.

[0012] Further, the generation of a digital single frequency signal is specifically: obtaining the corresponding sine and cosine values by looking up the sine and cosine table.

[0013] Further, the step S2 adopts the fast Fourier transform (FFT) to calculate the frequency spectrum of the input signal.

[0014] Further, the step S3 is specifically setting a peak threshold, filtering out the peaks in the frequency spectrum of the input signal which are lower than the peak threshold, and then comparing the maximum peak point, the frequency position of which corresponds to the signal carrier frequency position.

[0015] Further, the step S4 is specifically designing a finite impulse response (FIR) low-pass filter and presetting the filter coefficients. The main carrier signal is obtained by multiplying the input signal and the filter coefficients through a multiplier, which plays the role of a low-pass filter.

[0016] Further, the step S5 is specifically obtaining the frequency difference through a numerically controlled oscillator (NCO), then calculating the cosine (cos) and sine (sin) function values by using the frequency difference, and finally performing quadrature mixing to correct the signal input frequency, i.e. obtaining a stable and reliable carrier frequency.

[0017] Compared with the prior art, the present application has the following advantages and beneficial effects:

[0018] (1) The present application solves the problem of main carrier tracking and locking, and solves the problem of deviation between the input carrier frequency and the actual set carrier frequency in the existing digital signal processing process, which is beneficial to the realization of digital signal frequency deviation correction in engineering.

[0019] (2) The present application solves the phenomenon of carrier frequency change in the communication signal processing process, including Doppler frequency drift, uncertain interference factors of the environment and frequency offset introduced by the communication equipment. These factors often affect the determination of the signal carrier frequency when the communication system processes the signal, and the subsequent processing process has poor processing effect or even cannot continue to process. The overall performance of the communication signal processing system is improved.

[0020] (3) The present application uses a phase-locked loop to solve the problem of carrier locking of a twice-modulated signal with Doppler frequency shift, restores the primary modulation information, and ensures the correctness and reliability of demodulation, so as to provide a new processing method for signal carrier tracking. BRIEF DESCRIPTION OF DRAWINGS

[0021] Figure 1 is a structural block diagram of the present application;

[0022] Figure 2 is a filter extraction circuit block diagram in the present application;

[0023] Figure 3 is an implementation block diagram of carrier frequency tracking;

[0024] Figure 4 is a schematic diagram of the main carrier frequency component of the actual signal;

[0025] Figure 5 Fig. 1 is a schematic diagram of phase-locked loop carrier tracking, wherein (a) is a schematic diagram of phase-locked loop carrier tracking of an I channel signal; and (b) is a schematic diagram of phase-locked loop carrier tracking of a Q channel signal;

[0026] Figure 6 Fig. 2 is a schematic diagram of phase-locked loop error;

[0027] Figure 7 Fig. 3 is a schematic diagram of phase-locked loop tracking frequency. DETAILED DESCRIPTION

[0028] The application will be further described below in conjunction with examples, but the embodiments of the application are not limited thereto.

[0029] Example 1

[0030] In conjunction with the accompanying drawings, a method for engineering implementation of digital signal frequency offset correction is provided, comprising: Figure 1

[0031] Step S1, when the input signal contains a main carrier, quadrature frequency conversion is performed on the input signal, for moving the signal near the main carrier to zero intermediate frequency;

[0032] A digital single frequency signal is generated by a cordic IP core of the FPGA, and the input signal and the digital single frequency signal are input into a multiplier for mixing. The generation of the digital single frequency signal specifically comprises: obtaining corresponding sine and cosine values by looking up a sine and cosine table.

[0033] Quadrature frequency conversion principle of the signal:

[0034] Compared with an analog frequency converter, the digital frequency converter does not have the problems of nonlinearity of a mixer, frequency stability, sideband, phase noise, temperature drift, conversion rate and the like of an analog local oscillator in the analog frequency converter, which are difficult to completely solve, and the frequency stepping and frequency interval of the digital frequency converter also have ideal performance, and the control and modification of the digital frequency converter are relatively easy, and the implementation is relatively simple.

[0035] The main factors affecting the performance of the digital frequency converter are two: one is the error caused by the limited word length of the sample value representing the digital local oscillator, the input signal and the mixing multiplication operation; and the other is the approximate value of the digital local oscillator sample value caused by insufficient phase resolution of the digital local oscillator. The digital frequency converter is composed of a digital mixer, a digital control oscillator (NCO) and a low-pass filter,

[0036] Quadrature digital down conversion includes two parts: a multiplier and a numerical control oscillator (NCO). The quadrature digital down conversion is to divide the digitized real signal into two paths, one of which is multiplied by cos(ω c ​n), down-convert to form a signal with the same phase as the original signal; the other is multiplied by sin(ω c n), down-convert to form a signal with the same phase as the original signal; the other is multiplied by sin(ω

[0037] ;

[0038] wherein is the carrier frequency (center frequency) of the intermediate frequency signal, is the sampling interval, represents the output signal after the ADC, is the output after digital down-conversion. The sine wave sin(ω c n) and the cosine wave cos(ω c n) in the quadrature digital down-conversion are generated by the NCO. The NCO mainly consists of three parts: a phase accumulator, a phase adder and a sin / cos table read-only memory. The role of the phase accumulator is to convert the digital local oscillator frequency into a phase, the function of the phase adder is to set a certain initial phase, and the sine and cosine values of the phase are obtained by table lookup.

[0039] After quadrature digital down-conversion, a zero intermediate frequency baseband complex signal is obtained, at this time the sampling rate of the signal is still the ADC sampling frequency (i.e. the sampling frequency of the intermediate frequency signal), the data rate is very high, and the bandwidth of the signal is much smaller than the sampling frequency, so filtering decimation (reducing the sampling rate) becomes an indispensable part of digital down-conversion.

[0040] Decimation is the process of removing high frequency information from a signal and reducing the sampling rate without causing spectral aliasing.

[0041] The basic process of decimation is shown in the above Figure 2 . First, low-pass filtering is performed, and then decimation is performed. The LPF digital filter in digital down-conversion usually uses a multi-stage structure of integral comb filter (CIC), half-band filter and FIR filter to achieve a certain multiple of decimation. Figure 2 wherein X(n) is the signal sequence before decimation, and y(m) is the signal sequence after decimation;

[0042] The cascaded integral comb (CIC) filter is a cascade of simple integrators (accumulators) and a cascade of comb filters (delaying the current sample and subtracting it from the current sample). This filter only uses delay and addition operations, so it is very suitable for FPGA and ASIC implementation.

[0043] The half-band filter is an extractor with an extraction factor of 2. The impulse response of this filter has nearly half of the values as zero, so the number of multiplications required to complete the filtering is very small (half of that in symmetric FIR design, and three-quarters of that in any other FIR design).

[0044] FIR digital filter is also often used in DDC decimation filter, its advantage is FIR filter parameters can be set, to achieve good stopband attenuation characteristics and passband characteristics.

[0045] Step S2, using fast Fourier transform FFT calculation input signal calculation input signal spectrum;

[0046] Step S3, set the peak threshold, filter out the peak value below the peak threshold in the input signal spectrum, and then compare the maximum peak point, the frequency position of the maximum peak point corresponds to the signal carrier frequency position;

[0047] Step S2 calculates the spectrum of the target signal by FFT, and step S3 determines the position of the carrier frequency by finding the maximum peak point in the spectrum. The carrier frequency tracking is achieved by continuously calculating the spectrum to find the peak value. Specifically:

[0048] When the signal is received and processed, the carrier frequency may jitter and drift, that is, the carrier frequency drift caused by the temperature change of the transmitting device and the Doppler frequency drift caused by the relative motion of the transmitting device. In FM demodulation, the drift has little effect on signal demodulation processing, but in PM demodulation processing, the frequency drift causes a dramatic change in the demodulated waveform. Therefore, the carrier frequency of the demodulated signal needs to be tracked, which improves the demodulation performance and obtains the real-time frequency variation law of the target for subsequent analysis.

[0049] The carrier frequency tracking mainly relies on error detection, which is composed of phase-locked loop, phase calibration phase detector, loop filter, digital controlled oscillator and other modules, as shown in Figure 3 .

[0050] First, the input signal is low-pass filtered to obtain a signal containing only the main carrier component. The instantaneous main carrier component is obtained through the phase detector module. The main carrier frequency is tracked and calibrated in real time by the phase-locked loop and the loop filter, and the calibration value is fed back to the digital controlled oscillator to calibrate the carrier frequency offset of the input signal. Finally, the calibrated input signal is output for subsequent module processing.

[0051] As shown in Figure 4 , the carrier frequency of the signal changes slowly to low frequency over time. Figure 5 The phase-locked loop tracks the carrier frequency. Figure 6 is the phase error of the phase-locked loop, which enters a steady state at about 1000 points. Figure 7 is the frequency tracked by the phase-locked loop, which has the same variation law as the main carrier frequency.

[0052] Step S4: Design an FIR low-pass filter, preset the filter coefficients, and calculate the input signal and filter coefficients using a multiplier to function as a low-pass filter. The input signal is then filtered by the low-pass filter to obtain the main carrier signal. FIR filter design methods include the window function method, frequency sampling method, equiripple approximation method, and arbitrary response design method, among others.

[0053] a) Window function method

[0054] The window function method is the simplest way to design filters, also known as the Fourier series method or window method. Its key is to start from the time domain and use a window function to truncate the impulse response sequence of the ideal filter in order to find an appropriate impulse response sequence that approximates the impulse response of the ideal filter, thereby achieving the goal of making the frequency response of the designed filter approximate the frequency response of the ideal filter in the frequency domain.

[0055] Frequency response characteristics of any digital filter All are angular frequencies A periodic function, when expanded into a Fourier series, yields:

[0056] ;

[0057] If the Fourier coefficients are among them If the impulse response is an infinitely long sequence and a non-causal response, then the filter is physically unrealizable. Therefore, it is necessary to find a suitable impulse response sequence. Approximate the actual impulse response of the filter under a certain error criterion. Sequence. Therefore, a window function is used. To correct the above equation, it can be expressed as:

[0058] ;

[0059] in, It is a finite-length sequence. When and hour, Symmetrical in impulse response, i.e. Let's take a low-pass filter as an example to illustrate.

[0060] Let the cutoff frequency of the ideal low-pass filter be... , The amplitude response is uniform within the passband. When it is 0, where The angular frequency normalized to the sampling frequency. This is the normalized cutoff angular frequency.

[0061] The impulse response sequence of an ideal filter can be obtained through inverse Fourier transform, i.e.:

[0062] ;

[0063] This is an infinite long non-causal sequence with n=0 as the symmetry point, such filter can not be realized in practice. As mentioned above, the impulse response sequence of linear phase filter is symmetrical. In order to obtain a practical linear phase filter, the actual impulse response sequence is shifted to obtain:

[0064] ;

[0065] Where the shift operation does not affect the modulus frequency characteristics, only introduces a phase shift.

[0066] Suppose the introduced window function sequence is:

[0067] ;

[0068] The N-point symmetrical sequence is obtained as:

[0069] ;

[0070] The frequency response function of the designed low-pass filter can be obtained as: As shown below:

[0071] ;

[0072] As can be seen from the above, the frequency characteristics of the ideal filter are represented by the infinite long impulse response sequence, i.e. the Fourier series term is infinite. The window function method is used to design the filter, i.e. N-point is truncated, N is the required length of truncation, and the frequency characteristics of the filter are represented by a finite number of terms to approximate the frequency characteristics of the ideal filter. But the truncation will inevitably be accompanied by frequency leakage, resulting in transition band and fluctuation in frequency characteristics. To reduce this effect and make the frequency characteristics of the designed filter more ideal, two measures can be taken, one is to keep as many data points as possible, but for software implemented filter, it will bring the problem of increasing hardware cost and increasing calculation time. For hardware implemented filter, it will bring the problem of complex structure and cost increase. Another way to reduce the impact of truncation is to choose different window functions.

[0073] The basic steps of designing FIR digital filter by window function method are summarized as follows:

[0074] I. Expand into Fourier series to obtain the coefficient ;

[0075] II. Truncate to the required length N naturally, and take N=2M+1;

[0076] III. The truncated is shifted right by M sample intervals to obtain ;

[0077] IV. The is multiplied by an appropriate window function , and the impulse response of the designed filter is obtained.

[0078] V. The performance of the filter is checked.

[0079] b) Frequency sampling method

[0080] In the design of FIR digital filter by window function method, the frequency response function of the filter to be designed is first expanded in terms of Fourier series, and the coefficients of the Fourier series are the unit impulse response sequence of the filter to be designed , or the filter coefficients. On this basis, the response of the filter to any input sequence is calculated , and the whole design process can be simply summarized as using an achievable frequency response function to approximate or approach the required frequency response function of the original system. Compared with the window function method, the frequency sampling method is to approach the ideal filter from the frequency domain. This method is to sample the frequency response function of the filter to be designed in the frequency domain, and then to obtain its unit impulse response sequence through inverse Fourier transform.

[0081] As mentioned above, the finite-length sequence can be uniquely determined by its discrete Fourier transform . On the other hand, there is a frequency sampling relationship between the required FIR filter system function , that is, the sampling values at the angle equidistribution points on the unit circle in the z plane are equal to the corresponding values of . The values of are used as the sampling values of the frequency characteristics of the actual FIR digital filter , or in other words are exactly the equally-spaced sampling values of the required frequency response in the digital frequency interval, that is:

[0082] ;

[0083] With the frequency domain sequence , the N-point inverse discrete Fourier transform operation can be performed to obtain the impulse response sequence :

[0084] ;

[0085] Thus the system function is obtained:

[0086] ;

[0087] Let the system function Take the value on the plane unit circle, it can be checked that the frequency characteristics of the designed filter meet the index or not.

[0088] In summary, the key of frequency sampling method is to determine the value of according to the linear constraint condition. The specific design process is as follows:

[0089] I. Normalization of design index;

[0090] II. Determine the type and order of the filter used;

[0091] III. Determine the value of according to the constraint condition;

[0092] IV. Inverse Fourier transform is carried out to obtain the unit impulse response ;

[0093] V. Verify the technical index.

[0094] Step S5, according to the determined main carrier signal, a stable and reliable carrier frequency is obtained through a phase-locked loop. Specifically, a frequency difference is obtained through an NCO, then the frequency difference is used to calculate the COS and SIN function values, and finally the signal input frequency is corrected through quadrature mixing, that is, a stable and reliable carrier frequency is obtained.

[0095] Although the present application has been described with reference to the explanatory embodiments thereof, the above-described embodiments are merely preferred embodiments of the present application, and the embodiments of the present application are not limited to the above-described embodiments. It should be understood by those skilled in the art that many other modifications and embodiments can be designed, and these modifications and embodiments will fall within the scope and spirit of the present application.

Claims

1. A method for facilitating engineering implementation of digital signal frequency offset correction, the method comprising: The application relates to a method for determining the carrier frequency of an input signal, comprising the following steps: ​ S1. when the input signal contains a main carrier, the input signal is quadrature frequency-converted to move the signal near the main carrier to zero intermediate frequency; S2. the spectrum of the input signal is calculated; S3. the spectrum of the input signal is peak-detected to obtain a maximum peak point and determine the carrier frequency of the input signal; S4. the input signal is filtered by a low-pass filter to obtain a main carrier signal; S5. according to the determined main carrier signal, a stable and reliable carrier frequency is obtained through a phase-locked loop.

2. The method of claim 1, wherein, The step S1 is specifically: a digital single-frequency signal is generated through a cordic IP core of FPGA, the input signal and the digital single-frequency signal are input into a multiplier for mixing.

3. The method of claim 2, wherein the step of digitally correcting the frequency offset of the digital signal is facilitated by the steps of: The digital single-frequency signal is specifically generated by searching a sine-cosine table to obtain the sine-cosine values corresponding to the frequency of the digital single-frequency signal. ​ 4. The method of claim 1, wherein the step of digitally correcting the frequency offset of the digital signal is facilitated by the steps of: In the step S2, the spectrum of the input signal is calculated through fast Fourier transform (FFT). ​ 5. The method of claim 1, wherein the method is implemented in an engineering environment. 5 The step S3 is specifically: a peak threshold is set, the peaks lower than the peak threshold in the spectrum of the input signal are filtered out, then the maximum peak point is compared, and the frequency position of the maximum peak point corresponds to the signal carrier frequency position.

6. The method of claim 1, wherein the method is implemented in an engineering environment. The step S4 is specifically: a finite impulse response (FIR) low-pass filter is designed, filter coefficients are preset, the input signal and the filter coefficients are calculated through a multiplier to obtain the main carrier signal, and the function of the low-pass filter is realized.

7. The method of claim 1, wherein the method is implemented in an engineering environment. The step S5 is specifically: a frequency difference is obtained through a digital oscillator (NCO), then the frequency difference is used to calculate the cosine (cos) and sine (sin) function values, finally, the input signal frequency is corrected through quadrature mixing.

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