Control method and control device of multi-inverter parallel operation system and storage medium

Abstract

The invention relates to the technical field of inverters, and discloses a control method and device of a multi-inverter parallel operation system and a storage medium, and the control method comprises the steps: controlling a host inverter to communicate with a battery management module, so as to obtain the state information of a battery; controlling a host inverter to communicate with a plurality of slave inverters, and sending the state information of the battery to the slave inverters; according to the technical scheme, the host inverter communicates with the battery management module and uniformly issues the battery state information to the plurality of slave inverters, so that the system wiring structure is effectively simplified, and the problems of wiring harness complexity and difficult installation caused by the fact that each inverter is connected with a battery respectively are solved; meanwhile, BMS data are managed in a unified mode through a host inverter, synchronous mastering of all inverters in a parallel operation system on the battery state is achieved, and the cooperative control capacity and the operation stability of the system are improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of inverters, and in particular to a control method and control device for a multi-inverter parallel system and a storage medium. BACKGROUND

[0002] With the development of photovoltaic power generation and energy storage technology, lithium batteries have gradually become the core energy unit of energy storage systems, and inverters play an important role in system operation as a conversion bridge between direct current and alternating current. In order to improve the power capacity and operational flexibility of the system, multiple inverters are widely used in parallel operation. However, in a multi-inverter parallel system, the communication architecture design between the inverter and the battery management system (BMS) faces many challenges. In the prior art, the inverter and the lithium battery usually interact with data through RS485 or CAN communication protocol. In actual application, the inverter and the battery are usually connected through a network port and a network cable, and it is agreed to use RS485 or CAN communication. However, in a multi-inverter system, if each inverter needs to be connected and communicated with the battery pack separately, it will result in complicated wiring, complex wiring harness production, affecting the structural beauty and stability of the system, and also increasing the installation and maintenance cost. SUMMARY

[0003] The embodiments of the present application provide a control method and control device for a multi-inverter parallel system and a storage medium to solve the above technical problems.

[0004] The first aspect of the embodiments of the present application provides a control method for a multi-inverter parallel system, the multi-inverter parallel system comprising: a master inverter, a plurality of slave inverters and a battery management module, the master inverter being connected to the battery management module, the battery management module being connected to a battery, the master inverter also being connected to a plurality of slave inverters respectively, and the control method comprising: controlling the master inverter to communicate with the battery management module to obtain state information of the battery; controlling the master inverter to communicate with a plurality of slave inverters respectively and sending the state information of the battery to the slave inverters; when it is detected that the slave inverters do not detect communication data for more than a preset number of times within a preset time, obtaining a new master inverter from the plurality of slave inverters and making the new master inverter re-establish a communication connection with the power management module.

[0005] Optionally, the control of the master inverter to communicate with the battery management module comprises: controlling the master inverter to periodically poll the battery management module to obtain state information of the battery.

[0006] Optionally, the sending of the state information of the battery to the slave inverter includes: storing the state information of the battery in a local buffer and periodically sending to the slave inverter according to a preset scheduling.

[0007] Optionally, the control method further includes: when the slave inverter does not detect communication data for more than a preset number of times within a preset time, obtaining a new master inverter from a plurality of slave inverters and causing the new master inverter to reestablish a communication connection with the power management module.

[0008] Optionally, the obtaining of the new master inverter from the plurality of slave inverters includes: obtaining CAN communication identification numbers of the plurality of slave inverters, and selecting a slave inverter with the smallest identification number as the new master inverter.

[0009] Optionally, the obtaining of the new master inverter from the plurality of slave inverters includes: obtaining current parameters of each slave inverter, the current parameters including a communication state, a completeness of battery information, a running state, a processor load state, and an identification priority value; substituting the current parameters of each slave inverter into a preset formula to obtain a score value of a current state of each slave inverter; determining a slave inverter with the highest score as the master inverter.

[0010] Optionally, the control method further includes: monitoring a running state parameter of the master inverter; when the running state parameter satisfies a first preset condition, replacing the master inverter, wherein the first preset condition is at least one of a master control running time exceeding a set value, a processor occupancy rate continuously exceeding a threshold value, and a temperature of the master inverter exceeding a safe range.

[0011] The monitoring of the running state parameter of the master inverter further includes: when the number of slave inverters connected to the master inverter is greater than a preset value, obtaining current parameters of each slave inverter and obtaining a score value of a current state of each slave inverter; adding a secondary master inverter and a redundant master inverter according to the score value of the current state of each slave inverter.

[0012] The second aspect of the embodiment of the present application provides a control device of a multi-inverter parallel system, the multi-inverter parallel system comprising a master inverter, a plurality of slave inverters and a battery management module, the master inverter being connected to the battery management module, the battery management module being connected to a battery, and the master inverter being further connected to the plurality of slave inverters respectively, the control device comprising: a battery state information acquisition module configured to control the master inverter to communicate with the battery management module to acquire state information of the battery; a battery state information sending module configured to control the master inverter to communicate with the plurality of slave inverters respectively and send the state information of the battery to the slave inverters; a master inverter setting module configured to acquire a new master inverter from the plurality of slave inverters and make the new master inverter re-establish a communication connection with the power management module when it is detected that the slave inverter has not detected communication data for more than a preset number of times within a preset time.

[0013] Optionally, the master inverter setting module is specifically configured to: acquire current parameters of each slave inverter, the current parameters comprising a communication state, a completeness of battery information, a running state, a processor load state and an identification priority value; substitute the current parameters of each slave inverter into a preset formula to acquire a score value of a current state of each slave inverter; determine a slave inverter with the highest score as the master inverter.

[0014] The third aspect of the embodiment of the present application provides an electronic device, comprising at least one processor, a memory and a computer program stored in the memory and executable on the at least one processor, wherein the processor implements the method of the first aspect when executing the computer program.

[0015] The fourth aspect of the embodiment of the present application provides a computer readable storage medium, the computer readable storage medium storing a computer program, wherein the computer program is executed by a processor to implement the method of the first aspect.

[0016] The technical effect of the embodiment of the present application is that the master inverter communicates with the battery management module and uniformly sends battery state information to the plurality of slave inverters, which effectively simplifies the system wiring structure, avoids the problems of complex wiring harness and difficult installation caused by connecting each inverter to the battery, and simultaneously, the master inverter uniformly manages the BMS data, realizes the synchronous grasp of the battery state by each inverter in the parallel system, and improves the collaborative control ability and the running stability of the system. BRIEF DESCRIPTION OF DRAWINGS

[0017] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the description of the embodiments of the present application. Obviously, the drawings in the following description only some of the embodiments of the present application, and for those skilled in the art, other drawings can be obtained without creative labor under the premise of the drawings.

[0018] Figure 1 is a structural schematic diagram of a multi-inverter parallel system provided by the first embodiment of the present application; Figure 2 is a flow chart of a control method of a multi-inverter parallel system provided by the first embodiment of the present application; Figure 3 is another flow chart of a control method of a multi-inverter parallel system provided by the first embodiment of the present application; Figure 4 is another flow chart of a control method of a multi-inverter parallel system provided by the first embodiment of the present application; Figure 5 is another flow chart of a control method of a multi-inverter parallel system provided by the first embodiment of the present application; Figure 6 is a structural schematic diagram of a control method device of a multi-inverter parallel system provided by the first embodiment of the present application; Figure 7 is a structural schematic diagram of an electronic device in an embodiment of the present application; In the figure: 101, master inverter; 102, slave inverter; 103, battery management module; 104, CAN bus. DETAILED DESCRIPTION

[0019] The technical solutions in the embodiments of the present application will be described clearly and completely in the following with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are some of the embodiments of the present application, but not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor are within the scope of protection of the present application.

[0020] It should be understood that the present application can be implemented in different forms, and should not be interpreted as being limited to the embodiments presented here. On the contrary, these embodiments are provided to make the disclosure complete and complete, and to fully convey the scope of the present application to those skilled in the art. In the drawings, the size and relative size of the layers and regions may be exaggerated for clarity throughout the same reference signs represent the same elements.

[0021] It will be understood that when an element or layer is referred to as being "on" or "connected to" another element or layer, it can be directly on or connected to the other element or layer or intervening elements or layers can be present. In contrast, when an element is referred to as being "directly on" or "directly connected to" another element or layer, there are no intervening elements or layers present. It will be understood that, although the terms first, second, third, etc. can be used herein to describe various elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present application.

[0022] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the present application. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and / or "comprising", when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. As used herein the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0023] For a thorough understanding of the present application, reference should be made to the following detailed description, in conjunction with the accompanying drawings, in which:

[0024] Embodiment One The embodiment one provides a control method of a multi-inverter parallel system, as shown in the figure, the multi-inverter parallel system comprises a master inverter 101, a plurality of slave inverters 102 and a battery management module 103, the master inverter 101 is connected to the battery management module 103, and the master inverter 101 is further connected to the plurality of slave inverters 102 through a CAN bus 104, and the control method comprises: Figure 1 Step S101. Control the master inverter 101 to communicate with the battery management module 103 to obtain the state information of the battery. Step S102. Control the master inverter 101 to communicate with the plurality of slave inverters 102 respectively, and send the state information of the battery to the slave inverters 102.

[0025] Step S102. Control the master inverter 101 to communicate with the plurality of slave inverters 102 respectively, and send the state information of the battery to the slave inverters 102.

[0026] Step S103. When the slave inverter 102 detects that the communication data is not detected for more than a preset number of times within a preset time, a new master inverter 101 is obtained from the plurality of slave inverters 102, and the new master inverter is re-established with the power management module.

[0027] Wherein, the master inverter 101 communicates with the battery management module 103 through the RS485 interface according to the control instruction, periodically obtains the state information of the battery; the battery information is cached, processed or transcoded; the processed battery information is sent to the plurality of slave inverters 102 through the CAN bus 104. The slave inverter 102 is responsible for receiving the battery information sent by the master, and its functions include: receiving the battery state data broadcasted by the master inverter 101 through the CAN bus 104; adjusting the local operating parameters based on the received battery information, such as charge and discharge power limit. The battery management module 103 is mainly used for monitoring and managing the operating state of the battery pack, and its functions include: real-time detection of voltage, current and temperature of each battery monomer or module; calculation of state of charge and health state of the battery; reporting of charge and discharge demand, alarm and fault state; communication with the master inverter 101 through the RS485 bus.

[0028] Wherein, the step S101 obtains the real-time operating state of the current battery system, which provides basic data for system coordinated control; the master inverter 101 accesses the battery management module 103 through the RS485 communication interface; the data such as battery SOC, voltage, current, temperature and fault state is obtained in the form of polling or timing interruption; the data collection period can be set to 50ms once to ensure real-time performance; the obtained data is stored in the internal cache of the master inverter 101 or in the specified array structure. In step S102, it is ensured that all slave inverters 102 have consistent and complete battery state information, and unified control of the parallel system is realized; the BMS state information cached locally is packaged into a data frame; the data is sent to all slave inverters 102 in the form of broadcast through the CAN bus 104; the slave inverter 102 receives the CAN data frame in the form of interruption response; each slave stores the received information into local variables, and updates its own operating state (such as power limit, stop charging, etc.) based on this.

[0029] The host inverter 101 is responsible for communication with an external control system or monitoring platform, and coordinates the operation of each slave inverter 102. If a slave inverter 102 fails to receive communication data from the host within a specified time window (for example, 5 seconds) for a plurality of times (for example, 3 times), the control system considers that the host inverter 101 is abnormal or out of communication. At this time, a new inverter is selected from the remaining plurality of normally operating slave inverters 102 as a new host to restore system communication and scheduling capability. The new host inverter 101 automatically assumes the responsibilities of communication and management, and maintains the continuous operation of the system. The replacement of the host can be based on priority rules, communication quality, load capacity, or ID number. After taking over, the newly selected host inverter 101 starts broadcasting synchronization signals and coordination instructions to other slave inverters 102, thereby realizing automatic switching of the host role and rapid recovery of the communication link, and ensuring that the system can still operate stably in the case of host failure. The selected new host inverter starts serial communication (for example, RS485) with the BMS, re-establishes handshaking, periodically polls BMS data (for example, every 50 ms), broadcasts battery status information to other slaves, all other slave inverters stop competing and enter a waiting and synchronization state, receive BMS information broadcast by the new host, and update local control parameters (such as power limit, stop charging, adjust current, etc.). If the new host still cannot communicate with the BMS within a set time (for example, 3 handshake failures), the system can automatically select the next slave with the smallest CAN ID as a backup. Until the communication is successfully established or the system enters a protection mode.

[0030] The technical effect of the embodiment is that the host inverter 101 communicates with the battery management module 103 and uniformly broadcasts battery status information to the plurality of slave inverters 102, effectively simplifying the system wiring structure, avoiding the problems of complex wiring and difficult installation caused by connecting each inverter to the battery. At the same time, by uniformly managing BMS data through the host inverter 101, the system realizes the synchronized grasp of the battery status by each inverter in the parallel system, and improves the collaborative control ability and operation stability of the system.

[0031] In addition, by automatically selecting a new host inverter 101 from the plurality of slave inverters 102 when a slave inverter 102 does not receive host communication data within a preset time, the rapid switching of the host role and the self-recovery of system communication are effectively realized. This scheme avoids the problem of system paralysis caused by host inverter 101 failure, improves the fault tolerance and operation stability of the multi-inverter system, and ensures that the system can still work continuously in abnormal conditions, which has high practicality and reliability.

[0032] As an implementation manner, the control host inverter 101 communicates with the battery management module 103, including: The host inverter 101 periodically polls the battery management module 103 to obtain the state information of the battery.

[0033] The state information of the battery includes the state of charge of the battery, the charging and discharging demand, the temperature information of the battery, and the fault state information.

[0034] The host inverter 101 is connected with the battery management module 103 through an RS485 communication interface; a fixed polling period is set, for example, polling once every 50 ms; the host inverter 101 sends a group of request commands to the battery management module 103 every time it polls; the battery management module 103 returns a frame of data containing state information in response; the host inverter 101 receives the response data and stores it in a buffer or an internal variable; the process is triggered by a serial task in the embedded system (such as RTOS) at a fixed time, ensuring stable operation. The specific content of the state information of the battery is as follows: the state of charge of the battery represents the current percentage of the battery; it is used to determine whether to allow charging or discharging; the host inverter 101 can set the operation mode (such as limiting power, prohibiting discharging, etc.) according to the SOC. The charging and discharging demand includes the instruction or current limit value of whether the battery is currently allowed to charge / discharge; the BMS gives the instruction according to the internal protection logic (such as temperature, voltage, etc.); the host inverter 101 adjusts the power output or input according to the demand. The battery temperature information includes multiple temperature points (such as cells, housings, etc.) of the battery pack; excessive or insufficient temperature will affect the charging and discharging capacity and may trigger the protection mechanism; the host inverter 101 decides whether to run at reduced capacity or pause according to the temperature information. The fault state information includes internal abnormal conditions of the battery, such as overvoltage, undervoltage, overtemperature, communication interruption, etc.; the host should stop charging and discharging, issue an alarm, or enter a protection state after receiving the fault information; it can be used for the safety strategy of the whole system.

[0035] The technical effect of the embodiment is that the host inverter 101 periodically polls the battery management module 103 to obtain complete battery state information including the state of charge, the charging and discharging demand, the temperature information, and the fault state, and uniformly issues it to the slave inverters 102, realizing efficient synchronization and sharing of battery information in a multi-inverter parallel system. This method not only simplifies the communication structure and improves the system integration, but also significantly enhances the coordination control ability between inverters and the response speed to battery abnormalities, thereby improving the safety, reliability, and intelligent level of system operation.

[0036] As an embodiment, the host inverter 101 communicates with multiple slave inverters 102, including: Data transmission between the host inverter 101 and the multiple slave inverters 102 is performed through CAN communication.

[0037] The state information of the battery is sent to the slave inverter 102, including: The state information of the battery is stored in a local buffer, and is periodically sent to the slave inverter 102 according to a preset schedule.

[0038] Wherein, the CAN bus 104 is connected between the master inverter 101 and the slave inverter 102; all inverters are assigned a unique CAN ID to ensure data frame identification and management; the master uses broadcast or multicast mode to send data frames through CAN; CAN communication has a priority mechanism and an error detection mechanism, which is suitable for parallel control systems with high real-time requirements. After the master inverter 101 receives the battery state information, it does not send immediately; the data is first stored in a locally defined data structure (such as a structure array or a ring buffer); the buffer structure supports fast reading and updating, and is suitable for multi-task scheduling; if new data appears, the old data is overwritten to ensure that the latest information is sent. The master inverter 101 is internally provided with a CAN sending task (such as being scheduled once every 8 ms); each time the task is triggered, the latest battery information is read from the local buffer; the read information is packaged into a data frame according to the CAN protocol format; it is broadcasted to all slave inverters 102 through the CAN bus 104; after being received by the slave inverter 102, it is parsed and the internal state information table is updated.

[0039] The technical effect of the embodiment is that a communication link based on the CAN bus 104 is established between the master inverter 101 and the plurality of slave inverters 102, and the battery state information obtained from the battery management module 103 is stored in the local buffer, which is combined with the preset schedule period to be sent to each slave inverter 102, thereby realizing unified and efficient distribution of battery information. This method not only simplifies the system architecture and reduces communication redundancy, but also ensures that each unit in the multi-inverter system has real-time access to the battery state, thereby improving the consistency, response speed and stability of the system operation.

[0040] As an embodiment, a new master inverter 101 is obtained from the plurality of slave inverters 102, including: The CAN communication identification number of the plurality of slave inverters 102 is obtained, and the slave inverter 102 with the smallest identification number is selected as the new master inverter 101.

[0041] In the multi-inverter system, CAN bus communication usually uses a unique identification number (ID) for each node for communication management and priority determination. The CAN communication identification number is a unique address number assigned to each inverter in CAN bus communication, and the control module sorts according to this number to quickly determine and uniquely specify the host role. The inverter selected as the new host automatically starts the host communication broadcast function after taking over the host responsibility, and keeps communication synchronization with other slaves to ensure the continuity and consistency of the system host function.

[0042] The technical effect of the embodiment is that by obtaining the CAN communication identification number of the plurality of slave inverters 102 and selecting the slave inverter 102 with the smallest identification number as the new host inverter 101, the host role is quickly and deterministically switched. This scheme does not require an additional negotiation mechanism and has the advantages of simple logic, fast response, conflict avoidance, etc. It can automatically restore system communication and coordination functions when the host fails, significantly improving the stability and autonomous operation capability of the multi-inverter system.

[0043] As an embodiment, the control method further comprises: When the slave inverter 102 receives the battery state information, the slave inverter 102 updates the local control parameters to dynamically adjust the inverter output.

[0044] The step is used to dynamically adjust the output control strategy of the slave inverter 102 according to the current state of the battery (such as voltage, current, SOC, temperature, etc.), to ensure the safe, stable and efficient operation of the entire energy storage system. The specific principle is as follows: The battery state information is collected by the host unit or the battery management system (BMS) and is forwarded by the host inverter 101 or directly broadcast to all slave inverters 102; The slave inverter 102 updates the local control parameters (such as output voltage set point, current limit value, PWM duty cycle, power factor angle, etc.) in real time according to these state information; Further, the output characteristics (such as power, voltage, current) of the inverter are matched with the battery state to realize coordinated operation and avoid overcharging, overdischarging, current impact, etc.; It is suitable for complex scenarios such as dynamic load changes, battery charging and discharging switching, and on-off grid mode switching. The control module adjusts the output parameters of the inverter, such as the output voltage set value, the current limit value, or the power distribution strategy, based on the preset response strategy, to match the working state of the slave inverter 102 with the battery state in real time, realize adaptive control of system power flow, and improve the flexibility and safety of system operation.

[0045] As an example, the execution subject is a DSP chip, the DSP chip is TMS320F28069, the frequency is 90MHz, the configuration of RS485 communication is baud rate 115200, data bit 8, no parity check, stop bit 1, and the receiving and sending sampling interrupts; the configuration of CAN communication is baud rate 500K, 16 mailboxes, the mailbox number is small and the priority is high, the expansion frame mode, and the receiving and sending mj78 interrupts. The software system adopts μC / OS-II, which is a real-time operating system kernel, and includes basic functions such as task scheduling, task management, time management, memory management, and communication and synchronization between tasks. It is used in the software to run and switch multiple tasks. For example, the parallel machine task of the parallel machine and the serial port task of the BMS communication. After starting the machine, the host inverter communicates successfully with the power manager, the serial port task runs once every 50ms, that is, the host inverter polls the battery pack once every 50ms to obtain the SOC of the battery, the charging and discharging demand of the battery, the temperature of the battery, and the fault information data of the battery, and stores them in the custom buffer. And update the array content in time. The parallel machine task runs once every 8ms, therefore, the host inverter updates the BMS information of the slave inverter quickly. The host inverter broadcasts the data frame containing the stored BMS information array data to the CAN bus 104, and the slave inverter saves the data of the battery pack after receiving the data, and realizes the BMS information management. There is a heartbeat frame detection between the host inverter and the slave inverter, if the slave inverter does not receive the information of the host inverter for more than 3 times continuously, it is determined that the host inverter fails or is powered off, and through the size of the CAN ID between the slave inverters, the one with smaller CAN ID becomes the host inverter, and performs the work of communicating with the battery BMS and issuing the BMS information of the slave inverter.

[0046] As an embodiment, in order to avoid the uncertainty and potential risk caused by single use of the CAN ID with the smallest value as the new host, as shown in the prior art, Figure 3 the embodiment introduces the following steps: Step S201: obtaining the current parameters of each slave inverter, the current parameters including the communication state, the battery information completeness, the running state, the processor load state and the identification priority value.

[0047] Among them, the communication state (Comm) is whether the recent CAN communication is normal or there is an abnormal frame loss; the battery information completeness (BMS) is whether the complete battery state information is successfully received; the running state (State) is whether the internal temperature, voltage and current are in the allowed interval; the processor load state (Load) is whether the current task load of the MCU or DSP is too high; and the identification priority value (ID) is the relative priority of the CAN ID value of the machine.

[0048] Step S202: Substitute the current parameters of each slave inverter into the preset formula to obtain a score value of the current state of each slave inverter.

[0049] The preset formula is: Score =ɑ1×Comm +ɑ2×BMS +ɑ3×State +ɑ4×Load + ɑ5×ID; wherein ɑ1~ɑ5 are preset weighting factors of the system, all scores are normalized to the interval [0, 1], and the higher the value is, the more suitable the current inverter is as the master.

[0050] Step S203: Determine the slave inverter with the highest score as the master inverter.

[0051] wherein each slave inverter periodically (e.g., every 1 second) broadcasts the score information of the current state through the CAN bus. All slaves listen to the broadcast and maintain a "master candidate ranking table" locally, recording the score data of the current slaves. The table is ranked from high to low according to the score, which is used for subsequent master switching judgment. In the case of the same score, the slave with the smaller CAN ID is given priority.

[0052] The technical effect of the embodiment is that by introducing the score mechanism of the master inverter, when the master inverter fails, the system no longer relies solely on the ID priority logic, but dynamically evaluates based on the global real-time state to select the master inverter that is most suitable for the current system conditions. The advantages are: improving the accuracy and success rate of master switching; reducing the probability of takeover failure caused by abnormal master inverter; ensuring uninterrupted broadcast of battery state information; realizing the distributed self-recovery capability of the multi-inverter system, and improving the overall fault tolerance and stability.

[0053] As an embodiment, to further improve the stability of long-term operation of the system and the load balancing of the master module, the embodiment proposes a master role rotation and master fatigue management mechanism, which is used to actively perform orderly rotation of the master role when the master inverter has been running for a long time or the system detects that the running pressure is too large, to reduce the workload of the master module, prolong the service life of the equipment, and improve the overall reliability of the system. As shown in Figure 4 the specific steps include: Step S301: Monitor the running state parameters of the master inverter.

[0054] Step S302: When the running state parameters meet the first preset condition, replace the master inverter.

[0055] The running state parameters include running time, processor occupancy rate, and system module temperature. The first preset condition is that the main control running time exceeds a set value (such as 24 hours), the processor occupancy rate continuously exceeds a threshold value (such as 80%), and the temperature of the main machine inverter exceeds a safe range. Once any of the above conditions is met, the main machine inverter broadcasts the control role transfer through the CAN bus, and informs other slave machine inverters to prepare to take over the main control responsibility.

[0056] The technical effect of the embodiment is that by introducing the main control running state monitoring, fatigue score calculation, and main control role rotation mechanism, the problems of overload, thermal damage, and reduced life caused by a single inverter assuming the main control task for a long time are effectively avoided. The system realizes dynamic scheduling and automatic relay of the main control responsibility, improves the balance of inverter use and the reliability of the whole machine on the basis of ensuring stable operation of the system, and is especially suitable for photovoltaic storage or energy storage type inverter systems that are continuously operated for a long time.

[0057] As an embodiment, a higher-order intelligent control strategy is proposed to further solve the following problems: in a large-scale multi-inverter parallel system, the single main control mode has certain problems, and control interruption or scheduling conflict may be caused during frequent switching of the main control; for a distributedly deployed inverter cluster, a cooperative control architecture is more suitable. In the above embodiment, a master-slave communication structure with a single master and multiple slaves is mostly used. Once the main machine inverter fails or communication fails, a new master needs to be elected and BMS communication and system scheduling tasks need to be rebuilt, which has the risk of response delay and control shock.

[0058] As shown in Figure 5 The running state parameters of the main machine inverter are monitored, and then the following steps are further included. Step S401. When the number of slave machine inverters connected to the main machine inverter is greater than a preset value, the current parameters of each slave machine inverter are obtained, and the score value of the current state of each slave machine inverter is obtained. Step S402. According to the score value of the current state of each slave machine inverter, the secondary master machine inverter and the redundant master machine inverter are increased.

[0059] In the following scenarios, single-host inverter has obvious shortcomings: the number of system inverter nodes is large (≥6); the spatial distribution span is large (such as across buildings, across cabinet deployment); the load dynamicity is strong, and the scheduling is frequent; high reliability continuous power supply is required (such as UPS, data center, microgrid). Therefore, a multi-master coexistence redundancy scheduling mechanism is proposed to realize system distributed scheduling and master automatic coordination, and to enhance the stability and control real-time performance of the interconnected system. The specific steps are as follows: according to the above scoring mechanism, the top two slave inverters are obtained as master inverters, called: secondary master (SM); redundant master (RM). The original master inverter is called primary master (PM). The master nodes periodically synchronize the following data through CAN or independent master interconnection link (MC-Link): battery management module (BMS) state information; current scheduling table and power control parameters; abnormal alarm state; master load and processing capacity evaluation; synchronization timestamp (maintain scheduling synchronization). The master division strategy includes but is not limited to: PM is responsible for main scheduling and BMS communication; SM is responsible for data takeover preparation and abnormal monitoring; RM only maintains synchronization and does not intervene in scheduling, and is in a hot standby state. When the PM detects communication abnormalities or task blocking, it will actively send a master downgrade frame to the SM. If the PM is accidentally offline, the SM will detect that it has not received the PM synchronization frame for several times in a row, and immediately enter the takeover mode: quickly activate the BMS communication module; use the latest synchronization state data to restore the scheduling table; broadcast the "master takeover confirmation frame"; other inverters update the current master role. Master collaborative load scheduling optimization, in the case of large task quantity and highly dispersed load, PM and SM can perform parallel scheduling division mechanism, for example: PM is responsible for BMS communication and system total power management; SM is responsible for slave state collection and power limiting strategy distribution; both of them cooperate to complete master scheduling, improve control efficiency and response speed.

[0060] The technical effect of the embodiment is that the embodiment breaks through the limitation of the traditional single master structure, realizes: automatic fast takeover of the system in the case of any master failure, zero interruption; task cache and state synchronization, prevent system reset or parameter loss; support master task parallel execution, distributed optimization; can be applied to larger scale, more complex topology interconnected system.

[0061] On the basis of the above-mentioned embodiments, in order to further shorten the master control takeover delay, improve the takeover success rate and avoid multi-master control instruction conflicts, the present embodiment proposes a multi-master hot synchronization and hierarchical takeover mechanism. The mechanism is applicable to a multi-inverter parallel system with a dual-master or multi-master architecture. By pre-running a master control task shadow process in the redundant master control and taking over in a hierarchical order when the master control fails, millisecond-level switching is achieved, and the system fault tolerance and operation stability are improved. The system includes a primary master (PM), a secondary master (SM) and a redundant master (RM). The master nodes are connected through a master interconnection link (MC-Link) to realize high-speed data synchronization. The slave inverters and the current master node maintain bidirectional communication. Specifically, the following steps are included: When the secondary master SM detects that the primary master PM heartbeat frame is timed out for a preset number of times (such as 3 times), a first-level takeover is triggered, and the SM immediately releases the output suppression to enter the formal master state. When the SM fails to obtain BMS data or communication timeout occurs during the takeover process, a second-level takeover is triggered, and the redundant master RM directly takes over the master control responsibility and broadcasts the takeover confirmation information. Through the first-level and second-level hierarchical takeover mechanism, in the case of secondary master takeover failure, the redundant master can still complete the takeover in a very short time, ensuring the continuous operation of the system. When the running state of the primary master is detected to be declining (for example, the communication delay increases, the CPU occupancy is too high, or the AI prediction risk increases), the secondary master broadcasts a "takeover preparation signal" to the redundant master and all slaves in advance, and enters the takeover preparation mode. In the takeover preparation mode, all nodes switch to a high-frequency data refresh mode, and the key parameters are synchronized, so that the switching is completed immediately when the takeover signal is triggered. If the primary master recovers to normal operation during the preparation process, the takeover preparation signal is canceled, and the existing master structure is maintained.

[0062] The technical effect of the present embodiment is that through the multi-master hot synchronization mechanism, the secondary master and the redundant master can complete the master takeover in milliseconds; the hierarchical takeover mechanism ensures that the redundant master can quickly intervene when the secondary master takeover fails; the pre-takeover prediction and confirmation can complete the takeover preparation in advance, reducing system jitter; and the task conflict resolution mechanism avoids execution conflicts caused by multi-master concurrent control, thereby significantly improving the fault tolerance, operation continuity and control stability of the system.

[0063] Embodiment Two The present embodiment two provides a control device of a multi-inverter parallel system, as shown in Figure 6 The control device comprises: The multi-inverter parallel system comprises a host inverter 101, a plurality of slave inverters 102 and a battery management module 103. The host inverter 101 is connected to the battery management module 103, and the host inverter 101 is also connected to the plurality of slave inverters 102 respectively. The control device comprises: The battery state information acquisition module 201 is configured to control the host inverter to communicate with the battery management module to acquire the state information of the battery. The battery state information sending module 202 is configured to control the host inverter to communicate with the plurality of slave inverters respectively, and send the state information of the battery to the slave inverters. The host inverter setting module 203 is configured to acquire a new host inverter from the plurality of slave inverters and make the new host inverter re-establish a communication connection with the power management module when it is detected that the slave inverter does not detect communication data for more than a preset number of times within a preset time.

[0064] Further, the battery state information acquisition module 201 is specifically configured to control the host inverter to periodically poll the battery management module to acquire the state information of the battery.

[0065] Further, the state information of the battery includes the state of charge, the charging and discharging demand, the battery temperature information and the fault state information of the battery.

[0066] Further, the battery state information sending module 202 is specifically configured to: Control the host inverter and the plurality of slave inverters to perform data transmission through the CAN communication mode. Further, the battery state information sending module 202 is further specifically configured to: Store the state information of the battery in a local buffer, and periodically send the state information to the slave inverters according to a preset scheduling period.

[0067] Further, the host inverter setting module is specifically configured to acquire the CAN communication identification numbers of the plurality of slave inverters, and select the slave inverter with the smallest identification number as the new host inverter.

[0068] Further, the control device further comprises: The data updating module is configured to control the slave inverter to update the local control parameters to realize dynamic adjustment of the inverter output after the slave inverter receives the battery state information.

[0069] Further, the control device is further configured to: Acquire the current parameters of each slave inverter, the current parameters including the communication state, the completeness of the battery information, the running state, the processor load state and the identification priority value; Substitute the current parameters of each slave inverter into a preset formula to acquire a score value of the current state of each slave inverter; Determine the slave inverter with the highest score as the host inverter.

[0070] Further, the control device is further configured to: Monitor the running state parameters of the host inverter; When the running state parameter meets the first preset condition, the master inverter is replaced, wherein the first preset condition is at least one of that the master running time exceeds a set value, the processor occupancy rate continuously exceeds a threshold value, and the temperature of the master inverter exceeds a safe range.

[0071] Further, the control device is further configured to: When the number of slave inverters connected to the master inverter is greater than a preset value, the current parameters of each slave inverter are obtained, and the score values of the current states of each slave inverter are obtained. The secondary master inverter and the redundant master inverter are increased according to the score values of the current states of each slave inverter.

[0072] The embodiments of the present application also provide an electronic device, such as Figure 7 As shown in the figure, the electronic device 2 includes at least one processor 20, a memory 21, and a computer program 22 stored in the memory 21 and executable on the at least one processor 20, wherein the processor 20 implements the steps in any of the above method embodiments when executing the computer program, or the processor 20 implements the functions of each module / unit in the above device embodiments when executing the computer program.

[0073] For example, the computer program can be divided into one or more modules / units, one or more modules / units are stored in the memory and executed by the processor to complete the present application. One or more modules / units can be a series of computer program instruction segments capable of completing a specific function, which is used to describe the execution process of the computer program in the electronic device.

[0074] Those skilled in the art can understand that Figure 7 It is only an example of the electronic device and does not constitute a limitation on the electronic device, and can include more or fewer components than the figure, or combine certain components, or different components, for example, the electronic device can also include an input / output device, a network access device, a bus, etc.

[0075] The processor can be a central processing unit (CPU), and can also be other general-purpose processors, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field-programmable gate array (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor.

[0076] The memory can be an internal storage unit of the electronic device, such as a hard disk or a memory of the electronic device. The memory can also be an external storage device of the electronic device, such as a plug-in hard disk, a smart media card (SMC), a secure digital (SD) card, a flash card, etc. provided on the electronic device. Further, the memory can include both the internal storage unit and the external storage device of the electronic device.

[0077] The embodiments of the present application further provide a readable storage medium, which stores a computer program. The computer program is executed by a processor to implement the steps in the above-mentioned various method embodiments.

[0078] The embodiments of the present application provide a computer program product. When the computer program product is run on an electronic device, the mobile terminal is caused to implement the steps in the above-mentioned various method embodiments.

[0079] The integrated unit, if implemented in the form of a software function unit and sold or used as an independent product, can be stored in a computer readable storage medium. Based on such understanding, the computer program for instructing the related hardware to complete all or part of the processes in the above-mentioned embodiment methods can be stored in a computer readable storage medium, and the computer program can implement the steps of the above-mentioned various method embodiments when executed by a processor. The computer program includes computer program code, which can be in the form of source code, object code, executable file or some intermediate form. The computer readable medium at least includes any entity or device capable of carrying the computer program code to the photographing device / terminal equipment, recording medium, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signal, telecommunication signal and software distribution medium. For example, U disk, mobile hard disk, magnetic disk or optical disk, etc. In some jurisdictions, according to legislation and patent practice, the computer readable medium can not be an electrical carrier signal and a telecommunication signal.

[0080] In the above embodiments, the description of each embodiment has its own focus, and the parts not described or recorded in detail in a certain embodiment can be referred to the related description of other embodiments.

[0081] Those skilled in the art can realize that the units and algorithm steps of each example described in combination with the embodiments disclosed herein can be realized by electronic hardware or a combination of computer software and electronic hardware. Whether the functions are realized in hardware or software depends on the specific application and design constraints of the technical solution. The skilled person can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application.

[0082] In the embodiments provided in the present application, it should be understood that the disclosed apparatus / devices and methods can be implemented in other ways. For example, the above-described apparatus / device embodiments are only schematic, and the division of the modules or units is only a logical function division, and there can be another division manner in actual implementation, for example, a plurality of units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the displayed or discussed mutual coupling or direct coupling or communication connection can be indirect coupling or communication connection through some interface, device or unit, and can be electrical, mechanical or other forms.

[0083] The units described as separate components may or may not be physically separate, and the components displayed as units may or may not be physical units, that is, may be located in one place, or may also be distributed to multiple network units. Part or all of the units can be selected to achieve the purpose of the embodiment scheme according to actual needs.

[0084] The above embodiments are only used to illustrate the technical solutions of the present application, but not limit them; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that the technical solutions recorded in the foregoing embodiments can still be modified, or some technical features can be replaced by equivalents; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application, and should be included in the protection scope of the present application.

Claims

1. A control method for a multi-inverter parallel system, characterized in that, The multi-inverter parallel system includes: a master inverter, multiple slave inverters, and a battery management module. The battery management module is connected to a battery, the master inverter is connected to the battery management module, and the master inverter is also connected to the multiple slave inverters via a CAN bus. The control method includes: The main inverter is controlled to communicate with the battery management module to obtain battery status information; The master inverter is controlled to communicate with multiple slave inverters respectively, and the status information of the battery is sent to the slave inverters; When it is detected that the slave inverter has not detected communication data for more than a preset number of times within a preset time, a new master inverter is obtained from the multiple slave inverters, and the new master inverter re-establishes a communication connection with the power management module.

2. The control method according to claim 1, characterized in that, The control of the host inverter to communicate with the battery management module includes: The host inverter is controlled to periodically poll the battery management module to obtain battery status information.

3. The control method according to claim 1, characterized in that, Sending the battery status information to the slave inverter includes: The battery status information is stored in a local buffer and periodically sent to the slave inverter according to a preset schedule.

4. The control method according to claim 1, characterized in that, The step of obtaining a new master inverter from the plurality of slave inverters includes: Obtain the CAN communication identifiers of multiple slave inverters, and select the slave inverter with the smallest identifier to become the new master inverter.

5. The control method according to claim 4, characterized in that, The step of obtaining a new master inverter from the plurality of slave inverters includes: Obtain the current parameters of each slave inverter, including communication status, battery information integrity, operating status, processor load status, and identifier priority value; Substitute the current parameters of each slave inverter into the preset formula to obtain the score value of the current state of each slave inverter; The slave inverter with the highest score is selected as the master inverter.

6. The control method according to claim 5, characterized in that, The control method further includes: Monitor the operating status parameters of the main inverter; When the operating status parameters meet the first preset condition, the main inverter is replaced. The first preset condition is at least one of the following: the main controller operating time exceeds a set value, the processor occupancy rate continuously exceeds a threshold, and the temperature of the main inverter exceeds a safe range.

7. The control method according to claim 6, characterized in that, The monitoring of the operating status parameters of the host inverter also includes: When the number of slave inverters connected to the master inverter is greater than a preset value, the current parameters of each slave inverter are obtained, and the score of the current state of each slave inverter is obtained. The number of secondary master inverters and redundant master inverters is increased based on the score of the current state of each slave inverter.

8. A control device for a multi-inverter parallel system, characterized in that, The multi-inverter parallel system includes: a master inverter, multiple slave inverters, and a battery management module. The master inverter is connected to the battery management module, and the battery management module is connected to a battery. The master inverter is also connected to each of the multiple slave inverters. The control device includes: The battery status information acquisition module is used to control the host inverter to communicate with the battery management module in order to obtain the status information of the battery; A battery status information sending module is used to control the master inverter to communicate with multiple slave inverters respectively, and send the battery status information to the slave inverters; When the master inverter setting module detects that the slave inverter has not detected communication data for more than a preset number of times within a preset time, it obtains a new master inverter from the multiple slave inverters and re-establishes a communication connection between the new master inverter and the power management module.

9. The control device according to claim 8, characterized in that, The host inverter setting module is specifically used for: Obtain the current parameters of each slave inverter, including communication status, battery information integrity, operating status, processor load status, and identifier priority value; Substitute the current parameters of each slave inverter into the preset formula to obtain the score value of the current state of each slave inverter; The slave inverter with the highest score is selected as the master inverter.

10. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by a processor, it implements the method as described in any one of claims 1 to 8.

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