Frequency doubler device for suppressing quartic stray

Abstract

The invention relates to the field of signal processing, in particular to a frequency doubler device for suppressing quartic stray. The device comprises: a power divider-90 DEG for receiving an input signal; the input ends of the two frequency doublers are respectively connected with the two output ends of the power divider (-90 degrees); and the input end of the power combiner (180 DEG) is connected with the output ends of the two frequency doublers. According to the frequency multiplier device for suppressing the quartic stray, the high suppression degree of quartic harmonics is achieved, and the frequency multiplier device has a large application prospect in broadband radar signal generation.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of signal processing, in particular to a quadrupler device for suppressing fourth-order spurs. BACKGROUND

[0002] As a typical representative of wideband signals, wideband linear frequency modulation signals have a very wide range of applications, especially in radar detection and high-resolution imaging, target recognition. There are many ways to generate wideband linear frequency modulation signals, each with its own advantages and disadvantages. The most suitable generation method needs to be selected according to different use scenarios and project backgrounds.

[0003] In order to generate a signal with a large time-bandwidth product, a DDS or an AWG is often used to generate a relatively low-frequency and relatively narrow-band baseband linear frequency modulation signal, and a frequency multiplier is used to generate a larger-bandwidth LFM signal. At this time, if the relative bandwidth of the baseband signal is relatively large, there are many spurs in the frequency multiplication product, and each harmonic seriously affects the quality of subsequent processing. These existing in the signal band may not be able to be filtered out by a filter! The fourth harmonic may be relatively large, therefore, a frequency multiplication scheme is needed to suppress the fourth harmonic. SUMMARY

[0004] The purpose of the present application is to provide a quadrupler device for suppressing fourth-order spurs. Specifically, on the one hand, the present application provides a frequency multiplier device based on fourth harmonic cancellation, which can achieve low spur level while completing band expansion, providing technical conditions for high-performance radar wideband LFM signal generation.

[0005] A quadrupler device for suppressing fourth-order spurs, comprising:

[0006] a power divider-90° for receiving an input signal;

[0007] two frequency doublers, the input ends of the two frequency doublers being connected to the two output ends of the power divider-90°;

[0008] a power combiner-180°, the input end of the power combiner-180° being connected to the output ends of the two frequency doublers.

[0009] Preferably, the model of the power divider-90° is ZFSCJ-2-4.

[0010] Preferably, the model of the two frequency doublers is HE011.

[0011] Preferably, the model of the power combiner-180° is ZFSC-2-2.

[0012] Advantages:

[0013] 1. By designing a quadruple spurious suppression frequency multiplier device, high suppression degree of quadruple harmonic is realized, which has great application prospect in wideband radar signal generation.

[0014] 2. The frequency multiplier circuit architecture method based on spurious cancellation provides a feasible scheme for the development of high-performance frequency multiplier. BRIEF DESCRIPTION OF DRAWINGS

[0015] Figure 1 The structural diagram of the present application. DETAILED DESCRIPTION

[0016] In order to make the purpose, features and advantages of the present application more obvious and easy to understand, the technical solutions in the embodiments of the present application will be described clearly and completely in combination with the drawings in the embodiments of the present application. Obviously, the following described embodiments are only part of the embodiments of the present application, not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor are within the scope of protection of the present application.

[0017] As shown in the accompanying drawings, Figure 1 A quadruple spurious suppression frequency doubler device includes:

[0018] A power divider-90° (ZFSCJ-2-4) is used to receive an input signal.

[0019] The input terminals of a frequency doubler A (HE011) and a frequency doubler B (HE011) are respectively connected to the first output terminal and the second output terminal of the power divider-90°.

[0020] The output terminals of the frequency doubler A and the frequency doubler B are connected to the input terminal of a power combiner-180° (ZFSC-2-2).

[0021] The principle and effect of the device will be described as follows:

[0022] The input signal received by the power divider-90° is:

[0023]

[0024] Among them, The input signal received by the power divider-90° is:

[0025] The amplitude of the input signal received by the power divider-90° is:

[0026] The angular frequency of the input signal received by the power divider-90° is:

[0027] the time variable of the input signal received by the power divider -90°.

[0028] the first output signal of the power divider -90° is:

[0029]

[0030] wherein, the first output signal of the power divider -90° is:

[0031] the amplitude of the first output signal of the power divider -90°.

[0032] the second output signal of the power divider -90° is:

[0033]

[0034] wherein, the second output signal of the power divider -90° is:

[0035] the amplitude of the second output signal of the power divider -90°.

[0036] the sum of the second harmonic component and the fourth harmonic component of the output signal of the frequency doubler A is:

[0037]

[0038] wherein, the sum of the second harmonic component and the fourth harmonic component of the output signal of the frequency doubler A is:

[0039] the amplitude of the second harmonic component of

[0040] the amplitude of the fourth harmonic component of

[0041] the phase shift of the second harmonic component of

[0042] the phase shift of the fourth harmonic component of

[0043] the sum of the second harmonic component and the fourth harmonic component of the output signal of the frequency doubler B is:

[0044]

[0045] wherein, ​​​​It is the sum of the second harmonic component and the fourth harmonic component of the output signal of the frequency doubler B;

[0046] for The amplitude of the second harmonic component;

[0047] for The amplitude of the fourth harmonic component;

[0048] for Phase shift of the second harmonic component;

[0049] for The phase shift of the second harmonic component.

[0050] The sum of the second harmonic component and the fourth harmonic component of the output signal at the -180° terminal of the power combiner is:

[0051]

[0052]

[0053]

[0054]

[0055] in, It is the sum of the second harmonic component and the fourth harmonic component of the output signal at the -180° terminal of the power combiner;

[0056] when hour,

[0057]

[0058] in, for The linear frequency modulation slope;

[0059] The fourth-order inhibition degree is:

[0060] when , At that time, the fourth-order inhibition was approximately 11.5 dB.

[0061] The above description is only a preferred embodiment of the present invention. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A frequency doubler device for suppressing fourth-order spurious emissions, characterized in that, include: The power divider is at -90° and is used to receive the input signal. Two frequency doublers, the input terminals of which are respectively connected to the two output terminals of the power divider at -90°; The input terminal of the power combiner-180° is connected to the output terminals of the two frequency doublers.

2. The frequency doubler device for suppressing fourth spurious emissions according to claim 1, characterized in that, The power divider at -90° is model ZFSCJ-2-4.

3. The frequency doubler device for suppressing fourth spurious emissions according to claim 1, characterized in that, The two frequency doublers are model HE011.

4. A frequency doubler device for suppressing fourth spurious emissions according to claim 1, characterized in that, The power combiner with a -180° angle is model ZFSC-2-2.

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