An FPGA-based CAN interface expansion system and expansion method

Abstract

The application belongs to the technical field of CAN communication of vehicle-mounted computers, and provides a CAN interface expansion system and expansion method based on FPGA, wherein the system and the host are connected through an RGMII interface, the system comprises an RGMII data monitoring processing unit, a protocol conversion unit and an AXI-CAN interface unit, the RGMII data monitoring processing unit is used for cyclically monitoring RGMII data; the protocol conversion unit is used for realizing bidirectional conversion of RGMII data and CAN format frames, and first-level cache FIFO control and management; and the AXI-CAN interface unit realizes CAN channel configuration, CAN format frame transceiving management, interrupt message management and multi-path AXI-CAN design. The application realizes multi-path CAN interface expansion based on one RGMII interface of the host, and solves the problems of high-load CAN bus and abnormal frame loss through first-level cache FIFO and second-level cache FIFO.

Description

Technical Field

[0001] This invention relates to the field of CAN communication technology for vehicle-mounted computers, and specifically to a CAN interface expansion system and method based on FPGA. Background Technology

[0002] In recent years, the automotive computer industry has placed higher demands on CPU performance, computing power, and CAN interface usage, requiring comprehensive consideration of these indicators during the design process. Using certain high-performance CPU chips with computing power may encounter bottlenecks in CAN interface resource utilization, necessitating the external expansion of the CAN interface.

[0003] There are various ways to expand the CAN interface, one common method being the use of dedicated chips, such as SPI-to-CAN or parallel-to-CAN chips. However, this approach often encounters limitations in practical applications. For example, the number of channels that can be expanded is relatively limited, failing to meet the needs of large-scale systems. Furthermore, these dedicated chips consume significant system resources, potentially impacting the normal operation of other functional modules. In addition, these chips have relatively limited functionality, making them unsuitable for complex and ever-changing application scenarios.

[0004] Another common expansion method is to expand the CAN interface through an MCU (microcontroller). While this method offers some flexibility in certain situations, it also presents some significant challenges. First, the performance of the MCU itself may become a bottleneck during the expansion process, especially when handling large amounts of data or complex logic, where the MCU's processing power and response speed may not be sufficient. Second, under high CAN bus load conditions, the CAN interface expanded via an MCU is prone to frame loss, which severely impacts data transmission reliability and system stability.

[0005] Therefore, when expanding the CAN interface, it is necessary to comprehensively consider various factors such as the specific requirements of the system, resource consumption, and performance to ensure the overall performance and stability of the system. Summary of the Invention

[0006] To address the shortcomings of existing technologies, this invention provides an FPGA-based CAN interface expansion system and method, which solves problems such as performance bottlenecks and frame loss under high load on the CAN bus when expanding the CAN interface via MCU.

[0007] In a first aspect, the present invention provides an FPGA-based CAN interface extension system, which is connected to a host via an RGMII interface, including an RGMII data monitoring and processing unit, a protocol conversion unit, and an AXI-CAN interface unit.

[0008] The RGMII data monitoring and processing unit is used to continuously monitor RGMII data. If the content of the RGMII data is a configuration channel command, it is sent to the AXI-CAN interface unit through the protocol conversion unit. If the content of the RGMII data is a CAN format frame command, the data content is moved to the first-level buffer FIFO.

[0009] The protocol conversion unit is used to realize bidirectional conversion between RGMII data and CAN format frames; it determines the valid data bits of the first-level buffer FIFO and the transmission status of the AXI-CAN interface unit, controls the dequeueing of RGMII data from the first-level buffer FIFO and parses it into CAN format frames; and controls the return of CAN format frames in the second-level buffer FIFO to the host according to the CAN format frame read command and the valid data bits of the second-level buffer FIFO.

[0010] The AXI-CAN interface unit is used to open the corresponding CAN interface and configure parameters according to the configuration channel command; after receiving the CAN format frame to be sent from the first-level buffer FIFO, it sets the transmission status to busy, and after successful transmission, it sets the transmission status to idle and waits for the next frame; it is also used to move the CAN format frame to the requested second-level buffer FIFO after receiving an interrupt signal.

[0011] As can be seen from the above technical solution, the CAN interface expansion system provided by the present invention connects to the host through the RGMII interface. The host only needs one RGMII interface to expand multiple CAN interfaces, realizing the expansion of CAN interface resources for the host. Furthermore, the abnormal frame loss problem is solved by implementing first-level and second-level caches, enabling continuous operation without frame loss at a bus load of over 80%.

[0012] Optionally, the system uses a ZYNQ chip as the central processing unit, including a PS terminal and a PL terminal, and the PS terminal and the PL terminal communicate with each other via an AXI bus;

[0013] The PS terminal also runs a Linux system, which is used to implement the SSH and TFTP protocols for the RGMII interface. The host can log in to view and maintain the CAN interface operation status through the SSH protocol, and upgrade the program online through the TFTP protocol.

[0014] As can be seen from the above technical solution, the PS side runs a customized Linux system, which mainly includes drivers for DDR3 memory chips, AXI-CAN and RGMII interfaces, provides SSH service and TFTP service, supports remote network encrypted access and system firmware network updates; and provides bidirectional conversion service between RGMII data and CAN format frames.

[0015] Optionally, the RGMII data monitoring and processing unit is located on the PS end, and the RGMII data monitoring and processing unit includes a Mac interface module and a first-level cache FIFO.

[0016] The Mac interface module receives and parses RGMII data, and moves the data into the first-level buffer FIFO in sequence;

[0017] The first-level cache FIFO is used to cache the host's RGMII data.

[0018] Optionally, the protocol conversion unit is located on the PS end and includes an RGMII command processing module and a CAN format frame generation module.

[0019] The RGMII command processing module is used to process the configuration channel command and CAN format frame read command received from the RGMII data listening and processing unit. Upon receiving the configuration channel command, it parses the baud rate, receive code, receive mask, and secondary buffer FIFO length from the RGMI data and configures them to the AXI-CAN interface unit. Upon receiving the CAN format frame read command, it extracts the CAN format frames from the secondary buffer FIFO in sequence to form an RGMI message that the host can recognize.

[0020] The CAN format frame generation module is used to dequeue the data in the first-level buffer FIFO and parse it into a CAN format frame, which is then transmitted to the AXI-CAN interface unit when the data in the first-level buffer FIFO is not empty and the transmission status of the AXI-CAN interface unit is idle.

[0021] Optionally, the AXI-CAN interface unit includes the following on the PS side:

[0022] The CAN format frame transceiver module is used to set the transmission status to busy after receiving a CAN format frame to be sent, send a frame to the CAN bus and then determine whether the transmission was successful. If successful, the transmission status is set to idle to wait for the next frame.

[0023] A secondary buffer FIFO is used to buffer CAN format frames on the CAN bus;

[0024] The CAN format frame retransmission module is used to keep the transmission status busy after a transmission failure and periodically transmit the frame until the transmission is successful.

[0025] Optionally, the AXI-CAN interface unit at the PL end further includes multiple AXI-CAN interfaces, an AXI routing center, and an interrupt management center. The AXI routing center is used to manage the read and write operations of the multiple AXI-CAN interfaces, and the interrupt management center is used to merge the interrupt signals of the multiple AXI-CAN interfaces and send them to the AXI-CAN interface unit at the PS end.

[0026] The AXI-CAN interface obtains the AXI clock separately.

[0027] As can be seen from the above technical solution, the AXI routing center is designed to manage multiple AXI-CANs by leveraging the advantages of multiple hosts on the PS side. The clock unit is designed with an external 100M crystal oscillator input and six 24M outputs for independent use by the AXI-CANs. Compared with other clock generation schemes, it has better performance in terms of stability of CAN function interface use and reduces error frames and frame loss rate.

[0028] Secondly, the present invention provides an FPGA-based CAN interface extension method, based on any possible implementation of the FPGA-based CAN interface extension system provided in the first aspect, including sending CAN format frames, receiving CAN format frames, and buffering dynamic configuration. The process of sending CAN format frames includes:

[0029] S101. The RGMII data monitoring and processing unit continuously monitors the RGMII data on the host side and determines the content of the RGMII data;

[0030] If it is a channel configuration command, it is sent to the AXI-CAN interface unit via the protocol conversion unit; if it is a CAN format frame command, the data content is moved into the first-level buffer FIFO.

[0031] The S102.AXI-CAN interface unit opens the corresponding CAN interface and configures the relevant parameters according to the configuration channel command.

[0032] S103. The protocol conversion unit determines the valid data bits of the first-level buffer FIFO and the transmission status of the AXI-CAN interface unit, and controls the dequeueing of data from the first-level buffer FIFO;

[0033] S104. When the data in the first-level buffer FIFO is not empty and the transmission status of the AXI-CAN interface unit is idle, the data in the first-level buffer FIFO is dequeued and parsed into a CAN format frame and transmitted to the AXI-CAN interface unit.

[0034] After receiving the CAN format frame to be sent, the S105.AXI-CAN interface unit sets the CAN bus transmission status to busy, sends a frame to the CAN bus, and then determines whether the transmission was successful.

[0035] If successful, the CAN bus transmission status is set to idle to wait for the next frame. If it fails, the CAN bus transmission status is kept busy, and the retransmission mechanism is started to periodically send the frame until successful transmission.

[0036] Optionally, the process of receiving CAN format frames includes:

[0037] S201. After receiving a valid CAN format frame, the multi-channel CAN controller sends an interrupt signal;

[0038] After receiving an interrupt signal, the S202.AXI-CAN interface unit moves the CAN format frame into the requested secondary buffer FIFO;

[0039] S203. Update the secondary buffer FIFO information and notify the host to read the CAN format frame.

[0040] Optionally, the process of dynamically configuring the cache includes:

[0041] Based on the cache space length configuration command received from the RGMII interface, dynamically allocate the length of the first-level cache FIFO and / or the second-level cache FIFO;

[0042] Based on the cache space clearing command received from the RGMII interface, clear the data in the first-level cache FIFO and / or the second-level cache FIFO when the cached data expires.

[0043] As can be seen from the above technical solutions, the length of the cache space can be dynamically allocated through the host RGMII interface, and the contents of the cache space can be cleared through the RGMII interface command.

[0044] By adopting the above technical solution, this application has the following beneficial effects:

[0045] The CAN interface expansion system provided by this invention connects to the host via the RGMII interface. The host only needs one RGMII interface to expand multiple CAN interfaces, realizing the expansion of CAN interface resources for the host. Furthermore, the implementation of first-level and second-level caches solves the problem of abnormal frame loss, enabling continuous operation without frame loss even when the bus load is above 80%.

[0046] The CAN interface extension method provided by this invention manages CAN format frame transmission through a two-level classification system. The first level manages the transmission based on the valid data bits of the primary buffer FIFO and the transmission status of the AXI-CAN interface unit. Protocol conversion is initiated based on these two statuses, and the CAN format frame is then transmitted to the AXI-CAN interface unit. The second level is CAN bus status management. Each CAN format frame sent to the bus generates a bus status code, and a retransmission mechanism is initiated based on the CAN bus transmission status code. Attached Figure Description

[0047] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the accompanying drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. In all the drawings, similar elements or parts are generally identified by similar reference numerals. In the drawings, the elements or parts are not necessarily drawn to scale.

[0048] Figure 1 The diagram shows a structural block diagram of an FPGA-based CAN interface expansion system provided by an embodiment of the present invention.

[0049] Figure 2 The flowchart illustrating the transmission of CAN format frames in an FPGA-based CAN interface extension method provided by an embodiment of the present invention is shown.

[0050] Figure 3 The flowchart illustrating the receiving of CAN format frames is provided in an embodiment of the present invention for a CAN interface extension method based on FPGA. Detailed Implementation

[0051] The embodiments of the technical solution of the present invention will now be described in detail with reference to the accompanying drawings. These embodiments are only used to more clearly illustrate the technical solution of the present invention and are therefore merely examples, and should not be construed as limiting the scope of protection of the present invention.

[0052] It should be noted that, unless otherwise stated, the technical or scientific terms used in this application should have the ordinary meaning as understood by those skilled in the art to which this invention pertains.

[0053] Example 1

[0054] like Figure 1 As shown, an FPGA-based CAN interface expansion system is provided, which connects to the host via an RGMII interface. The system includes an RGMII data monitoring and processing unit, a protocol conversion unit, and an AXI-CAN interface unit.

[0055] The RGMII data monitoring and processing unit is used to continuously monitor RGMII data. If the content of the RGMII data is a configuration channel command, it is sent to the AXI-CAN interface unit through the protocol conversion unit. If the content of the RGMII data is a CAN format frame command, the data content is moved to the first-level buffer FIFO.

[0056] The protocol conversion unit is used to realize bidirectional conversion between RGMII data and CAN format frames; it determines the valid data bits of the first-level buffer FIFO and the transmission status of the AXI-CAN interface unit, controls the dequeueing of RGMII data from the first-level buffer FIFO and parses it into CAN format frames; and controls the return of CAN format frames in the second-level buffer FIFO to the host according to the CAN format frame read command and the valid data bits of the second-level buffer FIFO.

[0057] The AXI-CAN interface unit is used to open the corresponding CAN interface and configure parameters according to the configuration channel command; after receiving the CAN format frame to be sent from the first-level buffer FIFO, it sets the transmission status to busy, and after successful transmission, it sets the transmission status to idle and waits for the next frame; it is also used to move the CAN format frame to the requested second-level buffer FIFO after receiving an interrupt signal.

[0058] The AXI-CAN interface unit is the upper layer of the AXI-CAN controller and CAN interface. It mainly implements the control of CAN format frame transmission and reception, as well as the reading of the CAN controller status register.

[0059] The CAN interface expansion system connects to the host via the RGMII interface and can expand multiple CAN interfaces based on one RGMII interface, thus expanding the CAN interface resources for the host. Furthermore, it solves the problem of abnormal frame loss by implementing first-level and second-level caches, enabling continuous operation without frame loss even when the bus load is above 80%.

[0060] Specifically, the FPGA's PL side is designed with 6 AXI-CAN channels, the CLK unit is designed as an external 100MHz crystal oscillator input, and 6 channels of 24MHz output are used by the AXI-CAN. Taking advantage of the PS side's multi-master function, a dual AXI routing center is designed to manage the 6 AXI-CAN channels, while also providing a separate clock for the AXI.

[0061] Optionally, the system uses a ZYNQ chip as the central processing unit, including a PS end and a PL end. The PS end and the PL end communicate with each other via an AXI bus. The PS end also runs a Linux system to implement the SSH and TFTP protocols on the RGMII interface. The host can log in to view and maintain the CAN interface operation status in the background via the SSH protocol, and upgrade the program online via the TFTP protocol.

[0062] The PL side is designed with 6 AXI-CAN channels, and the CLK unit is designed as an external 100M crystal oscillator input, with 6 24M outputs for AXI-CAN use. The PS side application is responsible for data reception, protocol parsing, and data reporting; the host-side driver provides interfaces for configuration channels, enable channels, disable channels, sending CAN format frames, and receiving CAN format frames.

[0063] The extended CAN interface device originally transmitted CAN format frames through the RGMII interface. After adding the SSH service, the RGMII interface is not only a data transmission channel, but can also be used as a background maintenance channel without affecting the CAN format frame transmission function.

[0064] The core processor is a Fudan Microelectronics FPGA (FMQL20S484), supporting GMAC controllers, DDR3 controllers, and multi-channel CAN controllers. Memory chips are configured to buffer multi-channel CAN interface messages. The PL-side logic program implements the multi-channel CAN controller, while the PS-side program drives the DDR3 memory chips to achieve protocol conversion. The multi-channel CAN controller implemented in the PL-side logic program is driven through the AXI-CAN interface unit. Based on this, 100% domestic production is achieved, reaching a level of independent control and realizing domestic substitution.

[0065] The PS (Power Supply) runs a customized Linux system, which mainly includes drivers for DDR3 memory chips, AXI-CAN, and RGMII interfaces. It provides SSH and TFTP services, supporting remote encrypted network access and system firmware network updates; and offers bidirectional conversion services between RGMII data and CAN format frames. Applying SSH and TFTP services to the extended CAN interface improves the maintainability and operability of the overall design.

[0066] The transmission status of the AXI-CAN interface unit refers to the transmission status switch implemented by the PL program. The AXI-CAN interface unit determines the transmission status and starts the transmission of CAN format frames.

[0067] See Figure 1 The RGMII data listening and processing unit is located on the PS side. The RGMII data listening and processing unit includes a Mac interface module and a first-level cache FIFO. The Mac interface module receives and parses the RGMII data and moves the data into the first-level cache FIFO in sequence. The first-level cache FIFO is used to cache the host's RGMII data.

[0068] The PS-side program implements the RGMII data monitoring and processing unit. By default, the transmission state is set to idle. Upon receiving a CAN format frame to be transmitted, the transmission state is set to busy. After sending a frame to the CAN bus, it checks whether the transmission was successful. If successful, the transmission state is set to idle to wait for the next frame. If it fails, the transmission state remains busy, and a retransmission mechanism is initiated to periodically send the frame until successful transmission. This can solve the problem of frame loss in abnormal situations.

[0069] Optionally, the protocol conversion unit is located on the PS end and includes an RGMII command processing module and a CAN format frame generation module. The RGMII command processing module processes the configuration channel command and CAN format frame read command received from the RGMII data listening and processing unit: upon receiving the configuration channel command, it parses the baud rate, receive code, receive mask, and secondary buffer FIFO length from the RGMI data and configures them to the AXI-CAN interface unit; upon receiving the CAN format frame read command, it sequentially extracts the CAN format frames from the secondary buffer FIFO to form an RGMI message recognizable by the host. The CAN format frame generation module, when the data in the primary buffer FIFO is not empty and the AXI-CAN interface unit's transmit state is idle, dequeues the primary buffer FIFO data and parses it into a CAN format frame, then transmits it to the AXI-CAN interface unit.

[0070] Specifically, the CAN format frame retransmission mechanism and the AXI-CAN controller status control are jointly implemented on the PS and PL ends.

[0071] Optionally, the AXI-CAN interface unit is implemented through joint design of PS and PL side programs.

[0072] On the PS side, the AXI-CAN interface unit includes a CAN format frame transceiver module, a secondary buffer FIFO, and a CAN format frame retransmission module. The CAN format frame transceiver module is used to set the transmission status to busy after receiving a CAN format frame to be sent, and after sending a frame to the CAN bus, it determines whether the transmission was successful. If successful, it sets the transmission status to idle and waits for the next frame. The secondary buffer FIFO is used to buffer CAN format frames on the CAN bus. The CAN format frame retransmission module is used to keep the transmission status busy after a transmission failure and periodically send the frame until the transmission is successful.

[0073] On the PL side, the AXI-CAN interface unit includes multiple AXI-CAN interfaces, an AXI routing center, and an interrupt management center. The AXI routing center is used to manage the read and write transactions of the multiple AXI-CAN interfaces, and the interrupt management center is used to merge the interrupt signals of the multiple AXI-CAN interfaces and send them to the AXI-CAN interface unit on the PS side. The AXI-CAN interface obtains the AXI clock independently.

[0074] Leveraging the multi-master advantage of the PS side, two AXI slave interfaces can be designed to manage multiple AXI-CAN interfaces, while providing a separate AXI clock for each AXI-CAN interface. Compared to other clock generation schemes, this approach offers superior stability in the use of the CAN function interface, reducing error frames and frame loss rates.

[0075] Example 2

[0076] A CAN interface extension method based on FPGA is provided, based on the FPGA-based CAN interface extension system provided in Embodiment 1, including transmitting CAN format frames, receiving CAN format frames, and buffering dynamic configuration. Figure 2 As shown, the process of sending CAN format frames includes:

[0077] S101. The RGMII data monitoring and processing unit continuously monitors the RGMII data on the host side and determines the content of the RGMII data;

[0078] If it is a channel configuration command, it is sent to the AXI-CAN interface unit via the protocol conversion unit; if it is a CAN format frame command, the data content is moved into the first-level buffer FIFO.

[0079] The S102.AXI-CAN interface unit opens the corresponding CAN interface and configures relevant parameters, including baud rate, receive mask, and transmit / receive buffer length, according to the configuration channel command.

[0080] S103. The protocol conversion unit determines the valid data bits of the first-level buffer FIFO and the transmission status of the AXI-CAN interface unit to control the dequeueing of data from the first-level buffer FIFO;

[0081] S104. When the data in the first-level buffer FIFO is not empty and the AXI-CAN interface unit transmits the status as idle, the data in the first-level buffer FIFO is dequeued and parsed into a CAN format frame and transmitted to the AXI-CAN interface unit.

[0082] After receiving the CAN format frame to be sent, the S105.AXI-CAN interface unit sets the CAN bus transmission status to busy, sends a frame to the CAN bus, and then determines whether the transmission was successful.

[0083] If successful, the CAN bus transmission status is set to idle to wait for the next frame. If it fails, the CAN bus transmission status is kept busy, and the retransmission mechanism is started to periodically send the frame until successful transmission.

[0084] The PS-side program manages CAN format frame transmission through a two-level classification system. The first level manages transmission based on the valid data bits of the primary buffer FIFO and the transmission status of the AXI-CAN interface unit. Protocol conversion is initiated based on these two statuses, and the CAN format frame is then passed to the AXI-CAN interface unit. The second level is CAN bus status management. Each CAN format frame sent to the bus generates a bus status code, and a retransmission mechanism is initiated based on this code.

[0085] like Figure 3 As shown, the process of receiving CAN format frames includes:

[0086] S201. After receiving a valid CAN format frame, the multi-channel CAN controller sends an interrupt signal;

[0087] After receiving an interrupt signal, the S202.AXI-CAN interface unit moves the CAN format frame into the requested secondary buffer FIFO;

[0088] S203. Update the secondary buffer FIFO information and notify the host to read the CAN format frame.

[0089] Optionally, the process of caching dynamically configured data includes:

[0090] Based on the cache space length configuration command received from the RGMII interface, dynamically allocate the length of the first-level cache FIFO and / or the second-level cache FIFO;

[0091] Based on the cache space clearing command received from the RGMII interface, clear the data in the first-level cache FIFO and / or the second-level cache FIFO when the cached data expires.

[0092] Based on the above dynamic cache configuration process, the length of the cache space can be dynamically allocated through the host RGMII interface, and the contents of the cache space can be cleared through the RGMII interface command; thus, it is possible to configure according to the bus load and achieve reasonable use of resources.

[0093] The above embodiments are only used to provide a detailed description of the technical solutions of this application. However, the descriptions of the above embodiments are only for the purpose of helping to understand the methods of the embodiments of the present invention and should not be construed as limiting the embodiments of the present invention. Any variations or substitutions that can be easily conceived by those skilled in the art should be covered within the protection scope of the embodiments of the present invention.

Claims

1. A CAN interface expansion system based on FPGA, characterized in that, The system connects to the host via an RGMII interface. It uses a ZYNQ chip as the central processing unit and includes a PS (Power Switch) and a PL (Power Logic Controller) end, which communicate via an AXI bus. The PS end also runs a Linux system to enable the RGMII interface to run SSH and TFTP protocols. The host uses SSH to log in and view / maintain the CAN interface's operating status, and TFTP to perform online program upgrades. The system includes an RGMII data monitoring and processing unit, a protocol conversion unit, and an AXI-CAN interface unit. The RGMII data monitoring and processing unit is located on the PS end and includes a first-level buffer FIFO for caching the host's RGMII data. The AXI-CAN interface unit on the PS end includes a second-level buffer FIFO for caching CAN format frames on the CAN bus. The RGMII data monitoring and processing unit is used to continuously monitor RGMII data. If the content of the RGMII data is a configuration channel command, it is sent to the AXI-CAN interface unit through the protocol conversion unit. If the content of the RGMII data is a CAN format frame command, the data is moved to the first-level buffer FIFO. The protocol conversion unit is used to realize bidirectional conversion between RGMII data and CAN format frames; it determines the valid data bits of the first-level buffer FIFO and the transmission status of the AXI-CAN interface unit, controls the dequeueing of RGMII data from the first-level buffer FIFO and parses it into CAN format frames; Based on the CAN format frame read command and the data valid bits of the secondary buffer FIFO, control the CAN format frame in the secondary buffer FIFO to be returned to the host; The AXI-CAN interface unit is used to open the corresponding CAN interface and configure parameters according to the configuration channel command; after receiving the CAN format frame to be sent from the first-level buffer FIFO, it sets the CAN bus transmission status to busy; after successful transmission, it sets the CAN bus transmission status to idle and waits for the next frame. It is also used to move CAN format frames to the requested secondary buffer FIFO after receiving an interrupt signal.

2. The system according to claim 1, characterized in that, The RGMII data monitoring and processing unit also includes a Mac interface module. The Mac interface module receives and parses RGMII data, and moves the data into the first-level buffer FIFO in sequence.

3. The system according to claim 2, characterized in that, The protocol conversion unit is located on the PS end and includes an RGMII command processing module and a CAN format frame generation module. The RGMII command processing module is used to process the configuration channel command and CAN format frame read command received from the RGMII data listening and processing unit. Upon receiving the configuration channel command, it parses the baud rate, receive code, receive mask, and secondary buffer FIFO length from the RGMII data and configures them to the AXI-CAN interface unit. Upon receiving the CAN format frame read command, it extracts the CAN format frames from the secondary buffer FIFO in sequence to form an RGMII message that the host can recognize. The CAN format frame generation module is used to dequeue the data in the first-level buffer FIFO and parse it into a CAN format frame, which is then transmitted to the AXI-CAN interface unit when the data in the first-level buffer FIFO is not empty and the transmission status of the AXI-CAN interface unit is idle.

4. The system according to claim 1, characterized in that, The AXI-CAN interface unit also includes the following on the PS side: The CAN format frame transceiver module is used to set the CAN bus transmission status to busy after receiving a CAN format frame to be sent, and to determine whether the transmission was successful after sending a frame to the CAN bus. If successful, the transmission status is set to idle to wait for the next frame. The CAN format frame retransmission module is used to keep the CAN bus in a busy state after a transmission failure, and periodically retransmit the frame until the transmission is successful.

5. The system according to claim 4, characterized in that, The AXI-CAN interface unit at the PL end also includes multiple AXI-CAN interfaces, an AXI routing center, and an interrupt management center. The AXI routing center is used to manage the read and write transactions of the multiple AXI-CAN interfaces, and the interrupt management center is used to merge the interrupt signals of the multiple AXI-CAN interfaces and send them to the AXI-CAN interface unit at the PS end. The AXI-CAN interface obtains the AXI clock separately.

6. A CAN interface extension method, characterized in that, The FPGA-based CAN interface extension system according to any one of claims 1-5 includes sending CAN format frames, receiving CAN format frames, and buffering dynamic configuration. The process of sending CAN format frames includes: S101. The RGMII data monitoring and processing unit continuously monitors the RGMII data on the host side and determines the content of the RGMII data; If it is a channel configuration command, it is sent to the AXI-CAN interface unit via the protocol conversion unit; if it is a CAN format frame command, the data content is moved into the first-level buffer FIFO. The S102.AXI-CAN interface unit opens the corresponding CAN interface and configures the parameters according to the configuration channel command. S103. The protocol conversion unit determines the valid data bits of the first-level buffer FIFO and the transmission status of the AXI-CAN interface unit, and controls the data dequeueing of the first-level buffer FIFO; S104. When the data in the first-level buffer FIFO is not empty and the transmission state of the AXI-CAN interface unit is idle, the data in the first-level buffer FIFO is dequeued and parsed into a CAN format frame and transmitted to the AXI-CAN interface unit. After receiving the CAN format frame to be sent, the S105.AXI-CAN interface unit sets the CAN bus transmission status to busy, sends a frame to the CAN bus, and then determines whether the transmission was successful. If successful, the CAN bus transmission status is set to idle to wait for the next frame. If it fails, the CAN bus transmission status is kept busy, and the retransmission mechanism is started to periodically send the frame until successful transmission.

7. The method according to claim 6, characterized in that, The process of receiving CAN format frames includes: S201. After receiving a valid CAN format frame, the multi-channel CAN controller sends an interrupt signal; After receiving an interrupt signal, the S202.AXI-CAN interface unit moves the CAN format frame into the requested secondary buffer FIFO; S203. Update the secondary buffer FIFO information and notify the host to read the CAN format frame.

8. The method according to claim 6, characterized in that, The process of dynamically configuring the cache includes: Based on the cache space length configuration command received from the RGMII interface, dynamically allocate the length of the first-level cache FIFO and / or the second-level cache FIFO; Based on the cache space clearing command received from the RGMII interface, clear the data in the first-level cache FIFO and / or the second-level cache FIFO when the cached data expires.

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