A current source insensitive to power supply

Abstract

The application relates to the field of semiconductor integrated circuit design, in particular to a power supply insensitive current source, which comprises: a reference current generating circuit, which is used for generating a power supply insensitive reference current, adopts a JFET tube with a gate-source short circuit and a Zener diode working in a reverse breakdown state; a current mirror circuit, which is connected with the reference current generating circuit and is used for mirroring the power supply insensitive reference current; the power supply insensitive current source designed by the application utilizes the characteristic that the reverse breakdown voltage of the Zener diode does not change with working current, so that the drain-source voltage of the JFET, which is the input reference current core device, is kept unchanged near the reverse breakdown voltage, thereby greatly reducing the influence of high-order effects; the structure is simple, the current sensitivity is low, and the problem that the output current of the current source is influenced by the power supply voltage can be solved in a wide power supply voltage range.

Description

Technical Field

[0001] This invention relates to the field of semiconductor integrated circuit design, and more specifically to a current source that is insensitive to power supply. Background Technology

[0002] Current sources are indispensable in analog integrated circuits such as amplifiers, reference circuits, and power management circuits. They provide a reference bias current to other parts of the circuit, and their magnitude directly affects the operating state of other parts due to variations in process technology, temperature, or power supply voltage, thus impacting the performance of the entire circuit and even the system. Common current source structures in existing technologies include... Figure 1 , Figure 2 As shown.

[0003] Figure 1 This is the simplest current source structure and its improved circuit in the existing technology. The current flowing through R1 is the input reference current. The current mirror structure makes the input current With output current Equal, because Any fluctuation in the power supply voltage will proportionally affect the output current. Figure 1 (c) is based on The current source Q2, with its base-emitter voltage applied across R2, generates an output current. The exponential relationship makes the output current With power supply The relationship weakened further. With a 10% change, Figure 1 (a) The output current changes by approximately 10%. Figure 1 (b) The output current changes by approximately 1.6%. Figure 1 (c) The output current changes by approximately 0.37%.

[0004] Figure 2 The circuit structure of the self-biased current source in the prior art utilizes the exponential relationship between diode current and forward voltage drop, as well as self-biasing, to achieve... by The impact is extremely low. and The residual weak relationship mainly originates from the higher-order effects of transistors Q1~Q4. With changes in power supply voltage and Q1 and Q2 Inconsistency; because the self-biased current mirror has a normal operating state and a zero state, a startup circuit is needed to prevent the circuit from operating in the zero state, which increases the complexity of the circuit.

[0005] Therefore, there is an urgent need for a current source circuit with low power sensitivity and simple structure. Summary of the Invention

[0006] In view of this, this application discloses a current source that is insensitive to power supply to solve the above problems; including:

[0007] A reference current generation circuit is used to generate a power supply insensitive reference current, employing a JFET with its gate and source shorted and a Zener diode operating in reverse breakdown mode.

[0008] A current mirror circuit, which is connected to a reference current generation circuit, is used to mirror the output of a power supply insensitive reference current.

[0009] Furthermore, the JFET transistor is manufactured using one of the following processes: a bipolar process compatible with PJFET devices, a bipolar process compatible with NJFET devices, or a MOS process compatible with JFET devices.

[0010] The beneficial effects of this application include:

[0011] A current source that is insensitive to power supply is designed based on a JFET with gate-source short circuit and a Zener diode operating in reverse breakdown state. By taking advantage of the characteristic that the breakdown voltage of the Zener diode does not change with the operating current, the drain-source voltage of the core device JFET, the input reference current, is kept constant near the reverse breakdown voltage of the diode, thereby greatly reducing the influence of higher-order effects.

[0012] A current source that is insensitive to power supply is provided. It has the characteristics of simple structure and low current sensitivity, and can solve the problem of the output current of the current source being affected by the power supply voltage within a wide power supply voltage range.

[0013] This provides a new design approach for those skilled in the art. Attached Figure Description

[0014] Figure 1 This refers to the current source structure in the prior art and its improved circuit;

[0015] Figure 2 The circuit structure of a self-biased current source in the prior art;

[0016] Figure 3 This is a circuit diagram of a current source that is insensitive to power supply in an embodiment of this application;

[0017] Figure 4 These are simulation results from the embodiments of this application. Detailed Implementation

[0018] To make the objectives, technical solutions, features, and advantages of this application clearer and to enable those skilled in the art to better understand the technical solutions of this application, the following detailed description of this application is provided in conjunction with the accompanying drawings and embodiments.

[0019] Example 1:

[0020] This embodiment includes a current source that is insensitive to power supply, comprising:

[0021] A reference current generating circuit is used to generate a power supply insensitive reference current, employing a JFET with its gate and source shorted and a Zener diode operating in reverse breakdown mode.

[0022] A current mirror circuit, which is connected to a reference current generation circuit, is used to mirror a reference current that is insensitive to the power supply.

[0023] Furthermore, in this embodiment, the reference current generation circuit includes: three PJFET transistors J1, J2, and J3, one NPN transistor Q1, and one Zener diode D2; wherein, the source of J1 is connected to the gate of J1 and the collector of Q1, and the drain of J1 is connected to the source of J2, the gate of J2, the base of Q1, and the cathode of D1; the drain of J2 is connected to the anode of D2 and grounded; the source of J3 is connected to the gate of J3 and the emitter of Q1; the gate of J1 serves as the power supply terminal of the reference current generation circuit, and the drain of J3 serves as the output terminal of the reference current generation circuit.

[0024] In this embodiment, the JFET uses a bipolar process compatible with PJFET devices.

[0025] Specifically, J3 is the core component for generating the input current. Using a gate-source short-circuit connection ensures that the current flowing through J3 is always equal to its saturation current, which controls the output current of the reference current generation circuit. The saturation current of J3 For a given manufacturing process, the saturation current of a JFET device primarily depends on its channel width-to-length ratio. By adjusting the channel width-to-length ratio of J3 and the mirror ratio of the current mirror circuit, the output current of the reference current generation circuit can be adjusted.

[0026] Furthermore, J1, J2, D2, and Q1 are used to control the drain-source voltage of J3 to remain constant. The channel width-to-length ratio of J1 is much larger than that of J2, i.e. This causes the saturation current of J1 to... Much larger than the saturation current of J2 .

[0027] In this embodiment, the reverse breakdown voltage of D2 is 6V, and the maximum power supply voltage VCC is 40V.

[0028] When the power supply voltage VCC is between 6V and 40V, even if the change in power supply voltage causes the current flowing through D2... The voltage change occurs, while D2 always operates in reverse breakdown mode, maintaining a cathode voltage of 6V, thereby controlling the base voltage of Q1. At this time, the source voltage of J3 is the base voltage of Q1 minus its own V. BE The drain voltage of J3 is approximately 1 V away from GND. BE Thus, the drain-source voltage of J3 is obtained. ,in, This represents the drain-source voltage of J3. This represents the reverse breakdown voltage of D2. This represents the base-emitter voltage of an NPN transistor; in this embodiment... It is 0.7V. It remains constant at 4.6V.

[0029] When the power supply voltage VCC is between 4V and 6V, D2 is in the off state because The base voltage of Q1 is pulled up to near the power supply voltage VCC, causing the drain-source voltage of J3 to decrease slightly. Considering the higher-order effects, the saturation current of J3 decreases slightly, resulting in a slight decrease in the output current. Slightly lower.

[0030] When the power supply voltage VCC is between 2V and 4V, D2 is in the off state, the drain-source voltage of J3 decreases significantly, resulting in a significant decrease in output current.

[0031] When the power supply voltage VCC approaches 2V, Q1 and Q2 are turned off, and the circuit does not work.

[0032] Assuming a typical operating voltage of 20V and a typical operating current of 50μA, the circuit is simulated, and the simulation results are as follows. Figure 4 As shown in the figure, the long dashed line represents Figure 1 The conventional current source circuit shown in Figure (a) is represented by the short dashed line. Figure 2 The self-biased current source in the figure, with the solid line representing the power supply insensitive current source circuit in this embodiment, can achieve a stable reference current output within a wide power supply voltage range of 4~40V, and this current is almost independent of power supply voltage fluctuations; sensitivity is defined. , Figure 1 (a) has a power sensitivity of 95%. Figure 2 The power sensitivity of the self-biased current source is 0.5%, while the power sensitivity of the current source circuit designed in this application is 0.05%, which is an improvement of nearly 1000 times compared to Figure (a). Figure 2 It has improved by 100 times.

[0033] In this embodiment, the current mirror is a current mirror with emitter resistors, including: two NPN transistors Q2 and Q3, and two resistors R1 and R2; wherein: the collector of Q2 is connected to the base of Q2 and the base of Q3, respectively, and the emitter of Q2 is connected to one end of R1; the other end of R1 is connected to one end of R3 and grounded; the other end of R3 is connected to the emitter of Q3. The collector of Q2 serves as the input terminal of the current mirror with emitter resistors, and the collector of Q3 serves as the output terminal of the current mirror with emitter resistors.

[0034] Example 2:

[0035] This embodiment includes a current source that is insensitive to power supply. The difference from Embodiment 1 is that the JFET in Embodiment 1 uses a bipolar process compatible with PJFET devices, while this embodiment uses a bipolar process compatible with NJFET devices.

[0036] Example 3:

[0037] This embodiment includes a current source that is insensitive to power supply. The difference from Embodiment 1 is that the JFET in Embodiment 1 uses a bipolar process compatible with PJFET devices, while this embodiment uses a MOS process compatible with JFET devices.

[0038] Example 4:

[0039] This embodiment includes a current source that is insensitive to power supply. The difference from Embodiment 1 is that in this embodiment, the current mirror is a Wilson current mirror.

[0040] Example 5:

[0041] This embodiment includes a current source that is insensitive to power supply. The difference from Embodiment 1 is that in this embodiment, the current mirror is a Cascode current mirror.

[0042] Finally, it should be noted that the above description only depicts some embodiments of this application. For those skilled in the art, various changes, modifications, substitutions, and variations can be conceived of these embodiments without departing from the principles and spirit of this application. The scope of protection of this application is defined by the appended claims and their equivalents, and all the above-mentioned behaviors should be covered within the scope of protection of this application.

Claims

1. A current source that is insensitive to power supply, characterized in that, include: A reference current generation circuit is used to generate a power supply insensitive reference current, employing a JFET with its gate and source shorted and a Zener diode operating in reverse breakdown mode. The reference current generation circuit includes: three JFETs J1, J2, and J3, one NPN transistor Q1, and one Zener diode D2; wherein, the source of J1 is connected to the gate of J1 and the collector of Q1, and the drain of J1 is connected to the source of J2, the gate of J2, the base of Q1, and the cathode of D2; the drain of J2 is connected to the anode of D2 and grounded; the source of J3 is connected to the gate of J3 and the emitter of Q1; the gate of J1 serves as the power supply terminal of the reference current generation circuit, and the drain of J3 serves as the output terminal of the reference current generation circuit; The JFET is manufactured using one of the following processes: bipolar process compatible with PJFET devices, bipolar process compatible with NJFET devices, or MOS process compatible with JFET devices. A current mirror circuit, which is connected to a reference current generation circuit, is used to mirror a reference current that is insensitive to the power supply.

2. The current source insensitive to power supply according to claim 1, characterized in that, The width-to-length ratio of the channel in J1 is much greater than that of J2.

3. The current source insensitive to power supply according to claim 1, characterized in that, When the power supply voltage of the reference current generation circuit is greater than the reverse breakdown voltage of D2, the saturation current of J1... Much larger than the saturation current of J2 .

4. The current source insensitive to power supply according to claim 3, characterized in that, The drain-source voltage of J3 is: ,in, This represents the drain-source voltage of J3. This represents the reverse breakdown voltage of D2. This represents the base-emitter voltage of an NPN transistor.

Images