Heterogeneous SoC task adaptive distribution system

By using a heterogeneous SoC task adaptive allocation system, precise hierarchical division and semantic annotation of task states are achieved, the task migration process is optimized, and the problems of bandwidth waste and long migration pause time in existing technologies are solved, thereby improving the availability and data consistency of the system.

CN121116655AActive Publication Date: 2025-12-12JILIN YUNTOU LAISENGOU DIGITAL TECH CO LTD

Patent Information

Application Number
CN202511668255.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-11-14
Publication Date
2025-12-12
Estimated Expiration
2045-11-14

AI Technical Summary

Technical Problem

Existing technologies lack hierarchical and semantic awareness of task states during task migration in multi-core heterogeneous SoC systems, resulting in wasted bandwidth and prolonged migration pause times, and are unable to perform optimized compression for different types of data.

Method used

A heterogeneous SoC task adaptive allocation system is adopted, including a migration judgment module, a migration preparation module, a semantic annotation module, and a compressed migration module. By identifying the load imbalance state, generating a baseline snapshot, performing hierarchical division and semantic annotation, and combining hybrid compression and pre-warm loading, the task migration process is optimized.

Benefits of technology

Significantly reduces migration downtime, decreases migration data volume, improves system availability and data consistency, and ensures fast and smooth migration and recovery of tasks in heterogeneous SoC systems.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention belongs to the technical field of computers, and discloses a heterogeneous SoC task adaptive distribution system. Comprises: a migration determination module for identifying a load imbalance state between cores in a running process and screening migration candidate tasks; the migration preparation module is used for generating baseline snapshots for the running states of the migration candidate tasks and carrying out hierarchical division on the baseline snapshots; the semantic annotation module is used for carrying out semantic annotation on memory pages occupied by the migration candidate tasks, calculating regularized semantic scores and distributing levels to memory page data according to the regularized semantic scores; the compression migration module is used for carrying out mixed compression and self-adaptive reduction on the layered state data in the migration process; the preheating loading module is used for executing preheating loading of codes and data of a high-priority function on a high-speed cache of the target core according to the preheating priority sequence on the migrated target core; and through semantic annotation and hierarchical compression, the transmission data volume is effectively reduced, and the migration dwell time is shortened.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of computer, more particularly, the present application relates to a heterogeneous SoC task adaptive allocation system. BACKGROUND

[0002] With the wide deployment of multi-core heterogeneous SoC in edge terminals, the system often deals with load mutation, energy saving or fault switching by dynamically migrating tasks between the same type of computing cores. Although migration occurs between the same type of cores, the hardware capabilities are similar, but the continuity of the task still depends on the processor state, function call stack, and specific memory representation and runtime semantics interacting with peripherals, rather than simply the number of physical pages or the total amount of memory. The continuity of the task often depends on specific DMA buffers, network / I / O buffers, transaction write buffers, kernel / driver states, and bindings with peripheral interrupts or callbacks. These semanticized memory and state dependencies determine the relative importance of different memory pages in the migration process.

[0003] The existing implementation of task migration as a load scheduling tool mainly adopts whole image copying or migration strategy based on coarse-grained difference, and the fundamental deficiency is that the processing of task state lacks layering and semantic awareness. This kind of method often regards all memory states as a homogenized data block, without distinguishing the structured characteristics of data, such as processor registers, function stacks, and normal heap memory, resulting in the inability to take targeted optimization compression for different types of data.

[0004] Even if a few methods try to make rough layering, they fail to distinguish at a more detailed memory page semantic level. Migration decisions are usually based on task-level or core-level statistics, completely ignoring the differences in memory pages in terms of semantics and execution continuity. This leads to a large number of pages that can be quickly reconstructed by the target end or do not affect the running, such as zero-filled pages and read-only pages, being unnecessarily included in the transmission stream, causing bandwidth waste and prolonging the pause window.

[0005] In view of this, the present application proposes a heterogeneous SoC task adaptive allocation system to solve the above problems. SUMMARY

[0006] In order to overcome the above-mentioned defects of the prior art, in order to achieve the above-mentioned purpose, the present application provides the following technical scheme: a heterogeneous SoC task adaptive allocation system, comprising:

[0007] A migration decision module for identifying load imbalance states between cores during operation and filtering migration candidate tasks;

[0008] A migration preparation module for generating a baseline snapshot of the running state of the migration candidate tasks and performing hierarchical division, the hierarchy including a critical state layer, a dependent state layer, and an extended state layer;

[0009] The semantic labeling module labels semantics of the memory pages occupied by the migration candidate task, calculates a regularized semantic score, and allocates the memory page data to a level according to the regularized semantic score.

[0010] The compression migration module is configured to perform hybrid compression and adaptive restoration on the hierarchical state data during the migration of the migration candidate task.

[0011] The pre-warming loading module is configured to perform pre-warming loading of the code and data of the high-priority function on the cache of the target core according to the pre-warming priority sequence after the migration of the migration candidate task.

[0012] Further, the method for screening the migration candidate task comprises the following steps:

[0013] S101: When the source core-side task is scheduled to be executed, a start time stamp and a wake-up time stamp of the source core-side task being scheduled to be executed are recorded, and a difference between the two time stamps is taken as a single scheduling delay.

[0014] The scheduling delays of the continuous n times are calculated by using a sliding window method, so as to obtain the average execution delay of the source core-side task in the time period.

[0015] The continuous three sliding windows are set as a trend period, when the average execution delay of the source core-side task continuously rises in the trend period and the rising amplitude exceeds a preset amplitude, the source core-side task is marked as a delay backlog type task.

[0016] S102: The data page number of the migration of the source core-side task is counted by reading the active page table information of the source core-side task, and the memory occupation of the source core-side task is estimated by multiplying the single page size.

[0017] If the memory occupation of the source core-side task is less than the product of the bandwidth upper limit and the tolerated migration time, it is considered that the source core-side task can complete the migration within the allowed bandwidth range.

[0018] S103: The resource dependence detection of the source core-side task is performed to determine whether the source core-side task is a state-independent task or a state-dependent task.

[0019] S104: The source core-side task that meets the conditions is registered as a migration candidate task, and the conditions include:

[0020] being marked as a delay backlog type task;

[0021] being able to complete the migration within the allowed bandwidth range;

[0022] being determined as a state-independent task.

[0023] Further, the method for determining whether the source kernel task is a state-independent task or a state-dependent task comprises:

[0024] S1031: Query the file descriptor table and the asynchronous I / O request queue of the source kernel task. If it is detected that there is a blocking network socket, a DMA operation to be completed, or an unfinished read / write request, it is considered that the source kernel task has I / O dependency;

[0025] S1032: Check whether the source kernel task currently holds a critical synchronization lock or is in a lock waiting state. If the lock object held by the source kernel task belongs to a global resource category, such as a file system lock or a database global lock, it is considered that the source kernel task holds a critical lock;

[0026] S1033: Monitor the persistence state of the source kernel task through a log system interface. If the source kernel task is in the process of log writing, transaction non-commit, or flash synchronization, it is determined that the source kernel task has persistent write dependency;

[0027] S1034: For the source kernel task that does not have I / O dependency, does not hold a critical lock, and does not perform persistent write, mark it as a state-independent task, otherwise mark it as a state-dependent task.

[0028] Further, the method for hierarchical division comprises:

[0029] The processor register state, program counter and current execution pointer, function call stack top pointer and current function return address, thread ID, and priority register value in the migration candidate task are divided into the critical state layer;

[0030] The active stack area data, thread local storage area, and dynamically allocated heap segment in the migration candidate task are divided into the dependent state layer;

[0031] The cache mapping table, memory access prediction table, interrupt service record table, lightweight lock state table, and auxiliary mapping data in the migration candidate task are divided into the extended state layer.

[0032] Further, the semantic annotation types include: DMA buffer page, critical I / O page, read-only page, zero padding page, and dirty page;

[0033] The method for performing semantic annotation on the memory pages occupied by the migration candidate task comprises:

[0034] For the DMA buffer area, the physical page frame number recorded in the page table entry is compared with the DMA mapping interval or I / O memory management unit mapping table maintained by the kernel. When the physical page frame number falls within the DMA mapping interval or the page table entry is marked with DMA attribute, the memory page is marked as DMA buffer page;

[0035] Obtaining the reverse mapping relationship of the page table, combining the page reference structure maintained by the kernel I / O subsystem to match, when the memory page corresponds to the mapping structure pointing to the network buffer, the block device cache or the file cache node, marking the memory page as a critical I / O page;

[0036] The read-only attribute of the memory page is determined according to the access permission bit in the page table entry, when the page table entry lacks write permission or is explicitly marked as read-only, the memory page is marked as a read-only page;

[0037] When the page frame is automatically filled with all zero data when allocated by the system, and its subsequent is marked as a reusable anonymous page or a cache recycling page, the memory page is marked as a reinitializable zero-filled page;

[0038] When the memory page is written in the baseline snapshot process, the memory page is marked as a dirty page.

[0039] Further, the method for assigning the memory page data to the hierarchical level according to the regularized semantic score includes:

[0040] According to the annotated semantics, set the rules, and assign a weight to each rule;

[0041] For any memory page in the address space, traverse the semantic setting rule, and judge the condition of each rule;

[0042] If the condition of a certain semantic setting rule is established, the corresponding weight is counted into the regularized semantic score;

[0043] Otherwise, the weight is not counted;

[0044] When the regularized semantic score of the memory page is above the first threshold, the memory page data is identified as the dependent state layer data;

[0045] When the regularized semantic score of the memory page is below the second threshold, it is marked as re-generatable, and the memory page is excluded from migration, and only the reconstruction prompt is recorded in the baseline snapshot directory;

[0046] When the regularized semantic score of the memory page is between the first threshold and the second threshold, including the first threshold and the second threshold, the memory page data is identified as the extended state layer data.

[0047] Further, the hybrid compression includes;

[0048] For the key state layer, all the key state layer data is organized as a key state vector in a predetermined order, and a difference vector is calculated by performing a bit-level XOR operation on the current key state vector and the last baseline snapshot key state vector to compare elements one by one;

[0049] For the dependent state layer, block-level variable-length encoding is used, and the function frame structure in the stack data is identified by a hash fingerprint and matched with a template, and the original data block is replaced by a short template index and a difference bit field to achieve compression.

[0050] For the extended state layer, first, the value of the program counter in the key state layer is used to determine the first memory page that will be accessed immediately after task recovery, and then a context prediction model is used to estimate the probability distribution of the next memory page accessed, and the K memory pages with the highest probability are determined as high-probability blocks. Entropy encoding is used for high-probability blocks, and run-length compression is used for the remaining blocks.

[0051] Further, the method for replacing the original data block with a short template index and a difference bit field to achieve compression is:

[0052] When building a baseline snapshot, a fixed-length hash fingerprint is generated for each function frame structure.

[0053] The hash fingerprint of the function frame is stored in a template index table private to the task, and a short template index is generated.

[0054] During differential compression, the system traverses the function frames of the current stack area, calculates their hash fingerprints, and compares them with the template index table.

[0055] If the hash fingerprint hits, the data part of the function frame is replaced with a short template index and a difference bit field.

[0056] If the hash fingerprint does not hit, the new hash fingerprint and the complete data block are added to the template index table and the data stream.

[0057] The generation process of the hash fingerprint includes: for each active function frame on the call stack, three key features are extracted from the execution context and debugging information of the migration candidate task, including the return address, the stack size of the function frame, and the parameter area size used to save the incoming parameters.

[0058] The numerical values of the three key features are uniformly formatted into a fixed-length hexadecimal string.

[0059] The formatted key features are then concatenated in a predetermined order.

[0060] The string is input into a standard hash function, and the first 32 bits of the output are taken as the hash fingerprint of the function frame.

[0061] Further, the implementation method of the context prediction model is:

[0062] A sliding window with a fixed length L is used to track the historical access memory page sequence;

[0063] Based on the historical access memory page sequence in the sliding window, the actual occurrence number of each time from the memory page to the memory page and the total number of times the memory page is accessed in the entire historical access memory page sequence are recorded, and the conditional probability is obtained by the ratio of the former to the latter, and the conditional probability is the probability that the next memory page is accessed after the current memory page is accessed.

[0064] Further, the acquisition method of the warm-up priority sequence is:

[0065] S121: When the migration candidate task is running normally on the source core, the execution behavior of the migration candidate task is continuously monitored to obtain a historical execution trajectory;

[0066] S122: The entire historical execution trajectory is divided into sampling windows with a preset fixed length, and in each sampling window, the number of calls of each function is counted, and the average call depth of the function in the call stack is recorded;

[0067] S123: The function call statistics results in the continuous windows are compared, and the function that is called in at least R% of the continuous windows and has an average call depth greater than S in the call stack is marked as a function-level hotspot;

[0068] S124: After the function-level hotspot is identified, a function call dependency graph is constructed, each node in the function call dependency graph corresponds to a function, and the node information includes a function identifier, a function entry address, a function call number, and an average execution duration, the edges between the nodes represent the calling relationship between the functions, and the weight information is attached to the edges;

[0069] S125: The function with the most number of calls is obtained from all the functions, the number of calls of the function is taken as a reference value, and then the number of calls of each function is divided by the reference value to obtain a normalized call frequency;

[0070] S126: In the function call dependency graph, all calling paths of the function are searched, the weight sum of each function on each path is calculated, and the path with the highest weight sum is identified, and the highest weight sum value is taken as a logical dependency degree index of the function. The logical dependency degree index is calculated using a graph traversal algorithm, and the weights on the paths are accumulated during the traversal process;

[0071] S127: Calculate the warm-up index of the function according to the normalized call frequency and the logical dependency index, arrange all functions in descending order based on the warm-up index, and generate a warm-up priority sequence.

[0072] The technical effects and advantages of the heterogeneous SoC task adaptive allocation system according to the present application are as follows:

[0073] Firstly, the present application performs accurate hierarchical division on the state data of the migration candidate task, constructs a bandwidth and timing allocation optimization framework for the migration process according to the recovery urgency: the key state layer is assisted by super-fine-grained time difference coding for preferential transmission to ensure instruction-level continuity; the dependent state layer uses block-level variable-length coding to maintain function call structure, ensuring functional correctness on the premise of eliminating structural redundancy and ensuring accurate data restoration; the extended state layer uses context prediction and probability coding for selective migration to significantly reduce unnecessary data transmission. This hierarchical strategy can significantly shorten the required downtime and reduce the total migration data volume, thereby improving system availability and reducing the probability of triggering stop / rollback during migration.

[0074] Secondly, based on hierarchical division, the present application performs semantic annotation on each memory page of the task runtime, calculates its regularized semantic score, and allocates memory page data to different migration levels according to the score, achieving fine-grained management of task memory resources. Semantic annotation division can dynamically identify the most critical memory pages for business continuity and assign them the highest priority, while assigning low priority to those memory pages that can be reconstructed or are not important. This hierarchical and priority-based semantic value division strategy ensures that limited migration bandwidth resources are accurately prioritized for transmitting the most valuable data for restoration, thereby maximizing data consistency and service continuity while maintaining low data volume.

[0075] In summary, hierarchical division provides a framework for task migration, while semantic annotation provides micro, dynamically controllable execution rules. The combination of the two ensures consistency and real-time performance while achieving finer-grained bandwidth utilization, compression strategy selection, and faster target end restoration. BRIEF DESCRIPTION OF DRAWINGS

[0076] Figure 1 The heterogeneous SoC task adaptive allocation system flowchart in Example 1 of the present application;

[0077] Figure 2 The schematic diagram of the present application for screening migration candidate tasks in Example 1;

[0078] Figure 3 The memory page semantic annotation and hierarchical division schematic diagram in Example 1 of the present application;

[0079] Figure 4 A function call dependency graph diagram in Embodiment 1 of the present application is shown in FIG. 1. DETAILED DESCRIPTION

[0080] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative efforts belong to the scope of protection of the present application.

[0081] Embodiment 1

[0082] Referring to Figure 1 The present embodiment provides a heterogeneous SoC task adaptive allocation system, which comprises:

[0083] A migration determination module is configured to identify a load imbalance state among the cores during operation, and to filter migration candidate tasks to realize adaptive task migration among the cores.

[0084] It should be noted that, in the present embodiment, the core refers to a central processing unit (CPU) core compatible with an instruction set architecture inside a heterogeneous SoC, that is, the task migration optimization discussed in the present embodiment occurs between the same type of CPU cores.

[0085] The migration determination module collects core utilization rates at a fixed sampling period.

[0086] The core utilization rate is calculated according to the proportion of non-idle time in a unit of time, and is used to reflect the real-time load level of each core, wherein the non-idle time is the sum of the user state time and the kernel state time.

[0087] The collected data is written into a shared monitoring buffer in real time for subsequent determination.

[0088] The load imbalance state is determined by statistically analyzing the sampling results of all cores at the end of each sampling period, calculating the average utilization rate and the standard deviation, and detecting that the utilization rate of any core exceeds the average value plus a preset multiple of the standard deviation, and at the same time, the utilization rate of another core is lower than the average value minus the multiple of the standard deviation.

[0089] It should be noted that, in order to avoid excessive migration, the preset multiple is adaptively adjusted according to real-time volatility, for example, the value is between 1.2 and 2, which takes into account the migration sensitivity and stability.

[0090] Referring toFigure 2 As shown, when the load imbalance state is identified, the screening of the migration candidate task is started, and the method comprises:

[0091] S101: When the source core-side task is scheduled for execution, the start time stamp and the wake-up time stamp of the source core-side task being scheduled for execution are recorded, and the difference between the two is taken as the single scheduling delay;

[0092] The scheduling delays of the last n times (for example, n=10 times) are calculated by using the sliding window method, so as to obtain the average execution delay of the source core-side task in the time period;

[0093] The last three sliding windows are set as a trend period, when the average execution delay of the source core-side task continuously rises in the trend period and the rising amplitude exceeds the preset amplitude, the source core-side task is marked as a delay backlog type task, and it is considered that the performance bottleneck has occurred in the running of the task on the current core;

[0094] S102: By reading the active page table information of the source core-side task, the number of migrated data pages is counted, and the memory occupation of the source core-side task is estimated by multiplying the single page size;

[0095] If the memory occupation of the source core-side task is less than the product of the bandwidth upper limit and the tolerable migration time, it is considered that the source core-side task can complete migration within the allowable bandwidth range;

[0096] Wherein, the bandwidth upper limit is the real-time available net bandwidth between the source core and the target core for task migration, and the tolerable migration time is set according to the 95% quantile value of the historical migration average completion time.

[0097] The method for obtaining the historical migration average completion time is as follows:

[0098] The total time consumed from the start of migration of each task from the source core, that is, from the completion of the baseline snapshot establishment and the start of data transmission, to the complete recovery of execution on the target core, that is, the first time the task is scheduled for execution on the target core, is recorded as the historical migration time, and the historical migration average completion time is the arithmetic mean of the historical migration time.

[0099] S103: Perform source core-side task resource dependency detection to determine whether the source core-side task is a state-independent task or a state-dependent task, and the determination process comprises:

[0100] S1031: Query the file descriptor table and asynchronous I / O request queue of the source core-side task, if a blocking network socket, a DMA operation to be completed or a read / write request not completed is detected, it is considered that the source core-side task has I / O dependency;

[0101] S1032: Check whether the source core-end task currently holds a critical synchronization lock or is in a lock waiting state, if the lock object held by the source core-end task belongs to a global resource category, such as a file system lock or a database global lock, it is considered that the source core-end task holds a critical lock;

[0102] S1033: Monitor the source core-end task persistence state through a log system interface, if the source core-end task is in a log writing, transaction uncommitted or flash synchronization process, it is determined that the source core-end task has a persistent write dependency;

[0103] S1034: For the source core-end task that does not have I / O dependency, does not hold a critical lock and does not perform persistent write, mark it as a state-independent task, otherwise mark it as a state-dependent task.

[0104] S104: Register the source core-end task that meets the conditions as a migration candidate task, the conditions include:

[0105] Being marked as a delay backlog type task;

[0106] Being able to complete migration within the allowed bandwidth range;

[0107] Being determined as a state-independent task.

[0108] A migration preparation module for generating a baseline snapshot of the running state of the migration candidate task and performing hierarchical division, the hierarchy including a critical state layer, a dependent state layer and an extended state layer.

[0109] In the process of generating the baseline snapshot, a minimum pause and write-once-copy combination strategy is adopted, that is, only the critical registers and control structures are set with a short pause when capturing the state, and the write-once-copy mechanism is enabled for ordinary memory pages.

[0110] To improve migration efficiency, the embodiment adopts hierarchical division, the method of hierarchical division including:

[0111] Dividing the processor register state, program counter and current execution pointer, function call stack top pointer and current function return address, thread ID and priority register value in the migration candidate task into the critical state layer;

[0112] Dividing the active stack area data, thread local storage area and dynamically allocated heap segment, runtime loaded shared library pointer table and symbol resolution table in the migration candidate task into the dependent state layer;

[0113] Dividing the cache mapping table, memory access prediction table, interrupt service record table, lightweight lock state table and auxiliary mapping data in the migration candidate task into the extended state layer.

[0114] It should be noted that the above embodiment takes a three-layer structure as the main implementation form to balance performance and complexity. However, according to the characteristics of different tasks, it can be extended to a four-layer or five-layer structure. For example, a "device state layer" is added on the basis of the three-layer structure to save peripheral mapping, DMA descriptors or video memory handles; a "session state layer" can also be added to save long-life interactive session information or authorization credentials. Through such an extended design, more types of task migration requirements can be adapted.

[0115] The semantic labeling module labels the memory pages occupied by the migration candidate task semantically, calculates a regularized semantic score, and allocates the memory page data according to the regularized semantic score.

[0116] Referring to Figure 3 The semantic labeling types include DMA buffer pages, key I / O pages, read-only pages, zero padding pages and dirty pages, and the specific semantic labeling method includes:

[0117] For the DMA buffer, the physical page frame number recorded in the page table entry is compared with the DMA mapping interval or the I / O memory management unit mapping table maintained by the kernel. When the physical page frame number falls within the DMA mapping interval or the page table entry is marked with the DMA attribute, the memory page is marked as a DMA buffer page.

[0118] The reverse mapping relationship of the page table is obtained, and the page reference structure maintained by the kernel I / O subsystem is matched. When the memory page corresponds to a mapping structure pointing to a network buffer, a block device cache or a file cache node, the memory page is marked as a key I / O page.

[0119] The read-only attribute of the memory page is determined according to the access permission bit in the page table entry. When the page table entry lacks write permission or is explicitly marked as read-only, the memory page is marked as a read-only page.

[0120] When the page frame is automatically filled with all-zero data by the system at the time of allocation, and it is subsequently marked as a reusable anonymous page or a cache recycling page, the memory page is marked as a reinitializable zero padding page.

[0121] When the memory page is written in the baseline snapshot process, the memory page is marked as a dirty page.

[0122] After completing the semantic labeling, the semantic setting rules are set, and a weight is set for each semantic setting rule, a regularized semantic score is calculated, and the memory page data is allocated according to the regularized semantic score. The specific method includes:

[0123] Rule R1 is set: if the memory page is marked as a DMA buffer page, a weight W1 is assigned, and the optional value is 100. The DMA state depends on the hardware, and non-migration will cause task I / O failure or data damage on the target core.

[0124] Set rule R2: if the memory page is marked as a critical I / O page, assign weight W2, the optional value is 90, these memory pages directly affect the external service state of the task, and must be transmitted in priority;

[0125] Set rule R3: if the memory page is marked as a reinitializable zero padding page, assign weight W3, the optional value is -100, exclude the memory page from migration;

[0126] Set rule R4: if the memory page is marked as a dirty page and a non-readonly page, assign weight W4, the optional value is 10, representing that the data on the memory page has changed after the baseline snapshot, needs to be synchronized, but the importance is lower than hardware dependency;

[0127] Set rule R5: if the memory page is marked as a readonly page, assign weight W5, the optional value is -30, readonly data can be remapped or delayed loaded on the target core, and the migration priority is lower;

[0128] For any memory page in the address space, traverse the semantic setting rules, and judge the condition of each semantic setting rule;

[0129] If the condition of a semantic setting rule is established, the weight corresponding to the rule is counted into the regularized semantic score;

[0130] Otherwise, the weight is not counted;

[0131] When the regularized semantic score of the memory page is above the first threshold value, the memory page data is identified as dependency state layer data;

[0132] When the regularized semantic score of the memory page is below the second threshold value, it is marked as re-generatable, and the memory page is excluded from migration, and only the reconstruction prompt is recorded in the baseline snapshot directory;

[0133] When the regularized semantic score of the memory page is between the first threshold value and the second threshold value, including the first threshold value and the second threshold value, the memory page data is identified as extended state layer data.

[0134] Wherein, the judgment threshold value of the preset rule semantic score is the first threshold value and the second threshold value, and the first threshold value is greater than the second threshold value, and the threshold value is set by the technical personnel in the field according to experience.

[0135] The compression migration module is used for mixed compression and adaptive restoration of layered state data during migration of the migration candidate task.

[0136] After receiving the layered state data output by the migration preparation module, a mixed compression strategy is adopted, including:

[0137] For the key state layer, all key state layer data is organized into a key state vector in a predetermined order, element-by-element comparison is achieved by performing a bit-level XOR operation on the current key state vector and the last baseline snapshot key state vector, and a difference vector is calculated. The difference vector is sparsely coded.

[0138] For the dependent state layer, block-level variable-length coding is used, function frame structures in the stack data are identified by hash fingerprints and template matching, and the original data block is replaced by a short template index and a difference bit field to achieve compression.

[0139] The method for replacing the original data block with a short template index and a difference bit field to achieve compression is:

[0140] When building a baseline snapshot, a fixed-length hash fingerprint is generated for each function frame structure;

[0141] The hash fingerprint of the function frame is stored in a task-private template index table, and a short template index is generated;

[0142] During differential compression, the system traverses the function frames of the current stack area, calculates their hash fingerprints, and compares them with the template index table;

[0143] If the hash fingerprint hits, the data part of the function frame is replaced by a short template index and a difference bit field;

[0144] If the hash fingerprint does not hit, the new hash fingerprint and the complete data block are added to the template index table and the data stream.

[0145] The difference bit field refers to a structured data packet that records all content differences between the current function frame and the hit template, composed of a bitmap indicating the change position and the latest data value at the corresponding position, used for the target core to accurately modify and restore the template.

[0146] The generation process of the hash fingerprint includes: for each active function frame on the call stack, three key features are extracted from the execution context and debugging information of the migration candidate task, including the return address, the stack size of the function frame, and the parameter area size used to save the incoming parameters;

[0147] The numerical values of the three key features are uniformly formatted into a fixed-length hexadecimal string;

[0148] The formatted key features are then concatenated in a predetermined order to obtain a string;

[0149] The string is input into a standard hash function, and the first 32 bits of the output are taken as the hash fingerprint of the function frame.

[0150] For the extended state layer, first, the value of the program counter in the key state layer is used to determine the first memory page that will be accessed immediately after task recovery, and then the context prediction model is used to estimate the probability distribution of the next memory page access. The K memory pages with the highest probability are determined as the high probability blocks, and the entropy encoding is used for the high probability blocks, and the run length compression is used for the remaining blocks.

[0151] The implementation method of the context prediction model is: a sliding window with a fixed length L is used to track the historical access memory page sequence, based on the historical access memory page sequence in the sliding window, the actual occurrence number of each time from the memory page to the memory page is recorded, and the total number of times the memory page is accessed in the entire historical access memory page sequence, the conditional probability is obtained by the ratio of the former to the latter, and the conditional probability is the probability that the next memory page is accessed after the current memory page is accessed.

[0152] Among them, the historical access page number sequence is formed by continuously tracking and recording the virtual memory address access requests of the migration candidate task through the memory access monitoring mechanism or the hardware performance monitoring unit (PMU) of the operating system kernel when the migration candidate task is normally running on the source core, aiming to reflect the memory access locality behavior of the task execution.

[0153] After compression, the system packs the compressed data into a composite data stream with a hierarchical index header. The index header records the starting offset and compression mode identifier of each layer of data, so that the target end can quickly locate and select the corresponding decoding strategy during restoration.

[0154] At the target end, the restoration process is performed in hierarchical order, first restoring the key state layer, then the dependent state layer, and finally the extended state layer. The system first reads the index header information to confirm the data boundaries and encoding formats of each layer:

[0155] For the key state layer, the differential reconstruction method is used to quickly reconstruct the complete key state vector by performing a bit-level XOR operation on the received differential data and the latest snapshot baseline.

[0156] For the dependent state layer, the system queries and extracts the corresponding function frame structure from the local template index table according to the received short template index, and uses the difference bit field correction data to restore the stack structure and function context.

[0157] For the extended state layer, the system reversely decodes the data according to the information entropy encoding and run length encoding (RLE) model used by the prediction model, and reconstructs the cache mapping relationship and page table access record of the task.

[0158] a pre-warming loading module, configured to perform a pre-warming loading operation on the target core after the task migration according to a pre-warming priority sequence.

[0159] The module is automatically started after the compression migration module completes the recovery of the critical state layer and the dependent state layer, and obtains the pre-warming priority sequence according to the access feature data collected before the migration.

[0160] The method for obtaining the pre-warming priority sequence is as follows:

[0161] S121: When the migration candidate task is running normally on the source core, the execution behavior of the migration candidate task is continuously monitored to obtain a historical execution trajectory.

[0162] The historical running trajectory data is obtained by using a hardware performance counter and a kernel-level binary instrumentation technology. Specifically, the hardware performance counter is used to record the triggering events of each function call, including the number of calls and the execution time; the kernel-level binary instrumentation is inserted into the function entry and exit of the binary code of the task to record the timestamp, call depth and call return order of each function call.

[0163] S122: The entire historical running trajectory is divided into sampling windows of a preset fixed length, and in each sampling window, the number of calls of each function is counted, and the average call depth of the function in the call stack is recorded.

[0164] The preset fixed length is set by a person skilled in the art according to the analysis accuracy requirement, for example, the 10-second execution trajectory of the task is divided into 100 sampling windows, and each window has a length of 100 ms.

[0165] S123: The function call statistics results in the continuous windows are compared, and the functions that are called in at least R% (the optional value of R is 60) continuous windows and have an average call depth greater than S (the optional value of S is 3) in the call stack are marked as function-level hotspots.

[0166] S124: Referring to Figure 4 As shown, after the function-level hotspot identification is completed, a function call dependency graph is constructed, each node in the function call dependency graph corresponds to a function, the node information includes a function identifier, a function entry address, a function call number and an average execution time, the edges between the nodes represent the call relationship between the functions, and the weights are attached to the edges.

[0167] The weight is calculated according to the call frequency, that is, the ratio of the number of times that function A calls function B to the total number of calls of function A is taken as the weight.

[0168] It should be noted that the construction of the function call dependency graph is dynamically updated, that is, the system will periodically integrate the newly collected function call data into the existing graph.

[0169] For example, Figure 4 The information of the node F1 is a function identifier F1, a call number Q1, and an average execution duration X1 ms; the information of the node F2 is a function identifier F2, a call number Q2, and an average execution duration X2 ms; the information of the node F3 is a function identifier F3, a call number Q3, and an average execution duration X3 ms; the information of the node F4 is a function identifier F4, a call number Q4, and an average execution duration X4 ms; and the information of the node F5 is a function identifier F5, a call number Q5, and an average execution duration X5 ms. Among them, F1 calls F2 with a weight of θ1, F2 calls F3 with a weight of θ3, F2 calls F4 with a weight of θ2, F3 calls F2 with a weight of θ4, and F3 calls F5 with a weight of θ5.

[0170] S125: Obtain the function with the highest call number among all functions, take the call number of the function as a reference value, and then divide the call number of each function by the reference value to obtain a normalized call frequency.

[0171] S126: In the function call dependency graph, search all call paths where the function is located, calculate the total weight of each function on each path, and identify the path with the highest total weight. The highest total weight value is taken as the logical dependency index of the function. The calculation of the logical dependency index uses a graph traversal algorithm (such as depth-first search DFS or topological sorting), and the weights on the paths are accumulated during the traversal process.

[0172] S127: Calculate the warm-up index of the function according to the normalized call frequency and the logical dependency index, and the formula is:

[0173] ;

[0174] Among them, is the warm-up index of function X, is the normalized call frequency of function X, is the logical dependency index of function X, and is an adjustable weight coefficient for balancing statistical heat and logical dependency, and the sum of the two is 1. The optional value is 0.3 and 0.7.

[0175] Based on the warm-up index, all functions are sorted in descending order to generate a warm-up priority sequence.

[0176] After migration, before the task resumes execution formally, the preheat loading module loads the instruction code and necessary context data of the high-priority function determined in the preheat priority sequence into the cache of the target core in batches according to the cache management instruction provided by the target core architecture.

[0177] The final goal of the preheat operation is to ensure that the first instruction pointed to by the program counter and the critical memory access can directly hit the local cache when the task resumes execution, minimize the main memory delay caused by the first access, and thus realize fast and smooth start after migration and eliminate cold start jitter.

[0178] The embodiment generates an accurate preheat priority sequence through historical execution trajectory, ensures that the target core can actively load the highest-priority function code and critical memory page into the cache in the order of the predicted execution path before the task resumes execution after migration. This accurate preheat mechanism based on historical data analysis greatly improves the hit accuracy of cache prefetching, minimizes the delay of the first instruction execution and critical memory access when the task resumes execution, and realizes fast and smooth start after migration.

[0179] The above merely describes specific embodiments of the present application, but the protection scope of the present application is not limited thereto, and any person skilled in the art can easily think of changes or replacements within the technical range disclosed by the present application, which should be covered within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

[0180] Finally, the above merely describes preferred embodiments of the present application and is not used to limit the present application, and any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be covered within the protection scope of the present application.

Claims

1. A heterogeneous SoC task adaptive allocation system, characterized in that, The application comprises: a migration determination module for identifying load imbalance between cores during operation and screening migration candidate tasks; a migration preparation module for generating a baseline snapshot of the running state of the migration candidate tasks and performing hierarchical division, the hierarchy including a critical state layer, a dependent state layer, and an extended state layer; a semantic labeling module for performing semantic labeling on the memory pages occupied by the migration candidate tasks, calculating a regularized semantic score, and distributing the memory page data according to the hierarchy based on the regularized semantic score; a compression migration module for performing mixed compression and adaptive restoration of the hierarchical state data during migration of the migration candidate tasks; a pre-warming loading module for performing pre-warming loading of the code and data of high-priority functions on the cache of the target core according to a pre-warming priority sequence after migration of the migration candidate tasks.

2. The heterogeneous SoC task adaptive allocation system of claim 1, wherein, The method for screening migration candidate tasks comprises: S101: When a source core-side task is scheduled for execution, record the start timestamp and wake-up timestamp of the source core-side task being scheduled for execution, and take the difference between the two as a single scheduling delay; perform average calculation on the continuous n scheduling delays in a sliding window manner, thereby obtaining the average execution delay of the source core-side task in this time period; set three continuous sliding windows as a trend period, and when the average execution delay of the source core-side task continuously rises in the trend period and the rising amplitude exceeds a preset amplitude, mark the source core-side task as a delay backlog type task; S102: Estimate the memory occupancy of the source core-side task by reading the active page table information of the source core-side task, counting the number of migrated data pages, and multiplying the single page size; if the memory occupancy of the source core-side task is less than the product of the bandwidth upper limit and the tolerated migration time, it is considered that the source core-side task can complete migration within the allowed bandwidth range; S103: Perform source core-side task resource dependency detection to determine whether the source core-side task is a state-independent task or a state-dependent task; S104: Register the source core-side tasks that meet the conditions as migration candidate tasks, the conditions including: being marked as a delay backlog type task; being able to complete migration within the allowed bandwidth range; being determined as a state-independent task.

3. The heterogeneous SoC task adaptive allocation system of claim 2, wherein, The method for determining whether the source core-side task is a state-independent task or a state-dependent task comprises: S1031: Query the file descriptor table and asynchronous I / O request queue of the source core-side task, and if a blocking network socket, a DMA operation to be completed, or a read / write request not completed is detected, it is considered that the source core-side task has I / O dependency; S1032: Check whether the source core-side task currently holds a critical synchronization lock or is in a lock waiting state, and if the lock object held by the source core-side task belongs to the global resource category, it is considered that the source core-side task holds a critical lock; S1033: Monitor the persistent state of the source core-side task through a log system interface, and if the source core-side task is in the process of log writing, transaction non-commit, or flash synchronization, it is determined that the source core-side task has persistent write dependency. S1034: For the source kernel task without I / O dependency, without holding critical lock and without performing persistent write, mark it as state-independent task, otherwise mark it as state-non-independent task.

4. The heterogeneous SoC task adaptive allocation system of claim 1, wherein, The hierarchical division method comprises: processor register state, program counter and current execution pointer, function call stack pointer and current function return address, thread ID and priority register value in the migration candidate task are divided into a critical state layer; active stack area data, thread local storage area and dynamically allocated heap segment, runtime loaded shared library pointer table and symbol resolution table in the migration candidate task are divided into a dependent state layer; cache mapping table, memory access prediction table, interrupt service record table, lightweight lock state table and auxiliary mapping data in the migration candidate task are divided into an extended state layer.

5. The heterogeneous SoC task adaptive allocation system of claim 1, wherein, The semantic annotation types comprise: DMA buffer page, critical I / O page, read-only page, zero padding page and dirty page. The method for annotating the memory pages occupied by the migration candidate task comprises: For the DMA buffer, the physical page frame number recorded in the page table entry is compared with the DMA mapping interval or I / O memory management unit mapping table maintained by the kernel, when the physical page frame number falls within the DMA mapping interval or the page table entry is marked with the DMA attribute, the memory page is marked as a DMA buffer page; The reverse mapping relationship of the page table is obtained, and the page reference structure maintained by the kernel I / O subsystem is matched, when the memory page corresponds to the network buffer, block device cache or file cache node, the memory page is marked as a critical I / O page; The read-only attribute of the memory page is determined according to the access permission bit in the page table entry, when the page table entry lacks write permission or is explicitly marked as read-only, the memory page is marked as a read-only page; When the page frame is automatically filled with all-zero data by the system at the time of allocation, and is subsequently marked as a reusable anonymous page or a cache recycling page, the memory page is marked as a zero-padding page that can be reinitialized; When the memory page is written in the baseline snapshot process, the memory page is marked as a dirty page.

6. The heterogeneous SoC task adaptive allocation system of claim 5, wherein, The method for assigning the memory page data to the hierarchical layers according to the regularized semantic score comprises: weights are assigned to each semantic setting rule; For any memory page in the address space, the semantic setting rules are traversed, and the conditions of each semantic setting rule are judged; If the conditions of a certain semantic setting rule are met, the corresponding weight is counted into the regularized semantic score; Otherwise, the weight is not counted; When the regularized semantic score of the memory page is above the first threshold value, the memory page data is identified as dependent state layer data; When the regularized semantic score of the memory page is below the second threshold value, it is marked as re-generatable, and the memory page is excluded from migration, and only the reconstruction prompt is recorded in the baseline snapshot directory; When the regularized semantic score of the memory page is between the first threshold value and the second threshold value, including the first threshold value and the second threshold value, the memory page data is identified as extended state layer data.

7. The heterogeneous SoC task adaptive allocation system of claim 1, wherein, The hybrid compression comprises: For the key state layer, all key state layer data is organized into a key state vector in a predetermined order, element-by-element comparison is achieved by performing a bit-level XOR operation on the current key state vector and the last baseline snapshot key state vector, and a difference vector is calculated, and the difference vector is sparsely encoded; For the dependent state layer, block-level variable-length encoding is used, function frame structures in the stack data are identified by hash fingerprints and template matching, and the original data block is replaced by a short template index and a difference bit field to achieve compression; For the extended state layer, first, the value of the program counter in the key state layer is used to determine the first memory page that will be accessed immediately after task recovery, and then a context prediction model is used to estimate the probability distribution of the next accessed memory page, and the K memory pages with the highest probability are determined as high-probability blocks, and entropy encoding is used for the high-probability blocks, and run-length compression is used for the remaining blocks.

8. The heterogeneous SoC task adaptive allocation system of claim 7, wherein, The method of replacing the original data block with a short template index and a difference bit field to achieve compression is: When building a baseline snapshot, a fixed-length hash fingerprint is generated for each function frame structure; The hash fingerprint of the function frame is stored in a template index table private to the task, and a short template index is generated; During differential compression, the system traverses the function frames of the current stack area, calculates their hash fingerprints, and compares them with the template index table; If the hash fingerprint hits, the data part of the function frame is replaced with a short template index and a difference bit field; If the hash fingerprint does not hit, the new hash fingerprint and the complete data block are added to the template index table and the data stream; The generation process of the hash fingerprint includes: for each active function frame on the call stack, three key features are extracted from the execution context and debugging information of the migration candidate task, including the return address, the stack size of the function frame, and the parameter area size used to save the incoming parameters; The numerical values of the three key features are uniformly formatted into a fixed-length hexadecimal string; The formatted key features are then concatenated in a predetermined order; The string is input into a standard hash function, and the first 32 bits of the output are taken as the hash fingerprint of the function frame.

9. The heterogeneous SoC task adaptive allocation system of claim 7, wherein, The implementation method of the context prediction model is: A sliding window with a fixed length L is used to track the sequence of historical access memory pages; Based on the historical memory page access sequence within this sliding window, each access from a memory page is recorded. Move to memory page The actual number of occurrences and memory pages in the entire historical memory page access sequence Total number of visits, conditional probability The conditional probability is obtained by comparing the former with the latter. That is, the current memory page After access, the next memory page The probability of being accessed.

10. The heterogeneous SoC task adaptive allocation system of claim 1, wherein, The method for obtaining the preheat priority sequence is: S121: While the migration candidate task is running normally on the source core, continuously monitor the execution behavior of the migration candidate task to obtain the historical execution trajectory; S122: Divide the entire historical running trajectory into sampling windows of a predetermined fixed length, and in each sampling window, count the number of calls to each function and record the average call depth of the function in the call stack; S123: Compare the function call statistics in consecutive windows, and mark the functions that are called in at least R% of the consecutive windows and have an average call depth greater than S in the call stack as function-level hotspots; S124: After completing the function-level hotspot identification, a function call dependency graph is constructed, each node in the function call dependency graph corresponds to a function, the node information includes a function identifier, a function entry address, a function call number and an average execution time length, the edges between the nodes represent the calling relationship between the functions, and the weight information is attached to the edges; S125: The function with the most call times in all functions is obtained, the call number of the function is taken as a reference value, then the call number of each function is divided by the reference value to obtain a normalized call frequency; S126: In the function call dependency graph, all calling paths where the function is located are searched, the weight sum of each function on each path is calculated, the path with the highest weight sum is identified, and the highest weight sum value is taken as the logical dependency index of the function. The calculation of the logical dependency index adopts a graph traversal algorithm, and the weights on the paths are accumulated during the traversal process; S127: The pre-warming index of the function is calculated according to the normalized call frequency and the logical dependency index, all functions are arranged in descending order based on the pre-warming index, and a pre-warming priority sequence is generated.

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