Method and device for balancing power consumption of analog front-end sampling module and vehicle

Abstract

The invention discloses a power consumption balancing method and device for an analog front-end sampling module and a vehicle. The method comprises: based on open-circuit voltages of a plurality of cells in a battery module, determining whether an analog front-end sampling module set enters a power consumption equalization state, the open-circuit voltages of the plurality of cells being acquired by at least one analog front-end sampling module in the analog front-end sampling module set; in response to determining that the analog front-end sampling module set enters a power consumption equalization state, determining residual equalization capacities and target equalization time of the plurality of battery cells based on the open-circuit voltages of the plurality of battery cells and circuit parameters of at least one external equalization circuit, different external equalization circuits being connected between different analog front-end sampling modules and the ground; and controlling the working state of an external equalization circuit based on the residual equalization capacity and the target equalization time of the plurality of battery cells so as to carry out power consumption equalization on the analog front-end sampling module set. The technical problem of inconsistent power consumption between analog front-end sampling modules in the prior art is solved.

Description

Technical Field

[0001] This application relates to the fields of vehicle technology and data acquisition technology, and more specifically, to a power consumption equalization method, device and vehicle for an analog front-end sampling module. Background Technology

[0002] Due to differences in hardware design (such as regulator efficiency, unbalanced sampling channel load, independent power sources, etc.), analog front-end (AFE) sampling modules may exhibit inconsistent power consumption. This can lead to the accumulation of individual cell voltage deviations between different AFE sampling modules in a battery module (e.g., Figure 1 The problems include a large deviation in the single-cell voltage between AFE sampling module 1 and AFE sampling module 2, an imbalance in the distribution of self-consumption energy in the battery management system (BMS), and a shortened cycle life.

[0003] There is currently no effective solution to the above problems. Summary of the Invention

[0004] This application provides a power consumption balancing method, apparatus, and vehicle for simulated front-end sampling modules, to at least solve the technical problem of inconsistent power consumption between simulated front-end sampling modules in related technologies.

[0005] According to one aspect of the embodiments of this application, a power equalization method for an analog front-end sampling module is provided, comprising: determining whether an analog front-end sampling module set has entered a power equalization state based on the open-circuit voltage of multiple cells in a battery module, wherein the open-circuit voltage of the multiple cells is acquired by at least one analog front-end sampling module in the analog front-end sampling module set; in response to determining that the analog front-end sampling module set has entered a power equalization state, determining the remaining equalization capacity and target equalization time of the multiple cells based on the open-circuit voltage of the multiple cells and the circuit parameters of at least one external equalization circuit, wherein the remaining equalization capacity is used to characterize the capacity for power equalization of the cells, and the target equalization time is used to characterize the time for power equalization of the cells, and different external equalization circuits are connected between different analog front-end sampling modules and ground; and controlling the operating state of the external equalization circuit based on the remaining equalization capacity and target equalization time of the multiple cells to perform power equalization on the analog front-end sampling module set.

[0006] Further, based on the open-circuit voltage of multiple battery cells and the circuit parameters of at least one external equalization circuit, the remaining equalization capacity and target equalization time of the multiple battery cells are determined, including: determining the state of charge (SOC) of the multiple battery cells based on their open-circuit voltages; determining a target analog front-end sampling module from a set of analog front-end sampling modules based on the SOC of the multiple battery cells, wherein the SOC of at least one target battery cell corresponding to the target analog front-end sampling module is inconsistent; determining the remaining equalization capacity and target equalization time of the target battery cell based on its open-circuit voltage and the circuit parameters of the target external equalization circuit, wherein the target external equalization circuit is connected to the target analog front-end sampling module; determining the remaining equalization capacity of the other battery cells (excluding the target battery cell) as a preset equalization capacity, and determining the target equalization time of the other battery cells as a first preset time.

[0007] Furthermore, based on the state of charge (SOC) of multiple battery cells, a target simulated front-end sampling module is determined from the set of simulated front-end sampling modules. This includes: determining the minimum SOC and average SOC of the simulated front-end sampling module based on the SOC of at least one battery cell corresponding to the same simulated front-end sampling module, wherein the minimum SOC is the minimum value among the SOCs of at least one battery cell, and the average SOC is the average value of the SOCs of at least one battery cell; and determining the target simulated front-end sampling module from the set of simulated front-end sampling modules based on the minimum SOC and average SOC of the simulated front-end sampling module.

[0008] Further, based on the minimum state of charge and average state of charge of the simulated front-end sampling modules, the target simulated front-end sampling module is determined from the set of simulated front-end sampling modules, including: obtaining the minimum value among the minimum states of charge of at least one simulated front-end sampling module to obtain the target minimum state of charge; obtaining the minimum value among the average states of charge of at least one simulated front-end sampling module to obtain the target average state of charge; obtaining the difference between the minimum state of charge of the simulated front-end sampling module and the target minimum state of charge to obtain a first difference value of the simulated front-end sampling module; obtaining the difference between the average state of charge of the simulated front-end sampling module and the target average state of charge to obtain a second difference value of the simulated front-end sampling module; and determining the target simulated front-end sampling module from the set of simulated front-end sampling modules based on the first difference value and the second difference value of the target simulated front-end sampling module, wherein the first difference value of the target simulated front-end sampling module is greater than a first preset difference value, and the second difference value of the target simulated front-end sampling module is greater than a second preset difference value.

[0009] Furthermore, the external equalization circuit includes at least a first power resistor, and the circuit parameters include the resistance value of the first power resistor; based on the open-circuit voltage of the target battery cell and the circuit parameters of the target external equalization circuit, the remaining equalization capacity and target equalization time of the target battery cell are determined, including: determining the module equalization capacity of the target analog front-end sampling module based on the first difference of the target analog front-end sampling module, wherein the module equalization capacity is the capacity for power consumption equalization of the target analog front-end sampling module; determining the remaining equalization capacity of the target battery cell based on the module equalization capacity, the open-circuit voltage and the resistance value of the target battery cell; determining the initial equalization time of the target battery cell based on the remaining equalization capacity, the open-circuit voltage and the resistance value of the target battery cell; and determining the target equalization time of the target battery cell based on the initial equalization time and the second preset time.

[0010] Furthermore, based on the first difference of the target simulated front-end sampling module, the module equalization capacity of the target simulated front-end sampling module is determined, including: determining the effective capacity of the target simulated front-end sampling module based on the preset capacity and battery health of the target cell; and determining the module equalization capacity based on the effective capacity and the first difference.

[0011] Furthermore, based on the module equalization capacity, the open-circuit voltage and resistance value of the target cell, the remaining equalization capacity of the target cell is determined, including: based on the open-circuit voltage, resistance value, equalization efficiency and preset cycle, the consumed capacity of the target cell is determined; the difference between the module equalization capacity and the consumed capacity is obtained to obtain the remaining equalization capacity.

[0012] Furthermore, based on the remaining equalization capacity of the target cell, the open-circuit voltage of the target cell, and the resistance value, the initial equalization time of the target cell is determined, including: obtaining the ratio of the open-circuit voltage to the resistance value of the target cell to obtain the equalization current of the target cell; obtaining the ratio of the remaining equalization capacity to the equalization current to obtain the initial equalization time.

[0013] Further, based on the initial equalization time and the second preset time of the target battery cell, the target equalization time of the target battery cell is determined, including: in response to the initial equalization time being less than the second preset time, the target equalization time is determined as the first preset time; in response to the initial equalization time being greater than or equal to the second preset time, the second preset time is adjusted based on the historical equalization time of the target battery cell to obtain the target equalization time, wherein the sum of the historical equalization time and the target equalization time is less than or equal to the third preset time.

[0014] Furthermore, the method also includes: in response to detecting an external equalization circuit fault, controlling the operating state of the internal equalization circuits corresponding to the multiple battery cells based on the target equalization time of the multiple battery cells, wherein the two ends of the internal equalization circuits are connected to the two ends of the battery cells, the internal equalization circuits corresponding to the multiple battery cells are grouped and turned on, and the internal equalization circuits corresponding to two adjacent battery cells share a second power resistor.

[0015] Furthermore, based on the remaining equalization capacity and target equalization time of multiple battery cells, the operating state of the external equalization circuit is controlled, or based on the target equalization time of multiple battery cells, the operating state of the internal equalization circuit corresponding to multiple battery cells is controlled, including: storing the remaining equalization capacity and target equalization time of multiple battery cells; controlling the set of analog front-end sampling modules to be in a sleep state, and waking up the set of analog front-end sampling modules according to a second preset time; responding to the set of analog front-end sampling modules being in a wake-up state, controlling the operating state of the external equalization circuit or the internal equalization circuit based on the remaining equalization capacity and target equalization time of multiple battery cells.

[0016] Furthermore, based on the remaining equalization capacity and target equalization time of multiple battery cells, the operating state of the external equalization circuit or the internal equalization circuit is controlled, including: in response to the absence of faults in the analog front-end sampling module set before it enters a dormant state, acquiring the new open-circuit voltage of the battery cell; updating the remaining equalization capacity of the battery cell based on the new open-circuit voltage and target equalization time of the battery cell to obtain the updated equalization capacity of the battery cell; updating the target equalization time of the battery cell based on the updated equalization capacity of the battery cell to obtain the updated equalization time of the battery cell; determining the battery cell to be equalized from multiple battery cells based on the updated equalization time of the battery cell, wherein the updated equalization time of the battery cell to be equalized is greater than or equal to a second preset time; controlling the external equalization circuit to be controlled corresponding to the battery cell to be equalized to be turned on, or controlling the internal equalization circuit to be controlled corresponding to the battery cell to be equalized to be turned on in groups, wherein at least one external equalization circuit other than the external equalization circuit to be controlled is turned off, or the external equalization circuits other than the internal equalization circuit to be controlled among the multiple battery cells are turned off.

[0017] According to another aspect of the embodiments of this application, a power equalization device for an analog front-end sampling module is also provided, comprising: at least one external equalization circuit, a first terminal of the external equalization circuit being connected to the power supply of a corresponding analog front-end sampling module in the set of analog front-end sampling modules, a second terminal of the external equalization circuit being grounded, and a third terminal of the external equalization circuit being connected to the output terminal of the analog front-end sampling module. The external equalization circuit is used to perform power equalization on the analog front-end sampling module when it is in a conducting state; wherein, the set of analog front-end sampling modules is used to collect the open-circuit voltage of multiple cells in the battery module and execute the methods in the various embodiments of this application.

[0018] Furthermore, the external equalization circuit includes: a first power resistor and a first transistor, the first power resistor and the first transistor being connected in series to form a first sub-circuit, the first sub-circuit being connected between a first terminal and a second terminal of the external equalization circuit, and the control terminal of the first transistor being connected to a third terminal of the external equalization circuit.

[0019] Furthermore, the first end of the first power resistor is connected to the first end of the external equalization circuit, the second end of the first power resistor is connected to the input end of the transistor, and the output end of the transistor is connected to the second end of the external equalization circuit.

[0020] Furthermore, the external equalization circuit also includes a capacitor connected in parallel between the first terminal and the second terminal of the external equalization circuit.

[0021] Furthermore, the device also includes: multiple internal equalization circuits, the first and second ends of which are respectively connected to the two ends of the battery cell, the third end of which is connected to the analog front-end sampling module, the internal equalization circuits corresponding to multiple battery cells are grouped and turned on, the internal equalization circuits corresponding to two adjacent battery cells share a second power resistor, and the internal equalization circuits are used to perform power consumption equalization on the analog front-end sampling module when they are in the turned-on state.

[0022] Furthermore, the internal equalization circuit includes: two second power resistors and a second transistor, the two second power resistors and the second transistor are connected in series to form a second sub-circuit, and the second transistor is located between the two second power resistors. The two ends of the second sub-circuit are respectively connected to the two ends of the battery cell, and the control terminal of the second transistor is connected to the third terminal of the internal equalization circuit.

[0023] According to another aspect of the embodiments of this application, a vehicle is also provided, including: a memory storing an executable program; and a processor for running the program, wherein the program executes the methods in various embodiments of this application when it runs.

[0024] According to another aspect of the embodiments of this application, a computer-readable storage medium is also provided, the computer-readable storage medium including a stored executable program, wherein, when the executable program is running, it controls the device where the computer-readable storage medium is located to perform the methods of various embodiments of this application.

[0025] According to another aspect of the embodiments of this application, a computer program product is also provided, including a computer program that, when executed by a processor, implements the methods of various embodiments of this application.

[0026] According to another aspect of the embodiments of this application, a computer program product is also provided, including a non-volatile computer-readable storage medium storing a computer program that, when executed by a processor, implements the methods in various embodiments of this application.

[0027] According to another aspect of the embodiments of this application, a computer program is also provided, which, when executed by a processor, implements the methods of the various embodiments of this application.

[0028] In this embodiment, the open-circuit voltage of multiple cells in the battery module is used to determine whether the set of analog front-end sampling modules has entered a power consumption equalization state. In response to determining that the set of analog front-end sampling modules has entered a power consumption equalization state, the remaining equalization capacity and target equalization time of multiple cells are determined based on the open-circuit voltage of multiple cells and the circuit parameters of at least one external equalization circuit. Based on the remaining equalization capacity and target equalization time of multiple cells, the working state of the external equalization circuit is controlled to perform power consumption equalization on the set of analog front-end sampling modules. By adding an external equalization circuit between the analog front-end sampling module and ground, and after determining that the set of analog front-end sampling modules has entered a power consumption equalization state, the external equalization circuit is controlled to perform power consumption equalization on the set of analog front-end sampling modules based on the capacity and time for power consumption equalization of multiple cells. This achieves balanced discharge from the power supply to ground of the entire analog front-end sampling module, thereby rapidly reducing the power consumption difference between different analog front-end sampling modules, further reducing the imbalance of BMS self-consumption power distribution, avoiding the loss of the actual usable capacity of some cells in a single cycle, and improving the overall capacity utilization of the battery module. This solves the technical problem of inconsistent power consumption between analog front-end sampling modules in related technologies. Attached Figure Description

[0029] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings:

[0030] Figure 1 This is a schematic diagram illustrating the accumulation of individual voltage deviations between AFE sampling modules based on existing technology;

[0031] Figure 2 This is a flowchart of a power consumption balancing method for a simulated front-end sampling module according to an embodiment of this application;

[0032] Figure 3 This is a flowchart of an optional power equalization method for an analog front-end sampling module according to an embodiment of this application;

[0033] Figure 4This is a schematic diagram of a power equalization device for an analog front-end sampling module according to an embodiment of this application;

[0034] Figure 5 This is a schematic diagram of an optional analog front-end sampling module power equalization device according to an embodiment of this application. Detailed Implementation

[0035] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort should fall within the scope of protection of the present application.

[0036] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0037] According to an embodiment of this application, a power balancing method for an analog front-end sampling module is provided. It should be noted that the steps shown in the flowchart in the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions. Furthermore, although a logical order is shown in the flowchart, in some cases, the steps shown or described may be executed in a different order than that shown here.

[0038] This application provides a power balancing method for a simulated front-end sampling module. This method can be used to provide power balancing functionality for preset application scenarios. These preset application scenarios may include the following scenarios in the vehicle field: autonomous driving scenarios for commuting, artificial intelligence (AI) assisted driving scenarios for family cars, automatic parking assistance (APA) scenarios (such as memory parking for self-owned parking spaces in garages, intelligent parking for designated parking spaces in parking lots, etc.), and navigation-guided pilot (NGP) scenarios in urban or highway areas. Furthermore, these preset application scenarios may also include, but are not limited to: autonomous driving scenarios for intelligent driving trucks or unmanned trucks in the logistics and transportation field, autonomous driving scenarios for autonomous agricultural vehicles in the agricultural machinery field, autonomous driving scenarios for drones, and autonomous driving scenarios for intelligent robots (such as cleaning robots, service robots, delivery robots, etc.).

[0039] When the aforementioned preset application scenario is a scenario in a field other than the vehicle field, those skilled in the art should understand that the vehicle to which the power consumption balancing method of the aforementioned simulated front-end sampling module is applied can be replaced with other objects (such as agricultural machinery, drones, robots, etc.), and correspondingly, the battery module can be replaced with the power battery related to other objects. Based on this, this application embodiment takes the vehicle field as an example to illustrate the specific implementation of the aforementioned power consumption balancing method of the simulated front-end sampling module.

[0040] Figure 2 This is a flowchart of a power balancing method for an analog front-end sampling module according to an embodiment of this application, such as... Figure 2 As shown, the method includes the following steps:

[0041] Step S202: Based on the open-circuit voltage of multiple cells in the battery module, determine whether the set of analog front-end sampling modules has entered the power consumption balance state, wherein the open-circuit voltage of multiple cells is collected by at least one analog front-end sampling module in the set of analog front-end sampling modules.

[0042] The aforementioned battery module consists of multiple cells, which can be lithium-ion batteries, lead-acid batteries, or other types of energy storage units. Multiple cells can be connected in series and / or parallel to form the voltage and capacity required to meet the power needs of mobile devices such as vehicles and drones.

[0043] The aforementioned analog front-end sampling module is an electronic component in the battery module that connects the battery cells and the BMS (Battery Management System). It is used to send monitored cell status information (such as key information like voltage, current, and temperature) to the BMS. The BMS integrates the cell status information from the AFE (Analog Front-End Sampling) module, performs algorithmic processing (such as state of charge calculation, health status assessment, and remaining range prediction), and issues control commands (such as turning the equalization circuit on or off, and adjusting the sampling frequency) to the AFE module. Since there are a large number of battery cells in a battery module, and a single AFE module can typically only handle the monitoring of a limited number of cells, a battery module usually has at least one AFE module. The set of these AFE modules constitutes the aforementioned set of analog front-end sampling modules.

[0044] The Open Circuit Voltage (OCV) mentioned above refers to the voltage measured across the battery when the battery module is not connected to a load, meaning there is no current flowing between the positive and negative terminals of the battery module. Open Circuit Voltage reflects the voltage performance of the battery module under static conditions, indicating the equilibrium state of the electrochemical reactions within the cell. OCV is directly related to the cell's State of Charge (SOC). Generally, the higher the SOC of a cell, the higher its OCV; conversely, the lower the SOC, the lower its OCV. The relationship between OCV and SOC can be recorded in an OCV table and described by an OCV-SOC curve.

[0045] The aforementioned power balance state refers to the state where power balance of the AFE sampling modules needs to be performed, that is, the power consumption of the AFE sampling modules is inconsistent. If it is determined that the set of AFE sampling modules has entered the power balance state, the specific process of power balance can be explained by the following steps; if it is determined that the set of AFE sampling modules has not entered the power balance state, it indicates that the power consumption of the AFE sampling modules is consistent, and the method provided in this application does not need to be executed.

[0046] In one alternative embodiment, the OCV of the battery cell can be converted into the SOC of the battery cell based on the relationship between OCV and SOC. Then, by comparing the SOC of the battery cell collected by different AFE sampling modules, it can be determined whether the power consumption of the AFE sampling modules is consistent, thereby determining whether the set of analog front-end sampling modules has entered a power consumption balance state.

[0047] In another optional embodiment, for any AFE sampling module, the presence of voltage inconsistencies among the cells connected to the AFE sampling module can be determined based on the OCV sampled by the AFE sampling module, i.e., the OCV of the cells connected to the AFE sampling module. For example, the minimum OCV sampled by the AFE sampling module can be obtained, and it can be determined whether the minimum OCV is greater than a voltage threshold. This voltage threshold can be determined based on the OCV corresponding to the average SOC of the cells connected to the AFE sampling module. Furthermore, based on the relationship between OCV and SOC, the OCV sampled by the AFE sampling module can be converted into SOC, and the power consumption of the AFE sampling module can be determined based on the SOC of the cells connected to the AFE sampling module. For example, the maximum SOC among the cells connected to the AFE sampling module can be obtained, and it can be determined whether the maximum SOC is greater than the SOC threshold. By combining the above two determination results, it can be determined whether the set of analog front-end sampling modules has entered a power consumption equalization state, for example, if there is a voltage inconsistency among the cells connected to the AFE sampling module, and the power consumption of the AFE sampling module is high.

[0048] In addition, to more comprehensively assess whether the AFE sampling module assembly has entered a power consumption equalization state, it is possible to further determine whether the equalization circuit is faulty, whether the open-circuit voltage sampling is faulty, and whether the AFE sampling module has experienced an over-temperature fault. If none of the above faults exist, it is possible to further determine whether the battery module's maximum temperature is below the temperature threshold and whether the parking time meets the requirements. If the maximum temperature is below the temperature threshold and the parking time meets the requirements, it can be determined that the AFE sampling module assembly has entered a power consumption equalization state.

[0049] Step S204: In response to determining that the set of analog front-end sampling modules has entered the power consumption equalization state, based on the open-circuit voltage of multiple cells and the circuit parameters of at least one external equalization circuit, the remaining equalization capacity and target equalization time of multiple cells are determined. The remaining equalization capacity is used to characterize the capacity for power consumption equalization of the cells, and the target equalization time is used to characterize the time for power consumption equalization of the cells. Different external equalization circuits are connected between different analog front-end sampling modules and ground.

[0050] The aforementioned external equalization circuit is an additional equalization circuit added between the power supply and ground of the AFE sampling module. This equalization circuit does not pass through the sampling lines of the AFE sampling module. The power equalization implementation method of the external equalization circuit is not limited by the hardware structure of the AFE sampling module, thus enabling fast and efficient power equalization of the AFE sampling module. In this embodiment, to reduce the cost of power equalization, the external equalization circuit can adopt a simplified structure. For example, the external equalization circuit includes a first power resistor and a first transistor. The first transistor can control the external equalization circuit to be turned on or off, and when the external equalization circuit is on, power equalization can be performed through the first power resistor.

[0051] The aforementioned circuit parameters affect the magnitude and rate of the discharge current of the external equalization circuit, thereby affecting the power equalization efficiency. In this embodiment, taking an external equalization circuit comprising a first power resistor and a transistor as an example, the circuit parameters can be the resistance value of the first power resistor, but are not limited to this.

[0052] The aforementioned remaining equalization capacity is an important parameter to ensure consistent power consumption among AFE sampling modules. Specifically, it refers to the total amount of electrical energy that the battery cell needs to transfer during the power equalization process in order to ensure consistent power consumption among AFE sampling modules within the battery module.

[0053] The aforementioned target equalization time is an important parameter to ensure consistent power consumption among AFE sampling modules. Specifically, it refers to the time required for power consumption equalization using an external equalization circuit. In other words, in order to ensure consistent power consumption among AFE sampling modules, the battery cell needs to discharge during the power consumption equalization process.

[0054] In one optional embodiment, after determining that the analog front-end sampling module set has entered a power equalization state, in order to accurately control the power equalization process, the remaining equalization capacity and target equalization time of the multiple battery cells are determined based on the open-circuit voltage of the multiple cells and the circuit parameters of at least one external equalization circuit. For example, the OCV of the multiple battery cells can be converted to SOC, and then the remaining equalization capacity can be determined based on the difference between the SOC of the multiple battery cells and the target SOC. Furthermore, the target equalization time can be calculated based on the remaining equalization capacity and the equalization current of the external equalization circuit during the power equalization process.

[0055] It should be noted that although the above steps determine the remaining equalization capacity and target equalization time for all battery cells, this does not mean that all battery cells need to undergo power equalization. If a battery cell does not need power equalization, then the values ​​of the remaining equalization capacity and target equalization time can be 0.

[0056] Step S206: Based on the remaining equalization capacity and target equalization time of multiple battery cells, control the working state of the external equalization circuit to perform power consumption equalization on the set of analog front-end sampling modules.

[0057] The above operating states refer to the on or off state of the external equalization circuit. If the external equalization circuit is on, it indicates that a discharge path has been established between the power supply and ground of the AFE module, and power equalization can be performed. If the external equalization circuit is off, it indicates that the discharge path between the power supply and ground of the AFE module has been cut off, and power equalization will not be performed.

[0058] In one alternative embodiment, since the external equalization circuit is connected to the AFE module, after determining the remaining equalization capacity and target equalization time of multiple battery cells, the battery cell to be equalized can be identified from the multiple cells. Then, the AFE sampling module to be equalized, connected to the battery cell to be equalized, is determined. Finally, the external equalization circuit connected to the AFE sampling module to be equalized is turned on, while the external equalization circuits connected to other AFE sampling modules are turned off.

[0059] In another optional embodiment, since the AFE sampling module needs to collect the OCV of the battery cells in real time after the battery module is powered on and send it to the BMS for processing, in order to avoid affecting the accuracy of the OCV collected by the AFE sampling module during power-up, in this embodiment, power-up balancing of the AFE sampling module can be performed after the battery module is powered off. In this case, the power-up balancing of the AFE sampling module is a wake-up process. To avoid inaccurate target balancing time, it can be updated in real time based on the remaining balancing capacity, and then the operating state of at least one external balancing circuit can be controlled.

[0060] Through the steps provided in this application, the open-circuit voltage of multiple cells in the battery module is used to determine whether the set of analog front-end sampling modules has entered a power consumption equalization state. In response to determining that the set of analog front-end sampling modules has entered a power consumption equalization state, the remaining equalization capacity and target equalization time of multiple cells are determined based on the open-circuit voltage of multiple cells and the circuit parameters of at least one external equalization circuit. Based on the remaining equalization capacity and target equalization time of multiple cells, the working state of the external equalization circuit is controlled to perform power consumption equalization on the set of analog front-end sampling modules. By adding an external equalization circuit between the analog front-end sampling module and ground, and after determining that the set of analog front-end sampling modules has entered a power consumption equalization state, the external equalization circuit is controlled to perform power consumption equalization on the set of analog front-end sampling modules based on the capacity and time for power consumption equalization of multiple cells. This achieves balanced discharge from the power supply to ground of the entire analog front-end sampling module, thereby rapidly reducing the power consumption difference between different analog front-end sampling modules, further reducing the imbalance of BMS self-consumption power distribution, avoiding the loss of the actual usable capacity of some cells in a single cycle, and improving the overall capacity utilization of the battery module. This solves the technical problem of inconsistent power consumption between analog front-end sampling modules in related technologies.

[0061] In the above embodiments of this application, determining the remaining equalization capacity and target equalization time of multiple battery cells based on the open-circuit voltage of multiple battery cells and the circuit parameters of at least one external equalization circuit includes: determining the state of charge (SOC) of multiple battery cells based on the open-circuit voltage of multiple battery cells; determining a target analog front-end sampling module from a set of analog front-end sampling modules based on the SOC of multiple battery cells, wherein the SOC of at least one target battery cell corresponding to the target analog front-end sampling module is inconsistent; determining the remaining equalization capacity and target equalization time of the target battery cell based on the open-circuit voltage of the target battery cell and the circuit parameters of the target external equalization circuit, wherein the target external equalization circuit is connected to the target analog front-end sampling module; determining the remaining equalization capacity of the other battery cells among the multiple battery cells other than the target battery cell as a preset equalization capacity, and determining the target equalization time of the other battery cells as a first preset time.

[0062] The aforementioned target analog front-end sampling module is an AFE sampling module connected to cells with significantly inconsistent SOCs within the set of analog front-end sampling modules. For example, if one or more cells connected to an AFE sampling module have a significantly different SOC from the average SOC of all cells in the battery module, then that AFE sampling module can be considered a target AFE sampling module. Therefore, the aforementioned target analog front-end sampling module refers to an AFE sampling module that requires power consumption balancing.

[0063] The target cell mentioned above can be a cell with a significantly different SOC (State of Charge) connected to the target AFE (Auxiliary Factor Feeder) sampling module. For example, if a cell connected to the target AFE sampling module has a significantly different SOC from the average SOC of all cells in the battery module, then that cell can be used as the target cell. Therefore, the target cell mentioned above is the direct target of the power consumption balancing strategy.

[0064] The aforementioned target external equalization circuit is an external equalization circuit connected to the target AFE sampling module, that is, an external equalization circuit that needs to be turned on to perform power equalization on the target AFE sampling module.

[0065] The aforementioned preset equalization capacity is set for cells that do not require power consumption equalization. For example, the preset equalization capacity can be 0, but it is not limited to this.

[0066] The aforementioned first preset time is a time set for battery cells that do not require power balancing. For example, the preset balancing time can be 0, but it is not limited to this.

[0067] In one optional embodiment, in order to accurately determine the remaining equalization capacity and the target equalization time, after acquiring the cell's OCV, the cell's SOC can be determined by querying the OCV table, i.e., based on the mapping relationship between OCV and SOC. Then, by comparing the SOCs of multiple cells, the target cell with a significant difference in SOC is identified, as well as the target AFE sampling module connected to the target cell.

[0068] For a target chip requiring power balancing, to accurately determine the remaining balancing capacity and target balancing time, the total amount of electrical energy that the target chip needs to transfer can be determined based on the target chip's OCV and SOC, thus obtaining the remaining balancing capacity. Furthermore, based on the circuit parameters of the target's external balancing circuit, the balancing current of the external balancing circuit during the power balancing process can be determined, and then, combined with the remaining balancing capacity, the target balancing time can be calculated.

[0069] For chips that do not require power balancing, i.e., the other cells among multiple cells besides the target cell, the remaining balancing capacity of the other cells can be set as the preset balancing capacity, and the target balancing time of the other cells can be determined as the first preset time, thereby distinguishing them from the cells that require power balancing.

[0070] Through the above steps, the open-circuit voltage of multiple battery cells is used to distinguish whether the AFE sampling module needs power balancing. Further, for the target AFE sampling module that requires power balancing, the remaining balancing capacity and target balancing time are accurately determined using the open-circuit voltage and the circuit parameters of the external balancing circuit. For AFE sampling modules that do not require power balancing, the remaining balancing capacity is determined to be the preset balancing capacity, and the target balancing time is determined to be the first preset time.

[0071] In the above embodiments of this application, determining a target analog front-end sampling module from a set of analog front-end sampling modules based on the state of charge (SOC) of multiple battery cells includes: determining the minimum SOC and average SOC of the analog front-end sampling module based on the SOC of at least one battery cell corresponding to the same analog front-end sampling module, wherein the minimum SOC is the minimum value among the SOCs of at least one battery cell, and the average SOC is the average value of the SOCs of at least one battery cell; and determining the target analog front-end sampling module from the set of analog front-end sampling modules based on the minimum SOC and average SOC of the analog front-end sampling module.

[0072] In one optional embodiment, for all cells connected to an AFE sampling module, the minimum SOC of all cells can be obtained as the minimum charge state AFE(i)_OCVSOCmin of AFE sampling module i. The average SOC of all cells can be obtained as the average charge state AFE(i)_OCVSOCavg of AFE sampling module i. Further, by comparing the minimum charge state AFE(i)_OCVSOCmin and the average charge state AFE(i)_OCVSOCavg of all AFE sampling modules, the AFE sampling modules requiring power balancing can be identified as target AFE sampling modules. For example, the AFE sampling modules with a larger deviation between their minimum and average charge states can be selected as target AFE sampling modules.

[0073] By following the steps above, the minimum and average states of charge of the AFE sampling module are determined, thereby enabling accurate identification of the target AFE sampling module.

[0074] In the above embodiments of this application, determining a target simulated front-end sampling module from a set of simulated front-end sampling modules based on the minimum state of charge and average state of charge of the simulated front-end sampling modules includes: obtaining the minimum value among the minimum states of charge of at least one simulated front-end sampling module to obtain a target minimum state of charge; obtaining the minimum value among the average states of charge of at least one simulated front-end sampling module to obtain a target average state of charge; obtaining the difference between the minimum state of charge of the simulated front-end sampling module and the target minimum state of charge to obtain a first difference value of the simulated front-end sampling module; obtaining the difference between the average state of charge of the simulated front-end sampling module and the target average state of charge to obtain a second difference value of the simulated front-end sampling module; and determining the target simulated front-end sampling module from the set of simulated front-end sampling modules based on the first difference value and the second difference value of the target simulated front-end sampling module, wherein the first difference value of the target simulated front-end sampling module is greater than a first preset difference value, and the second difference value of the target simulated front-end sampling module is greater than a second preset difference value.

[0075] The first preset difference value mentioned above is a threshold value set to determine whether there is a significant difference in the minimum state of charge of the AFE sampling modules. The second preset difference value mentioned above is a threshold value set to determine whether there is a significant difference in the average state of charge of the AFE sampling modules. The first and second preset difference values ​​can be set according to actual needs, and this application does not limit them.

[0076] In one optional embodiment, after determining the minimum charge state AFE(i)_OCVSOCmin for each AFE sampling module, the minimum value among the minimum charge states AFE(i)_OCVSOCmin of all AFE sampling modules can be determined as the target minimum charge state AFE(min)_OCVSOCmin. After determining the average charge state AFE(i)_OCVSOCavg for each AFE sampling module, the minimum value among the average charge states AFE(i)_OCVSOCavg of all AFE sampling modules can be determined as the target average charge state AFE(min)_OCVSOCavg. Then, the difference between the minimum charge state AFE(i)_OCVSOCmin of each AFE sampling module and the target minimum charge state AFE(min)_OCVSOCmin can be calculated to obtain the first difference ΔSOCmin(i) for AFE sampling module i. Furthermore, the difference between the average state of charge (AFE)_OCVSOCavg of each AFE sampling module and the target average state of charge (AFE)_OCVSOCavg can be calculated to obtain the second difference ΔSOCavg(i) of AFE sampling module i. If the first difference is greater than the first preset difference and the second difference is greater than the second preset difference, it indicates that the AFE sampling module needs to undergo power consumption equalization, and the AFE sampling module is the target AFE sampling module.

[0077] It should be noted that, to avoid deviations between the target minimum state of charge and the target average state of charge, a deviation tolerance limit, gap%, can be introduced. This value is superimposed on both the target minimum state of charge and the target average state of charge to obtain the superimposed minimum state of charge and the superimposed average state of charge. The difference between the minimum state of charge and the superimposed minimum state of charge is then obtained as the first difference, and the difference between the average state of charge and the superimposed average state of charge is obtained as the second difference.

[0078] By taking the above steps, the target AFE sampling module is accurately determined by determining the minimum value of the minimum state of charge of at least one AFE sampling module and the minimum value of the average state of charge of at least one AFE sampling module.

[0079] In the above embodiments of this application, the external equalization circuit includes at least a first power resistor, and the circuit parameters include the resistance value of the first power resistor; determining the remaining equalization capacity and target equalization time of the target battery cell based on the open-circuit voltage of the target battery cell and the circuit parameters of the target external equalization circuit includes: determining the module equalization capacity of the target analog front-end sampling module based on a first difference of the target analog front-end sampling module, wherein the module equalization capacity is the capacity for power consumption equalization of the target analog front-end sampling module; determining the remaining equalization capacity of the target battery cell based on the module equalization capacity, the open-circuit voltage and the resistance value of the target battery cell; determining the initial equalization time of the target battery cell based on the remaining equalization capacity, the open-circuit voltage and the resistance value of the target battery cell; and determining the target equalization time of the target battery cell based on the initial equalization time and a second preset time.

[0080] The second preset time mentioned above refers to the pre-set time for power balancing. If the power balancing operation is performed while the AFE sampling module is in sleep mode, then the second preset time can be the wake-up interval of the AFE sampling module.

[0081] In one optional embodiment, to determine the module equalization capacity, the module equalization capacity of the target AFE sampling module can be determined based on the first difference and the cell capacity. For example, the nominal capacity of the cell can be used as the cell capacity, that is, the module equalization capacity is obtained by directly multiplying the first difference and the nominal capacity of the cell. Alternatively, since the health status of the cell during use affects its capacity, the nominal capacity of the cell can be adjusted based on the cell's battery health, and this adjusted capacity can be used as the cell capacity. In other words, the module equalization capacity is obtained by multiplying the first difference, the nominal capacity of the battery, and the battery health.

[0082] Then, based on the module's equalization capacity and the amount of charge already released or absorbed through power balancing, the remaining equalization capacity can be determined. The power balancing process is implemented through an external equalization circuit; therefore, based on the target cell's OCV and the resistance value of the target external equalization circuit, the amount of charge actually transferred through the target external equalization circuit within a specific time interval, such as one software cycle, can be determined.

[0083] Finally, the balancing current can be determined based on the OCV of the target cell and the resistance value of the target external balancing circuit. Then, based on the remaining balancing capacity and the balancing current, the initial balancing time of the target cell, that is, the remaining balancing time BalRemnTi(i) of the target cell i, can be calculated.

[0084] It should be noted that since the power equalization time is finite, and the target external equalization circuit performs power equalization on the same AFE, the target equalization time can be determined based on the comparison between the initial equalization time and the second preset time. For example, if the initial equalization time is greater than or equal to the second preset time, it indicates that the cell needs power equalization, and the target equalization time can be set as the second preset time. If the initial equalization time is less than the second preset time, it indicates that the cell does not need power equalization, and the target equalization time can be set as the first preset time, for example, the first preset time can be set to 0.

[0085] The above scheme achieves accurate determination of the remaining equalization capacity and target equalization time of the target battery cell by determining the module equalization capacity of the target simulation front-end sampling module.

[0086] In the above embodiments of this application, determining the module equalization capacity of the target simulated front-end sampling module based on the first difference of the target simulated front-end sampling module includes: determining the effective capacity of the target simulated front-end sampling module based on the preset capacity and battery health of the target cell; and determining the module equalization capacity based on the effective capacity and the first difference.

[0087] The aforementioned preset capacity can be the nominal capacity of the target battery cell, that is, the capacity of the battery cell under ideal conditions. The preset capacity is the rated maximum charge storage capacity of the battery cell obtained under standard test conditions.

[0088] The aforementioned State of Health (SOH) is a parameter that measures the degree of performance degradation of a battery relative to its ideal state. Battery health reflects the ratio of the actual capacity to the nominal capacity of the cell as it is affected by factors such as increased usage time, increased charge / discharge cycles, and temperature changes. In this embodiment, battery health can be determined using existing measurement methods.

[0089] In one optional embodiment, considering the influence of battery health and the actual capacity of the target cell, the effective capacity of the target AFE sampling module can be determined based on the preset capacity of the target cell and the battery health. For example, the effective capacity of the target AFE sampling module can be obtained by multiplying the preset capacity of the target cell and the battery health. Finally, the module's balanced capacity can be determined based on the effective capacity and a first difference. For example, the balanced capacity of the module can be obtained by multiplying the effective capacity and the first difference.

[0090] The above scheme accurately determines the module's balanced capacity based on the target cell's preset capacity and battery health, thereby accurately determining the target cell's remaining balanced capacity.

[0091] In the above embodiments of this application, determining the remaining equalization capacity of the target battery cell based on the module equalization capacity, the open-circuit voltage and resistance value of the target battery cell includes: determining the consumed capacity of the target battery cell based on the open-circuit voltage, resistance value, equalization efficiency and preset cycle; obtaining the difference between the module equalization capacity and the consumed capacity to obtain the remaining equalization capacity.

[0092] The aforementioned preset period is a pre-defined time interval used to update the cell status information and perform power balancing on the AFE sampling module. For example, the preset period can be a software runtime cycle.

[0093] In one optional embodiment, the consumed capacity of the target cell can be determined based on OCV, resistance value, equalization efficiency, and a preset cycle. Then, the difference between the module's equalization capacity and the consumed capacity is obtained to determine the remaining equalization capacity of the target cell. For example, the remaining capacity BalRemnCap(i) of the target cell i can be determined using the following formula:

[0094] BalRemnCap(i) = Q(i) - Ucell(i) / R * K * software runtime cycle.

[0095] Where Q(i) represents the module equalization capacity, Ucell(i) represents the OCV, R represents the resistance value, and K represents the equalization efficiency.

[0096] The above method can determine the consumed capacity of the target cell based on the open-circuit voltage, resistance value, balancing efficiency, and preset cycle, thereby accurately determining the remaining balancing capacity of the target cell.

[0097] In the above embodiments of this application, the initial balancing time of the target battery cell is determined based on the remaining balancing capacity, the open-circuit voltage, and the resistance value of the target battery cell, including: obtaining the ratio of the open-circuit voltage to the resistance value of the target battery cell to obtain the balancing current of the target battery cell; and obtaining the ratio of the remaining balancing capacity to the balancing current to obtain the initial balancing time.

[0098] In an alternative embodiment, the initial equalization time BalRemnTi(i) of the target cell i can be determined by the following formula:

[0099] BalRemnTi(i)=BalRemnCap(i) / BalCurr(i),

[0100] BalCurr(i)=Ucell(i) / R.

[0101] Where BalRemnCap(i) represents the remaining equalization capacity and BalCurr(i) represents the equalization current.

[0102] The above scheme achieves accurate determination of the initial equalization time by determining the equalization current.

[0103] In the above embodiments of this application, determining the target equilibrium time of the target battery cell based on the initial equilibrium time and the second preset time includes: determining the target equilibrium time as a first preset time in response to the initial equilibrium time being less than the second preset time; adjusting the second preset time based on the historical equilibrium time of the target battery cell in response to the initial equilibrium time being greater than or equal to the second preset time to obtain the target equilibrium time, wherein the sum of the historical equilibrium time and the target equilibrium time is less than or equal to a third preset time.

[0104] The aforementioned historical equalization time can be the equalization time of the previous one or several previous times. The aforementioned third preset time is a pre-set maximum equalization time for multiple consecutive power equalization operations. By adjusting the second preset time based on the historical equalization time, the impact of power equalization on the cell's OCV and individual cell voltage difference can be avoided. In this embodiment, the maximum equalization time of two power equalization operations can be limited to the third preset time; that is, the sum of the previous equalization time and the target equalization time determined this time is less than or equal to the third preset time.

[0105] In one optional embodiment, if the initial equalization time of the target battery cell is less than a second preset time, it indicates that the target battery cell does not need power equalization. In this case, the target equalization time of the target battery cell can be set to a first preset time, for example, the target equalization time can be set to 0. If the initial equalization time of the target battery cell is greater than or equal to the second preset time, it indicates that the target battery cell needs power equalization. In this case, the historical equalization time of the target battery cell can be obtained, and the second preset time can be adjusted based on the historical equalization time to obtain the target equalization time. The sum of the historical equalization time and the target equalization time is determined to be less than or equal to a third preset time. For example, if the maximum equalization time between two power equalization operations is limited to the third preset time, then the target equalization time can be the minimum value among the second preset time, the third preset time, and the historical equalization time.

[0106] By comparing the initial equalization time and the second preset time, and adjusting the second preset time based on historical equalization times, the impact of power equalization operations on the cell's OCV and individual cell voltage difference can be avoided during the determination of the target equalization time.

[0107] In the above embodiments of this application, the method further includes: in response to detecting an external equalization circuit fault, controlling the working state of the internal equalization circuits corresponding to the multiple battery cells based on the target equalization time of the multiple battery cells, wherein the two ends of the internal equalization circuits are connected to the two ends of the battery cells, the internal equalization circuits corresponding to the multiple battery cells are grouped and turned on, and the internal equalization circuits corresponding to two adjacent battery cells share a second power resistor.

[0108] The aforementioned internal equalization circuit can be a power equalization circuit for the battery cells connected within the AFE sampling module. In this embodiment, to reduce the cost of power equalization, the internal equalization circuit can also adopt a simplified structure of the same size as the external equalization circuit. For example, the internal equalization circuit can also include power resistors and transistors. The transistors can control the conduction and shutdown of the internal equalization circuit, and when the external equalization circuit is on, power equalization can be performed through the power resistors. Since the internal equalization circuit needs to be connected to the positive and negative terminals of the battery cell, to simplify the structure of the internal equalization circuit, two adjacent internal equalization circuits can share a second power resistor. That is, one internal equalization circuit includes two second power resistors and one second transistor, with the second transistor connected in series between the two second power resistors. Two internal equalization circuits connected to the positive or negative terminal of the same battery cell can share a single second power resistor.

[0109] It should be noted that since the internal equalization circuits share the same second power resistor, if both internal equalization circuits are turned on simultaneously, the shared second power resistor will not be on the discharge path, failing to achieve power consumption equalization and causing localized overheating. Therefore, to fully utilize the second power resistors in all internal equalization circuits, all internal equalization circuits can be grouped and turned on. For example, all internal equalization circuits can be divided into two groups, with each group turned on separately. That is, channel grouping control can be used, with odd-numbered channels (1 / 3 / 5...) and even-numbered channels (2 / 4 / 6...) turned on in a time-sharing manner, alternately controlling the equalization of odd / even channels.

[0110] In one alternative embodiment, after detecting a fault in the external equalization circuit, the internal equalization circuits corresponding to multiple cells can be used as a backup scheme. The internal equalization circuits are controlled to be turned on in groups to achieve the purpose of power consumption equalization of the AFE sampling module.

[0111] The above solution achieves redundancy for the external equalization circuit through the internal equalization circuit of the AFE sampling module. Furthermore, by incorporating the internal equalization circuit, compatibility with different AFE sampling modules can be achieved, facilitating platform development and hardware upgrades. For example, if the AFE sampling module does not include an external equalization circuit, the above solution can still be used to achieve power equalization through the internal equalization circuit.

[0112] In the above embodiments of this application, the working state of the external equalization circuit is controlled based on the remaining equalization capacity and target equalization time of multiple battery cells, or the working state of the internal equalization circuit corresponding to multiple battery cells is controlled based on the target equalization time of multiple battery cells. This includes: storing the remaining equalization capacity and target equalization time of multiple battery cells; controlling the set of analog front-end sampling modules to be in a sleep state and waking up the set of analog front-end sampling modules according to a second preset time; and controlling the working state of the external equalization circuit or the internal equalization circuit based on the remaining equalization capacity and target equalization time of multiple battery cells in response to the set of analog front-end sampling modules being in a wake-up state.

[0113] In an optional embodiment, to avoid conflicts between voltage acquisition and power consumption equalization during the operation of the AFE sampling module, this application can perform power consumption equalization on the AFE sampling module in sleep mode. To achieve power consumption equalization in sleep mode, after determining the remaining equalization capacity and target equalization time of multiple battery cells, the AFE sampling module set can be powered down and enter sleep mode, and periodically woken up according to a second preset time. After the AFE sampling module set is periodically woken up, if an external equalization circuit is used for power consumption equalization, its operating state can be controlled based on the remaining equalization capacity and target equalization time of multiple battery cells. If an internal equalization circuit is used for power consumption equalization, its operating state can be controlled based on the remaining equalization capacity and target equalization time of multiple battery cells.

[0114] It should be noted that since the AFE sampling module set is periodically woken up, the remaining equalization capacity and target equalization time need to be updated after each AFE sampling module wakes up, and the working state of the external equalization circuit is controlled by updating the equalization capacity and updating the equalization time.

[0115] The above solution eliminates the conflict between voltage acquisition and power balancing during operation by employing a power balancing scheme in sleep mode.

[0116] In the above embodiments of this application, controlling the operating state of an external equalization circuit or an internal equalization circuit based on the remaining equalization capacity and target equalization time of multiple battery cells includes: obtaining the new open-circuit voltage of a battery cell in response to the absence of faults in the analog front-end sampling module set before it enters a dormant state; updating the remaining equalization capacity of a battery cell based on the new open-circuit voltage and target equalization time of the battery cell to obtain an updated equalization capacity of the battery cell; updating the target equalization time of a battery cell based on the updated equalization capacity of the battery cell to obtain an updated equalization time of the battery cell; determining the battery cell to be equalized from multiple battery cells based on the updated equalization time of the battery cell, wherein the updated equalization time of the battery cell to be equalized is greater than or equal to a second preset time; controlling the external equalization circuit to be controlled corresponding to the battery cell to be equalized to be turned on, or controlling the internal equalization circuit to be controlled corresponding to the battery cell to be equalized to be turned on in groups, wherein at least one external equalization circuit other than the external equalization circuit to be controlled is turned off, or the external equalization circuits other than the internal equalization circuit to be controlled among the multiple battery cells are turned off.

[0117] In one optional embodiment, after the AFE sampling module set is woken up, if it is determined that the AFE sampling module set did not experience an unexpected power-down fault, that is, the AFE sampling module set was fault-free before going into sleep mode, and the remaining equalization capacity and target equalization time can be stored normally, then new OCVs (Optical Values) for multiple cells can be re-collected. Then, based on the new OCVs and the previously stored target equalization time, the previously stored remaining equalization capacity is updated to obtain an updated equalization capacity. Further, based on the updated equalization capacity, the target equalization time is updated to obtain an updated equalization time. Then, based on the updated equalization time, the cells to be equalized are determined from the multiple cells; that is, cells with updated equalization times greater than or equal to a second preset time are selected as the cells to be equalized. Therefore, if an external equalization circuit is used for power equalization, the external equalization circuit corresponding to the cell to be equalized can be turned on, while other external equalization circuits remain off, ensuring that power equalization can be performed through the AFE sampling module connected to the cell to be equalized. If an internal equalization circuit is used for power consumption equalization, the internal equalization circuit corresponding to the cell to be equalized can be controlled to be turned on in groups, while other internal equalization circuits are kept off, ensuring that power consumption equalization can be performed on the cell to be equalized.

[0118] It should be noted that the process of updating the remaining equalization capacity can involve removing the capacity transferred during the previous power equalization process from the remaining equalization capacity. For example, for an external equalization circuit, the equalization current of the external equalization circuit can be determined based on the new OCV, and the capacity that has been transferred can be determined based on the equalization circuit and the previous equalization time. Then, the capacity that has been transferred is subtracted from the previously stored remaining equalization capacity to obtain the updated equalization capacity.

[0119] The above scheme ensures that power balancing of AFE sampling modules is accurate every time by updating the remaining equalization capacity and target equalization time after the AFE sampling module set is woken up, thus avoiding the need to perform power balancing again on AFE sampling modules that have already completed power balancing.

[0120] The following is combined with Figure 3 A preferred embodiment of this application will be described in detail, such as... Figure 3 As shown, the method may include the following steps:

[0121] Step S302: Determine the conditions for balancing to be enabled.

[0122] The BMS system determines the inconsistency of cells within the AFE sampling module and initiates the residual equalization calculation of the AFE sampling module when all of the following conditions are met:

[0123] Faults related to the lack of equalization circuit (equalization short circuit / open circuit, equalization circuit overheating, etc.), individual unit voltage sampling faults, and AFE chip overheating faults.

[0124] The minimum open-circuit voltage is greater than the voltage threshold determined by the average OCV corresponding to the SOC of 1% of the cells.

[0125] The maximum temperature of the battery module is <T1℃.

[0126] Step S304: Calculate the remaining equalization capacity of the AFE sample module.

[0127] If the parking time meets the requirements, and the SOC corresponding to the maximum OCV of multiple cells is less than the threshold, the remaining balancing capacity can be calculated according to the following steps:

[0128] When both the maximum and minimum OCV are stable, the corresponding OCVSOC(i) can be determined based on the OCV, where OCVSOC(i) represents the SOC corresponding to the OCV of the i-th cell.

[0129] Obtain the minimum SOC value AFE(i)_OCVSOCmin and the average SOC value AFE(i)_OCVSOCavg corresponding to the OCV in each AFE sampling module. Determine the minimum SOC value AFE(i)_OCVSOCmin for at least one AFE sampling module, and denot it as AFE(min)_OCVSOCmin. Determine the minimum SOC value AFE(i)_OCVSOCavg for at least one AFE sampling module, and denot it as AFE(min)_OCVSOCavg.

[0130] The differences between AFE(i)_OCVSOCmin and AFE(i)_OCVSOCavg and their corresponding minimum values ​​for each AFE sampling module are calculated as follows:

[0131] ΔSOCmin(i)=AFE(i)_OCVSOCmin-(AFE(min)_OCVSOCmin+gap%),

[0132] ΔSOCavg(i)=AFE(i)_OCVSOCavg-(AFE(min)_OCVSOCavg+gap%).

[0133] For a target AFE sampling module that meets the difference condition, calculate the capacity Q1(i) that each AFE sampling module needs to balance = C*ΔSOCmin(i), where C is equal to the nominal capacity of the cell Cnom*SOH.

[0134] If Q1(i) is updated, Q(i) used to calculate the remaining equalization capacity in real time is updated, and the remaining equalization capacity BalRemnCap(i) = Q(i) - Ucell(i) / R * K * software running cycle is updated in real time, where Ucell(i) is the open circuit voltage of cell i, R is the equalization resistance, and K is the equalization efficiency.

[0135] Step S306: Calculate the target equilibrium time.

[0136] If the wake-up interval of the AFE sampling module is t1, when the initial equalization time BalRemnTi(i) of the i-th cell is greater than or equal to t1, the target equalization time SleepBALTi(i) is set to t1; otherwise, SleepBALTi(i) is set to 0. The calculation method of the initial equalization time BalRemnTi(i) of the i-th cell is as follows:

[0137] BalRemnTi(i)=BalRemnCap(i) / BalCurr(i),

[0138] BalCurr(i)=Ucell(i) / R.

[0139] Where BalRemnCap(i) represents the remaining equalization capacity of the i-th cell, BalCurr(i) represents the equalization current of the i-th cell, and R represents the equalization resistance.

[0140] Step S308: Send the target equalization time.

[0141] The system can update and send the sleep balancing time and sleep balancing flag of each cell to the underlying software according to the message cycle, and perform sleep balancing after power-down sleep.

[0142] Step S310: Determine and execute the balancing method.

[0143] The software selects the corresponding equalization method (external equalization or internal equalization) based on the equalization function configuration. If an external equalization circuit is configured, it will be used first for power equalization. If no external equalization circuit is configured, or if the external equalization circuit malfunctions, the internal equalization circuit can be used for power equalization.

[0144] The external equalization method is as follows: the AFE sampling module outputs a high level, which forms a positive voltage in the first transistor, thereby turning on the external equalization circuit and performing power equalization of the AFE sampling module.

[0145] The internal equalization method is as follows: the odd and even internal equalization circuits in the AFE sampling module are turned on alternately with a duty cycle of 50% and a period of t. That is, the odd-numbered internal equalization circuit is turned on first for t / 2, then the odd internal equalization circuit is turned off for t / 2, and the even-numbered internal equalization circuit is turned on for t / 2, and so on.

[0146] It should be noted that, considering the impact of sleep equilibration on OCV and individual cell voltage difference, the maximum equilibration time during the two high-voltage power-on periods is limited to t2.

[0147] Step S312, update the target equilibrium time.

[0148] After power-on, if no unexpected power-down fault is detected, the remaining equalization capacity and its related values ​​are updated based on the parking time. If the target equalization time read is t3, it can be updated as follows:

[0149] For the internal equalization circuit: BalRemnCap(i) = BalRemnCap_NVM(i) - t3*BalCurr(i) / 2,

[0150] For the external equalization circuit: BalRemnCap(i) = BalRemnCap_NVM(i) - t3*BalCurr(i).

[0151] Where BalRemnCap_NVM(i) represents the remaining equalization capacity stored during the previous power equalization process.

[0152] If the target equalization time read is 0 min, then BalRemnCap(i) = BalRemnCap_NVM(i).

[0153] As shown in the above scheme, this application provides a power consumption balancing method for AFE sampling modules. On the hardware side, it innovatively adds an external balancing circuit to achieve balanced discharge from the AFE sampling module to ground. Simultaneously, on the software side, it combines an internal balancing strategy to achieve backup redundancy. In the BMS sleep state, the selected AFE sampling modules are balanced offline to avoid conflicts between voltage acquisition and balancing activation during operation. Therefore, the method provided in this application can reduce the voltage difference between AFE sampling modules, effectively solve the problem of power consumption dispersion exceeding the design tolerance range between AFE modules with different channel configurations, reduce BMS self-consumption energy distribution imbalance, avoid the loss of some cells' actual usable capacity in a single cycle, and improve the overall capacity utilization of the battery pack.

[0154] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, data stored, data displayed, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties. Furthermore, the collection, use and processing of the relevant data must comply with the relevant laws, regulations and standards of the relevant countries and regions, and corresponding operation portals are provided for users to choose to authorize or refuse.

[0155] According to an embodiment of this application, a power equalization device for simulating a front-end sampling module is provided. For example... Figure 4 As shown, the device includes: at least one external equalization circuit 42 (multiple are shown in the figure), the first terminal of the external equalization circuit is connected to the power supply of the corresponding analog front-end sampling module 442 in the set of analog front-end sampling modules 44, the second terminal of the external equalization circuit is grounded, and the third terminal of the external equalization circuit is connected to the output terminal of the analog front-end sampling module.

[0156] The external equalization circuit is used to perform power equalization on the analog front-end sampling module when it is in the on state; the set of analog front-end sampling modules is used to collect the open-circuit voltage of multiple cells in the battery module and execute the method in the above embodiment.

[0157] In the above embodiments of this application, the external equalization circuit includes: a first power resistor and a first transistor, the first power resistor and the first transistor are connected in series to form a first sub-circuit, the first sub-circuit is connected between a first terminal and a second terminal of the external equalization circuit, and the control terminal of the first transistor is connected to a third terminal of the external equalization circuit.

[0158] The first transistor mentioned above can be a bipolar transistor, a field-effect transistor, a metal-oxide-semiconductor field-effect transistor (MOSFET), etc., and can be selected according to actual needs. In this embodiment, a MOSFET is used as an example for illustration.

[0159] In one alternative embodiment, such as Figure 5 As shown, taking an AFE sampling module as an example, the external equalization circuit can be composed of a first power resistor R. Be and the first transistor Q CBe The structure includes a first power resistor R. Be and the first transistor Q CBe It is connected in series between the power supply and ground of the AFE sampling module. The control terminal of the first transistor is connected to the GPIO terminal (General Purpose Input / Output) of the AFE sampling module.

[0160] It should be noted that, in order to protect the first transistor, a series of resistors, capacitors and diodes can be connected between the control terminal and the GPIO terminal of the first transistor for current protection.

[0161] In the above embodiments of this application, the first end of the first power resistor is connected to the first end of the external equalization circuit, the second end of the first power resistor is connected to the input end of the first transistor, and the output end of the first transistor is connected to the second end of the external equalization circuit.

[0162] In an alternative embodiment, to avoid excessive current flowing through the first transistor, a first power resistor can be connected in series between the power supply of the AFE sampling module and the first transistor, with the output of the first transistor grounded.

[0163] In the above embodiments of this application, the external equalization circuit further includes a capacitor connected in parallel between the first terminal and the second terminal of the external equalization circuit.

[0164] In one alternative embodiment, such as Figure 5 As shown, the external equalization circuit also includes capacitor C. HP The capacitor is connected in parallel between the power supply and ground of the AFE sampling module.

[0165] In the above embodiments of this application, the device further includes: multiple internal equalization circuits, the first and second ends of the internal equalization circuits are respectively connected to the two ends of the battery cell, the third end of the internal equalization circuits is connected to the analog front-end sampling module, the internal equalization circuits corresponding to the multiple battery cells are grouped and turned on, the internal equalization circuits corresponding to two adjacent battery cells share a second power resistor, and the internal equalization circuits are used to perform power consumption equalization on the analog front-end sampling module when they are in the turned-on state.

[0166] In one alternative embodiment, such as Figure 5 As shown, taking a battery module containing four cells as an example, the device also includes four internal equalization circuits, each connected to one end of a cell, and controlled to be turned on or off via an AFE sampling module. The two internal equalization circuits corresponding to two adjacent cells share a single second power resistor R. CB Furthermore, the four internal equalization circuits can be switched on in two groups at different times, thereby maximizing the utilization of the second power resistors in the four internal equalization circuits. For example... Figure 5 As shown, the four internal equalization circuits can be controlled separately by two control units.

[0167] In the above embodiments of this application, the internal equalization circuit includes: two second power resistors and a second transistor, the two second power resistors and the second transistor are connected in series to form a second sub-circuit, and the second transistor is located between the two second power resistors. The two ends of the second sub-circuit are respectively connected to the two ends of the battery cell, and the control terminal of the second transistor is connected to the third terminal of the internal equalization circuit.

[0168] The aforementioned second transistor can be a bipolar transistor, a field-effect transistor, a metal-oxide-semiconductor field-effect transistor (MOSFET), etc., and can be selected according to actual needs. In this embodiment, a MOSFET is used as an example for illustration.

[0169] In one alternative embodiment, such as Figure 5 As shown, the internal equalization circuit can include two second power resistors R. CB And a second transistor Q CBn The second transistor is connected in series between two second power resistors, the two ends of which are respectively connected to the two ends of a battery cell. The control terminal of the second transistor is connected to the control terminal of the AFE sampling module. The AFE sampling module controls the working state of the internal equalization circuit by controlling the conduction or cutoff of the second transistor.

[0170] Embodiments of this application also provide a vehicle, including: a memory storing an executable program; and a processor for running the program, wherein the program executes the methods described in various embodiments of this application when it runs.

[0171] Embodiments of this application also provide a computer-readable storage medium including a stored executable program, wherein, when the executable program is running, it controls the device where the computer-readable storage medium is located to perform the methods of various embodiments of this application.

[0172] Embodiments of this application also provide a computer program product, including a computer program that, when executed by a processor, implements the methods of various embodiments of this application.

[0173] Embodiments of this application also provide a computer program product, including a non-volatile computer-readable storage medium for storing a computer program that, when executed by a processor, implements the methods in various embodiments of this application.

[0174] Embodiments of this application also provide a computer program that, when executed by a processor, implements the methods described in the various embodiments of this application.

[0175] In the above embodiments of this application, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0176] In the several embodiments provided in this application, it should be understood that the disclosed technical content can be implemented in other ways. The device embodiments described above are merely illustrative; for example, the division of units can be a logical functional division, and in actual implementation, there may be other division methods. For instance, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the displayed or discussed mutual coupling, direct coupling, or communication connection may be through some interfaces; the indirect coupling or communication connection between units or modules may be electrical or other forms.

[0177] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0178] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0179] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard drive, magnetic disk, or optical disk.

[0180] The above description is only a preferred embodiment of this application. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of this application, and these improvements and modifications should also be considered within the scope of protection of this application.

Claims

1. A power equalization method for an analog front-end sampling module, characterized in that, include: Based on the open-circuit voltage of multiple cells in the battery module, it is determined whether the set of analog front-end sampling modules has entered a power consumption balance state, wherein the open-circuit voltage of the multiple cells is collected by at least one analog front-end sampling module in the set of analog front-end sampling modules; In response to determining that the set of analog front-end sampling modules has entered the power equalization state, based on the open-circuit voltage of the plurality of battery cells and the circuit parameters of at least one external equalization circuit, the remaining equalization capacity and target equalization time of the plurality of battery cells are determined, wherein the remaining equalization capacity is used to characterize the capacity for power equalization of the battery cells, and the target equalization time is used to characterize the time for power equalization of the battery cells, and different external equalization circuits are connected between different analog front-end sampling modules and ground; Based on the remaining equalization capacity and target equalization time of the multiple battery cells, the operating state of the external equalization circuit is controlled to perform power consumption equalization on the set of analog front-end sampling modules.

2. The method according to claim 1, characterized in that, The determination of the remaining equalization capacity and target equalization time of the multiple battery cells based on the open-circuit voltage of the multiple battery cells and the circuit parameters of at least one external equalization circuit includes: The state of charge of the multiple battery cells is determined based on their open-circuit voltages. Based on the state of charge of the multiple battery cells, a target simulated front-end sampling module is determined from the set of simulated front-end sampling modules, wherein the state of charge of at least one target battery cell corresponding to the target simulated front-end sampling module is inconsistent; Based on the open-circuit voltage of the target battery cell and the circuit parameters of the target external equalization circuit, the remaining equalization capacity and target equalization time of the target battery cell are determined, wherein the target external equalization circuit is connected to the target analog front-end sampling module. The remaining equalization capacity of the other cells among the plurality of cells, excluding the target cell, is determined as the preset equalization capacity, and the target equalization time of the other cells is determined as the first preset time.

3. The method according to claim 2, characterized in that, The step of determining the target analog front-end sampling module from the set of analog front-end sampling modules based on the state of charge of the multiple battery cells includes: Based on the state of charge of at least one cell corresponding to the same analog front-end sampling module, the minimum state of charge and the average state of charge of the analog front-end sampling module are determined, wherein the minimum state of charge is the minimum value among the states of charge of the at least one cell, and the average state of charge is the average value of the states of charge of the at least one cell. Based on the minimum state of charge and average state of charge of the simulated front-end sampling module, the target simulated front-end sampling module is determined from the set of simulated front-end sampling modules.

4. The method according to claim 3, characterized in that, The step of determining the target analog front-end sampling module from the set of analog front-end sampling modules based on the minimum state of charge and average state of charge of the analog front-end sampling module includes: Obtain the minimum value among the minimum states of charge of at least one of the simulated front-end sampling modules to obtain the target minimum state of charge. The minimum value among the average states of charge of at least one of the analog front-end sampling modules is obtained to obtain the target average state of charge. The difference between the minimum state of charge of the simulated front-end sampling module and the target minimum state of charge is obtained to obtain the first difference of the simulated front-end sampling module; The difference between the average state of charge of the simulated front-end sampling module and the target average state of charge is obtained to obtain the second difference of the simulated front-end sampling module; Based on the first difference and the second difference of the simulated front-end sampling modules, the target simulated front-end sampling module is determined from the set of simulated front-end sampling modules, wherein the first difference of the target simulated front-end sampling module is greater than a first preset difference, and the second difference of the target simulated front-end sampling module is greater than a second preset difference.

5. The method according to claim 2, characterized in that, The external equalization circuit includes at least a first power resistor, and the circuit parameters include the resistance value of the first power resistor; determining the remaining equalization capacity and target equalization time of the target battery cell based on the open-circuit voltage of the target battery cell and the circuit parameters of the target external equalization circuit includes: Based on the first difference of the target analog front-end sampling module, the module equalization capacity of the target analog front-end sampling module is determined, wherein the module equalization capacity is the capacity for power consumption equalization of the target analog front-end sampling module; Based on the module's equalization capacity, the target cell's open-circuit voltage, and the resistance value, the remaining equalization capacity of the target cell is determined. Based on the remaining equalization capacity of the target cell, the open-circuit voltage of the target cell, and the resistance value, the initial equalization time of the target cell is determined. The target equalization time of the target battery cell is determined based on the initial equalization time and the second preset time.

6. The method according to claim 5, characterized in that, Determining the module equalization capacity of the target analog front-end sampling module based on the first difference of the target analog front-end sampling module includes: Based on the preset capacity and battery health of the target battery cell, the effective capacity of the target simulation front-end sampling module is determined; The module's balanced capacity is determined based on the effective capacity and the first difference.

7. The method according to claim 5, characterized in that, The determination of the remaining equalization capacity of the target battery cell based on the module equalization capacity, the open-circuit voltage of the target battery cell, and the resistance value includes: Based on the open-circuit voltage, the resistance value, the equalization efficiency, and the preset cycle, the consumption capacity of the target battery cell is determined. The difference between the module's balanced capacity and the consumed capacity is obtained to determine the remaining balanced capacity.

8. The method according to claim 5, characterized in that, Determining the initial balancing time of the target battery cell based on its remaining balancing capacity, open-circuit voltage, and resistance value includes: The ratio of the open-circuit voltage of the target battery cell to the resistance value is obtained to obtain the equalization current of the target battery cell; The initial balancing time is obtained by obtaining the ratio of the remaining balancing capacity to the balancing current.

9. The method according to claim 5, characterized in that, Determining the target equalization time of the target battery cell based on the initial equalization time and the second preset time includes: In response to the initial equilibrium time being less than the second preset time, the target equilibrium time is determined to be the first preset time; In response to the initial equalization time being greater than or equal to the second preset time, the second preset time is adjusted based on the historical equalization time of the target cell to obtain the target equalization time, wherein the sum of the historical equalization time and the target equalization time is less than or equal to the third preset time.

10. The method according to any one of claims 1 to 9, characterized in that, The method further includes: In response to the detection of a fault in the external equalization circuit, the operating state of the internal equalization circuits corresponding to the multiple battery cells is controlled based on the target equalization time of the multiple battery cells. The two ends of the internal equalization circuits are connected to the two ends of the battery cells. The internal equalization circuits corresponding to the multiple battery cells are grouped and turned on, and the internal equalization circuits corresponding to two adjacent battery cells share a second power resistor.

11. The method according to claim 10, characterized in that, The step of controlling the operating state of the external equalization circuit based on the remaining equalization capacity and target equalization time of the multiple battery cells, or controlling the operating state of the internal equalization circuit corresponding to the multiple battery cells based on the target equalization time of the multiple battery cells, includes: Store the remaining equalization capacity and target equalization time of the multiple battery cells; The simulated front-end sampling module set is controlled to be in a sleep state, and the simulated front-end sampling module set is woken up according to a second preset time. In response to the analog front-end sampling module set being in a wake-up state, the operating state of the external equalization circuit or the internal equalization circuit is controlled based on the remaining equalization capacity and target equalization time of the multiple battery cells.

12. The method according to claim 11, characterized in that, The step of controlling the operating state of the external equalization circuit or the internal equalization circuit based on the remaining equalization capacity and target equalization time of the multiple battery cells includes: In response to the fact that the analog front-end sampling module assembly was fault-free before entering the sleep state, the new open-circuit voltage of the battery cell is acquired; Based on the new open-circuit voltage of the battery cell and the target equalization time, the remaining equalization capacity of the battery cell is updated to obtain the updated equalization capacity of the battery cell. Based on the updated equalization capacity of the battery cell, the target equalization time of the battery cell is updated to obtain the updated equalization time of the battery cell. Based on the update and equalization time of the battery cells, a battery cell to be equalized is determined from the plurality of battery cells, wherein the update and equalization time of the battery cell to be equalized is greater than or equal to a second preset time. The system controls the external equalization circuit corresponding to the cell to be equalized to be turned on, or controls the internal equalization circuit corresponding to the cell to be equalized to be turned on in groups, wherein the external equalization circuits other than the external equalization circuit to be controlled in at least one external equalization circuit are turned off, or the external equalization circuits other than the internal equalization circuit to be controlled in the multiple cells are turned off.

13. A power equalization device for an analog front-end sampling module, characterized in that, include: At least one external equalization circuit, wherein a first terminal of the external equalization circuit is connected to the power supply of the corresponding analog front-end sampling module in the set of analog front-end sampling modules, a second terminal of the external equalization circuit is grounded, and a third terminal of the external equalization circuit is connected to the output terminal of the analog front-end sampling module. The external equalization circuit is used to perform power equalization on the analog front-end sampling module when it is in the on state. The simulated front-end sampling module set is used to collect the open-circuit voltage of multiple cells in the battery module and to execute the method described in any one of claims 1 to 12.

14. The apparatus according to claim 13, characterized in that, The external equalization circuit includes: a first power resistor and a first transistor, the first power resistor and the first transistor being connected in series to form a first sub-circuit, the first sub-circuit being connected between a first terminal and a second terminal of the external equalization circuit, and the control terminal of the first transistor being connected to a third terminal of the external equalization circuit.

15. A vehicle, characterized in that, include: Memory, which stores executable programs; A processor for running the program, wherein the program, when running, performs the method according to any one of claims 1 to 12.

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