Radio frequency receiving front-end circuit with shielding cavity

Abstract

The invention discloses a radio frequency receiving front-end circuit with a shielding cavity, which relates to the technical field of radio and comprises a signal processing link, a power supply processing module, the shielding cavity and an interface assembly, the signal processing link and the power supply processing module are integrated on the PCB, positioning columns and threaded mounting holes are arranged in a middle cavity in the shielding cavity to fix the PCB, and the PCB is clamped between the middle cavity and the lower cover plate through cover plate screws; an SMA interface in the interface assembly is in input connection with a T1 radio frequency amplifier in the signal processing link; the output of an SMA connector in the interface assembly is connected with a second intermediate frequency filter in the signal processing link; a first mixer U1 in the signal processing link is connected with a first local oscillator SMA connector LO1 in a matched mode. According to the radio frequency receiving front-end circuit with the shielding cavity, excellent shielding effectiveness is provided, high-frequency signal integrity is guaranteed, and uniform heat dissipation is achieved.

Description

Technical Field

[0001] This invention relates to the field of radio technology, and in particular to a radio frequency receiving front-end circuit with a shielded cavity. Background Technology

[0002] In modern electronic systems such as wireless communication, radar detection, satellite navigation, and radio frequency measurement, the radio frequency receiving system serves as the core front-end, and its performance directly determines the sensitivity, dynamic range, and signal quality of the entire system. However, with the continuous increase in application frequency bands, especially in microwave bands such as the Ku band (10.7GHz–12.7GHz), receiver systems face multiple severe challenges in design and implementation: low-noise amplifiers need to balance low noise and high gain at high frequency and wide bandwidth; mixers need to achieve high linearity and low conversion loss at high local oscillator frequencies; filtering networks need to have steep out-of-band rejection to combat strong image and adjacent channel interference; in addition, the entire link also needs to solve problems such as electromagnetic shielding, thermal management, and impedance matching within a limited volume to achieve high isolation, high stability, and good manufacturability. Summary of the Invention

[0003] The purpose of this invention is to provide a radio frequency receiver front-end circuit with a shielded cavity, which improves electrical performance, provides excellent shielding effectiveness, ensures high-frequency signal integrity, and achieves uniform heat dissipation.

[0004] This invention provides a radio frequency receiver front-end circuit with a shielded cavity, including a signal processing link, a power processing module, a shielded cavity, and an interface assembly. The signal processing link and the power processing module are integrated on a PCB board. The shielded cavity has positioning posts and threaded mounting holes inside to fix the PCB board. The PCB board is clamped between the intermediate cavity and the lower cover plate by cover plate screws. The SMA interface input of the interface assembly is connected to the T1 radio frequency amplifier in the signal processing link. The SMA connector output of the interface assembly is connected to the second intermediate frequency filter in the signal processing link. The U1 first mixer in the signal processing link is connected to the LO1 first local oscillator SMA connector, and the U2 second mixer in the signal processing link is connected to the LO2 second local oscillator SMA connector. The 6V power input connector of the interface assembly is connected to the FB7 and FB8 ferrite beads in the signal processing link.

[0005] Preferably, the signal processing link includes a T1 RF amplifier, an F1 RF filter, a U1 first mixer, an F4 filter, a T2 first IF amplifier, an F3 first IF filter, a B1 fixed attenuator, a U2 second mixer, R1, R2, and R3 forming a Pi-type attenuator, an F2 filter, a T3 second IF amplifier, an X3 IPEX connector, and a second IF filter; the T1 RF amplifier is sequentially connected to the F1 RF filter, the U1 first mixer, the F4 filter, the T2 first IF amplifier, the F3 first IF filter, the B1 fixed attenuator, the U2 second mixer, R1, R2, and R3 forming a Pi-type attenuator, the F2 filter, the T3 second IF amplifier, and the second IF filter.

[0006] Preferably, the power processing module includes FB7 and FB8 ferrite beads, FU1 fuse, D1 TVS diode, D2 rectifier diode, voltage regulator chip one, voltage regulator chip two, voltage regulator chip three, 5V test point one, 5V test point two, and 5V test point three; FB7 and FB8 ferrite beads are connected in sequence to FU1 fuse, D1 TVS diode, D2 rectifier diode, voltage regulator chip one, voltage regulator chip two, voltage regulator chip three, 5V test point one, 5V test point two, and 5V test point three.

[0007] Preferably, the interface assembly includes an SMA interface input, a first local oscillator (LO1), a second local oscillator (LO2), an SMA connector output, and a 6V power input connector; the SMA interface input, SMA connector output, the first local oscillator SMA connector (LO1), the second local oscillator SMA connector (LO2), and the 6V power input connector in the interface assembly are located on the outer side of the intermediate cavity.

[0008] Preferably, the shielding cavity includes an upper cover plate, a middle cavity, a lower cover plate, cover plate screws, an upper surface of the middle cavity, a first frequency band cavity, a second frequency band cavity, SMA screw holes, a third frequency band cavity, a first slotted hole, a second slotted hole, and a lower surface of the middle cavity; the top of the middle cavity is the upper surface of the middle cavity, and the lower surface of the upper cover plate is completely fitted with the upper surface of the middle cavity; the edges of the upper cover plate and the edges of the middle cavity are provided with corresponding screw holes, and the cover plate screws are evenly inserted through the screw holes of the upper cover plate and the middle cavity; the lower surface of the middle cavity, the first slotted hole, and the second slotted hole are machined by a milling cutter to 1mm; the lower cover plate and the cover plate screws are M2 stainless steel Phillips head countersunk screws.

[0009] Preferably, the bottom of the intermediate cavity is the lower surface of the intermediate cavity, and the upper surface of the lower cover plate is completely fitted with the lower surface of the intermediate cavity; the edge of the lower cover plate is also provided with screw holes corresponding to the edge of the intermediate cavity, and the cover plate screws pass through the screw holes of the lower cover plate and the intermediate cavity; the SMA screw hole is opened on the side wall of the intermediate cavity, and the SMA screw hole is a four-hole flange structure; the first slotted hole and the second slotted hole are opened on the lower surface of the intermediate cavity.

[0010] Therefore, the present invention employs the above-mentioned radio frequency receiving front-end circuit with a shielded cavity to improve electrical performance indicators, provide excellent shielding effectiveness, ensure high-frequency signal integrity, and achieve uniform heat dissipation.

[0011] The technical solution of the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description

[0012] Figure 1 This is a schematic diagram of the radio frequency (RF) side of a PCB board for an RF receiving front-end circuit with a shielded cavity according to the present invention. Figure 2 This is a schematic diagram of the power supply side of a PCB board for a radio frequency receiving front-end circuit with a shielded cavity according to the present invention. Figure 3 This is a top view of the shielding cavity of a radio frequency receiving front-end circuit with a shielding cavity according to the present invention; Figure 4 This is a bottom view of the shielding cavity of a radio frequency receiving front-end circuit with a shielding cavity according to the present invention; Figure 5 This is a three-dimensional schematic diagram of the upper surface of the intermediate cavity of a radio frequency receiving front-end circuit with a shielded cavity according to the present invention. Figure 6 This is a three-dimensional schematic diagram of the lower surface of the intermediate cavity of a radio frequency receiving front-end circuit with a shielded cavity according to the present invention.

[0013] Figure Labels 1. SMA connector input; 2. T1 RF amplifier; 3. F1 RF filter; 4. U1 first mixer; 5. LO1 first local oscillator SMA connector; 6. F4 filter; 7. T2 first intermediate frequency amplifier; 8. F3 first intermediate frequency filter; 9. B1 fixed attenuator; 10. U2 second mixer; 11. LO2 second local oscillator SMA connector; 12. R1, R2, R3 forming a Pi-type attenuator; 13. F2 filter; 14. T3 second intermediate frequency amplifier; 15. X3 IPEX connector; 16. Second intermediate frequency filter; 17. SMA connector output; 18. 6V power input connector; 19. FB7 and FB8 ferrite beads; 20. FU1 fuse; 21. D1 22. TVS diode; 23. D2 rectifier diode; 24. Voltage regulator chip 1; 25. Voltage regulator chip 2; 26. Voltage regulator chip 3; 27. 5V test point 1; 28. 5V test point 2; 29. ​​5V test point 3; 30. Top cover plate; 31. Middle cavity; 32. Bottom cover plate; 33. Cover plate screws; 34. Upper surface of the middle cavity; 35. First frequency band cavity; 36. Second frequency band cavity; 37. SMA screw hole; 38. Third frequency band cavity; 39. First slot hole; 40. Second slot hole; 41. Lower surface of the middle cavity. Detailed Implementation

[0014] The technical solution of the present invention will be further described below with reference to the accompanying drawings and embodiments.

[0015] Unless otherwise defined, the technical or scientific terms used in this invention shall have the ordinary meaning as understood by one of ordinary skill in the art to which this invention pertains.

[0016] The terms "first," "second," and similar words used in this invention do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as "comprising" or "including" mean that the element or object preceding the word encompasses the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Terms such as "connected" or "linked" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. Terms such as "upper," "lower," "left," and "right" are used only to indicate relative positional relationships; when the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0017] Example 1 like Figures 1-6 As shown, this invention discloses a radio frequency (RF) receiver front-end circuit with a shielded cavity, comprising a signal processing link, a power processing module, a shielded cavity, and interface components. The signal processing link and power processing module are integrated on a PCB board. The intermediate cavity 33 within the shielded cavity has positioning posts and threaded mounting holes to secure the PCB board. The PCB board is clamped between the intermediate cavity 33 and the lower cover plate 31 by cover plate screws. The PCB board uses a four-layer high-performance microwave board, Rogers RO4350B. The RF side handles the main signal flow, while the power side (and the bottom layer) employs a complete planar design to provide low-noise, stable power and good grounding for the RF components.

[0018] The upper cover plate 29, the intermediate cavity 30, and the lower cover plate 31 are uniformly fastened together by cover plate screws 32, forming a three-layer closed structure that completely encloses the PCB board carrying the signal processing link and power processing module, constructing a Faraday cage-like electromagnetic shielding space to block external electromagnetic interference and internal signal leakage. The RF grounding layer of the PCB board is tightly connected to the metal body of the intermediate cavity 30 through an array of grounding vias to achieve low-impedance grounding and ensure the signal integrity of the signal processing link.

[0019] The power processing module's power layer works in conjunction with the cavity grounding structure, utilizing components such as FB7 and FB8 ferrite beads to suppress high-frequency power noise and provide clean power to the signal processing link. The cavity's metal body also serves as a heat sink; heat from the heat-generating components on the PCB is conducted to the outside via the PCB grounding layer, the air inside the cavity, and the cavity's metal body, thus solving the heat dissipation problem of the high-frequency circuit.

[0020] The isolation wall inside the intermediate cavity 30 divides the first frequency band cavity 34, the second frequency band cavity 35, and the third frequency band cavity 37, corresponding to different processing stages of the signal processing link; the signal paths of different frequency bands on the PCB board are transmitted across the cavity through the first slot hole 38 and the second slot hole 39 of the intermediate cavity, which not only ensures the electrical integrity of the signal path, but also avoids crosstalk between signals of different frequency bands through the physical isolation wall.

[0021] The SMA interface input 1 in the interface component is connected to the T1 RF amplifier 2 in the signal processing link; the SMA connector output 17 in the interface component is connected to the second intermediate frequency filter 16 in the signal processing link; the U1 first mixer 4 in the signal processing link is connected to the LO1 first local oscillator SMA connector 5 to convert the Ku-band RF signal into the first intermediate frequency signal.

[0022] The U2 second mixer 10 in the signal processing link, in conjunction with the LO2 second local oscillator SMA connector 11, downconverts the first intermediate frequency signal to the L-band second intermediate frequency signal. The 6V power input connector 18 in the interface component connects to the FB7 and FB8 ferrite beads 19 in the signal processing link. The signal processing link includes T1 RF amplifier 2, F1 RF filter 3, U1 first mixer 4, F4 filter 6, T2 first intermediate frequency amplifier 7, F3 first intermediate frequency filter 8, B1 fixed attenuator 9, U2 second mixer 10, R1, R2, and R3 forming a Pi-type attenuator 12, F2 filter 13, T3 second intermediate frequency amplifier 14, X3IPEX connector 15, and second intermediate frequency filter 16. T1 RF amplifier 2 is sequentially connected to F1 RF filter 3, U1 first mixer 4, F4 filter 6, T2 first intermediate frequency amplifier 7, F3 first intermediate frequency filter 8, B1 fixed attenuator 9, U2 second mixer 10, R1, R2, and R3 forming a Pi-type attenuator 12, F2 filter 13, T3 second intermediate frequency amplifier 14, and second intermediate frequency filter 16. X3IPEX connector 15 provides debugging support for the second intermediate frequency filter 16 and subsequent output links.

[0023] The radio frequency (RF) signal (10.7GHz-12.7GHz) is input through SMA connector 1, amplified by 22dB by RF amplifier T1, and then filtered by RF filter F1 3. RF filter F1 3 is a ceramic patch filter with a frequency range of (10.7GHz-12.7GHz) to filter the input signal and remove input noise. Simultaneously, the image spurious signals generated by the up-conversion of the RF signal and the local oscillator signal (15GHz-16.7GHz) input through the first local oscillator SMA connector 5 (LO1) via the first mixer U1, excluding the first intermediate frequency signal (4GHz-4.3GHz), are suppressed.

[0024] The first intermediate frequency signal (4GHz-4.3GHz) passes through the F4 filter 6 with a frequency range of (DC-10GHz) to prevent the local oscillator signal input from the first local oscillator SMA connector 5 of LO1 from leaking to the next stage along the link. The first intermediate frequency (IF) signal (4GHz-4.3GHz) is amplified by 20dB by the first IF amplifier 7 (T2), and then filtered by the first IF filter 8 (F3) with a frequency range of (4GHz~4.3GHz). The fixed attenuator 9 (B1) is used to protect the second mixer 10 (U2) and ensure that the power of the first IF signal (4GHz~4.3GHz) reaching the interface of the second mixer 10 (U2) is within a safe and linear operating range. It is up-converted by the second mixer 10 (U2) with the (5.15GHz) signal input from the second local oscillator SMA connector 11 (LO2) to output the second IF signal (0.85GHz~1.15GHz). The Pi-type attenuator 12 (R1, R2, R3) is used to improve port isolation. The output second IF signal (0.85GHz~1.15GHz) passes through the filter 13 (F2) with a frequency range of (DC~10GHz) to prevent the local oscillator signal input from the second local oscillator SMA connector 11 (LO2) from leaking to the next stage along the link. The second intermediate frequency signal (0.85GHz~1.15GHz) is amplified by 24dB by the second intermediate frequency amplifier 14 of T3, and then passed through the second intermediate frequency filter 16 (0.85GHz~1.15GHz) and output through the SMA connector 17.

[0025] IPEX connector 15 provides a debugging interface for the second intermediate frequency filter 16 (0.85GHz~1.15GHz).

[0026] The total gain G of the receiving system in the specification: ; in, Let be the gain (dB) of the i-th stage active device. Let be the loss (dB) of the i-th passive device; The receiver system noise figure NF in the specifications: ; The receiver system's 1dB compression point P-1dB in the specifications: ; The receiving system OIP3 in the specifications: ; Calculations show that the high gain (40dB), low noise figure (2dB), high linearity (OIP3 25dBm), and image and spurious suppression (≥50dBc) are all within the required range.

[0027] The power processing module includes FB7 and FB8 ferrite beads 19, FU1 fuse 20, D1 TVS diode 21, D2 rectifier diode 22, voltage regulator chip 1 23, voltage regulator chip 24, voltage regulator chip 3 25, 5V test point 1 26, 5V test point 27, and 5V test point 3 28. FB7 and FB8 ferrite beads 19 are connected in sequence to FU1 fuse 20, D1 TVS diode 21, D2 rectifier diode 22, voltage regulator chip 1 23, voltage regulator chip 24, voltage regulator chip 3 25, 5V test point 1 26, 5V test point 27, and 5V test point 3 28.

[0028] On the power side of the PCB, the 6V power signal is input through the 6V power connector 18. FB7 and FB8 ferrite beads 19 are used to prevent high-frequency noise from propagating on the ground network, providing a cleaner reference ground for the RF system. The 6V power signal passes through fuse FU1 20, which protects the circuit. If a short circuit or severe overload occurs in the downstream circuit, the current will increase sharply, and fuse FU1 20 will blow quickly. The 6V power signal is aligned with TVS diode D1 21 for overvoltage protection and with rectifier diode D2 22 for reverse polarity protection. The 6V power supply signal passes through voltage regulator chip 23 and outputs a 5V signal, which is used to power the T1 RF amplifier 2. The 5V test point 26 is used to test whether it meets the requirements. The 6V power supply signal passes through voltage regulator chip 24 and outputs a 5V signal, which is used to power the T2 first intermediate frequency amplifier 7. The 5V test point 27 is used to test whether it meets the requirements. The 6V power supply signal passes through voltage regulator chip 25 and outputs a 5V signal, which is used to power the T3 second intermediate frequency amplifier 14. The 5V test point 28 is used to test whether it meets the requirements.

[0029] The interface assembly includes an SMA interface input 1, a LO1 first local oscillator 5, a LO second local oscillator 11, an SMA connector output 17, and a 6V power input connector 18. The SMA interface input 1, SMA connector output 17, LO1 first local oscillator SMA connector 5, LO2 second local oscillator SMA connector 11, and power input connector 18 in the interface assembly are located on the outside of the intermediate cavity 32.

[0030] The shielding cavity includes an upper cover plate 31, a middle cavity 32, a lower cover plate 33, cover plate screws 34, an upper surface of the middle cavity 35, a first frequency band cavity 36, a second frequency band cavity 37, an SMA screw hole 38, a third frequency band cavity 39, a first slotted hole 40, a second slotted hole 41, and a lower surface of the middle cavity 42.

[0031] The top of the intermediate cavity 30 is the upper surface 33 of the intermediate cavity, and the lower surface of the upper cover plate 31 is completely in contact with the upper surface 33 of the intermediate cavity. The edges of the upper cover plate 29 and the intermediate cavity 30 are provided with corresponding screw holes. The cover plate screws 32 (M2 stainless steel cross countersunk screws) are evenly inserted through the screw holes of the upper cover plate 29 and the intermediate cavity 30. Through multiple points of even tightening, it is ensured that there is no gap between the upper cover plate 29 and the intermediate cavity 30, so as to avoid electromagnetic leakage.

[0032] The bottom of the intermediate cavity 30 is the lower surface 40 (planar structure), and the upper surface of the lower cover plate 31 is completely fitted with the lower surface 40 of the intermediate cavity. The edge of the lower cover plate 31 is also provided with screw holes corresponding to the edge of the intermediate cavity 30. The cover plate screws 32 pass through the screw holes of the lower cover plate 31 and the intermediate cavity 30, and the fastening method is the same as that of the upper cover plate 29, so as to achieve a seamless connection between the intermediate cavity 30 and the lower cover plate 31. At the same time, the PCB board carrying the signal processing link and power processing module is clamped and fixed between the lower surface 40 of the intermediate cavity and the lower cover plate 31. The positioning posts and threaded mounting holes inside the intermediate cavity 30 can further accurately fix the PCB board, ensuring the relative position stability of the PCB board and the intermediate cavity 30 (avoiding poor contact caused by vibration).

[0033] The upper cover plate 29, the middle cavity 30, and the lower cover plate 31 are formed into a rigid whole by cover plate screws 32. All three are made of AL6061-T6 aluminum alloy (natural color conductive oxidation), which not only ensures structural strength (adapts to harsh environments and resists vibration / impact), but also forms a complete Faraday cage through good electrical contact of the metal contact surfaces, so as to achieve electromagnetic shielding.

[0034] The intermediate cavity 30 has multiple metal partition walls perpendicular to the upper surface 33 and lower surface 40 of the intermediate cavity, dividing the internal space of the intermediate cavity 30 into three independent closed sub-cavities. All three sub-cavities extend from the upper surface 33 to the lower surface 40 of the intermediate cavity and are sealed to the outside through the upper cover plate 29 and the lower cover plate 31.

[0035] The first frequency band cavity 34 houses the Ku-band input module (T1 RF amplifier 2, F1 RF filter 3, etc.) of the signal processing link, and is physically isolated from other sub-cavities by an isolation wall to avoid crosstalk between Ku-band signals and other frequency bands. The second frequency band cavity 35 houses the first intermediate frequency module (U1 first mixer 4, T2 first intermediate frequency amplifier 7, etc.) of the signal processing link, carrying 4~4.3GHz intermediate frequency signal processing. The third frequency band cavity 37 houses the second intermediate frequency / L-band module (U2 second mixer 10, T3 second intermediate frequency amplifier 14, etc.) of the signal processing link, carrying 0.85~1.15GHz signal processing.

[0036] The sidewalls of the intermediate cavity 30 (the surfaces perpendicular to the upper surface 35 and lower surface 40 of the intermediate cavity) and the lower surface 40 of the intermediate cavity are provided with two types of functional holes, both of which are integral structures of the intermediate cavity 32.

[0037] SMA screw holes 36 are located on the side wall of the intermediate cavity 30 and are four-hole flange structures. They are used to fix external SMA connectors (such as SMA interface input 1 and SMA connector output 17) to ensure that the inner conductor of the SMA connector is precisely connected to the circuit in the sub-cavity of the intermediate cavity 30 (such as the RF port on the PCB board). At the same time, the flange structure ensures impedance matching and mechanical stability.

[0038] The first slotted hole 38 and the second slotted hole 39 are formed on the lower surface 40 of the intermediate cavity. They are long slots with a width of 1mm, which are used for signal lines across sub-cavities on the PCB board (such as the signal path from the first frequency band cavity 34 to the second frequency band cavity 35) to pass through. This ensures the electrical continuity of the signal and reduces electromagnetic leakage between different sub-cavities through the narrow slit design of the slotted holes.

[0039] Therefore, this invention employs the aforementioned RF receiver front-end circuit with a shielded cavity. Through an optimized two-stage down-conversion, multi-stage filtering and amplification link architecture, combined with fixed and variable attenuators for precise level management, it improves electrical performance. The shielded cavity structure of the upper cover, middle cavity, and lower cover, divided into multiple independent sub-cavities by isolation walls, provides excellent shielding effectiveness, ensuring high-frequency signal integrity and achieving uniform heat dissipation.

[0040] The above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit them. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can still be made to the technical solutions of the present invention, and these modifications or equivalent substitutions cannot cause the modified technical solutions to deviate from the spirit and scope of the technical solutions of the present invention.

Claims

1. A radio frequency receiving front-end circuit with a shielded cavity, characterized in that, It includes a signal processing link, a power processing module, a shielded cavity, and an interface assembly. The signal processing link and power processing module are integrated on a PCB board. The shielded cavity has positioning posts and threaded mounting holes inside the middle cavity to fix the PCB board. The PCB board is clamped between the middle cavity and the lower cover plate by cover plate screws. The SMA interface input of the interface assembly is connected to the T1 RF amplifier in the signal processing link. The SMA connector output of the interface assembly is connected to the second intermediate frequency filter in the signal processing link. The U1 first mixer in the signal processing link is connected to the LO1 first local oscillator SMA connector, and the U2 second mixer in the signal processing link is connected to the LO2 second local oscillator SMA connector. The 6V power input connector of the interface assembly is connected to the FB7 and FB8 ferrite beads in the signal processing link.

2. The radio frequency receiving front-end circuit with a shielded cavity according to claim 1, characterized in that, The signal processing link includes a T1 RF amplifier, an F1 RF filter, a U1 first mixer, an F4 filter, a T2 first IF amplifier, an F3 first IF filter, a B1 fixed attenuator, a U2 second mixer, R1, R2, and R3 forming a Pi-type attenuator, an F2 filter, a T3 second IF amplifier, an X3 IPEX connector, and a second IF filter. The T1 RF amplifier is sequentially connected to the F1 RF filter, the U1 first mixer, the F4 filter, the T2 first IF amplifier, the F3 first IF filter, the B1 fixed attenuator, the U2 second mixer, R1, R2, and R3 forming a Pi-type attenuator, the F2 filter, the T3 second IF amplifier, and the second IF filter.

3. The radio frequency receiving front-end circuit with a shielded cavity according to claim 1, characterized in that, The power processing module includes FB7 and FB8 ferrite beads, FU1 fuse, D1 TVS diode, D2 rectifier diode, voltage regulator chip one, voltage regulator chip two, voltage regulator chip three, 5V test point one, 5V test point two, and 5V test point three; FB7 and FB8 ferrite beads are connected in sequence to FU1 fuse, D1 TVS diode, D2 rectifier diode, voltage regulator chip one, voltage regulator chip two, voltage regulator chip three, 5V test point one, 5V test point two, and 5V test point three.

4. The radio frequency receiving front-end circuit with a shielded cavity according to claim 1, characterized in that, The interface assembly includes an SMA interface input, LO1 first local oscillator, LO2 second local oscillator, SMA connector output, and 6V power input connector; the SMA interface input, SMA connector output, LO1 first local oscillator SMA connector, LO2 second local oscillator SMA connector, and 6V power input connector in the interface assembly are located on the outside of the intermediate cavity.

5. The radio frequency receiving front-end circuit with a shielded cavity according to claim 1, characterized in that, The shielding cavity includes an upper cover plate, a middle cavity, a lower cover plate, cover plate screws, an upper surface of the middle cavity, a first frequency band cavity, a second frequency band cavity, SMA screw holes, a third frequency band cavity, a first slotted hole, a second slotted hole, and a lower surface of the middle cavity. The top of the middle cavity is the upper surface of the middle cavity, and the lower surface of the upper cover plate is completely fitted with the upper surface of the middle cavity. The edges of the upper cover plate and the middle cavity are provided with corresponding screw holes, and the cover plate screws are evenly inserted through the screw holes of the upper cover plate and the middle cavity. The lower surface of the middle cavity, the first slotted hole, and the second slotted hole are machined 1mm by a milling cutter. The lower cover plate and the cover plate screws are M2 stainless steel Phillips head countersunk screws.

6. The radio frequency receiving front-end circuit with a shielded cavity according to claim 5, characterized in that, The bottom of the intermediate cavity is the lower surface of the intermediate cavity, and the upper surface of the lower cover plate is completely fitted with the lower surface of the intermediate cavity; the edge of the lower cover plate is also provided with screw holes corresponding to the edge of the intermediate cavity, and the cover plate screws pass through the screw holes of the lower cover plate and the intermediate cavity; the SMA screw hole is opened on the side wall of the intermediate cavity, and the SMA screw hole is a four-hole flange structure; the first slotted hole and the second slotted hole are opened on the lower surface of the intermediate cavity.

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