System and method for digital lithography scan sequencing

Abstract

A digital lithography system includes a stage configured to support a substrate, a bridge disposed over the stage, and a first lithography processing unit coupled to the bridge. A first lithographic processing unit coupled to the bridge may include a scanning unit, a lithographic exposure unit, and an optical system shared by the scanning unit and the lithographic exposure unit. The scanning unit generates a measurement result of the substrate using the optical system during a measurement operation, and the lithographic exposure unit performs a digital lithographic exposure of the substrate using the optical system during an exposure operation.

Description

TECHNICAL FIELD

[0001] The present specification generally relates to electronic component manufacturing. More specifically, the present specification relates to a digital lithography system for electronic component manufacturing. BACKGROUND

[0002] Digital lithography is a special form of photolithography used to create patterns digitally onto a substrate surface without the use of traditional or physical photo-masks. The use of no traditional photo-masks, and the versatility enabled by such digital systems, enables both higher processing speeds and higher resolutions of photolithography processing systems. Such digital systems have proven advantageous in a variety of applications, including printed circuit board (PCB) patterning, solder masks, flat panel displays, laser marking, and other digital exposure processes requiring complex speed and precision levels. Further benefits stemming from the introduction of such digital systems include reduced material costs, enhanced production rates, and improved system adaptability through the ability to enable rapid changes in lithography exposure patterns.

[0003] To enable photolithography without photo-masks, digital lithography systems employ digital exposure units that can selectively expose a substrate surface to a source of actinic light (e.g., often a UV light source). Such selective exposure can be precisely controlled to create a pattern or path in the surface material of the substrate. Such a pattern or path can then be used as a format for electrical connection paths between surface features (e.g., integrated electronic modules).

[0004] Often, the specific pattern used for exposure can come from a pre-designed template or guide for the exposure process. Such a template or surface profile "map" can be used by the exposure unit to create the intended surface profile. For example, in applications for display manufacturing, a glass substrate can undergo pre-processing that mounts pre-fabricated electrical modules onto the surface (arranged according to the surface profile template). Such modules can include computer memory, sensors, logic relays, antennas, etc. that can be placed on the substrate surface. After such processing, and placement of the modules, digital lithography can then be used to form partial or complete patterns in the surface material. Such patterns can be further processed downstream to create conductive connection paths that enable electrical communication, power transmission, and other necessary transmissions between the modules and surface features of the substrate. SUMMARY

[0005] The following is a simplified summary of the disclosure in order to provide a basic understanding of some aspects of the disclosure. This summary is not an extensive overview of the disclosure. It is intended to neither identify key or critical elements of the disclosure nor delineate any scope of the particular implementations of the disclosure or any scope of the claims. Its sole purpose is to present some concepts of the disclosure in a simplified form as a prelude to the more detailed description that is presented later.

[0006] According to one aspect of the disclosure, a digital lithography system is provided. The system includes a stage configured to support a substrate, a bridge disposed above the stage, and a first lithography processing unit coupled to the bridge. In some aspects, the first lithography processing unit coupled to the bridge includes an optical system configured to transmit optical signals to and from the substrate and the first lithography processing unit via the optical system. In some aspects, the first lithography processing unit includes a scanning unit configured to acquire measurements associated with the substrate via the optical system. In some aspects, the lithography exposure unit includes a lithography exposure unit configured to perform a digital lithography exposure of the substrate via the optical system.

[0007] According to one aspect of the disclosure, a digital lithography system is provided. The system includes a stage configured to support a first substrate at a first region and a second substrate at a second region, a bridge disposed above the stage, a first scanning unit coupled to the stage and disposed above the stage at the first region, and a first lithography exposure unit coupled to the stage and disposed above the stage at the second region. In some aspects, the first lithography exposure unit performs a digital lithography exposure of the first substrate disposed at the second region while the first scanning unit generates measurements of the second substrate disposed at the first region.

[0008] According to one aspect of the disclosure, a digital lithography system is provided. The system includes a stage configured to support a substrate, a bridge disposed above the stage, a first scanning unit coupled to the bridge and disposed above the stage at a first region, and a first lithography exposure unit coupled to the bridge and disposed above the stage at a second region. In some aspects, the first scanning unit performs a scan of a first portion of the substrate at a first time when the first portion of the substrate is positioned in the first region, and performs a scan of a second portion of the substrate at a second time when the second portion of the substrate is positioned in the first region. In some aspects, the first lithography exposure unit performs a digital lithography exposure of the first portion of the substrate at the second time when the first portion of the substrate is positioned in the second region based at least in part on the scan of the first portion of the substrate performed at the first time. BRIEF DESCRIPTION OF DRAWINGS

[0009] Aspects and implementations of the present disclosure will be more fully understood from the following detailed description, taken in conjunction with the accompanying drawings, in which:

[0010] FIG. 1A A top-down view of a substrate and corresponding surface features is shown in accordance with some implementations of the present disclosure.

[0011] FIG. 1B A top-down view of a package on a substrate surface is shown in accordance with some implementations of the present disclosure.

[0012] FIG. 1C A top-down view of an integrated module of a package is shown in accordance with some implementations of the present disclosure.

[0013] FIG. 2 A top-down view of a lithographic processing system suitable for performing metrology scans and lithographic exposures in a TTL method is shown in accordance with some implementations of the present disclosure.

[0014] FIG. 3A A combined lithographic cell in accordance with some implementations of the present disclosure is shown.

[0015] FIG. 3B A combined lithographic cell in accordance with some implementations of the present disclosure is shown.

[0016] FIG. 3C A combined lithographic cell in accordance with some implementations of the present disclosure is shown.

[0017] FIG. 4 A top-down view of a lithographic processing system is shown in accordance with some implementations of the present disclosure.

[0018] FIG. 5 A top-down view of a lithographic processing system is shown in accordance with some implementations of the present disclosure. FIG. 4 An example process flow of a substrate through the system of

[0019] FIG. 6 A top-down view of a lithographic processing system is shown in accordance with some implementations of the present disclosure.

[0020] FIG. 7 An example process flow of a substrate through the system of FIG. 6

[0021] FIG. 8 An embodiment of a graphical representation of a computing device associated with a substrate manufacturing system is shown. DETAILED DESCRIPTION

[0022] ​Digital lithography faces several challenges in modern applications. One such challenge is the effect of variations in manufacturing conditions on the substrate and its surface profile (e.g., surface features). For example, each substrate and its corresponding surface features can experience unique manufacturing conditions that introduce unique errors into the substrate surface profile. Such errors can uniquely alter the position and footprint of the substrate surface features from their intended placement and, thus, introduce special errors into the surface profile.

[0023] If the lithography processing system proceeds as originally planned without considering such errors, the created connection paths can be misaligned and, thus, not connected to the intended connection points. As a result, the actual surface profile can deviate from the intended surface profile and create functional defects in the substrate surface profile features, components, and performance. For example, if a component is not properly connected to other components due to misalignment, the operation of the element can be affected.

[0024] A method for handling misalignment between components or substrate surface features is to scan the substrate for any positional errors (before exposure) via a metrology scanning unit and to capture actual surface profile feature data. Using this captured data and a target surface profile template, a computing subsystem can analyze the difference between the actual surface profile and the target surface profile and insert corrections (i.e., update) into the target surface profile exposure template. In this way, the target surface profile exposure template can be corrected and updated based on the captured data to accurately create connections on the altered substrate surface profile.

[0025] Current implementations for generating corrections for substrate surface profiles face several challenges. For example, implementing the correction actions can be slow and computationally expensive. The metrology unit and its placement should be calibrated and the substrate should be thoroughly scanned by the metrology unit. Thereafter, the computer processing to develop the correction template can require valuable computation time. Such time increases if complex machine learning models or similar computer methods are used.

[0026] The increased wait time due to metrology scanning, data processing, development of the correction template, and lithography exposure is used to increase the total processing time, reduce throughput, and occupy valuable computational resources.

[0027] Another obstacle is that the corrected reticle can sometimes perpetuate defects through the effects of offsets introduced between metrology scanning and lithography exposure. For example, when a substrate is placed within a metrology scanning system and data is captured, any offsets or mis-calibrations are "baked" or fixed into the captured data, and thus into the corrected reticle. After the corrected reticle is developed, the substrate can be placed into a separate lithography exposure system to undergo exposure. However, anomalies, offsets, and calibrations of the lithography exposure system can be different from those of the metrology system. Thus, due in part to such system variations, the corrected reticle can already include offset errors even before it is delivered to the exposure system and exposure process. For example, a warped substrate can be clamped (e.g., electrostatically attracted) during metrology scanning, which can flatten the substrate and modify the surface profile of the substrate. The warped substrate can then be moved to a new position and clamped again at the new position for lithography exposure. Clamping the substrate at the new position can cause the surface profile to be modified in a different manner than it was modified when clamped at the first position during metrology scanning. These differences can introduce errors.

[0028] Aspects and embodiments of the present disclosure address these and other shortcomings of the prior art by incorporating strategies that reduce the latency between metrology scanning, surface profile processing, corrected reticle development, and exposure processing. The present disclosure further incorporates strategies for minimizing substrate handling between scanning and lithography exposure and thereby minimizing the introduction of system variation errors.

[0029] In the disclosed digital lithography system, metrology scanning and lithography exposure processing can be accomplished in parallel and / or sequentially via several methods, including a through the lens (TTL) method, a first in first out (FIFO) method, or a scan ahead (SA) method. As will be discussed below, by utilizing these methods, metrology scanning and lithography exposure can be performed on multiple substrates in parallel. Thus, process wait and idle times can be reduced, increasing throughput, maximizing efficiency, and fully utilizing available resources. Furthermore, in some embodiments, errors introduced by additional handling between scanning and lithography exposure can also be reduced or eliminated.

[0030] In implementations, the current system also seeks to reduce the introduction of offset errors from the metrology subsystem by combining the metrology unit and the lithography exposure unit into a unified lithography processing unit. Thus, in some implementations, metrology scans and lithography exposures can be performed on a substrate while the substrate is disposed within a single system. This reduces offset errors that can be introduced when moving the substrate, such as errors introduced by variations between (potentially) separate systems and components. Examples of errors that can be reduced or eliminated include variations from the substrate support mechanism, from the transfer robot calibration, and / or from substrate placement, relative to both systems.

[0031] For the correction process, or template update, in some implementations, the system can employ a computing subsystem to ingest the target exposure template along with metrology scan data of the substrate surface profile, and generate an updated (i.e., corrected) exposure template. Such a system and method will now be described in detail.

[0032] FIG. 1A A top-down view of a substrate and corresponding surface features is shown, in accordance with some implementations of the present disclosure.

[0033] In some implementations, as seen in the substrate surface profile view 102 of FIG. 1A the substrate 100 can include a group of individual packages 110, or integrated modules, on the surface of the substrate 100. In some cases, the packages 110 can be arranged in a grid formation, as seen in FIG. 1A so that a particular package on the substrate can be represented by package 110[i,j], where i and j are integers, and i < I and j < J.

[0034] In some implementations, the substrate 100 can be a rectangular substrate, with the packages formed into the surface according to a grid formation. In other implementations, different arrangements of packages 110 can be used, and / or different substrate shapes can be used, to facilitate scanning, exposure, and / or other processes. Such substrate shapes and / or profiles can be circular, hexagonal, or amorphous, among others. Those of ordinary skill in the art, with the benefit of this disclosure, will be able to design a number of such shapes for substrates, and a number of layout designs for packages mounted on the substrate surface.

[0035] In some implementations, the substrate 100 can be a glass substrate. In some implementations, the substrate 100 can be a wafer (e.g., such as a semiconductor wafer). In some implementations, the substrate 100 is circular, or square, or any other shape suitable for substrate manufacturing.

[0036] In some implementations, the substrate 100 can have a thickness in the range of 0.7-0.5 millimeters, or in the range of 0.6-0.8 millimeters, or in the range of 0.4-1.0 millimeters. In some implementations, the substrate 100 can have a different thickness. In some implementations, the substrate 100 can be warped. In some implementations, the substrate 100 can be pulled flat by a chuck or other substrate support during scanning and / or during lithographic exposure. In some implementations, the arrangement of the packages 110 and / or sub-components of the packages on the substrate 100 can change when the substrate 100 is pulled flat (e.g., the distance between the packages 110 and / or sub-components of the packages and / or the relative positions of the packages 110 and / or sub-components of the packages can change when the substrate is pulled flat).

[0037] In some implementations, the substrate 100 can be made of one or more materials, including borosilicate glass, soda-lime glass, quartz glass, aluminosilicate glass, lead glass, laminated glass, strengthened glass, or any one or more glasses or other materials commonly used in electronic device manufacturing systems.

[0038] In some implementations, the substrate 100 can be made of one or more materials, including silicon, germanium, gallium arsenide (GaAs), silicon dioxide (Si02or silica), indium phosphide (InP), silicon germanium (SiGe), silicon carbide (SiC), gallium nitride (GaN), or any one or more materials commonly used in electronic device manufacturing systems.

[0039] In some implementations, the substrate 100 can be formed of one material. In other implementations, the substrate 100 can be formed of a mixture of materials (e.g., a homogeneous mixture of materials). In other implementations, the substrate 100 can be made of one or more stacked layers of one or more different materials. For example, the substrate 100 can be a silicon on insulator (SOI) wafer, in which a layer of Si02is disposed vertically between two insulating silicon layers.

[0040] FIG. 1B A top-down view 104 of a package 120 on a substrate surface is shown, in accordance with some implementations. In some implementations, the package 120 can be similar or analogous to the packages in the package 110 described previously. Thus, the package 120 can be an example of any of the packages described above in connection with the package 110. FIG. 1A Like the substrate shape, in some implementations, the package 120 can be a rectangular region, but in other implementations, the package 120 can have any other suitable shape commonly used in electronic device manufacturing systems.

[0041] In some embodiments, the package 120 can include integrated modules 130A-D, as seen in view 104. The integrated modules 130A-D can be associated with the package and placed according to an intended surface profile template or package template. The modules 130A-D can be integrated circuit (IC), video displays, or any kind of integrated electrical module commonly used in such or similar electronic component manufacturing processes or combinations of such.

[0042] In some embodiments, the modules 130A-D can be connected by connection paths 135A-D. The connection paths 135A-D can be conductive paths on the surface area 122 of the package and correspond to the paths from the target template and / or modification template of the surface profile of the package.

[0043] In some embodiments, during formation, the connection paths 135A-D can be formed through a deposition process, a digital lithography process, and / or an etching process. For example, in some embodiments, a first layer of photoresist can be deposited onto the surface area (e.g., surface area 122) of the package, or substrate. In some embodiments, the photoresist material can be a positive photoresist material (i.e., where a portion of the photoresist material exposed to actinic light becomes soluble to a photoresist developer) or a negative photoresist material (i.e., where a portion of the photoresist material exposed to actinic light becomes insoluble to a photoresist developer).

[0044] Thus, in some embodiments, such an actinic light source and corresponding mask pattern can correspond to a positive photoresist material and represent a pattern with illumination from the actinic light source (i.e., an electrical connection path). In other embodiments, such a component can correspond to a negative photoresist material and represent a pattern with darkness, or lack of illumination (i.e., an electrical connection path).

[0045] Accordingly, after placement of such a photoresist material, the package and substrate can undergo a photolithographic exposure to precisely remove the photoresist material according to the predefined pattern and create a material surface profile pattern that can form the basis for further creating electrical connection paths between surface components.

[0046] After such a process, the package and corresponding substrate can undergo a material deposition, etching, or any other surface modification process in order to place material (e.g., conductive material) into the paths created by the photolithographic exposure to create complete connection paths between surface modules and components.

[0047] In some embodiments, the connection paths (e.g., connection paths 135A-D) can be formed only partially (through photolithographic exposure or otherwise), and at a later time, processing can return to the substrate to complete the connection paths. In such cases, the photolithographic exposure process can complete or bridge together portions of the connection paths.

[0048] In some embodiments, the material to be placed into the paths is a conductive material (e.g., a metal). For example, the conductive material can be molybdenum. After the specified areas of photoresist material are removed, the now-exposed material can be processed according to the photoresist pattern. For example, the wires can be formed by a material deposition or etching process.

[0049] In some embodiments, the connection paths can be made of any conductive material, including copper, gold, germanium, or any other conductive material commonly used in electronic component manufacturing.

[0050] In some embodiments, the respective locations of the modules 130A, 130B, 130C, 130D on the package 120 are different from intended (e.g., different from the locations indicated in the template). Such location differences should be identified and corrected in order to achieve accurate connection paths between the modules 130A, 130B, 130C, 130D. The embodiments described herein encompass techniques for identifying differences between the planned locations and the actual locations of the modules 130A, 130B, 130C, 130D of the package 120 and techniques for correcting such differences in a manner that minimizes latency, maximizes throughput, and / or minimizes error.

[0051] FIG. 1C A top-down view 106 of an integrated module 140 (also referred to as a chip set) of a package on a substrate is shown, in accordance with some embodiments of the present disclosure. In some embodiments, the integrated module 140 can be similar or analogous to the modules 130A-D, and incorporate at least the embodiments discussed therein. Thus, the module 140 can be any kind of integrated electrical module (as discussed above) that is typically associated with electronic component manufacturing systems.

[0052] The integration module 140 can include a number of connection points 150A-L on a surface area 142 of the integration module. Such connection points can be designed to electrically connect to connection paths or other connection points on the surface area of the package. The displacement profile or offset profile illustrates circles for connection points that did not change between the original target position and the updated target position. The displacement profile or offset profile illustrates arrows indicating the direction and / or magnitude of the shift in position of the connection points between the original target position and the updated target position. Each module or chip group can include different shifts and / or rotations that should be captured and used to calculate updates to the connection points, as shown. This information is used to update lithography exposure plans for making electrical connections between the modules or chip groups. Those of ordinary skill in the art having benefit of the present disclosure will appreciate that such modules can be equipped with more (or less) or any number of differently designed, shaped, placed, and functioning connection points, and the view 106 of the module 140 is exemplary.

[0053] Embodiments discuss various techniques for performing metrology scans and lithography exposure processes in parallel and / or in series, including a through-the-lens (TTL) method, a first-in-first-out (FIFO) method, or a scan-ahead (SA) method. As will be discussed below, by utilizing these methods, metrology scans and / or lithography exposures can be performed on multiple substrates in parallel. Thus, process wait and idle times can be reduced, increasing throughput, maximizing efficiency, and fully utilizing available resources. Furthermore, in some embodiments, errors introduced by additional handling between scans and lithography exposures can also be reduced or eliminated.

[0054] FIG. 2 A top-down view of a lithography processing system suitable for performing metrology scans and lithography exposures in accordance with some embodiments of the present disclosure is shown.

[0055] As shown, the digital lithography system 200 includes a platform assembly including a base (e.g., a granite base) (not illustrated from the top-down view), a platform 204, and substrates 202A and 202B disposed on the platform 204. The substrates 202A and / or 202B can be similar or analogous to those discussed with respect to FIG. 1A to FIG. 1C The substrates can be glass sheets, wafers, PCBs, or any other type or form of substrate commonly used in electronic component manufacturing systems, as discussed with respect to the substrates discussed above and incorporated by reference in their entirety.

[0056] In some embodiments, the substrate may be attached or fixedly coupled to the platform. In some embodiments, the substrate may be attached or fixedly coupled to the platform via suction points attached to the bottom surface of the substrate. In other embodiments, other attachment methods may be used, including mechanically clamping the substrate, holding the substrate in place via a physical barrier, vacuum adsorption, electrostatic adsorption, or any other method or combination of such common techniques for attaching, fixing, and / or supporting the substrate on the processing platform.

[0057] In some implementations, one, two, or more bridges (e.g., bridges 206A and 206B) may span the Y dimension of platform 204 and may be spaced apart by a vertical distance above the platform components (e.g., in...). FIG. 2 In this embodiment, bridges 206A and 206B are further positioned in the direction outside the page compared to platform 204. In some embodiments, the length of each bridge 206A and 206B can vary between approximately 500 mm and approximately 1000 mm. For example, the length of each bridge 206A and 206B can be approximately 750 mm. In some embodiments, each bridge 206A and / or 206B can be spaced 100 mm apart above the surface of the substrate. In other embodiments, the length of each bridge and the spacing above the substrate surface can differ from the above.

[0058] In some embodiments, bridges 206A and 206B may support one or more lithography processing units (which may include or be incorporated into metrology scanning units, as will be discussed below and further regarding...). FIG. 3A to FIG. 3C (As discussed). In some embodiments, lithography processing units 210A-N and 220A-N may be combined or integrated lithography processing units that combine a metrology scanning unit and a lithography exposure unit capable of scanning and exposing the area beneath the unit. Such integrated units may share a single optical lens, a single vertical axis, and / or a single housing. Such integrated units can operate through a single optical lens, a single vertical axis, and / or a single housing. Therefore, a single optical lens, vertical axis, and housing can support both scanning and exposure capabilities. In alternative embodiments, units 210A-N and / or 220A-N may be a single type of unit, such as a metrology scanning or lithography exposure unit, rather than a combined metrology scanning and lithography exposure unit.

[0059] In some embodiments, photolithography units 210A-N and 220A-N may be mounted on bridges 206A and 206B and placed spaced apart by a distance D in the Y dimension. In some embodiments, the distance D may be between 1 cm and 10 cm. In some embodiments, the distance D may be between 1 cm and 100 cm.

[0060] In some implementations, the processing units 210A-N and 220A-N can be mounted to the bridges 206A and 206B using any common mounting or mechanical fastening techniques, including screws, nuts and bolts, rivets, pins, nails, staples, welding, press-fit, clamping, magnets, or any other commonly used method for mounting lithography processing units in a lithography system.

[0061] Each lithography processing unit 210A-N and 220A-N, regardless of type, can face vertically downward and perform a process through a vertically downward facing lens that is normal to the platform. In this manner, each lithography processing unit 210A-N and 220A-N can orthogonally project a projection area onto the platform 204 and any substrate on the platform, regardless of the type of processing unit (e.g., a combination, metrology scan, or lithography exposure). Each projection area (as seen by each crosshatched square associated with a lithography processing unit 210A-N and 220A-N in FIG. 2) can correspond to a field of view and / or a projection field of the lithography processing unit 210A-N, 220A-N. In some implementations, the projection area can vary from 1 mm x 1 mm to 2 mm x 2 mm. In some implementations, the projection area can vary from 1 mm x 1 mm to 5 mm x 5 mm. FIG. 2

[0062] Each lithography processing unit 210A-N and 220A-N can correspond to a processing area of a substrate or the platform thereunder (e.g., one of 214A-N and 224A-N) such that the platform and corresponding substrate surface area is divided into multiple portions (e.g., equal portions). In some implementations, the processing area can be an equal and equally sized rectangular portion of the substrate surface. In other implementations, the processing area can be any other shape sufficient to facilitate segmented processing, scanning, and exposure of the substrate.

[0063] In some implementations, the processing area can cumulatively span the entire surface of a substrate on the platform and / or multiple substrates on the platform. In other implementations, the processing area can span only a portion of a substrate on the platform.

[0064] In some implementations, a computing subsystem can be used with the actuators to translate the platform in the represented x and y directions and to pass each projection area of each lithography processing unit 210A-N and 220A-N over the corresponding processing area of a substrate or the platform thereunder.

[0065] ​For example, the computing subsystem associated with the lithography processing unit can translate the platform in a manner that the projection area of the lithography processing unit 210A translates over the entire surface area of the processing region 214A of the substrate 202A. This process is repeated for the remaining lithography processing units 210C-N and substrate processing regions 214C-N, and in embodiments, can be performed in parallel.

[0066] In embodiments, the same process can occur in parallel with respect to a second substrate 202B on the platform and its associated processing regions 224A-N and lithography processing units 220A-N (along with their corresponding projection areas).

[0067] In this manner, the translation of the platform, and the translation of the substrate on the platform, can ensure that the projection area of at least one lithography processing unit passes over all of the at least one processing region. In this manner, all of the surface area of the substrate supported by the platform 204 can be processed cumulatively.

[0068] In some embodiments, multiple processing passes or sequences can be performed for multiple similar or different processing steps involving the lithography processing units.

[0069] In some embodiments, the platform 204 can be translated according to a sequence so that each lithography processing unit 210A-N and 220A-N can be taken along a particular scan path and scan the processing region corresponding to the surface of the substrate. Each lithography processing unit (and its projection area) can be taken along a scan path projected onto the substrate, and thus process the processing region or the region between it and an adjacent lithography processing unit.

[0070] In a non-limiting example, the platform 204 can be translated so that the projection area of the lithography processing unit 210A is translated according to the path 212A and completely passes over all of the processing regions 214A (i.e., surface area portions) of the substrate 202A. For example, all of the surface area between the lithography processing unit 210A and the adjacent lithography processing unit 210B can be processed. In some embodiments, the lithography processing units 210A-N follow a rasterized path. Such translation of multiple projection areas can occur in parallel. For example, the projection area of the lithography processing unit 210B can be translated according to the path 212B while the unit 210A is translated along the path 212A. The projection area of the lithography processing unit 210B can completely pass over all of the processing regions 214B of the substrate 202A. Unless otherwise stated, all of the surface area between the lithography processing unit 210B and the next adjacent lithography processing unit (not shown in the figure), and so on, until the projection area of the final lithography processing unit 210N is similarly and in parallel translated according to the path 212N and completely passes over all of the surface area portions 214N of the substrate 202A, and reaches the end of the substrate.B

[0071] In this manner, and in an embodiment of the photolithography system 200, the projection area of ​​each photolithography unit in the photolithography unit can pass through the corresponding portion of the substrate, so that cumulatively and in parallel, the projection areas of the associated photolithography units can pass through the entire surface area of ​​each substrate.

[0072] In some embodiments, substrate 202B may be placed on the same movable platform 204 as substrate 202A and may move in parallel. For example, when platform 204 translates, substrates 202A and 202B move together. Each projection area of ​​photolithography processing units 210A-N may translate over the entire surface area of ​​substrate 202A. Each projection area of ​​photolithography processing units 220A-N may translate over each surface area portion 224A-N of substrate 202B. Thus, the projection area of ​​the associated photolithography processing unit can traverse the entire surface area of ​​both substrates.

[0073] In some embodiments, to avoid a sudden transition from a first processing area to a second processing area adjacent to the first processing area (attached to the same or a different bridge), the photolithography processing unit corresponding to the first processing area may encroach into the second processing area. Similarly, the exposure unit corresponding to the second processing area may encroach into the first processing area. For example, photolithography processing unit 210B may encroach into processing areas 214A and / or 214C (not shown), and exposure unit 220B may encroach into processing areas 224A and / or 224C. Thus, different photolithography processing units 210A-N may have overlapping processing areas.

[0074] In some embodiments, platform 204 can perform a zigzag translation to translate the projection area from each lithography unit onto the substrate in a zigzag motion over the corresponding surface area of ​​the substrate. For example, platform 204 can begin the scanning process by translating in the negative X direction according to the first starting arrows of scan paths 212A-N and 222A-N until the projection area of ​​each lithography unit reaches the end of the substrate. Subsequently, the platform can translate slightly in the Y direction, thereby driving the lithography unit projection area in the negative Y direction according to the second arrows in scan paths 212A-N and 222A-N. The platform can continue to move in this manner until each projection area of ​​the lithography unit has completed its associated scan path across the associated surface area. Thus, as... FIG. 2 The scanning paths seen in the program can scan the entire surface of substrates 202A and 202B in parallel and in a zigzag pattern.

[0075] In some implementations, the scan path may follow a different route. In a single instance, in some implementations, the scan path 212A may translate around the outside of the processing area 214A in a shortened concentric path until it reaches the center, having concentrically scanned all processing areas 214A.

[0076] In other implementations, the scan path can be... FIG. 2 The illustrated implementation is orthogonal in a zigzag pattern. For example, the platform may first move in the negative Y direction until the path reaches the end of the substrate. Then, the platform may move slightly in the positive X direction. Afterward, the platform may move entirely in the positive Y direction until the end of the substrate, and so on. Those skilled in the art who benefit from this disclosure will be able to design any number of scan paths, said isotropic scan paths, to correspond with... FIG. 2 The two methods shown operate differently, but the goal of processing the entire surface area of ​​each substrate is achieved by having the projection area of ​​the photolithography unit pass through the entire substrate surface area at least once.

[0077] In some implementations, more (or fewer) lithography units can be used along each bridge, thereby effectively shortening (or lengthening) the distance D between adjacent lithography units. In some implementations, this can reduce (or increase) the surface area that each corresponding projection area of ​​each lithography unit traverses. This can thereby shorten (or lengthen) the time it takes for the lithography system to traverse the entire surface area of ​​each substrate.

[0078] In other embodiments, more than (or in some cases less than) two substrates may be input into the system.

[0079] In some embodiments, the platform and bridges may be extended in the Y direction to accommodate more substrates and / or more lithography processing units for parallel processing of additional substrates. In some embodiments, the platform may be extended, and additional bridges and lithography processing units may be added in the X direction. Therefore, various configurations can be applied to lithography systems to incorporate more (or fewer) substrates and process them in parallel. Those skilled in the art who benefit from this disclosure will be able to design lithography systems that process more than two or any number of substrates of any size in parallel according to the methods described above.

[0080] As discussed above, in some embodiments, the photolithography unit may be a combination of photolithography units (e.g., regarding...). FIG. 3A to FIG. 3C (As discussed further), the photolithography processing unit is incorporated into the metrology scanning and photolithography exposure section.

[0081] In this embodiment, this can facilitate substrate processing. For example, a first substrate may be placed on a platform (e.g., the portion of the platform occupied by substrate 202A or substrate 202B). The platform may then be translated according to a first sequence (e.g., causing the projection area to travel along scan paths 212A-N and 222A-N), causing the combined lithography processing units to capture data reflecting the entire surface profile of the substrate. A computational subsystem may then identify any errors and deviations within the data reflecting the difference between the surface profile and the desired substrate surface profile (e.g., based on a substrate surface profile template or a substrate surface profile exposure pattern). The computational subsystem may then determine a correction update for the desired surface profile and apply the update to the desired surface profile template (e.g., the desired exposure pattern) to correctly form connections and patterns. In this way, the lithography processing system can overcome any actual errors and offsets within the surface profile of the substrate. The processing system may then perform a second translation according to a second sequence and lithographically expose the surface profile of the substrate according to the corrected and updated template (or updated exposure pattern). In this embodiment, the substrate remains fixed in the same area of ​​the platform during scanning and photolithography exposure, and does not move between scanning and photolithography exposure. This eliminates any errors that might be introduced when moving the substrate between scanning and photolithography exposure.

[0082] By combining the photolithography and metrology scanning sections within a single processing unit, the unit can be calibrated once to achieve two different calibration processes.

[0083] Furthermore, the photolithography system can perform metrological scanning and exposure without moving the substrate. This can be used to limit the errors and offsets that can be introduced when the substrate moves from one processing area to the next.

[0084] In some implementations, regarding FIG. 2 The described process can be applied in parallel to the platform and lithography unit, which are designed to support and process two, four, or any more substrates.

[0085] In some embodiments, the photolithography system may have separate photolithography exposure units and metrology scanning units. Examples of this embodiment are shown in... FIG. 4 The diagram is shown in the image. In some implementations, the metering scanning unit can be separated by attaching it to different bridges. For example, in... FIG. 2 In the implementation shown, bridge 206A can hold the scanning unit and bridge 206B can hold the exposure unit (in some cases, this may be reversed).

[0086] In this configuration, metrological scanning and photolithography exposure can be performed in stages, wherein the untreated substrate is first placed in the metrological scanning section of the processing unit (e.g., where regarding FIG. 2The portion where substrate 202A is placed. After the system has translated and scanned the surface contour of the substrate, the substrate can be physically removed and placed at the next location on the platform for photolithography exposure (e.g., where substrate 202B is relative to the portion where substrate 202A is placed). FIG. 2 In the placement section, while the substrate is undergoing photolithography exposure, another substrate placed at the first position can undergo scanning in parallel with the first substrate undergoing photolithography exposure. In some embodiments, the two substrates can be fixed to the same platform and can move together for parallel processing.

[0087] In some implementations, as the substrate moves, corrections to the substrate determined based on data captured during scanning can be applied to the exposure template.

[0088] In some implementations, the above process can be performed on multiple substrates, such that during the metrological scanning of the substrate, the previously scanned substrate is photolithographically exposed. The substrate can then be removed, with the scanned substrate moved to the photolithographic exposure portion of the platform. A new, unprocessed substrate can then be placed on the metrological scanning portion of the platform. In this way, processing can be performed in parallel, and throughput can be increased.

[0089] In some implementations, more than two substrates can be processed simultaneously. For example, the metering scanning section of the platform can hold two, three, or any number of substrates that can be scanned in parallel, and then the two, three, or any number of scanned substrates can be moved to the photolithography exposure section of the platform (which can also support multiple substrates for simultaneous processing). In this way, multiple substrates (any number greater than one) can be exposed and scanned in parallel.

[0090] In some embodiments, the photolithography system may have a separate photolithography exposure unit and a metrology scanning unit, placed on the same bridge and offset by a small distance. Examples of this embodiment are shown in... FIG. 6 Chinese illustration. For example, regarding FIG. 2 In the implementation shown, the scanning unit and the exposure unit can be attached to the same bridge 206A, wherein the exposure unit is linearly configured relative to the Y-axis (e.g., all exposure units can be attached to the right side of bridge 206A), and the scanning unit can also be linearly configured relative to the Y-axis, but can be offset from the exposure unit (e.g., all scanning units can be attached to the left side of bridge 206A).

[0091] This offset can be used to give the scanning unit time to scan during translation and to give the computing subsystem time to process corrections before the exposure unit exposes the substrate surface. In this embodiment, the platform can translate only once. Exposure can occur during a single translation, scanning, and correction process. For example, while the scanning unit acquires measurement data, the computing subsystem can determine the offset and update the target template for the surface profile. When this happens, the exposure unit can expose the portion of the substrate that has already been traversed. Therefore, all processes can be completed in the same translation sequence.

[0092] FIG. 3A A combination of photolithography units 300 according to some embodiments of the present disclosure is shown. The combined photolithography units 300 (see in...) FIG. 2 The 210A-N and 220A-N in the model include a photolithography exposure section 300A, a metrology scanning section 300B, a focusing section 300C, and a calibration section including a bright field light source 304 and a calibration unit 308.

[0093] In some embodiments, the combined photolithography unit 300 includes an image sensor 314 for generating an image of the substrate. The image sensor 314 may be associated with a brightfield (BF) microscope or a darkfield (DF) microscope.

[0094] In some embodiments, the photolithography exposure section 300A may include a photochemical light source 302 and a spatial light modulator 310. The photochemical light source 302 may be any type of photochemical light source capable of inducing a photochemical reaction (e.g., ultraviolet (UV) or visible light source). The photochemical light source 302 may be, for example, a mercury vapor lamp, a fluorescent lamp, a metal halide lamp, a light-emitting diode (LED), a laser, or any other type of lamp, bulb, diode, or other photochemical light sources commonly used in the manufacture of electronic components.

[0095] According to some implementations, the spatial light modulator (SLM) 310 can be any type of digital micromirror device (DMD) (e.g., a DMD device utilizing deformable micromirrors, actuated micromirrors, etc.), liquid crystal (LC) SLM, optical phase array, or any other type of SLM commonly used in the manufacture of electronic components.

[0096] As in FIG. 3AAs seen, the photolithography exposure section 300A can be combined with other parts of the unit via a beam splitter 306. In some embodiments, the beam splitter is a polarization beam splitter. A bright-field light source 304 and a photochemical light source 302 can guide light to the beam splitter 306. Light from the photochemical light source 302 can be reflected from the beam splitter 306 to the spatial light modulator 310. In one embodiment, light from the bright-field light source 304 can pass through the beam splitter 306 to reach the spatial light modulator 310. In another embodiment, at least some light from the bright-field light source 304 is reflected from the beam splitter 306 toward the calibration unit 308.

[0097] As in FIG. 3A As seen in the disclosure, the photolithography exposure section 300A may include a photoluminescence light source 302 and a spatial light modulator 310. However, those skilled in the art who benefit from this disclosure will be able to design a photolithography exposure section including more (or fewer) components to accomplish a similar task to that disclosed.

[0098] In some embodiments, the scanning section 300B may include an image sensor 314. In some embodiments, this image sensor may be a complementary metal-oxide-semiconductor (CMOS) sensor, including the Seiwa BG160M integrated camera, the GigE BG series integrated camera, the Toshiba BG160MCF integrated camera, or the Seiwa BG505LMCG / LMCF, or any other CMOS-style integrated camera commonly used in electronic component manufacturing and imaging systems. In some embodiments, one or more sensing elements may be any of different types of sensors, including charge-coupled device (CCD) sensors, active pixel sensors, infrared (IR) sensors (including multispectral and hyperspectral sensors), LiDAR sensors, or any other type of imaging sensor commonly used in electronic component manufacturing and imaging systems.

[0099] In some embodiments, the focusing portion 300C may include a reduction optics (e.g., reduction optics 312), one or more autofocus elements (e.g., autofocus element 316), and one or more dark rings (e.g., dark ring 318).

[0100] In some embodiments, reducing optics may be used to reduce the size of the projected and received image pattern. In some embodiments, the reducing optics used may employ various lenses, including compound lenses, lens assemblies, and / or optical groups.

[0101] In some embodiments, the reducing optics may include one or more lenses having high resolution and a fixed focal length. In some embodiments, the lens may be intended for machine vision. In some embodiments, the lens may be a machine vision lens, such as a Seiwa STV-3518-T3, or other similar lenses, or any other similar lens of any kind or brand commonly used in electronic manufacturing systems and imaging systems.

[0102] In some implementations, autofocus (AF) 316 is included. Autofocus 316 can be used to automatically focus projected and received images in order to increase image sharpness.

[0103] In some embodiments, the focusing portion 300C may include a dark field ring 318. In some embodiments, the dark field ring 318 may be selectively engaged during system operation. In some embodiments, the dark field ring 318 may be external to the cell and may be any type of dark field ring commonly used in electronic component manufacturing systems, or dark field microscopy systems, or both.

[0104] As in FIG. 3A As seen in some embodiments, the scanning and exposure portions may share the same focusing portion 300C to scan or expose the substrate (e.g., substrate 320). In this way, the calibration of the focusing portion can be performed once to affect both the exposure portion 300A and the scanning portion 300B.

[0105] In some embodiments, the scanning portion 300B and the exposure portion 300A may share a common vertical axis. In other embodiments, the scanning portion 300B and the exposure portion 300A may have varying axes. In some embodiments, the scanning portion 300B and the exposure portion 300A may be located in separate units, and the photolithography exposure unit 300 may consist of two units.

[0106] According to some implementations, calibration can be performed via calibration unit 308 and bright field light source 304. Bright field light source 304 can be any suitable light source.

[0107] In some embodiments, during the scanning phase, the combining unit 300 may engage only the scanning portion of the unit. In some embodiments, during the exposure phase, the combining unit 300 may engage only the exposure portion 300A of the unit.

[0108] In some embodiments, when the scanning portions are engaged, the image sensor 314 can acquire image (e.g., scan) data from the substrate 320. Illumination light from the bright-field light source 304 can be transmitted unmodified through the exposure portions. The illumination light can pass through the reduction optics 312, the autofocus 316, and the dark-field ring 318 to reach the substrate 320. The light illuminating the substrate can pass through the autofocus, be reflected back through the reduction optics, and deliver surface data to the image sensor 314. In some embodiments, the reduction optics 312 may include a beam splitter (not shown) to guide the reflected illumination light to the image sensor 314. In this way, surface data can be acquired from the substrate using bright-field illumination.

[0109] In some embodiments, instead of using a bright field light source, a dark field ring 318 may provide illumination light to the substrate 320. The illumination light from the dark field ring can illuminate the substrate. In a manner similar to that described above, the illumination light can be reflected from the substrate and directed to the image sensor 314. In this way, surface data can be captured from the substrate using dark field illumination.

[0110] When the exposure portion is applied, the photosensitive light from the photosensitive light source 302 can be reflected to the SLM 310 via the beam splitter 306. The SLM 310 can apply a target (e.g., desired) template onto the photosensitive light source, such that the photosensitive light includes the exposure pattern or template. The photosensitive light can continue to pass through the reduction optics 312, the autofocus 316, and the dark ring 318 to illuminate the substrate 320. In this way, a target exposure template can be applied to the substrate using the photosensitive light source.

[0111] FIG. 3B A combined photolithography unit 330 according to some embodiments of the present disclosure is shown. The combined photolithography unit 330 (see...) FIG. 2 The 210A-N and 220A-N in the model include a photolithography exposure section 330A, a metrology scanning section 330B, a focusing section 330C, and a calibration section including a bright field light source 334 and a calibration unit 338.

[0112] In some embodiments, the combined photolithography unit 330 includes an image sensor 344 for generating an image of the substrate. The image sensor 344 may be associated with a bright-field (BF) microscope or a dark-field (DF) microscope.

[0113] In some embodiments, the photolithography exposure section 330A may include a photochemical light source 332 and a spatial light modulator 340. The photochemical light source 332 may be any type of photochemical light source capable of inducing a photochemical reaction (e.g., UV or visible light source). In some embodiments, the photochemical light source 332 may be or include... FIG. 3AThe photochemical light source 302 described herein includes any of the components and / or methods, and at least incorporates and / or enhances the embodiments described herein.

[0114] According to some embodiments, the spatial light modulator (SLM) 340 can be any type of digital micromirror device (DMD) (e.g., a DMD device utilizing deformable micromirrors, actuated micromirrors, etc.). In some embodiments, the SLM 340 may be fitted with or include information about... FIG. 3A Any of the components and / or methods described in SLM 310, and at least incorporating and / or enhancing the embodiments described therein.

[0115] As in FIG. 3B As seen, the photolithography exposure section 330A can be combined with other parts of the unit via beamsplitter 336. In some embodiments, beamsplitter 336 is a polarization beamsplitter. Bright-field light source 334 and photochemical light source 332 can guide light to beamsplitter 336. Light from photochemical light source 332 can be reflected from beamsplitter 336 to spatial light modulator 340. In one embodiment, light from bright-field light source 334 can pass through beamsplitter 336 to reach spatial light modulator 340. In another embodiment, at least some light from bright-field light source 334 is reflected from beamsplitter 336 toward calibration unit 338.

[0116] As in FIG. 3B As seen in the disclosure, the photolithography exposure section 330A may include a photoluminescence light source 332 and a spatial light modulator 340. However, those skilled in the art who benefit from this disclosure will be able to design a photolithography exposure section including more (or fewer) components to accomplish a similar task to that disclosed.

[0117] In some embodiments, the scanning section 330B may include an image sensor 344. In some embodiments, this image sensor may be any CMOS-style integrated camera commonly used in electronic component manufacturing and imaging systems. In some embodiments, one or more sensing elements may be any other type of imaging sensor commonly used in electronic component manufacturing and imaging systems. In some embodiments, the image sensor 344 may be related to or include... FIG. 3A The image sensor 314 described herein is any of the components and / or methods described herein, and at least incorporates and / or enhances the embodiments described herein.

[0118] In some embodiments, the scanning section 330B may include an auxiliary bright-field light source 354 and a corresponding beam splitter 352. The beam splitter 352 may be a polarization beam splitter. The beam splitter 352 may guide light from the bright-field light source 354 to the reduction optics 342. In some embodiments, light from the reduction optics 342 may pass through the beam splitter 352 to reach the image sensor 344.

[0119] In some embodiments, the combined lithography unit 330 may include two bright-field sources, one preceding and affected by the SLM, and one unaffected by the SLM. In some embodiments, this can be used to introduce less noise into the projected image.

[0120] In some embodiments, the focusing portion 330C may include a reduction optics (e.g., reduction optics 342), an autofocus element (e.g., autofocus element 346), and a dark ring (e.g., dark ring 348). In some embodiments, FIG. 3B The miniaturized optics, autofocus, and dark-field ring can be related to... FIG. 3A The miniaturized optics, autofocus, and dark-field rings are positioned in a manner similar to those described herein, and at least incorporate and / or enhance the embodiments described herein. In some embodiments, FIG. 3B The miniaturized optics, autofocus, and dark-field ring may include or may be related to... FIG. 3A The miniaturized optics, autofocus, and dark field rings described herein are similar components, and at least incorporate and / or enhance the embodiments described herein.

[0121] Regarding FIG. 3A The content disclosed is similar to that in some implementation methods. FIG. 3B The scanning and exposure portions can share the same focusing portion to scan or expose the substrate (e.g., substrate 350). In this way, the calibration of the focusing portion may only need to be performed once to affect both the exposure portion 330A and the scanning portion 330B.

[0122] In some embodiments, the scanning portion 330B and the exposure portion 330A may share a common vertical axis. In other embodiments, the scanning portion 330B and the exposure portion 330A may have varying axes. In some embodiments, the scanning portion 330B and the exposure portion 330A may be located in separate units, and the photolithography exposure unit 300 may consist of two units.

[0123] According to some implementations, calibration can be performed via calibration unit 338 and bright field light source 334. Bright field light source 334 can be any suitable light source.

[0124] In some embodiments, during the scanning phase, the combining unit 330 may engage only the scanning portion of the unit. In some embodiments, during the exposure phase, the combining unit 330 may engage only the exposure portion of the unit.

[0125] In some implementations, when the scanning portions are engaged, the image sensor 344 can capture image (e.g., surface) data from the substrate 350. Illumination light from the bright field light source 334, the bright field light source 354, or a combination of both can be used.

[0126] In some embodiments, illumination light from bright-field light source 334 can be transmitted unimpeded through the exposure portion. The illumination light can then pass through reduction optics 342, autofocus 346, and dark-field ring 348 to reach substrate 350. Light illuminating the substrate can pass through autofocus, through reduction optics, through beam splitter 352, and be reflected back, delivering surface data to image sensor 344. In some embodiments, reduction optics 342 may include a beam splitter (not shown) to guide the reflected illumination light to image sensor 344. In this way, surface data can be captured from the substrate using bright-field illumination.

[0127] In some embodiments, illumination light from bright-field light source 354 can be directed to reduction optics 342 via beam splitter 352. This light can then pass through reduction optics 342, autofocus 346, and dark-field ring 348 to reach substrate 350. Light illuminating the substrate can be reflected back through autofocus, reduction optics, and beam splitter 352, delivering surface data to image sensor 344. In some embodiments, reduction optics 342 may include a beam splitter (not shown) to direct the reflected illumination light to image sensor 344. In this manner, surface data can be captured from the substrate using bright-field illumination.

[0128] In some embodiments, instead of using a bright field light source, a dark field ring 348 may provide illumination light to the substrate 350. The illumination light from the dark field ring can illuminate the substrate. In a manner similar to that described above, the illumination light can be reflected from the substrate and directed to the image sensor 344. In this way, surface data can be captured from the substrate using dark field illumination.

[0129] When the exposure portion is applied, the photochemical light from the photochemical light source 332 can be reflected to the SLM 340 via the beam splitter 336. The SLM 340 can apply a target (e.g., desired) template to the photochemical light source, such that the photochemical light includes the exposure pattern or template. The photochemical light can continue to pass through the reduction optics 342, the autofocus 346, and the dark ring 348 to illuminate the substrate 350. In this way, the target exposure template can be applied to the substrate.

[0130] FIG. 3C A combined photolithography unit 360 according to some embodiments of the present disclosure is shown. The combined photolithography unit 360 (referenced in...) FIG. 2 The 210A-N and 220A-N in the model include a photolithography exposure section 360A, a metrology scanning section 360B, a focusing section 360C, and a calibration section including a bright field light source 364 and a calibration unit 368.

[0131] In some embodiments, the combined photolithography unit 360 includes an image sensor 374 for generating an image of the substrate. The image sensor 374 may be associated with a bright-field (BF) microscope or a dark-field (DF) microscope.

[0132] In some embodiments, the photolithography exposure section 360A may include a photochemical light source 362 and a spatial light modulator 370. The photochemical light source 362 may be any type of photochemical light source capable of inducing a photochemical reaction (e.g., UV or visible light source). In some embodiments, the photochemical light source 362 may be or include... FIG. 3A The photochemical light source 302 described herein includes any of the components and / or methods, and at least incorporates and / or enhances the embodiments described herein.

[0133] According to some embodiments, the spatial light modulator (SLM) 370 can be any type of digital micromirror device (DMD) (e.g., a DMD device utilizing deformable micromirrors, actuated micromirrors, etc.). In some embodiments, the SLM 370 may be fitted with or include information about... FIG. 3A Any of the components and / or methods described in SLM 310, and at least incorporating and / or enhancing the embodiments described therein.

[0134] As in FIG. 3C As seen, the photolithography exposure section 360A can be combined with other parts of the unit via beamsplitter 366. In some embodiments, beamsplitter 366 is a polarization beamsplitter. Bright-field light source 364 and photochemical light source 362 can guide light to beamsplitter 366. Light from photochemical light source 362 can be reflected from beamsplitter 366 to spatial light modulator 370. In one embodiment, light from bright-field light source 364 can pass through beamsplitter 366 to reach spatial light modulator 370. In another embodiment, at least some light from bright-field light source 364 is reflected from beamsplitter 366 toward calibration unit 368.

[0135] As in FIG. 3C As seen in the disclosure, the photolithography exposure section 360A may include a photoluminescence light source 362 and a spatial light modulator 370. However, those skilled in the art who benefit from this disclosure will be able to design a photolithography exposure section including more (or fewer) components to accomplish a similar task to that disclosed.

[0136] In some embodiments, the scanning portion 360B may include an image sensor 374. In some embodiments, this image sensor may be any CMOS-style integrated camera commonly used in electronic component manufacturing and imaging systems. In some embodiments, one or more sensing elements may be any other type of imaging sensor commonly used in electronic component manufacturing and imaging systems. In some embodiments, the image sensor 374 may be related to or include...FIG. 3A The image sensor 314 described herein is any of the components and / or methods described herein, and at least incorporates and / or enhances the embodiments described herein.

[0137] In some embodiments, the scanning section 360B may include an auxiliary bright-field source 384 and a corresponding beam splitter 382. In some embodiments, the auxiliary bright-field source 384 and the corresponding beam splitter 382 may function in a similar manner and include features related to... FIG. 3B The description describes similar components and incorporates at least the embodiments described herein with enhancement. Beam splitter 382 may be a polarization beam splitter. Beam splitter 382 can guide light from bright field light source 384 to reduction optics 372. In some embodiments, light from reduction optics 372 can pass through beam splitter 382 to reach image sensor 374.

[0138] In some embodiments, the scanning section 360B may include an internal dark field light source 386 and a corresponding dark field stop 388 and beam splitter 390, a light source 384 and a corresponding beam splitter 382. In some embodiments, the dark field stop 388 may be any type of conventional dark field stop. In some embodiments, the dark field stop may be a circle of opaque material capable of blocking the center of illumination light emitted from the dark field light source 386. In some embodiments, the beam splitter 390 may be a polarizing beam splitter. The beam splitter 390 may guide light from the dark field light source 386 to the reducing optics 372. In some embodiments, light from the reducing optics 372 may pass through the beam splitter 390.

[0139] In some implementations, this internally generated dark-field image can be used to introduce less noise into the projected image. In some implementations, the combined lithography unit 330 may include two bright-field sources, one preceding and affected by the SLM, and one unaffected by the SLM. In some implementations, this can be used to introduce less noise into the projected image.

[0140] In some embodiments, the focusing portion 360C may include a reducing optics (e.g., reducing optics 372) and an autofocusing element (e.g., autofocusing element 376). In some embodiments, FIG. 3C Miniaturized optics and autofocus can be used with... FIG. 3A The miniaturized optics and autofocus are positioned in a manner similar to those described herein, and at least incorporate and / or enhance the embodiments described herein. In some embodiments, FIG. 3C The miniaturized optical devices and autofocusing may include or may be related to... FIG. 3A The miniaturized optics and autofocus components described herein are similar to those described, and at least incorporate and / or enhance the embodiments described herein.

[0141] Regarding FIG. 3A The content disclosed is similar to that in some implementation methods. FIG. 3C The scanning and exposure sections can share the same focusing section 300C to scan or expose the substrate (e.g., substrate 380). In this way, the calibration of the focusing section may only need to be performed once to affect both the exposure section 360A and the scanning section 360B.

[0142] In some embodiments, the scanning portion 360B and the exposure portion 360A may share a common vertical axis. In other embodiments, the scanning portion 360B and the exposure portion 360A may have varying axes. In some embodiments, the scanning portion 360B and the exposure portion 360A may be located in separate units, and the photolithography exposure unit 360 may consist of two units.

[0143] According to some implementations, calibration can be performed via calibration unit 368 and bright field light source 364. Bright field light source 364 can be any suitable light source.

[0144] In some embodiments, during the scanning phase, the combining unit 360 may engage only the scanning portion of the unit. In some embodiments, during the exposure phase, the combining unit 360 may engage only the exposure portion of the unit. In some embodiments, when the scanning portions are engaged, the image sensor 374 may capture image (e.g., surface) data from the substrate 380. Illumination light from the bright field light source 364, the bright field light source 384, or a combination of both may be used.

[0145] In some embodiments, illumination light from bright-field light source 364 can be transmitted unimpeded through the exposure section. The illumination light can then pass through beamsplitter 390, reducing optics 372, and autofocus 376 to reach substrate 380. Light illuminating the substrate can be reflected back through autofocus, reducing optics, and beamsplitter 382, ​​delivering surface data to image sensor 374. In some embodiments, scanning section 360B may include a beamsplitter (not shown) to guide the reflected illumination light to beamsplitter 382 and image sensor 374. In this manner, surface data can be captured from the substrate using bright-field illumination.

[0146] In some embodiments, illumination light from bright-field light source 384 can be directed to reduction optics 372 via beam splitter 382. This light can then pass through reduction optics 372 and autofocus 376 to reach substrate 380. Light illuminating the substrate can be reflected back through autofocus, reduction optics, and beam splitter 382, ​​delivering surface data to image sensor 374. In some embodiments, scanning portion 360B may include a beam splitter (not shown) to direct reflected illumination light to beam splitter 382 and image sensor 374. In this manner, surface data can be captured from the substrate using bright-field illumination.

[0147] In some embodiments, instead of a bright-field light source, an internal dark-field light source 386 can provide illumination light to the substrate 380. Illumination light from the dark-field light source can pass through a dark-field aperture 388 to generate dark-field illumination light. This light can be reflected by a beam splitter 390, pass through a reduction optics 372 and an autofocus 376, and illuminate the substrate. In a manner similar to that described above, the dark-field illumination light can be reflected from the substrate and directed to the image sensor 374. In this way, surface data can be captured from the substrate using dark-field illumination.

[0148] When the exposure portions are bonded, the photochemical light from the photochemical light source 362 can be reflected by the beam splitter 366 to the SLM 370. The SLM 370 can apply a target (e.g., desired) template to the photochemical light source, such that the photochemical light includes the exposure pattern or template. The photochemical light can continue to pass through the beam splitter 390, the reducing optics 372, and the autofocus 376 to illuminate the substrate 380. In this way, the target exposure template can be applied to the substrate.

[0149] Those skilled in the art will understand that, with the help of this disclosure, multiple such combinations of scanning and exposure units can be conceived. FIG. 3A to FIG. 3C The design can be manipulated into many similar arrangements. For example, a single unit may include any number of internal or external bright field light sources and any number of internal or external dark field light sources. Such lighting components and strategies can be used in any combination to generate surface data from the substrate.

[0150] Now go to FIG. 4 As discussed above, in some embodiments of a photolithography system, the scanning and exposure sections and the system may not be combined, and may have varying axes or different unit systems. In the description of one such embodiment, FIG. 4 A top-down view of a lithography processing system 400 according to some embodiments of the present disclosure is shown.

[0151] In some embodiments, the photolithography system 400 may have separate photolithography exposure units 420A-N and metrology scanning units 410A-N. In some embodiments, the metrology scanning units 410A-N can be separated from the exposure units 420A-N by being attached to different bridges. For example, the scanning units 410A-N may be attached to bridge 406A, while the exposure units 420A-N may be attached to bridge 406B (in some cases, this may be the opposite).

[0152] Although System 400 incorporates elements from System 200 (such as...) FIG. 2 While the differences may not be explicitly stated, such systems may share many similarities. For example, they may incorporate similar styles or implementations of projection areas, one or more similar substrates, processing areas, bridges, platforms, etc. Furthermore, such systems can translate platforms, perform metrological scanning, perform template correction, perform photolithographic exposure, and are typically designed with reference to… FIG. 2 The describer performs these and other functions, or combinations thereof, in a similar manner. This includes, for example, interactions with system 200 (such as those related to...). FIG. 2 The components and functions of system 400 (discussed) may be interpreted as similar or analogous, and at least incorporate and enhance the implementation methods discussed herein, with necessary modifications.

[0153] exist FIG. 4 In one implementation, system 400 can perform metrological scanning and photolithography exposure in a segmented manner. Initially, an untreated substrate (e.g., substrate 402A) can be placed in the metrological scanning portion (e.g., portion 404A) of the processing unit. The system can then translate and scan the surface contour of the substrate (in some embodiments, to correlate with the surface contour of the substrate) through scanning units 410A-N, processing areas 414A-N, and scanning paths 412A-N. FIG. 2 The discussion proceeds in a similar manner, and through similar components as described herein. After scanning, the scan data can be sent to a computational subsystem for correction processing. The computational subsystem acquires this data and generates an updated exposure template. At any time after scanning, the scanned substrate can subsequently be physically removed and placed in the next location on the platform for photolithographic exposure (e.g., portion 404B), and processed similarly through exposure units 420A-N, processing areas 424A-N, and scan paths 422A-N. As previously discussed, this system 400 can be translated, scanned, corrected, exposed, and generally works in conjunction with system 200 (as discussed in the discussion). FIG. 2 (Discussion) Perform the function in a similar or analogous manner, and in this case, at least incorporate the implementation method discussed herein, with the necessary modifications.

[0154] In some embodiments, while one or more first substrates are processed by metrology scanning units 410A-N, one or more second substrates are processed in parallel by photolithography exposure units 420A-N. In these embodiments, the one or more substrates to be scanned and the one or more substrates to undergo photolithography exposure are mounted on the same platform and processed in parallel. By using a single platform, the number of system components can be reduced, thereby reducing system cost. Once one or more first substrates have been scanned by metrology scanning units 410A-N and one or more second substrates have undergone photolithography exposure by photolithography exposure units 420A-N, one or more second substrates can be removed, one or more first substrates can be moved to the positions previously occupied by one or more second substrates, and one or more third substrates that have not yet undergone scanning or photolithography processing can be placed in the positions previously occupied by one or more first substrates. In this way, scanning and photolithography exposure can be performed in parallel at any given time.

[0155] In some embodiments, a substrate transfer mechanism (such as a robot or human operator) can translate and fix the substrate to and from portions 404A and 404B.

[0156] In some embodiments, platform 404 and portions 404A and 404B can move together, such that the first substrate 402A can be processed in parallel with the exposed second substrate 402B (e.g., scanning).

[0157] In some embodiments, such a system can be extended to process more substrates in parallel. For example, in some embodiments, the platform and bridges can be extended in the Y direction to accommodate more substrates and / or more lithography processing units for parallel processing of additional substrates. In some embodiments, the platform can be extended, and further bridges and lithography processing units can be added in the X direction. Thus, various configurations can be applied to lithography processing systems to incorporate more (or fewer) substrates and process them in parallel. Those skilled in the art who benefit from this disclosure will be able to design lithography processing systems that process more than two or any number of substrates of any size in parallel according to the methods described above.

[0158] FIG. 5 The following are examples of implementations of this disclosure: FIG. 4 An example process flow for the substrate of the system.

[0159] In some implementations... FIG. 5 The process 500 can be used FIG. 4 System 400. Therefore, in some embodiments, process 500 may include... FIG. 4 Methods and components similar to or analogous to those of the process and components, and including at least those relating to FIG. 4The components discussed are implementation methods. Similar methods and components may include system 504 (similar to or similar to system 400), metering subsystem 506 (similar to, similar to, or incorporated into the scanning units 410A-N), and correction processing 5.2B (in... FIG. 4 (not marked but described), and / or exposure subsystem 510 (similar to, similar to, or incorporated into the exposure units 420A-N).

[0160] Process 500 may begin with loading and alignment (operation 5.1). In this operation, system 504 may load and align substrate 502A onto a first portion of the platform for processing (e.g., scanning). In some cases, the substrate may be loaded onto the platform (manually, via a robot, etc.). After loading the substrate, operation 5.1 may capture pre-known positions of the substrate while scanning across the substrate surface. In some cases, some or all of these captured positions may subsequently be used as overlap alignment references for subsequent processes (e.g., exposure). If and when the substrate is unloaded and loaded to a new location, these reference positions may be recaptured and analyzed to minimize overlap errors. This process and its variations may be utilized at operations 5.1A and 5.1B.

[0161] After loading and alignment, the system can perform metrology processing 5.2, which may include scanning 5.2A and correction processing 5.2B.

[0162] Scanning 5.2A can be performed by metrology subsystem 506 and may include scanning the surface profile of a substrate (e.g., substrate 502B). In some embodiments, substrate 502B may correspond to substrate 502A after substrate 502A has been loaded and aligned. In some embodiments, the entire surface area of ​​substrate 502B may be scanned before proceeding to the next operation.

[0163] Operation 5.2A can generate measurement results 504A, which represent the characteristics of the surface profile of the substrate and the true position and / or true offset of the components, as previously discussed throughout this disclosure. Such measurement results can be transmitted to a computing subsystem (e.g., computing subsystem 508) for correction processing (operation 5.2B).

[0164] The correction process may include analyzing the collected measurement results 504A and determining corrections (e.g., updates) to the exposure template of the substrate. In one embodiment, determining the correction includes determining one or more changes or offsets to be applied to the template to be used for photolithographic exposure of the substrate. Changes or offsets may be determined to address discrepancies between the planned locations and actual locations of contacts that will become electrical connection endpoints. The correction process may then produce an updated template 504B for the substrate to be exposed.

[0165] In some embodiments, after scanning 5.2A in the scanning section of the platform, the substrate (e.g., substrate 502C) may be collected and transferred via system 504 to the exposure section of the platform. In some embodiments, after scanning is complete, substrate 502C may be substrate 502B. In some embodiments, loading and alignment may be repeated in a manner similar to the function of operation 5.1A (see operation 5.1B).

[0166] In some embodiments, the scanning and exposure portions may correspond to a single platform; in other embodiments, such portions may reside on different platforms. In some embodiments, substrate 502D may be substrate 502C after it has been loaded and aligned into the exposure portion of the platform and system.

[0167] In some implementations, exposure process 5.3 may subsequently expose (as seen in operations 5.3 and 5.3A) the loaded and aligned substrate (e.g., substrate 502D) through exposure subsystem 510 according to an updated template including a revised update (e.g., updated template 504B). In this way, a final substrate 502E can be produced, which includes accurate and robust connection paths and points based on real data retrieved from the metrology subsystem and the revised update of the exposure template.

[0168] In some embodiments, the above process can be performed on multiple substrates, such that during metrological scanning of the substrate, previously scanned substrates are photolithographically exposed. The substrates can then be removed, wherein the scanned substrates are moved to a portion of the platform for photolithographic exposure, and the exposed substrates are transferred to further manufacturing processes (outside the scope of this disclosure). In some embodiments, new, unprocessed substrates can then be placed on a portion of the platform for metrological scanning. In this way, processing can be performed in parallel, and throughput can be increased.

[0169] Now go to FIG. 6 As discussed above, in some embodiments of a photolithography system, the scanning and exposure sections and the system may not be combined, and may have varying axes or different unit systems. In the description of one such embodiment, FIG. 6 A top-down view of a lithography processing system 600 according to some embodiments of the present disclosure is shown.

[0170] In some embodiments, the photolithography system 600 may have separate photolithography exposure units 620A-N and metrology scanning units 610A-N. In some embodiments, the metrology scanning units 610A-N can be separated from the exposure units 620A-N by being attached to different bridges. For example, the scanning units 610A-N may be attached to bridge 606A, while the exposure units 620A-N may be attached to bridge 606B (in some cases, this may be the opposite). In some embodiments, the exposure units 620A-N and the scanning units 610A-N may be attached to a single bridge, while still maintaining the spacing between the different types of units (e.g., D2).

[0171] Although System 600 incorporates features from System 200 and / or 400 (such as...) FIG. 2 and / or FIG. 4 Despite the differences (described), there may be many similarities between systems. For example, such a system may incorporate similar styles or implementations of projection areas, one or more similar substrates, processing areas, bridges, platforms, etc. Furthermore, such a system can translate platforms, perform metrological scanning, perform stencil correction, perform photolithography exposure, and is typically designed with reference to… FIG. 2 and / or FIG. 4 The describer performs these and other functions, or combinations thereof, in a similar manner. This includes, for example, interactions with system 200 (such as those related to...). FIG. 2 and / or FIG. 4 The components and functions of systems 200 and / or 400 (discussed) may be interpreted as similar or analogous, and at least incorporate and enhance the embodiments discussed herein, with necessary modifications.

[0172] As discussed above, scanning units 610A-N can be attached to bridge 606A, while exposure units 620A-N can be attached to bridge 606B (in some embodiments, this may be the reverse). However, in some embodiments, only a single bridge may be used, and the scanning and exposure units can be mounted on either side, or space can be incorporated between the two types of units in other ways, such as D2. For example, in FIG. 6 In variations of the implementation seen, scanning and exposure units may be attached to the same bridge (e.g., 606A or 606B), where the exposure units are linearly configured relative to the y-axis (e.g., all exposure units may be attached to the right side of bridge 606A), and the scanning units may also be linearly configured relative to the y-axis, but may be offset from the exposure units (e.g., all scanning units may be attached to the left side of bridge 606A). This offset (including implementations with one, two, or more bridges) can facilitate processing of a single substrate (e.g., substrate 602) on platform 604 by performing scanning and exposure in close temporal proximity.

[0173] existFIG. 6 In this implementation, system 600 can perform metrological scanning and photolithography exposure in a segmented manner. Initially, an untreated substrate (e.g., substrate 602) can be placed on platform 604 for processing. The system can translate and scan the surface contour of the substrate (in some embodiments, to correlate with...) through scanning units 610A-N, processing areas 614A-N, and scanning paths 612A-N. FIG. 2 The discussion proceeds in a similar manner, and through similar components as described herein. When the platform translates, distance D2 can be used to give the scanning unit time for scanning (e.g., by giving it a "head start"), and when translation occurs, time is given to the computational subsystem to process corrections and update the exposure template before the exposure unit exposes the substrate surface. Thus, exposure units 620A-N can closely (e.g., with distance D2) follow the scanning unit and perform exposure according to the updated template. Therefore, in some embodiments, the platform may translate only once. System 600 can extract data from the surface profile of the substrate to determine offsets and variations, update the target template for the surface profile, and expose the substrate surface—all within a single sequence of platform movement. As previously discussed, such system 600 can translate, scan, correct, expose, and generally perform operations similar to system 200 (as discussed in the discussion of…). FIG. 2 (Discussion) Similar or analogous functions, and in this case, at least the implementation methods discussed herein are incorporated, with necessary modifications.

[0174] In some implementations, the distance D2 and translational velocity system create a time interval between the scanning unit and the subsequent exposure unit, allowing for the passage of a portion of the surface region. During this time interval, the computational subsystem can analyze the already scanned portion, generate a corrective update for that portion of the target exposure template, and transmit the updated template to the exposure unit.

[0175] In some implementations, system 600 may have the advantage of not having to remove or transfer the substrate between scanning and exposure processes, thus limiting the introduction of system variations, offsets, and / or errors.

[0176] In some implementations, after the substrate has been processed, a substrate transfer mechanism (such as a robot or human operator) can remove the substrate from platform 604 and retrieve a new, unprocessed substrate for the system to process.

[0177] In some embodiments, such a system can be extended to process more substrates in parallel. For example, in some embodiments, the platform and bridges can be extended in the Y direction to accommodate more substrates and / or more lithography processing units for parallel processing of additional substrates. In some embodiments, the platform can be extended, and other bridges and lithography processing units can be added in the X direction. Thus, various configurations can be applied to lithography processing systems to incorporate more (or fewer) substrates and process them in parallel. Those skilled in the art who benefit from this disclosure will be able to design lithography processing systems that process more than two or any number of substrates of any size in parallel according to the methods described above.

[0178] FIG. 7 The following are examples of implementations of this disclosure: FIG. 6 An example process flow for the substrate of the system.

[0179] In some implementations... FIG. 7 The process 700 can be used FIG. 6 System 600. Therefore, in some embodiments, process 700 may include... FIG. 6 Methods and components similar to or analogous to those of the process and components, and including at least those relating to FIG. 6 The components discussed are implementation methods. Similar methods and components may include system 704 (similar to or similar to system 400), metering subsystem 706 (similar to, similar to, or incorporated into the scanning units 410A-N), and correction processing 7.2B (in...). FIG. 6 (not marked but described), and / or exposure subsystem 710 (similar to, similar to, or incorporated into the exposure units 620A-N).

[0180] Process 700 may begin with loading and alignment (operation 7.1). In this operation, system 704 can load and align substrate 702A onto a platform for processing (e.g., scanning and exposure). This operation may involve, as per [reference to...] FIG. 5 The methods and strategies described in Operation 5.1 ("Loading and Alignment") are similar, and at least the described implementation methods are incorporated and / or enhanced, with necessary modifications.

[0181] After loading and alignment, the system can perform metrology processing 7.2, which may include scanning 7.2A and correction processing 7.2B.

[0182] Scanning 7.2A can be performed by metrology subsystem 706 and can scan the surface contour of a substrate (e.g., substrate 702B). In some embodiments, substrate 702B may be substrate 702A after substrate 702A has been loaded and aligned.

[0183] Operation 7.2A can generate measurement results 704A, which represent the characteristics of the surface profile of the substrate and the true position and / or true offset of the components, as previously discussed throughout this disclosure. Such measurement results can be transmitted to a computing subsystem (e.g., computing subsystem 708) for correction processing (operation 7.2B).

[0184] The correction process analyzes the collected measurement results 704A and determines necessary corrections (e.g., updates) to the exposure template of the substrate. In one embodiment, determining the correction includes identifying one or more changes or offsets to be applied to the template to be used for photolithographic exposure of the substrate. Changes or offsets may be determined to address discrepancies between the planned and actual locations of the contact points that will become electrical connection endpoints. The correction process can then generate an updated template 704B for the substrate to be exposed.

[0185] Such as about FIG. 6 The discussion suggests that this scanning and correction process can occur simultaneously with exposure because the scanning subsystem can guide the exposure system a certain distance. Therefore, the scanning portion can scan a part or area of ​​the substrate, correction can update the template for that part or area of ​​the substrate, and exposure can relatively quickly expose said part. In this hysteresis method, the exposure unit can "tail" the scanning unit. Therefore, in this embodiment, the correction process can be used only for a part or area of ​​the scanned surface (e.g., a part of the substrate that the metrology subsystem has already scanned between the metrology unit and the exposure unit).

[0186] In some embodiments, exposure processing 7.3 may subsequently expose (as seen in operations 7.3 and 7.3A) a substrate (e.g., substrate 702C) through exposure subsystem 710 according to an updated template including corrections and updates (e.g., updated template 704B). In some embodiments, substrate 702C may be substrate 702B (scanning and processing may be performed simultaneously). In this way, a final substrate 702D can be produced, which includes accurate and robust connection paths and points based on real data already extracted from the metrology subsystem and corrections and updates to the exposure template.

[0187] In some embodiments, the above processes can be performed on multiple substrates via an extended platform. Therefore, any of the processes described above can be applied to one or more substrates. After the substrates have been fully processed, they can be removed and transferred to further manufacturing processes (outside the scope of this disclosure). In some embodiments, new, unprocessed substrates can then be placed onto the platform. In this way, processing can be performed in parallel, and throughput can be increased.

[0188] FIG. 8A schematic representation of an embodiment of a computing device associated with a substrate manufacturing system is shown. In one embodiment, processing device 800 may be part of any computing device associated with any of the figures described above, or any combination thereof. Example processing device 800 may be connected to other processing devices in a LAN, intranet, extranet, and / or the Internet. Processing device 800 may be a personal computer (PC), set-top box (STB), server, network router, switch, or bridge, or any machine capable of executing a set of instructions (continuously or otherwise) that specifies actions to be taken by that device. Furthermore, although only a single example processing device is shown, the term "processing device" should also be considered to include any collection of processing devices (e.g., computers) that independently or jointly execute a set of instructions (or multiple sets of instructions) to perform any one or more methods discussed herein.

[0189] Example processing device 800 may include processor 802 (e.g., CPU), main memory 804 (e.g., read-only memory (ROM), flash memory, dynamic random access memory (DRAM) such as synchronous DRAM (SDRAM)), static memory 806 (e.g., flash memory, static random access memory (SRAM)), and auxiliary memory (e.g., data storage device 818), which communicate with each other via bus 830.

[0190] Processor 802 represents one or more general-purpose processing devices, such as a microprocessor, a central processing unit, or the like. More specifically, processor 802 may be a complex instruction set computing (CISC) microprocessor, a reduced instruction set computing (RISC) microprocessor, a very long instruction word (VLIW) microprocessor, a processor implementing other instruction sets, or a processor implementing a combination of instruction sets. Processor 802 may also be one or more special-purpose processing devices, such as an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), a digital signal processor (DSP), a network processor, or the like. According to one or more aspects of this disclosure, processor 802 may be configured to execute instructions (e.g., instruction 822 may include, at least in...). FIG. 5 and FIG. 7 (The computing subsystem seen in the image).

[0191] The example processing apparatus 800 may further include a network interface device 808 communicatively coupled to a network 820. The example processing apparatus 800 may further include a video display 810 (e.g., a liquid crystal display (LCD), a touchscreen, or a cathode ray tube (CRT)), an alphanumeric input device 812 (e.g., a keyboard), an input control device 814 (e.g., a cursor control device, a touchscreen control device, a mouse), and a signal generation device 816 (e.g., an acoustic speaker).

[0192] Data storage device 818 may include a computer-readable storage medium (or more specifically, a non-transitory computer-readable storage medium) 828 on which one or more sets of executable instructions 822 are stored. According to one or more aspects of this disclosure, the executable instructions 822 may comprise executable instructions.

[0193] The executable instructions 822 may also be, during their execution, stored wholly or at least partially within the main memory 804 and / or the processor 802, which also constitute a computer-readable storage medium. The executable instructions 822 may further be transmitted or received over a network via a network interface device 808.

[0194] Despite FIG. 8 The computer-readable storage medium 828 is illustrated as a single medium. The term "computer-readable storage medium" should be considered to include a single medium or multiple media that store one or more sets of operational instructions (e.g., a centralized or distributed database, and / or associated cache and server). The term "computer-readable storage medium" should also be considered to include any medium capable of storing or encoding a set of instructions for execution by a machine and causing the machine to perform any one or more of the methods described herein. The term "computer-readable storage medium" should therefore be considered to include, but is not limited to, solid-state storage and optical and magnetic media.

[0195] It should be understood that the above description is intended to be illustrative rather than restrictive. Many other embodiments will become apparent to those skilled in the art upon reading and understanding the above description. Although specific examples are described in this disclosure, it will be appreciated that the systems and methods of this disclosure are not limited to the examples described herein, but can be modified using practices within the scope of the appended claims. Therefore, the specification and drawings are considered illustrative rather than restrictive. Consequently, the scope of this disclosure should be determined by referring to the entire scope of the appended claims together with their equivalents.

[0196] The methods, hardware, software, firmware, or code described above can be implemented via instructions or code stored on a machine-accessible, machine-readable, computer-accessible, or computer-readable medium executable by a processing element. "Memory" includes any mechanism that provides (i.e., stores and / or transmits) information in a form readable by a machine, such as a computer or electronic system. For example, "memory" includes random access memory (RAM), such as static RAM (SRAM) or dynamic RAM (DRAM); ROM; magnetic or optical storage media; flash memory devices; electrical storage devices; optical storage devices; acoustic storage devices; and any type of tangible machine-readable medium suitable for storing or transmitting electronic instructions or information in a form readable by a machine (e.g., a computer).

[0197] Throughout this specification, references to "one embodiment" or "an embodiment" mean that a particular feature, structure, or characteristic described in connection with an embodiment is included in at least one embodiment of this disclosure. Therefore, the phrase "in one embodiment" or "in an embodiment" appearing in various places throughout this specification does not necessarily refer to the same embodiment. Furthermore, a particular feature, structure, or characteristic may be combined in any suitable manner in one or more embodiments.

[0198] In the foregoing description, detailed descriptions have been given with reference to specific exemplary embodiments. However, it will be appreciated that various modifications and changes can be made thereto without departing from the broader spirit and scope of this disclosure as set forth in the appended claims. The description and drawings are therefore to be regarded as illustrative rather than restrictive. Furthermore, the foregoing use of the terms "implementation," "implementation," and / or other exemplary language do not necessarily refer to the same implementation or the same instance, but may refer to different and dissimilar implementations, as well as potentially the same implementation.

[0199] The terms “example” or “exemplary” are used herein to mean as an example, instance, or illustration. Any aspect or design described herein as an “example” or “exemplary” is not necessarily to be construed as preferred or advantageous over other aspects or designs. Rather, the use of the terms “example” or “exemplary” is intended to provide a concept in a specific manner. As used in this application, the term “or” is intended to mean an inclusive “or” rather than an exclusive “or.” That is, unless otherwise stated or clear from the context, “X includes A or B” is intended to mean any naturally inclusive arrangement. That is, “X includes A or B” is satisfied in any of the foregoing cases if X includes A; X includes B; or X includes both A and B. Furthermore, the articles “a” and “an” as used in this application and the appended claims should generally be construed as meaning “one or more” unless otherwise stated or clear from the context involving the singular form. Additionally, the use of the terms “an embodiment” or “one implementation” or “one embodiment” throughout the text is not intended to mean the same implementation or implementation unless so described. Furthermore, as used herein, the terms “first,” “second,” “third,” “fourth,” etc., mean markers for distinguishing different elements and do not necessarily have ordinal meanings based on their numerical designations.

[0200] Digital computer programs (also referred to or described as programs, software, software applications, modules, software modules, scripts, or code) can be written in any form of programming language, including compiled or interpreted languages, or declarative or procedural languages; and they can be deployed in any form, including as stand-alone programs or as modules, components, subroutines, or other units suitable for use in a digital computing environment. The basic elements of a digital computer include a central processing unit (CPU) for making or executing instructions and one or more memory devices for storing instructions and digital data. The CPU and memory may be supplemented by, or incorporated into, a dedicated logic circuit system or a quantum simulator. Typically, a digital computer will also include one or more mass storage devices (e.g., magnetic disks, magneto-optical disks, optical disks, or systems suitable for storing information) for storing digital data, or operatively coupled to receive digital data from or transfer digital data to, or both, said mass storage devices. However, a digital computer does not necessarily need to have such devices.

[0201] Digital computer readable media suitable for storing digital computer program instructions and digital data include all forms of non-volatile digital memory, media and memory devices, including, by way of example, semiconductor memory devices, such as EPROM, EEPROM and flash memory devices; magnetic disks, such as internal hard disks or removable disks; magneto-optical disks; CD ROMs and DVD-ROMs.

[0202] Control of the various systems or portions thereof described in this specification can be implemented in a digital computer program product, which includes instructions stored on one or more non-transitory machine-readable storage media and executable on one or more digital processing devices. The systems or portions thereof described in this specification can each be implemented as an apparatus, method, or system, which may include one or more digital processing devices and memory for storing executable instructions to perform the operations described in this specification.

[0203] Although this specification contains many details of specific embodiments, these should not be construed as limiting the scope of the claims, but rather as descriptions of features specific to particular embodiments. Certain features described herein in the context of separate embodiments may also be implemented in combination in a single embodiment. Conversely, individual features described in the context of a single embodiment may also be implemented separately in multiple embodiments or in any suitable sub-combination. Furthermore, although features may be described above as functioning in certain combinations and even initially claimed in this way, in some cases, one or more features from the claimed combination may be removed from said combination, and the claimed combination may be for sub-combinations or variations thereof.

[0204] Similarly, although operations are depicted in a specific order in the accompanying drawings, this should not be construed as requiring such operations to be performed in the specific or sequential order shown, or to perform all shown operations to achieve the desired result. In some cases, multitasking and parallel processing may be advantageous. Furthermore, the separation of the various system modules and components in the embodiments described above should not be construed as requiring such separation in all embodiments, and it should be understood that the described program components and systems can generally be integrated into a single software product or packaged into multiple software products.

[0205] Specific embodiments of the subject matter have been described. Other embodiments fall within the scope of the following claims. For example, the actions described in the claims can be performed in different orders and still achieve the desired result. As an example, the process depicted in the drawings does not necessarily require the specific or sequential order shown to achieve the desired result. In some cases, multitasking and parallel processing can be advantageous.

Claims

1. A digital lithography system, comprising: The platform is configured to support the substrate; A bridge is installed on the platform; and A first photolithography processing unit, coupled to the bridge, comprises: An optical system configured to transmit optical signals to and from the substrate and the first photolithography unit; A scanning unit is configured to acquire measurement results associated with the substrate via the optical system; and The photolithography exposure unit is configured to perform digital photolithography exposure of the substrate via the optical system.

2. The digital lithography system of claim 1, further comprising: The controller is configured as follows: This causes the first photolithography processing unit to capture the measurement results of the substrate at the first moment during the measurement operation; Based on the aforementioned measurement results, corrections and updates to the photolithographic exposure pattern are determined; and This causes the first photolithography processing unit to perform the digital photolithography exposure of the substrate at a second time during the exposure operation, based on the photolithography exposure pattern updated and adjusted by the aforementioned corrections.

3. The digital lithography system of claim 1, further comprising: A plurality of adjacent processing regions spanning the surface contour of the substrate, wherein the first photolithography unit is positioned to operate on a first processing region within the adjacent processing regions; and One or more additional lithography processing units, each of which is positioned to operate on an additional processing region in the adjacent processing region, while the first lithography processing unit operates on the first processing region.

4. The digital lithography system of claim 1, wherein the lithography exposure unit includes a photoluminescence light source and a spatial light modulator, and the scanning unit includes an image sensor.

5. The digital lithography system of claim 1, wherein the first lithography processing unit further comprises a first brightfield light source.

6. The digital lithography system of claim 5, wherein the scanning unit further comprises a second bright-field light source or a dark-field light source.

7. The digital lithography system of claim 5, wherein the scanning unit further comprises a second bright-field light source and a dark-field light source.

8. The digital lithography system of claim 1, wherein the optical system, the scanning unit, and the digital exposure unit transmit and receive optical signals along the common longitudinal axis of the first lithography processing unit.

9. The digital lithography system of claim 1, wherein the optical system comprises a reduction optics configured to reduce an image of a lithographic mask pattern onto the surface of the substrate.

10. The digital lithography system of claim 1, wherein the platform is configured to support the substrate in a first region and further configured to support a second substrate in a second region, the digital lithography system further comprising: The second photolithography processing unit, coupled to the bridge, includes: Second scanning unit; Second photolithography exposure unit; and The second optical system is shared by the second scanning unit and the second photolithography exposure unit; The second scanning unit uses the second optical system to generate measurement results of the second substrate during the measurement operation, and the second photolithography exposure unit uses the second optical system to perform digital photolithography exposure of the second substrate during the exposure operation.

11. The digital lithography system of claim 2, further comprising: A suction cup is used to clamp the substrate to the platform before the measurement operation or the exposure operation, wherein the clamping of the substrate to the platform is not released until after the exposure operation.

12. The digital lithography system of claim 11, wherein the chuck comprises an electrostatic chuck.

13. A digital lithography system, comprising: The platform is configured to support a first substrate in a first region and a second substrate in a second region; A bridge is installed on the platform; A first scanning unit is coupled to the platform and disposed on the platform in the first region; and A first photolithography exposure unit is coupled to the platform and disposed on the platform in the second region; The first photolithography exposure unit performs digital photolithography exposure on the first substrate disposed in the second region, while the first scanning unit generates measurement results on the second substrate disposed in the first region.

14. The digital lithography system of claim 13, further comprising: Controller, used for: This causes the first scanning unit to generate the same measurement result of the second substrate in a first instant; and This causes the first photolithography exposure unit to perform the digital photolithography exposure of the first substrate at the first time.

15. The digital lithography system of claim 14, further comprising: A robot system for moving a first substrate from a second region of the platform, moving a second substrate from the first region of the platform to the second region of the platform, and moving a third substrate to the first region of the platform; The controller is further used for: Based on the aforementioned measurement results, a correction and update of the photolithographic exposure pattern of the second substrate is determined; This causes the first scanning unit to generate the measurement result of the third substrate at a second time. and This causes the first photolithography exposure unit to perform digital photolithography exposure on the second substrate at the second time according to the photolithography exposure pattern updated and adjusted by the aforementioned corrections.

16. The digital lithography system of claim 13, further comprising: A first plurality of adjacent sub-regions, spanning the surface contour of the first region, wherein the first scanning unit is positioned to operate on the first sub-region within the first plurality of adjacent sub-regions; One or more additional scanning units, wherein each of the one or more additional scanning units is positioned to operate on an additional sub-region of the first plurality of adjacent sub-regions, while the first scanning unit operates on the first sub-region. A second plurality of adjacent sub-regions, spanning the surface contour of the second region, wherein the first photolithography exposure unit is positioned to operate on the first sub-region within the second plurality of adjacent sub-regions; and One or more additional lithography exposure units, each of which is positioned to operate on an additional sub-region of the second plurality of adjacent sub-regions, while the first lithography exposure unit operates on the first sub-region of the second plurality of adjacent sub-regions.

17. A digital lithography system, comprising: The platform is configured to support the substrate; A bridge is installed on the platform; A first scanning unit is coupled to the bridge and is disposed in a first region on the platform; and A first photolithography exposure unit is coupled to the bridge and is disposed in the second region above the platform; The first scanning unit performs scanning of the first portion of the substrate when the first portion of the substrate is positioned in the first region at a first time, and performs scanning of the second portion of the substrate when the second portion of the substrate is positioned in the first region at a second time; and The first photolithography exposure unit is at least partially based on performing the scanning of the first portion of the substrate at the first time, and performing digital photolithography exposure of the first portion of the substrate at the second time when the first portion of the substrate is positioned in the second region.

18. The digital lithography system of claim 17, further comprising: A controller is configured to cause the platform to move such that the first portion of the substrate moves from the first region to the second region, wherein the first photolithography exposure unit is offset from the first scanning unit.

19. The digital lithography system of claim 17, further comprising: Controller, used for: This causes the first scanning unit to generate a measurement result of the first portion of the substrate at a first moment; Based on the aforementioned measurement results, a correction and update of the photolithographic exposure pattern for the first portion of the substrate is determined; and This causes the first photolithography exposure unit to perform digital photolithography exposure of the first portion of the substrate at the second time according to the photolithography exposure pattern updated and adjusted by the aforementioned corrections.

20. The digital lithography system of claim 17, further comprising: A first plurality of regions, spanning the surface contour of the substrate, wherein the first region is one of the first plurality of regions; One or more additional scanning units, wherein each of the one or more additional scanning units is positioned to operate on an additional region of the first plurality of regions, while the first scanning unit operates on the first region; A second plurality of regions, spanning the surface contour of the substrate, wherein the second region is one of the second plurality of regions; and One or more additional photolithography exposure units, each of which is positioned to operate on an additional region of the second plurality of regions, while the first photolithography exposure unit operates on the second region.

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