Task allocation method, device and equipment and readable storage medium

Abstract

The invention discloses a task allocation method, device and equipment and a readable storage medium, and the method comprises the steps: obtaining a to-be-processed task from a global task pool, and analyzing a descriptor of the to-be-processed task to obtain priority information and / or dependency information; determining a processing sequence of the to-be-processed tasks by utilizing the priority information and / or the dependency relationship information; obtaining channel load information from a state register for directly accessing the corresponding channel from the memory; and selecting a target channel from the channels by utilizing the channel load information and combining a load balancing strategy, and distributing the to-be-processed tasks to the target channel according to the processing sequence. According to the task allocation method and device, during task allocation, based on at least one of the priority information and the dependency relationship information and the channel load information, load balancing can be dynamically achieved, at least one of the priority and the dependency relationship of the task can be considered, and therefore the reliability of task processing is guaranteed, and the task allocation efficiency is improved. And different task scheduling requirements can be dynamically met.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of computer application, in particular to a task allocation method and device, equipment and readable storage medium. BACKGROUND

[0002] DMA (Direct Memory Access) technology in non-continuous address data handling, usually through chain DMA (such as descriptor chain table) to improve efficiency. But there are problems: static allocation of channel resources: the load distribution of multi-channel DMA depends on the preset rules (such as polling), which cannot dynamically adapt to real-time task changes, resulting in low resource utilization; inefficient list management: the list descriptor is difficult to support intelligent scheduling requirements. It can be seen that the task allocation in DMA lacks flexibility.

[0003] In summary, how to effectively realize flexible allocation of tasks in DMA and other problems are technical problems that need to be solved by the technical personnel in the field at present. SUMMARY

[0004] The purpose of the present application is to provide a task allocation method, device, equipment and readable storage medium, which can flexibly allocate tasks in DMA to meet the intelligent scheduling requirements.

[0005] To solve the above technical problems, the present application provides the following technical solutions:

[0006] A task allocation method comprises:

[0007] Obtaining a to-be-processed task from a global task pool, and parsing a descriptor of the to-be-processed task to obtain priority information and / or dependency relationship information;

[0008] Determining a processing order of the to-be-processed task by using the priority information and / or the dependency relationship information;

[0009] Obtaining channel load information from a state register of a channel corresponding to memory direct access;

[0010] Selecting a target channel from the channels by using the channel load information and combining a load balancing strategy, and allocating the to-be-processed task to the target channel according to the processing order.

[0011] Preferably, before the to-be-processed task is allocated to the target channel according to the processing order, the method further comprises:

[0012] Performing address conflict detection on the to-be-processed task;

[0013] In the case that a first task and a second task with address conflict are detected, reordering the first task or the second task in the processing order.

[0014] Preferably, after assigning the to-be-processed tasks to the target lanes according to the processing order, the method further comprises:

[0015] detecting address conflict of the to-be-processed tasks;

[0016] in case that a first task and a second task with address conflict are detected, judging whether the first task and the second task are assigned to the same lane;

[0017] if not, migrating the first task or the second task to the same lane to avoid executing the first task and the second task in different lanes at the same time.

[0018] Preferably, the detecting address conflict of the to-be-processed tasks comprises:

[0019] obtaining address ranges of the to-be-processed tasks;

[0020] comparing whether the address ranges corresponding to different to-be-processed tasks overlap by using an address range comparator;

[0021] if yes, determining that the different to-be-processed tasks currently compared have address conflict.

[0022] Preferably, the writing the lane load information into the state register comprises:

[0023] obtaining bandwidth occupancy from a bandwidth counter of a current lane and obtaining an amount of unprocessed tasks of the current lane from a queue depth register;

[0024] inputting the bandwidth occupancy and the amount of unprocessed tasks into a load evaluation circuit of the current lane to calculate lane load information;

[0025] writing the lane load information into the state register.

[0026] Preferably, the determining the processing order of the to-be-processed tasks by using the priority information comprises:

[0027] sorting the to-be-processed tasks according to priority from high to low by using the priority information to obtain a priority order;

[0028] determining the processing order as the priority order.

[0029] Preferably, the determining the processing order of the to-be-processed tasks by using the dependency relationship information comprises:

[0030] determining a first task and a second task with dependency relationship from the to-be-processed tasks by using the dependency relationship information;

[0031] determine the processing order according to the precedence order.

[0032] determine the processing order according to the precedence order.

[0033] A task allocation apparatus comprises:

[0034] a task obtaining module configured to obtain a to-be-processed task from a global task pool and parse a descriptor of the to-be-processed task to obtain priority information and / or dependency relationship information;

[0035] a task order determining module configured to determine a processing order of the to-be-processed task by using the priority information and / or the dependency relationship information;

[0036] a channel supervising module configured to obtain channel load information from a state register of a corresponding channel in memory;

[0037] a task allocating module configured to select a target channel from the channels by using the channel load information and in combination with a load balancing strategy, and allocate the to-be-processed task to the target channel according to the processing order.

[0038] An electronic device comprises:

[0039] a memory configured to store a computer program;

[0040] a processor configured to implement the steps of the above task allocation method when executing the computer program.

[0041] A readable storage medium having a computer program stored thereon, the computer program being configured to implement the steps of the above task allocation method when executed by a processor.

[0042] According to the method provided in the embodiments of the present application, a to-be-processed task is obtained from a global task pool, and a descriptor of the to-be-processed task is parsed to obtain priority information and / or dependency relationship information; the processing order of the to-be-processed task is determined by using the priority information and / or the dependency relationship information; channel load information is obtained from a state register of a corresponding channel in memory; a target channel is selected from the channels by using the channel load information and in combination with a load balancing strategy, and the to-be-processed task is allocated to the target channel according to the processing order.

[0043] In the present application, the descriptor of a task can be extended to have at least one of priority information and dependency relationship information. In this way, after obtaining a to-be-processed task from the global task pool, at least one of the priority information and the dependency relationship information can be obtained by parsing the descriptor of the to-be-processed task. Then, based on these information, the processing order of the to-be-processed task can be determined. In the process of task allocation to the channel, the channel load information can be obtained by accessing the state register of the channel. By using the channel load information and combining the load balancing strategy, the target channel can be selected from the channel, and the to-be-processed task can be allocated to the target channel for processing according to the processing order. That is, in the present application, when performing task allocation, based on at least one of the priority information and the dependency relationship information, and the channel load information, not only the load balancing can be dynamically realized, but also at least one of the priority and the dependency relationship of the task can be considered, so as to guarantee the reliability of task processing, and dynamically adapt to different task scheduling requirements.

[0044] Correspondingly, the present application also provides a task allocation device, equipment and readable storage medium corresponding to the above-mentioned task allocation method, which have the above-mentioned technical effects, which will not be repeated here. BRIEF DESCRIPTION OF DRAWINGS

[0045] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the related art, the drawings needed to be used in the embodiments or the related art description will be briefly introduced. Obviously, the drawings in the following description only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained without creative labor on the basis of these drawings.

[0046] Figure 1 The implementation flowchart of a task allocation method in the embodiments of the present application;

[0047] Figure 2 The schematic diagram of address conflict detection in the embodiments of the present application;

[0048] Figure 3 The specific implementation flowchart of a task allocation method in the embodiments of the present application;

[0049] Figure 4 The specific implementation flowchart of another task allocation method in the embodiments of the present application;

[0050] Figure 5 The structure schematic diagram of a task allocation device in the embodiments of the present application;

[0051] Figure 6 The structure schematic diagram of an electronic device in the embodiments of the present application;

[0052] Figure 7 FIG. 1 is a schematic diagram of a specific structure of an electronic device according to an embodiment of the present application. DETAILED DESCRIPTION

[0053] In order to make the personnel in the technical field better understand the present application, the present application will be further described in detail below in combination with the drawings and specific embodiments. Obviously, the described embodiments are only part of the embodiments of the present application, not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative labor are within the scope of protection of the present application.

[0054] Please refer to Figure 1 , Figure 1 FIG. 2 is a flowchart of a task allocation method according to an embodiment of the present application. The method comprises the following steps:

[0055] S101, obtaining a to-be-processed task from a global task pool, and parsing a descriptor of the to-be-processed task to obtain priority information and / or dependency relationship information.

[0056] The task submitted by the user will enter the global task pool. Generally, there will be an arrival order of the task in the global task pool, but in actual application, the user may exist batch submission of tasks, and these tasks need to have a sequence when executed. For example, the processing of real-time tasks is required to be higher in time than the processing of other tasks, that is, it is hoped to be processed faster. For tasks with dependency relationship, such as data writing and reading in the same position, different execution order corresponds to completely different processing results. Therefore, it is also required to clearly process the order to guarantee the reliability of the upper application.

[0057] Based on this, in the present embodiment, the descriptor of the task can be optimized and extended to have at least one of the priority information and the dependency relationship information.

[0058] For example, the descriptor of the task can be extended to increase at least one of a priority field and a dependency relationship field. In this way, after reading the to-be-processed task, at least one of the priority information and the dependency relationship information can be obtained by parsing the descriptor of the to-be-processed task.

[0059] Among them, the number of to-be-processed tasks is related to the current demand of the user, that is, the data amount of to-be-processed tasks at different times can be different, such as 6 at the last moment and 20 at the next moment.

[0060] That is, when the user sends the task, the user can assign values corresponding to the priority or the dependency relationship in the corresponding field in the descriptor according to the processing requirement. For the task without special processing requirement, the values corresponding to the priority and the dependency relationship can not be assigned, that is, the priority is determined as a default priority such as low priority, and the dependency relationship is determined as no dependency relationship with other tasks.

[0061] S102, determining the processing order of the to-be-processed task by using the priority information and / or the dependency relationship information.

[0062] After obtaining at least one of the priority information and the dependency relationship information, the processing order of the to-be-processed task can be determined.

[0063] Specifically, the to-be-processed tasks can be sorted according to the arrival time of the tasks first, and then the tasks whose order in the arrival sorting does not match the priority information and the dependency relationship information are adjusted in order, so as to obtain the processing order of the to-be-processed task.

[0064] In one specific embodiment of the present application, the processing order of the to-be-processed task is determined by using the priority information, including:

[0065] The to-be-processed tasks are sorted according to the priority from high to low by using the priority information, and the priority order is obtained.

[0066] The priority order is determined as the processing order.

[0067] For example, at a certain time, the to-be-processed tasks include task 1 to task 10, and the arrival order of the task 1 to task 10 is: task 1, task 3, task 2, task 4, task 5, task 6, task 9, task 7, task 8, and task 10. If only the priority information of task 4 and task 5 is obtained, the priority information of task 4 is high priority, the priority information of task 5 is low priority, and the tasks without priority information are determined as low priority by default, then the tasks are sorted according to the priority, and the obtained processing order can be: task 4, task 5, task 1, task 3, task 2, task 6, task 9, task 7, task 8, and task 10.

[0068] In one specific embodiment of the present application, the processing order of the to-be-processed task is determined by using the dependency relationship information, including:

[0069] The first task and the second task having the dependency relationship are determined from the to-be-processed task by using the dependency relationship information.

[0070] The order of the first task and the second task is determined according to the dependency relationship.

[0071] The processing order is determined in combination with the order.

[0072] For example, at a certain time, the tasks to be processed include task 1 to task 10, the arrival order of task 1 to task 10 is: task 1, task 3, task 2, task 4, task 5, task 6, task 9, task 7, task 8, task 10, if only the dependency information of task 7 and task 8 is obtained for these tasks, and task 8 depends on task 7, it can be found that the arrival order of the tasks is task 7 first and task 8 second, and thus the finally determined processing order is equivalent to the arrival order of the tasks.

[0073] For example, at a certain time, the tasks to be processed include task 1 to task 10, the arrival order of task 1 to task 10 is: task 1, task 3, task 2, task 4, task 5, task 6, task 9, task 7, task 8, task 10, if only the priority information of task 4 and task 5 is obtained for these tasks, the priority information of task 4 is high priority, the priority information of task 5 is low priority, task 3 and task 2 have dependency information, and task 3 depends on task 2, after adjustment, the obtained processing order is: task 4, task 5, task 1, task 2, task 3, task 6, task 9, task 7, task 8, task 10.

[0074] S103, obtaining the channel load information from the state register corresponding to the channel in the memory.

[0075] In the embodiment, the state register can be set for the channel of the DMA, and the channel load information of the channel of the DMA is stored in the state register.

[0076] In this way, the channel load information can be directly obtained from the state register.

[0077] Periodic polling: read the state register of all channels every 1 ms (millisecond) (or triggered by an interrupt). The data indicators (i.e. channel load information) in the state register include: bandwidth occupancy (current channel transmission rate / maximum bandwidth); queue depth (tail_pointer - head_pointer); waiting delay (the difference between the task submission time and the execution time). Then, a load evaluation model can be used: calculate the weighted total score for each channel: load = 0.5 * bandwidth occupancy + 0.3 * queue depth + 0.2 * delay. For example, the channel with the highest load can be marked as an overloaded channel (e.g. load > 90%). Alternatively, only the load score is recorded in the state register.

[0078] In a specific embodiment of the present application, the channel load information is written to the state register, including:

[0079] obtaining a bandwidth occupation rate from a bandwidth counter of the current channel and obtaining a current unprocessed task amount of the current channel from a queue depth register;

[0080] inputting the bandwidth occupation rate and the unprocessed task amount into a load evaluation circuit of the current channel to calculate channel load information;

[0081] writing the channel load information into a state register.

[0082] Specifically, the bandwidth counter counts the number of transmitted bytes per channel per unit of time (e.g., 1 ms) to calculate the bandwidth occupation rate (bandwidth = transmitted bytes / maximum rate of the channel). The queue depth register records the unprocessed task amount of each channel (tail_ptr - head_ptr).

[0083] The load evaluation circuit calculates the channel load score using a weighted algorithm (e.g., load = 0.5*bandwidth + 0.3*queue depth + 0.2*delay). That is, the channel load information can specifically be the load score.

[0084] In this way, the load score can be obtained by reading the state register.

[0085] S104, using the channel load information and combining a load balancing strategy to select a target channel from the channels, and distributing the to-be-processed tasks to the target channel according to the processing order.

[0086] When distributing tasks, not only the execution order of tasks is considered, but also the load situation of the expired channel is considered, and a target channel for processing tasks is determined in combination with a load balancing strategy. In this way, the to-be-processed tasks can be distributed to the target channel according to the processing order.

[0087] The selection of the target channel can be set according to actual conditions, such as determining an idle channel as the target channel, or determining a channel other than the non-overloaded channel as the target channel. The determined target channel can be one or more than one, such as three.

[0088] Since the processing order of the to-be-processed tasks has been determined and the target channel has been determined, the tasks can be distributed to the target channel according to the processing order based on the load balancing strategy. For example, if there are currently three tasks, task 1, task 2 and task 3, the task processing order is: task 1, task 3 and task 2, and the currently selected target channel is channel 3, then the tasks can be distributed to channel 3 in the order of task 1, task 3 and task 2; if the currently selected target channel is channel 1, channel 2 and channel 3, then task 1 can be distributed to channel 1 first, then task 3 can be distributed to channel 2, and finally task 2 can be distributed to channel 3.

[0089] In the load balancing strategy, the idle channel can be assigned first, and then the channel with the least tasks can be assigned. Alternatively, each task can be assigned to the channel with the least tasks.

[0090] In consideration of the fact that address conflicts will affect the final result of task processing, leading to confusion in the function of the uploaded application, the application also detects conflicts for the tasks to be processed during the task allocation process, thereby optimizing the processing order of the tasks to be processed and ensuring business reliability.

[0091] Specifically, in one specific embodiment of the present application, before assigning the tasks to be processed to the target channel according to the processing order, the method further comprises:

[0092] detecting address conflicts for the tasks to be processed;

[0093] In the case where a first task and a second task with address conflicts are detected, reordering the first task or the second task in the processing order.

[0094] In one specific embodiment of the present application, after assigning the tasks to be processed to the target channel according to the processing order, the method further comprises:

[0095] detecting address conflicts for the tasks to be processed;

[0096] In the case where a first task and a second task with address conflicts are detected, determining whether the first task and the second task are assigned to the same channel;

[0097] If not, migrating the first task or the second task to the same channel to avoid executing the first task and the second task on different channels at the same time.

[0098] That is, the conflict detection of the tasks can be before the tasks are assigned to the channels, or after the tasks are assigned to the channels.

[0099] If the address conflict detection is before the tasks are assigned to the channels, the processing order can be reordered based on the conflict situation to avoid executing specific conflicting tasks on different channels at the same time. If the address conflict detection is after the tasks are assigned to the channels, the tasks can be suggested to be migrated across channels after the address conflicts are detected, thereby avoiding executing the same task on different channels at the same time.

[0100] In one specific embodiment of the present application, the method further comprises:

[0101] obtaining the address range of the tasks to be processed;

[0102] comparing whether the address ranges corresponding to different tasks to be processed overlap using an address range comparator;

[0103] If yes, it is determined that the different tasks to be processed in the current comparison have address conflicts.

[0104] For example, as shown in the following figure, for task 1, the address range is 300 to 400 (corresponding to the left black bold rectangle in the figure), and for task 2, the address range is 360 to 450 (corresponding to the right black bold rectangle in the figure). It can be seen that the address ranges of the two tasks both include the overlapping range 350 to 400. At this time, it can be determined that task 1 and task 2 have address conflicts. Figure 2

[0105] In a specific embodiment of the present application, after the tasks are assigned to the corresponding channels, the following steps are further included:

[0106] Channel load information is obtained from the state register of the corresponding channel directly accessed from the memory;

[0107] The overloaded channel and the idle channel are determined by using the channel load information;

[0108] The tasks assigned to the overloaded channel are migrated to the idle channel to speed up the task processing.

[0109] That is, after the task assignment is completed, the load condition of the channel can be constantly monitored, and the tasks of the overloaded channel can be migrated to the idle channel, so as to speed up the task processing.

[0110] According to the method provided in the embodiments of the present application, the tasks to be processed are obtained from the global task pool, and the descriptor of the task to be processed is parsed to obtain priority information and / or dependency relationship information. The processing order of the task to be processed is determined by using the priority information and / or the dependency relationship information. Channel load information is obtained from the state register of the corresponding channel directly accessed from the memory. The target channel is selected from the channels by using the channel load information and combining a load balancing strategy, and the task to be processed is assigned to the target channel according to the processing order.

[0111] ​In the present application, the descriptor of the task can be extended to have at least one of priority information and dependency relationship information. In this way, after obtaining the to-be-processed task from the global task pool, at least one of the priority information and the dependency relationship information can be obtained by analyzing the descriptor of the to-be-processed task. Then, based on these information, the processing order of the to-be-processed task can be determined. In the process of task allocation to the channel, the channel load information can be obtained by accessing the state register of the channel. By using the channel load information and combining the load balancing strategy, the target channel can be selected from the channel, and the to-be-processed task can be allocated to the target channel for processing according to the processing order. That is, in the present application, when performing task allocation, based on at least one of the priority information and the dependency relationship information, and the channel load information, not only the load balancing can be dynamically realized, but also at least one of the priority and the dependency relationship of the task can be considered, so as to guarantee the reliability of task processing, and dynamically adapt to different task scheduling requirements.

[0112] In order to better understand and implement the task allocation method provided by the embodiments of the present application by those skilled in the art, the task allocation method will be described in detail below with specific examples.

[0113] From the description of the above embodiments, it can be seen that in order to solve the above problems, the present application provides a high-performance task allocation method combining chain DMA, multi-channel parallel transmission, real-time monitoring and conflict prediction. The system can re-allocate tasks to different channels according to real-time monitoring data, optimize the overall throughput rate, detect possible memory access conflicts (such as the same address being accessed by multiple channels), rearrange the transmission queue or adjust the priority in advance to avoid blocking, and add metadata such as priority and dependency relationship in the descriptor chain table to allow dynamic adjustment of the transmission order and support more complex scheduling strategies.

[0114] Specifically, in the method, a dynamic load balancing scheduling mechanism can be implemented, including:

[0115] 1. Real-time monitoring module: integrated in the hardware monitoring unit of the DMA controller, real-time collection of bandwidth occupancy, queue length, waiting time and other indicators of each channel; based on the monitoring data, dynamic priority adjustment or task migration (such as migrating high-priority tasks to idle channels) is used to realize load balancing;

[0116] 2. Conflict prediction and reordering: address conflict analysis engine: when the task queue is submitted, the address overlap or bandwidth competition is predicted, and the high-risk task is marked; intelligent reordering logic: according to the conflict priority, the task execution order is adjusted or allocated to a conflict-free channel, and dynamic queue reorganization at the descriptor chain table level is supported.

[0117] 3. Enhanced chained DMA descriptor structure: The descriptor adds fields such as task priority: supporting hierarchical scheduling (e.g., real-time task > background task), dependency flag: defining the temporal relationship between tasks (e.g., task A must be executed after task B is completed), and conflict prediction result buffer: storing conflict warnings and reordering suggestions.

[0118] The system includes a multi-channel DMA core unit, a real-time monitoring and scheduling unit, and a conflict prediction and reordering engine.

[0119] The system architecture includes the following modules:

[0120] The multi-channel DMA core module implements the following functions:

[0121] Channel resource initialization: Hardware initialization of N independent DMA channels (e.g., DMA_0 to DMA_5). Each channel is configured with an independent descriptor queue pointer (head_pointer and tail_pointer) and an arbitration status register (idle / busy flag).

[0122] Task distribution mechanism: The CPU or software driver pushes tasks (descriptor list) into the global task pool. The channel allocator selects an idle channel or assigns it to the least loaded channel based on the current load balancing strategy (see the "Real-time Monitoring" section below).

[0123] Task execution flow: ① Channel task retrieval: When a channel retrieves a task from the pool, it parses fields in the descriptor (such as length, priority, and consequent_flag). ② DMA transfer: Data transfer is performed in descriptor order. ③ Status feedback: Upon completion or an exception, the status register is updated, and the monitoring unit is notified.

[0124] The real-time monitoring unit performs the following functions:

[0125] Hardware monitoring and data acquisition: ① Periodic polling: Read the status register of all channels every 1ms (or triggered by an interrupt). ② Data metrics include: bandwidth utilization (current channel transmission rate / maximum bandwidth); queue depth (tail_pointer - head_pointer); waiting latency (the difference between task submission time and execution time).

[0126] Load assessment model: Calculate a weighted total score for each channel: Load = 0.5 * Bandwidth utilization + 0.3 * Queue depth + 0.2 * Latency. The channel with the highest load is marked as an overloaded channel (e.g., load > 90%).

[0127] Load balancing decision outputs: ① Threshold triggering mechanism: When the load on a certain channel exceeds a threshold (e.g., 80%), a dynamic migration strategy is triggered. ② Selection of migration candidate tasks: Prioritize the migration of low-priority tasks with no dependencies.

[0128] The conflict prediction and reordering engine module implements the following functions:

[0129] Initiate predictive analytics: ① Task input: Extract the descriptor list (List_Original) to be submitted from the task pool. ② Data cache: Copy List_Original to the conflict prediction buffer and mark it as the list to be analyzed.

[0130] Address conflict detection: Traverse descriptors: For each descriptor D_i in List_Original: Check if its source address range [D_i.src_dma_addr, D_i.src_end_dma_addr] overlaps with the target address D_i.dst_dma_addr + D_i.length of other descriptors. If they overlap and have different priorities, mark it as a conflict (D_i.conflict_flag=1).

[0131] Conflict-triggered reordering and channel migration include: Conflict task handling strategies: ① Priority arbitration: Force the lower-priority task in the conflict to be delayed in execution. ② Channel migration: If the channel Ch_Overload is too overloaded, migrate the conflicting task to the channel Ch_MinLoad with the lowest load: Update the target descriptor's channel_id = Ch_MinLoad.

[0132] Dependency maintenance: ① Retain the dependency field association to ensure the task order is compliant after merging or migration. For example, if D_merged depends on D_k, it must be ensured that D_k is completed first in channel Ch_A.

[0133] Output the optimized task list: ① List_Final: Contains the merged burst tasks and a reordered list of conflict-free descriptors. ② Feedback monitoring unit: Updates the global channel load model, reflecting the estimated load changes after task migration.

[0134] Please refer to Figure 3 First, user health check tasks are sent to the global task pool. Then, address conflict detection is performed, and the task processing order is reordered and tasks are reassigned based on the detection results. By monitoring the channel status in real time, tasks already assigned to a channel can be migrated across channels or reordered, thereby achieving dynamic task allocation.

[0135] Please refer to Figure 4 The specific implementation process of this method includes the following stages:

[0136] 1. Configuration Initialization Phase: The CPU configures the DMA channels, descriptor structure, and resource allocation. The CPU configures DMA channel parameters (such as the number of channels, source / destination addresses, and transfer direction) through registers. For example, enabling the DMA controller's chained DMA mode (such as supporting a circular linked list of descriptors).

[0137] 2. Data Task Submission Phase: User tasks are encapsulated as a linked list of descriptors, containing fields such as address, length, and priority. DMA retrieves the linked list from the task pool and performs address conflict detection: checking whether the address ranges of the descriptors overlap.

[0138] 3. Conflict Prediction and Task Reorganization Phase: Conflict Marking: If a conflict is detected (e.g., the address range of task A overlaps with the address range of task B), set the `conflict_flag` flag in the descriptor and mark the lower-priority task as needing reordering. Output the optimized task queue (conflict-free) to the load balancing module;

[0139] 4. Load balancing and channel allocation phase: Collect the status of each channel every 1ms: bandwidth utilization, queue depth, and waiting time; prioritize the allocation of burst tasks to idle or bandwidth-rich channels.

[0140] 5. Data transmission execution phase: The channel obtains the optimized descriptor from the task pool; the status register is updated after completion / interruption.

[0141] 6. Real-time monitoring and dynamic adjustment phase: Regularly report the load data after the channel is updated, and continuously trigger migration or priority adjustment.

[0142] As can be seen, this application can significantly improve data transmission efficiency and bandwidth utilization. This application monitors the load of each channel in real time and dynamically migrates tasks to idle channels, avoiding channel resource idleness or overload; it also significantly reduces CPU intervention and system latency. The conflict prediction and load balancing logic in this application are completed by a hardware engine; the CPU only needs to submit the initial task list without real-time intervention, thus enhancing system robustness and reliability. This application avoids transmission errors caused by data overwriting or bus contention through address range conflict prediction and dynamic task rearrangement.

[0143] Corresponding to the above method embodiments, this application also provides a task allocation device, and the task allocation device described below can be referred to in correspondence with the task allocation method described above.

[0144] See Figure 5 As shown, the device includes the following modules:

[0145] The task acquisition module 101 is used to acquire tasks to be processed from the global task pool and parse the descriptors of the tasks to be processed to obtain priority information and / or dependency information.

[0146] The task order determination module 102 is used to determine the processing order of tasks to be processed by using priority information and / or dependency information.

[0147] The channel monitoring module 103 is used to directly access the status register of the corresponding channel from memory to obtain the channel load information;

[0148] The task allocation module 104 is used to select a target channel from the channels by utilizing channel load information and combining it with a load balancing strategy, and to allocate the tasks to be processed to the target channel according to the processing order.

[0149] Using the apparatus provided in the embodiments of this application, tasks to be processed are obtained from the global task pool, and the descriptors of the tasks to be processed are parsed to obtain priority information and / or dependency information; the processing order of the tasks to be processed is determined using the priority information and / or dependency information; the channel load information is obtained by directly accessing the status register of the corresponding channel from memory; the target channel is selected from the channels using the channel load information and in combination with the load balancing strategy, and the tasks to be processed are assigned to the target channel according to the processing order.

[0150] In this application, the task descriptor can be extended to include at least one of priority information and dependency information. Thus, after obtaining a task to be processed from the global task pool, at least one of priority information and dependency information can be obtained by parsing the task descriptor. Based on this information, the processing order of the tasks can be determined. During task allocation to a channel, channel load information can be obtained by accessing the channel's status register. Using the channel load information and a load balancing strategy, a target channel can be selected, and the tasks to be processed can be allocated to the target channel according to the processing order. In other words, in this application, during task allocation, based on at least one of priority information and dependency information, and the channel load information, not only can load balancing be dynamically achieved, but at least one task association information (task priority and dependency) can also be considered, thereby ensuring the reliability of task processing and dynamically adapting to different task scheduling requirements.

[0151] In one specific embodiment of this application, it further includes:

[0152] The address conflict handling module is used to detect address conflicts in the tasks to be processed before assigning them to the target channel according to the processing order; if a first task and a second task with address conflicts are detected, the first task or the second task is reordered in the processing order.

[0153] In one specific embodiment of this application, it further includes:

[0154] The address conflict handling module is used to perform address conflict detection on the tasks to be processed after assigning them to the target channels according to the processing order. If a first task and a second task with address conflicts are detected, it is determined whether the first task and the second task are assigned to the same channel. If not, the first task or the second task is moved to the same channel to avoid the first task and the second task being executed on different channels at the same time.

[0155] In one specific embodiment of this application, the address conflict handling module is specifically used to obtain the address range of the task to be processed; compare the address ranges corresponding to different tasks to be processed using an address range comparator to see if there is any overlap; if so, determine that there is an address conflict between the different tasks to be processed being compared.

[0156] In one specific embodiment of this application, the channel monitoring module is specifically used to obtain the bandwidth utilization rate from the bandwidth counter of the current channel, obtain the amount of unprocessed tasks of the current channel from the queue depth register; input the bandwidth utilization rate and the amount of unprocessed tasks into the load evaluation circuit of the current channel to calculate the channel load information; and write the channel load information into the status register.

[0157] In one specific embodiment of this application, the task order determination module is specifically used to sort the tasks to be processed according to their priority from high to low using priority information to obtain a priority order; and to determine the priority order as the processing order.

[0158] In one specific embodiment of this application, the task order determination module is specifically used to determine, using dependency information, a first task and a second task with dependencies from the tasks to be processed; determine the order of the first task and the second task according to the dependencies; and determine the processing order by combining the order.

[0159] Corresponding to the above method embodiments, this application also provides an electronic device. The electronic device described below can be referred to in correspondence with the task allocation method described above.

[0160] See Figure 6 As shown, the electronic device includes:

[0161] Memory 332 is used to store computer programs;

[0162] The processor 322 is used to implement the steps of the task allocation method in the above method embodiment when executing a computer program.

[0163] For details, please refer to Figure 7 , Figure 7 This is a schematic diagram of the specific structure of an electronic device provided in this embodiment. The electronic device can vary significantly due to differences in configuration or performance. It may include one or more central processing units (CPUs) (e.g., one or more processors) and a memory 332. The memory 332 stores one or more computer programs 342 or data 344. The memory 332 can be temporary or permanent storage. The program stored in the memory 332 may include one or more modules (not shown in the diagram), each module may include a series of instruction operations on the data processing device. Furthermore, the processor 322 may be configured to communicate with the memory 332 and execute the series of instruction operations stored in the memory 332 on the electronic device 301.

[0164] Electronic device 301 may also include one or more power supplies 326, one or more wired or wireless network interfaces 350, one or more input / output interfaces 358, and / or one or more operating systems 341.

[0165] The steps in the task allocation method described above can be implemented by the structure of an electronic device.

[0166] Corresponding to the above method embodiments, this application also provides a readable storage medium. The readable storage medium described below can be referred to in conjunction with the task allocation method described above.

[0167] A readable storage medium storing a computer program, which, when executed by a processor, implements the steps of the task allocation method described in the above method embodiments.

[0168] The readable storage medium can specifically be a USB flash drive, external hard drive, read-only memory (ROM), random access memory (RAM), magnetic disk, or optical disk, or any other readable storage medium capable of storing program code.

[0169] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatus disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to in the method section.

[0170] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0171] The steps of the methods or algorithms described in conjunction with the embodiments disclosed herein can be implemented directly by hardware, a software module executed by a processor, or a combination of both. The software module can be located in random access memory (RAM), main memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art.

[0172] Finally, it should be noted that in this document, relationships such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "include," "contain," or any other variations are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus.

[0173] This document uses specific examples to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are only for the purpose of helping to understand the methods and core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. A task allocation method, characterized in that, include: Obtain tasks to be processed from the global task pool, and parse the descriptors of the tasks to be processed to obtain priority information and / or dependency information; The processing order of the tasks to be processed is determined using the priority information and / or the dependency information. Obtain channel load information directly from the status register of the corresponding channel in memory; Using the channel load information and in conjunction with a load balancing strategy, a target channel is selected from the channels, and the tasks to be processed are assigned to the target channel according to the processing order.

2. The method according to claim 1, characterized in that, Before assigning the tasks to be processed to the target channel according to the processing order, the process further includes: Perform address conflict detection on the task to be processed; If a first task and a second task with address conflicts are detected, the first task or the second task is reordered in the processing order.

3. The method according to claim 1, characterized in that, After assigning the tasks to be processed to the target channel according to the processing order, the process further includes: Perform address conflict detection on the task to be processed; In the case of detecting a first task and a second task with address conflicts, determine whether the first task and the second task are assigned to the same channel; If not, the first task or the second task will be migrated to the same channel to avoid the first task and the second task being executed simultaneously on different channels.

4. The method according to claim 2 or 3, characterized in that, The task to be processed is subjected to address conflict detection, including: Obtain the address range of the task to be processed; Use an address range comparator to compare whether the address ranges corresponding to different tasks to be processed overlap. If so, it is determined that there is an address conflict between the different pending tasks being compared.

5. The method according to claim 1, characterized in that, Writing the channel load information to the status register includes: Get the bandwidth utilization rate from the bandwidth counter of the current channel, and get the number of unprocessed tasks in the current channel from the queue depth register; The bandwidth utilization rate and the amount of unprocessed tasks are input into the load evaluation circuit of the current channel to calculate the channel load information; Write the channel load information into the status register.

6. The method according to claim 1, characterized in that, Using the priority information, the processing order of the tasks to be processed is determined, including: The tasks to be processed are sorted from highest to lowest priority using the priority information to obtain a priority order; The priority order is determined as the processing order.

7. The method according to claim 1, characterized in that, Using the dependency information, the processing order of the tasks to be processed is determined, including: Using the dependency information, a first task and a second task with dependencies are determined from the tasks to be processed; Based on the aforementioned dependency relationship, determine the order of the first task and the second task; Based on the aforementioned sequence, the processing order is determined.

8. A task allocation device, characterized in that, include: The task acquisition module is used to acquire tasks to be processed from the global task pool and parse the descriptors of the tasks to be processed to obtain priority information and / or dependency information. The task order determination module is used to determine the processing order of the tasks to be processed by utilizing the priority information and / or the dependency information. The channel monitoring module is used to directly access the status register of the corresponding channel from memory to obtain channel load information; The task allocation module is used to select a target channel from the channels using the channel load information and in conjunction with the load balancing strategy, and to allocate the task to be processed to the target channel according to the processing order.

9. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor, configured to implement the steps of the task allocation method as described in any one of claims 1 to 7 when executing the computer program.

10. A readable storage medium, characterized in that, The readable storage medium stores a computer program that, when executed by a processor, implements the steps of the task allocation method as described in any one of claims 1 to 7.

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