Parallel System of Full-Bridge T-Type LLC Converters and Wide Gain Range Interleaved Current Sharing Method

Abstract

This invention belongs to the field of power electronic converter technology, specifically disclosing a parallel system of a full-bridge T-type LLC converter and a wide-gain-range interleaved current sharing method. The system includes: two-phase parallel-connected LLC converters, each phase LLC converter including an input capacitor, a T-type full-bridge primary side structure, a resonant cavity, a transformer, and a secondary side structure connected in sequence; the T-type full-bridge primary side structure includes: an upper half-bridge composed of four switching transistors Q1-Q4 and a lower half-bridge composed of switching transistors Q5-Q8; by introducing a T-type full-bridge structure, this invention can effectively improve the output gain range and achieve interleaved current sharing control under a wide output gain range.

Description

Technical Field

[0001] This invention relates to the field of power electronic converter technology, and in particular to a parallel system of full-bridge T-type LLC converters and a wide-gain-range interleaved current sharing method. Background Technology

[0002] The statements in this section are merely background information related to the present invention and do not necessarily constitute prior art.

[0003] LLC converters are resonant converters that achieve soft switching by utilizing the resonance of inductors (L) and capacitors (C) in the circuit. Due to their high efficiency and high power density, LLC converters are widely used in LED lighting systems, data centers, and electric vehicles. With continuous technological advancements, higher demands are placed on power electronic conversion devices, such as adapting to higher power and wider output ranges. LLC multiphase parallel technology has become a major approach to meeting these high power requirements. However, because the gain of LLC converters is highly sensitive to resonant parameters, even small deviations in these parameters can lead to severe uneven power distribution between phases. Furthermore, as output power increases, output current ripple increases, requiring more output filter capacitors, which significantly reduces power density.

[0004] Taking a two-phase LLC parallel connection as an example, interleaved parallel connection is an effective way to solve output ripple. By staggering the two phases by a certain angle, the output currents can be superimposed, thereby effectively reducing output ripple. However, in practical applications, it is difficult to keep the resonant parameters of the two phases consistent, which poses a great challenge to current sharing. At the same time, adjusting the LLC output gain is mainly achieved through frequency modulation (PFM). When far from the resonant point, it is difficult to satisfy the soft switching of all switching transistors. Therefore, as the frequency changes, the converter efficiency will continuously decrease, making it difficult to meet the requirements for a wide range.

[0005] Existing technology discloses a two-phase LLC parallel current sharing system, including two-phase primary windings, a transformer, and a secondary winding. The two phases are connected by a common resonant capacitor or a common resonant inductor. The primary winding consists of a half-bridge structure composed of two switching transistors, and the secondary winding consists of a rectifier half-bridge structure composed of two switching transistors. Natural current sharing between the two phases is achieved through the mutual coupling of the interphase common resonant inductor and resonant capacitor. However, due to the coupling relationship, the switching frequency and phase of the two phases must remain consistent at all times, thus preventing interleaved parallel connection and further increasing the output ripple.

[0006] Existing technology discloses a two-phase LLC parallel current sharing system. The two phases are not coupled by resonant inductors or capacitors; instead, a full-bridge structure is used on the primary side of each phase. Each phase consists of four switching transistors. Phase-shift modulation is used to change the equivalent input gain, thereby achieving phase-to-phase current sharing. This method can achieve phase-to-phase current sharing and interleaved parallel connection. However, when the phase shift angle is too large, the ripple cancellation effect decreases, the output ripple increases, and the output range becomes smaller.

[0007] Existing technology discloses a two-phase LLC parallel current sharing system. The primary sides of each phase consist of two input voltage-dividing capacitors and two switching transistors forming a half-bridge, with two anti-symmetrical switching transistors forming an intermediate bridge, thus forming a T-type three-level half-bridge structure. This method has no inter-phase coupling and can be interleaved in parallel. Current sharing between phases is achieved by adjusting the duty cycle of one phase to change the equivalent input gain. However, as the output power changes, the duty cycle continuously changes. When the duty cycle deviates significantly from its initial value, it becomes difficult to achieve soft switching of all switching transistors, resulting in a narrow output gain range. Summary of the Invention

[0008] To address the aforementioned issues, this invention proposes a parallel system for a full-bridge T-type LLC converter and a wide-gain-range interleaved current sharing method, which can effectively achieve phase-to-phase current sharing and reduce output ripple; it can also effectively broaden the converter's output range, enabling soft switching of all switching transistors over a wide range and improving the overall operating efficiency of the converter.

[0009] In some implementations, the following technical solutions are adopted:

[0010] A parallel system of full-bridge T-type LLC converters includes: two-phase LLC converters connected in parallel, each of which includes an input capacitor, a primary side structure of a T-type full-bridge structure, a resonant cavity, a transformer, and a secondary side structure connected in sequence.

[0011] The input capacitance is composed of a capacitor. C in1 and capacitor C in2 The T-type full-bridge structure, after being connected in series to the two ends of the power supply, comprises an upper half-bridge consisting of four switching transistors Q1-Q4 and a lower half-bridge consisting of switching transistors Q5-Q8; switching transistors Q1 and Q4 are connected in series to the two ends of the power supply, and one end of switching transistors Q2 and Q3 is connected in series to a capacitor. C in1 and capacitor C in2 One end is connected between switching transistors Q1 and Q4, and the other end is connected to one end of the resonant cavity; switching transistors Q5 and Q8 are connected in series to the two ends of the power supply; switching transistors Q6 and Q7 are connected in series, and one end is connected to the capacitor. Cin1 and capacitor C in2 One end is connected between the switching transistors Q5 and Q8, and the other end is connected to the other end in the resonant cavity.

[0012] As a further embodiment, the resonant cavity includes a resonant capacitor Cr and a resonant inductor Lr connected in series in the primary circuit of the transformer, and an excitation inductor Lm connected in parallel in the primary circuit of the transformer; the switching transistors Q2 and Q3 are connected in series to one end of the resonant inductor Lr, and the switching transistors Q6 and Q7 are connected in series to one end of the resonant capacitor Cr.

[0013] As a further embodiment, the secondary structure of the first-phase LLC converter includes: a rectifier circuit consisting of four rectifier diodes, and a filter capacitor and a load connected in parallel with the rectifier circuit; the secondary structure of the second-phase LLC converter includes: a rectifier circuit consisting of four rectifier diodes, the output of which is connected in parallel to the two ends of the filter capacitor in the first phase.

[0014] As a further option, the input capacitors of the first-phase LLC converter and the second-phase LLC converter are connected in parallel across the power supply.

[0015] In other embodiments, the following technical solutions are adopted:

[0016] A wide-gain-range interleaved current sharing method for a parallel system of full-bridge T-type LLC converters includes:

[0017] The first group consists of switching transistors Q1 and Q4, and the second group consists of switching transistors Q2 and Q3. The first and second groups share a single control variable uk1.

[0018] The switching transistors Q5 and Q7 are designated as the third group, and the switching transistors Q6 and Q8 are designated as the fourth group. The third and fourth groups share a single control variable uk2.

[0019] Control variables uk1 and uk2 are used to control the duty cycle of the switching transistor;

[0020] Two parallel-connected LLC converters operate at the same frequency and have an interleaving angle set.

[0021] The output current of the two-phase LLC is monitored in real time. If the current imbalance between the output currents of the two-phase LLC exceeds the set threshold, the control quantities uk1 and uk2 of the LLC with the larger output current remain unchanged. The difference between the output currents of the two-phase LLC is input to the PI controller of the LLC with the smaller output current. The PI controller adjusts the control quantity of the LLC with the smaller output current to achieve current sharing control of the two-phase LLC.

[0022] As a further solution, the PI controller adjusts the control quantity of the LLC phase with the smaller output current, specifically as follows:

[0023] The PI controller obtains an output value based on the difference between the actual output current and the preset control target; the output value is limited to between -0.5 and 0.5.

[0024] When the output value of the PI controller is between 0 and 0.5, the control quantity uk1 of the switching transistors Q1-Q4 remains unchanged at 0.5, and the control quantity uk2 of the switching transistors Q5-Q8 is the output value of the PI controller.

[0025] When the output value of the PI controller is between -0.5 and 0, the control quantity uk1 of the switching transistors Q1-Q4 is the sum of 0.5 and the output value of the PI controller, while the control quantity uk2 of the switching transistors Q5-Q8 remains unchanged at 0.

[0026] As a further solution, the current unevenness of the two-phase LLC output current is specifically calculated as follows: the difference between the two-phase LLC output currents is calculated as a percentage of the difference between the two phases, and then compared with the phase with the larger output current.

[0027] As a further option, if the current imbalance of the two-phase LLC output current does not exceed the set threshold, the two-phase output current is considered to be equal, and the PI controller output does not need to be adjusted.

[0028] As a further option, it also includes:

[0029] When the required output voltage changes, the control quantities uk1 and / or uk2 of the unregulated phase are changed to change the output voltage until the output voltage meets the current requirement; then the two-phase current sharing control is performed.

[0030] In other embodiments, the following technical solutions are adopted:

[0031] A terminal device includes a processor and a memory, the processor being used to implement instructions; the memory being used to store multiple instructions adapted to be loaded by the processor and executed as described above for wide gain range interleaved current sharing.

[0032] Compared with the prior art, the beneficial effects of the present invention are:

[0033] (1) By introducing a T-type full-bridge structure, this invention can effectively improve the output gain range: through continuous adjustment of the PI controller, the input gain (i.e., voltage) can be increased. V AB )Depend on V in Continuous dynamic change up to 0.5 V in Then from 0.5V in The system can dynamically change to 0 without any disturbance during the adjustment process. The switching frequency can be finely adjusted to change the output gain during the change. Furthermore, the switching frequency can still operate near the resonant frequency when the input gain is low, thus improving the system efficiency over a wide range.

[0034] (2) This invention can achieve current sharing between two phases by fine-tuning the equivalent input gain through a PI controller; and while changing the equivalent input gain, the actual control timing does not change, and it does not affect the interleaving angle between the two phases. Therefore, interleaved current sharing can be achieved over a wide output range. This method is simple to implement, easy to control, and can be extended to multi-phase parallel connection. It has broad application prospects in fields such as electric vehicle charging piles, data centers, aerospace power supplies, and energy storage systems.

[0035] Other features and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description

[0036] Figure 1 This is a topology diagram of a full-bridge T-type LLC converter in an embodiment of the present invention;

[0037] Figure 2 This is a topology diagram of a parallel system of full-bridge T-type LLC converters in an embodiment of the present invention;

[0038] Figure 3(a) shows the control quantity when it is 0.3 in an embodiment of the present invention. V AB Voltage waveform diagram;

[0039] Figure 3(b) shows the control quantity when it is 0.5 in an embodiment of the present invention. V AB Voltage waveform diagram;

[0040] Figure 4 This is a flowchart of the wide gain range interleaved current sharing method in an embodiment of the present invention;

[0041] Figure 5 This is the output current curve of two-phase interleaved parallel connection under full load in this embodiment of the invention, without using the method of this embodiment;

[0042] Figure 6 This is the two-phase interleaved parallel current output curve of the method used in this embodiment of the invention under full load;

[0043] Figure 7 This is the output current curve of two-phase interleaved parallel connection under light load in this embodiment of the invention.

[0044] Figure 8This is the output current curve of two-phase interleaved parallel connection when using the method of this embodiment under light load in this invention embodiment. Detailed Implementation

[0045] It should be noted that the following detailed description is illustrative and intended to provide further explanation of the invention. Unless otherwise specified, all technical and scientific terms used in this invention have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains.

[0046] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of exemplary embodiments according to the invention. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. Furthermore, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0047] Example 1

[0048] In one or more embodiments, a full-bridge T-type LLC converter structure is disclosed, combined with Figure 1 Specifically, it includes: the input capacitor, the primary side structure of the T-type full bridge, the resonant cavity, the transformer, and the secondary side structure connected in sequence.

[0049] The input capacitor consists of capacitors Cin1 and Cin2 connected in series. These two capacitors are then connected to the power supply V. in At both ends, the two capacitors are of the same size, and thus... V in 0.5 V in There are three voltage levels: 0, 0, and 0.

[0050] The primary side of the T-type full-bridge structure consists of eight MOSFETs (Q1-Q8). The upper half-bridge is composed of switching transistors Q1-Q4, with its output connected to the input point A of the resonant cavity. The lower half-bridge is composed of switching transistors Q5-Q8, with its output connected to the output point B of the resonant cavity. Switches Q1 and Q4 are connected in series across the power supply. Switches Q2 and Q3 are connected in series, with one end connected between capacitors Cin1 and Cin2, and the other end connected between switching transistors Q1 and Q4, and connected to the input point A in the resonant cavity. Switches Q5 and Q8 are connected in series across the power supply. Switches Q6 and Q7 are connected in series, with one end connected between capacitors Cin1 and Cin2, and the other end connected between switching transistors Q5 and Q8, and connected to the output point B in the resonant cavity.

[0051] The resonant cavity consists of a resonant capacitor Cr, a resonant inductor Lr, and a magnetizing inductor Lm. The resonant capacitor Cr and the resonant inductor Lr are connected in series in the primary circuit of the transformer, and the magnetizing inductor Lm is connected in parallel in the primary circuit of the transformer. Switches Q2 and Q3 are connected in series to one end of the resonant inductor Lr, and switches Q6 and Q7 are connected in series to one end of the resonant capacitor Cr.

[0052] The secondary side structure is composed of V d1 - V d4 It consists of a rectifier circuit composed of four rectifier diodes, a filter capacitor connected in parallel with the rectifier circuit, and a load.

[0053] Taking the upper half-bridge composed of switching transistors Q1-Q4 as an example, the output terminal of the upper half-bridge is connected to point A, the input terminal of the resonant cavity. As shown in Table 1, different voltage levels can be obtained at point A through different combinations of switching transistors. Table 1 lists seven different conduction relationships, indicating that there are seven possible conduction relationships that can make point A have... V in 0.5 V in And three different output level states: 0.

[0054] Table 1 Switch Combination States and Output Levels

[0055]

[0056] Similarly, the lower half-bridge combined with point B can achieve three different voltage levels: Vin, 0.5Vin, and 0. The upper and lower half-bridges have a total of five possible voltages, representing the voltage across the resonant cavity. V AB It can be V in - V in 0.5 V in -0.5 V in There are five voltage states: 0 and 0. Each voltage state is a combination of one or more level states, for example: 0.5. V in It can be started from point A V in Point B, 0.5 V in and point A 0.5 V in Point B has two possible combinations of 0 level;

[0057] Therefore, in this embodiment, the equivalent input gain of the full-bridge T-type LLC converter structure can be continuously adjusted from Vin to 0, thereby widening the output gain range, realizing interleaved current sharing control over a wide range, and improving the overall operating efficiency of the converter.

[0058] Figure 2 The topology diagram of the parallel system of the full-bridge T-type LLC converter in this embodiment is given, including two-phase parallel-connected LLC converters. The LLC of the first phase specifically includes: an input capacitor. C in1 The positive terminal is connected to the positive terminal of the voltage source, and the negative terminal is connected to the input capacitor. C in2 The positive terminal is connected to the drain of the switching transistor Q2; the input capacitor... C in2 The negative terminal is connected to the negative terminal of the voltage source; the drain of the switching transistor Q1 is connected to the input capacitor. C in1 The positive terminals are connected, the source of switch Q2 is connected to the source of switch Q3, the source of switch Q1 is connected to the drain of switch Q4 and the drain of switch Q3, and they are also connected to the positive terminal of resonant inductor Lr1 in the resonant cavity; the drain of switch Q5 is connected to the input capacitor. C in1 The positive terminal is connected, and the source of the switching transistor Q8 is connected to the input capacitor. C in2 The negative terminals are connected, the source of switching transistor Q6 is connected to the source of switching transistor Q7, and the drain of switching transistor Q6 is connected to the input capacitor. C in1 The negative terminals are connected. The source of switching transistor Q5 is connected to the drain of switching transistors Q7 and Q8, and simultaneously connected to the negative terminal of resonant capacitor Cr1 in the resonant cavity. The negative terminal of resonant inductor Lr1 is connected to the positive terminal of magnetizing inductor and the positive terminal of the primary side of transformer. The negative terminal of magnetizing inductor Lm1 is connected to the negative terminal of the primary side of transformer and the positive terminal of resonant capacitor Cr1. The converter converts to the negative terminal through the transformer. The positive terminal of the secondary side of transformer is connected to the positive terminal of rectifier diode VD1 and the negative terminal of VD4. The negative terminal of the secondary side of transformer is connected to the positive terminal of rectifier diode VD3 and the negative terminal of VD2. The negative terminals of rectifier diodes VD1 and VD3 are connected to the positive terminal of filter capacitor Cf and the positive terminal of load RL. The positive terminals of rectifier diodes VD4 and VD2 are connected to the negative terminal of filter capacitor Cf and the load RL.

[0059] The structure and connection method of the second phase LLC are the same as those of the first phase LLC. The positive terminal of the input capacitor Cin3 of the second phase LLC is connected to the positive terminal of the power supply, and the negative terminal of the input capacitor Cin4 is connected to the negative terminal of the power supply. At the output terminal, the output side of the rectifier diode of the second phase LLC is connected in parallel to the two ends of the filter capacitor Cf of the first phase.

[0060] In this embodiment, the two-phase parallel topology connects the two-phase input terminals in parallel, ensuring that the highest equivalent input voltage of each phase is Vin. Since the two-phase output terminals are connected in parallel, the output voltages are the same. Therefore, it is only necessary to control the output current of the two phases to balance them, making the control process simple.

[0061] In this embodiment, the topology groups the switching transistors in pairs: Q1 and Q4 form the first group, Q2 and Q3 form the second group, Q5 and Q7 form the third group, and Q6 and Q8 form the fourth group. The first and second groups share a single control variable uk1, while the third and fourth groups share a single control variable uk2. The values ​​of control variables uk1 and uk2 are determined by the required output voltage.

[0062] The control variables uk1 and uk2 are used to control the duty cycle of each group of switching transistors. Each group of switching transistors is a complementary and symmetrical PWM wave. The two groups of switching transistors have different driving phases but can share the same duty cycle.

[0063] The input gain voltage is adjusted by regulating the duty cycle. V AB It is possible to achieve different level states with different durations within the same cycle. Assuming the input voltage is 1000V, Figure 3(a) shows the result when the control quantity is 0.3. V AB The voltage waveform diagram shows that the voltage is 500V for 40% of the time and 1000V for 60% of the time in the upper half-cycle, with the lower half-cycle being symmetrically distributed with the upper half-cycle; Figure 3(b) shows the voltage when the control input is 0.5. V AB The voltage waveform shows that the upper half-cycle is 1000V and the lower half-cycle is -1000V, at which point the input gain is at its maximum. When the control input is 0.3, the duration of 1000V is shorter than when the control input is 0.5, therefore the equivalent input gain is also reduced, and the output gain will also decrease.

[0064] The equivalent input gain is changed by controlling variables, and the process of changing the input gain is divided into two stages. By adjusting the control variables uk1 and uk2, the equivalent input gain can be changed from ± V in Dynamically change to ±0.5 V in This is called the first stage; the equivalent input gain is ±0.5. V in The equivalent change to 0 is called the second stage. The switching process between these two stages is smooth and undisturbed. This control method widens the output range and can achieve phase-to-phase alternating current sharing through control.

[0065] It should be noted that, in this embodiment, input gain refers to... Figure 1 Voltage between points A and B in the resonant cavity V AB ;Voltage V AB It is a continuously changing square wave. The equivalent input gain refers to the equivalent voltage between points A and B of the resonant cavity; taking a control quantity of 0.3 as an example, the equivalent input gain is 1000V*60%+500V*40%=800V. The output gain refers to the output voltage range of a parallel system of full-bridge T-type LLC converters.

[0066] The flowchart of the wide-gain-range interleaved current sharing method for the parallel system of full-bridge T-type LLC converters in this embodiment is as follows: Figure 4 As shown, the specific steps of the control method are as follows:

[0067] Step 1: The two-phase LLC operates at the same frequency and has an interleaving angle of π / 2. The interleaving angle between the two phases can be any value, and π / 2 is the optimal interleaving angle for ripple cancellation in parallel two-phase systems.

[0068] The output current of the two-phase LLC is detected in real time, and the current unevenness of the output current of the two-phase LLC is calculated, that is, the percentage of the difference between the current of the first phase and the current of the second phase and the current of the phase with the larger current.

[0069] If the current imbalance of the two-phase LLC output current remains within ±3%, then the output current of the two-phase LLC is considered to be the same, and the current difference ek is 0, so the controller does not need to be adjusted. Keep the current control variables uk1 and uk2 unchanged.

[0070] If the difference between the output currents of the two LLC phases exceeds ±3%, the control values ​​uk1 and uk2 of the LLC phase with the larger current remain unchanged, and the current difference ek is sent to the PI controller of the LLC phase with the smaller current.

[0071] Since the controller will frequently oscillate in order to achieve the best results in reality, this embodiment reserves a 3% margin for the current unevenness, which is beneficial to the stability of the output results.

[0072] Step 2: The PI controller obtains the output value based on the difference between the actual output currents and the preset control target (the two-phase output currents are the same or the difference is as small as possible) (this process is implemented by the PI controller itself); the output value is limited to between -0.5 and 0.5.

[0073] The output value of the PI controller can be divided into two ranges:

[0074] (1) When the output value of the controller is between 0 and 0.5, this is the first stage. The adjustment process in this stage is as follows: the control quantity uk1 of the switching transistors Q1-Q4 remains constant at 0.5, and the control quantity of the switching transistors Q5-Q8 is the output value of the PI controller; the voltage across the resonant cavity of the first phase converter in this stage V AB It has four voltage states: ± V in and ±0.5 V in .

[0075] (2) When the output value of the controller is between -0.5 and 0, this is the second stage. The adjustment process in this stage is as follows: the control quantity uk1 of the switching transistors Q1-Q4 is the sum of 0.5 and the output value of the PI controller, and the control quantity uk2 of the switching transistors Q5-Q8 remains unchanged at 0. In this stage, the voltage across the resonant cavity of the converter is... V AB With 0.5 V in 0 and -0.5 V in Three voltage states.

[0076] Step 3: Achieve current sharing between the two phases through continuous calculation by the PI controller: The PI controller will continuously calculate based on the detected current difference. As long as the current imbalance is not less than 3%, the PI controller will continuously calculate the required control quantities uk1 and uk2 until the current imbalance is less than 3%.

[0077] Due to the existence of the π / 2 stagger angle, there is a phase difference of π / 2 between the two phase currents on the output side, thus the ripple is greatly reduced.

[0078] As a further implementation, the output side is a parallel structure. Due to parameter tolerance, during the current detection process, the phase with the larger output current will determine the output voltage. When the control quantity of the phase with the larger output current remains unchanged, the output voltage does not change. When the control quantity of the phase with the smaller current changes, it will only affect the current unevenness between the two phases and will not affect the output voltage.

[0079] Therefore, when the required output voltage changes, the control quantities uk1 and / or uk2 of the unadjusted phase (i.e., the phase with the larger output current) are changed, thereby changing the duty cycle of the corresponding switching transistor, causing the output voltage to change until the output voltage meets the current requirement. For example, when the required output voltage changes from 500V to 300V, when the output voltage is 500V, the control quantity of the phase with the smaller output current is adjusted to make the current of the two phases equalize. At this time, by continuously adjusting the control quantity of the phase with the larger output current, the output voltage can be controlled to change until it reaches 300V. It should be noted that the process of adjusting the output voltage is easily implemented by those skilled in the art based on existing technology, and therefore will not be described in detail.

[0080] Then, flow sharing control is performed according to the aforementioned flow sharing control method, thereby achieving two-phase staggered flow sharing over a wide range.

[0081] As a specific example, the power supply voltage V in The voltage is 1000V, and the transformer turns ratio is 1.67. (The rest of the text appears to be a fragment and doesn't translate directly.) Figure 5 and Figure 6 It can be seen that under heavy load conditions, i.e., when the output is 590V: when the method of this embodiment is not used, the difference between the two-phase currents is extremely large, which seriously affects the stability of the system operation; when the method of this embodiment is used, the two-phase currents achieve current sharing. Figure 7 and Figure 8 It can be seen that under light load conditions, i.e., when the output is 200V: when the method of this embodiment is not used, there is a deviation between the two-phase currents; when the method of this embodiment is used, the two-phase currents are shared. This method achieves soft switching of all switching transistors over a wide range and achieves phase-to-phase alternating current sharing.

[0082] The two-phase parallel full-bridge T-type LLC converter in this embodiment can be extended to any phase, and can achieve interphase interleaved current sharing and wide gain adjustment.

[0083] Example 2

[0084] In one or more embodiments, a terminal device is disclosed, comprising a processor and a memory, wherein the processor is used to implement instructions; and the memory is used to store multiple instructions adapted to be loaded by the processor and executed by the processor to perform the wide gain range interleaved current sharing method for the parallel system of the full-bridge T-type LLC converter described in Embodiment 1.

[0085] It should be understood that in this embodiment, the processor can be a central processing unit (CPU), or it can be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or any conventional processor, etc.

[0086] Memory may include read-only memory and random access memory, and provides instructions and data to the processor. A portion of memory may also include non-volatile random access memory. For example, memory may also store information about the device type.

[0087] In the implementation process, each step of the above method can be completed by the integrated logic circuits in the processor hardware or by software instructions.

[0088] While the specific embodiments of the present invention have been described above in conjunction with the accompanying drawings, this is not intended to limit the scope of protection of the present invention. Those skilled in the art should understand that various modifications or variations that can be made by those skilled in the art without creative effort based on the technical solutions of the present invention are still within the scope of protection of the present invention.

Claims

1. A wide-gain-range interleaved current sharing method for a parallel system of full-bridge T-type LLC converters, characterized in that, The parallel system of the full-bridge T-type LLC converter includes: two-phase LLC converters connected in parallel, each phase LLC converter including an input capacitor, a primary side structure of a T-type full-bridge structure, a resonant cavity, a transformer, and a secondary side structure connected in sequence; the input capacitor consists of a capacitor... C in1 and capacitor C in2 The T-type full-bridge structure, after being connected in series to the two ends of the power supply, comprises an upper half-bridge consisting of four switching transistors Q1-Q4 and a lower half-bridge consisting of switching transistors Q5-Q8; switching transistors Q1 and Q4 are connected in series to the two ends of the power supply, and one end of switching transistors Q2 and Q3 is connected in series to a capacitor. C in1 and capacitor C in2 One end is connected between switching transistors Q1 and Q4, and the other end is connected to one end of the resonant cavity; switching transistors Q5 and Q8 are connected in series to the two ends of the power supply; switching transistors Q6 and Q7 are connected in series, and one end is connected to the capacitor. C in1 and capacitor C in2 One end is connected between switching transistors Q5 and Q8, and the other end is connected to the other end in the resonant cavity; The wide gain range staggered current sharing method includes: taking switch Q1 and switch Q4 as the first group, and switch Q2 and switch Q3 as the second group, with the first group and the second group sharing a control quantity uk1; The switching transistors Q5 and Q7 are designated as the third group, and the switching transistors Q6 and Q8 are designated as the fourth group. The third and fourth groups share a single control variable uk2. Control variables uk1 and uk2 are used to control the duty cycle of the switching transistors. Each set of switching transistors is a complementary and symmetrical PWM wave. The two sets of switching transistors have different driving phases but share the same duty cycle. Two parallel-connected LLC converters operate at the same frequency and have an interleaving angle set. The output current of the two-phase LLC converter is monitored in real time. If the current imbalance between the output currents of the two-phase LLC converters exceeds a set threshold, the control values ​​uk1 and uk2 of the LLC converter with the larger output current remain unchanged. The difference in output current between the two-phase LLC converters is input to the PI controller of the LLC converter with the smaller output current. The PI controller adjusts the control value of the LLC converter with the smaller output current. The PI controller obtains the output value based on the actual difference in output current and the preset control target. The output value is limited to between -0.5 and 0.

5. When the output value of the PI controller is between 0 and 0.5, the control value uk1 of the switches Q1-Q4 remains unchanged at 0.5, and the control value uk2 of the switches Q5-Q8 is the output value of the PI controller. When the output value of the PI controller is between -0.5 and 0, the control value uk1 of the switches Q1-Q4 is the sum of 0.5 and the output value of the PI controller, and the control value uk2 of the switches Q5-Q8 always remains unchanged at 0. This achieves current sharing control of the two-phase LLC converter. When the required output voltage changes, the control quantities uk1 and / or uk2 of the unregulated phase are changed to change the output voltage until the output voltage meets the current requirement; then the two-phase current sharing control is performed.

2. The wide-gain-range interleaved current sharing method for a parallel system of full-bridge T-type LLC converters as described in claim 1, characterized in that, The resonant cavity includes a resonant capacitor Cr and a resonant inductor Lr connected in series in the primary circuit of the transformer, and an excitation inductor Lm connected in parallel in the primary circuit of the transformer; the switching transistors Q2 and Q3 are connected in series to one end of the resonant inductor Lr, and the switching transistors Q6 and Q7 are connected in series to one end of the resonant capacitor Cr; the other end of the resonant inductor Lr is connected to one end of the primary circuit of the transformer, and the other end of the resonant capacitor Cr is connected to the other end of the primary circuit of the transformer.

3. The wide-gain-range interleaved current sharing method for a parallel system of full-bridge T-type LLC converters as described in claim 1, characterized in that, The secondary structure of the first-phase LLC converter includes: a rectifier circuit consisting of four rectifier diodes, and a filter capacitor and a load connected in parallel with the rectifier circuit; the secondary structure of the second-phase LLC converter includes: a rectifier circuit consisting of four rectifier diodes, the output of which is connected in parallel to the two ends of the filter capacitor in the first phase.

4. The wide gain range interleaved current sharing method for a parallel system of full-bridge T-type LLC converters as described in claim 1, characterized in that, The input capacitors of the first-phase LLC converter and the second-phase LLC converter are connected in parallel across the power supply.

5. The wide-gain-range interleaved current sharing method for a parallel system of full-bridge T-type LLC converters as described in claim 1, characterized in that, The current unevenness of the output current of a two-phase LLC converter is specifically calculated as the percentage of the difference between the output currents of the two-phase LLC converters compared to the output current of the phase with the larger output current.

6. The wide-gain-range interleaved current sharing method for a parallel system of full-bridge T-type LLC converters as described in claim 1, characterized in that, If the current imbalance of the output current of the two-phase LLC converter does not exceed the set threshold, the output current of the two phases is considered to be equal, and the output of the PI controller does not need to be adjusted.

7. A terminal device comprising a processor and a memory, the processor for implementing instructions; the memory for storing multiple instructions, characterized in that, The instructions are adapted to be loaded by a processor and executed as the wide gain range interleaved current sharing method according to any one of claims 1-6.

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