Bootstrap switch circuit with high response speed

Abstract

The invention provides a bootstrap switch circuit with high response speed, which comprises a bootstrap capacitor, a load capacitor and a plurality of MOS (Metal Oxide Semiconductor) transistors, and by adding an mos transistor corresponding to a bootstrap capacitor lower-end switch mos transistor, the time for stabilizing the lower-end level of the bootstrap capacitor is shortened, the working adaptation frequency of the whole bootstrap switch circuit is increased, and the service life of the bootstrap switch circuit is prolonged. The circuit is suitable for high-speed analog-to-digital converters and the like, and effectively improves the circuit performance and stability.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor integrated circuits, and specifically relates to a circuit and method for improving the response speed of a bootstrap switching circuit. Background Technology

[0002] In the field of analog-to-digital conversion circuits, bootstrap switches are widely used in sample-and-hold modules to improve signal sampling accuracy. The main function of a traditional gate-voltage bootstrap switch is to ensure that, when the MOSFET is turned on as a switch, the on-resistance between the signal input and output terminals remains relatively stable, thus making the charging / discharging time constant of the output independent of the amplitude of the input signal. Its basic structure typically consists of an NMOS switch and a sampling capacitor forming a sample-and-hold circuit, such as... Figure 1 , 2 As shown, when the sampling signal Sample is high, the NMOS switch is turned on, the MOS resistance is very small, and the input signal is sampled onto the capacitor, charging the capacitor; when the sampling signal Sample is low, the NMOS switch is turned off, the MOS resistance tends to infinity, the input signal is disconnected from the sampling capacitor, the sampling capacitor holds the sampled value, and the sampling is completed.

[0003] However, the on-resistance Ron of a traditional NMOS switch fluctuates significantly with changes in the input voltage Vin. Specifically, As can be seen, as Vin increases, the on-resistance Ron gradually increases. When Vin approaches (Vdd-Vth), the on-resistance Ron approaches infinity, which also means that the NMOS is about to be turned off.

[0004] Similar issues arise when using PMOS switches. As the on-resistance Ron increases, the time constant of the sampling circuit (usually expressed as the product of the on-resistance and the sampling capacitance, Ron*Cs) also increases, directly reducing the circuit's sampling frequency. According to the above formula, to obtain a smaller on-resistance, the input signal is limited to a smaller dynamic range, restricting the overall adaptability of the circuit. Furthermore, even with limitations on the input amplitude, (Vdd-Vth)-Vin remains a variable, and Ron fluctuates with the input signal, causing the sampling performance to be limited to the worst-case time constant, making it difficult to meet the requirements of high-speed, high-precision analog-to-digital converter circuits.

[0005] To overcome the aforementioned shortcomings and obtain a stable time constant, it is desirable for the on-resistance to remain constant and unchanging with the input signal, meaning the gate-source voltage of the MOSFET should be a fixed value. Existing technology proposes a gate-voltage bootstrap switch structure, which uses capacitive coupling to maintain the gate-source voltage of the switching transistor at the supply voltage Vdd, thereby stabilizing the on-resistance at a lower value. A typical circuit is shown below. Figure 3As shown in the diagram, M3 is the NMOS switch. M1~M6 are the main operating components, and C1 is the load capacitor (negligible and does not affect the circuit principle). During signal sampling... When level 1 is high, M6, M4, M7, and M5 are turned on, while M3, M2, and M1 are turned off, and capacitor Cb is charged to Vdd. When the circuit switches to low level 1, the conduction state of the aforementioned MOSFET changes. The previously low-level end of Cb is connected to Vin and then to the source of M1. The high-level end is connected to the gate of M1. The gate-source terminals of M1 are connected in parallel with capacitor Cb. Assuming Cb is sufficiently large, the voltage difference across the gate-source terminals will be determined by the charging voltage of the bootstrap capacitor Cb, maintaining a constant value, thus keeping the on-resistance constant.

[0006] However, in actual operation, the operating speed of the bootstrap switch directly affects its operating scenarios. For high-speed applications, such as high-speed AD conversion, the shorter the sampling settling time, the better; the sampling settling time is inversely related to the AD sampling rate. Several factors affect the operating time, one of which is the level fluctuation caused by parasitic effects when the MOSFET M6 switches between states, such as... Figure 4 As shown, from top to bottom, the voltage waveforms at the upper end of the bootstrap capacitor Cb, the lower end of Cb, and the gate terminal of MOSFET M6 are respectively. From a timing perspective, When 1 goes low, M6 is turned off, and the lower end of Cb is connected to Vin. The waveform shows that the voltage at the lower end of Cb begins to rise until it reaches the voltage of Vin. However, the waveform also shows a small negative voltage fluctuation, forming a "dip," before the voltage begins to rise. This negative fluctuation is due to the effect of parasitic capacitance, which is unavoidable in actual MOSFET circuits. The "dip" does not affect the final rise of the voltage at the lower end of Cb to the Vin level, but it delays the rise time, meaning the time to set to the target voltage increases. Reducing the "dip" of the negative fluctuation would help reduce the settling time, thus increasing the operating frequency of the bootstrap circuit.

[0007] Therefore, there is an urgent need for a new bootstrap switch structure with faster switching speed, more stable conduction characteristics, and suitability for high-speed analog-to-digital conversion circuits, in order to overcome the shortcomings of existing technologies such as limited sampling rate, narrow signal adaptation range, and insufficient dynamic performance. Summary of the Invention

[0008] The purpose of this invention is to address the above-mentioned problems by proposing a bootstrap switching circuit with high response speed. By adding an auxiliary MOS transistor and optimizing its connection method and size parameters, the circuit achieves the effects of significantly shortening the voltage stabilization time, effectively suppressing negative fluctuations, and comprehensively improving the dynamic performance of the circuit.

[0009] The technical solution of this invention is: The present invention provides a bootstrap switching circuit with high response speed, the bootstrap switching circuit including MOSFETs M1-M7, Ma, Mb, bootstrap capacitor Cb, and load capacitor C1; The source of MOSFET M5 is connected to the power supply Vdd, and the gate of MOSFET M5 is connected to the drains of MOSFETs M3 and M7, and the gates of MOSFETs M2 and M1. The drain of MOSFET M5 is connected in series with a bootstrap capacitor Cb and then to the drain of MOSFET M6 and the source of MOSFET M3. The gate of MOSFET M7 is connected to the power supply Vdd, and the source is connected to the drain of MOSFET M4. The source of MOSFET M4 is grounded. The source of MOSFET M2 is connected to the source of MOSFET Mb and the drain of MOSFET M6. The drain of MOSFET M2 is connected to the input signal Vin and the source of MOSFET M1. The drain of MOSFET M1 serves as the output signal Vout and is also connected in series with a load capacitor C1 and then grounded. The drain of MOSFET Mb is connected to the drain of MOSFET Ma and the gate of MOSFET M3. The source of MOSFET Ma is connected to the power supply Vdd, and the source of MOSFET M6 is grounded. The gates of the MOS transistors M4 and M6 receive sampling signals. 1. The gates of MOSFETs Ma and Mb are connected and receive the sampling signal. The inverted signal of 1; The feature is that a MOS transistor M8 is disposed next to the MOS transistor M6 at the lower end of the bootstrap capacitor Cb, the drain of the MOS transistor M8 is connected to the lower end of the bootstrap capacitor Cb, and the gate is connected to the sampling signal. The inverted signal of 1, the source-connected input signal Vin, in the sampling signal When 1 switches to low level, the lower end of the bootstrap capacitor Cb will be connected to the input signal Vin.

[0010] Furthermore, the initial width W of the MOS transistor M8 is half the width of the MOS transistor M6, and the length L is the same as that of the MOS transistor M6.

[0011] Furthermore, the width-to-length ratio of the MOS transistor M8 is adjusted through simulation or testing, thereby reducing the negative fluctuation dip at the lower end of the bootstrap capacitor Cb and allowing the voltage to rise rapidly.

[0012] Furthermore, when the sampling signal When the voltage is high, MOSFETs M6, M4, M7, and M5 are turned on, while MOSFETs M3, M2, and M1 are turned off. The bootstrap capacitor Cb is charged to the power supply voltage Vdd.

[0013] Furthermore, when the sampling signal When 1 switches to low level, MOSFETs M6, M4, and M5 are turned off, and the lower end of the bootstrap capacitor Cb is connected to the input signal Vin.

[0014] Furthermore, MOSFETs M3, M5, and Ma are P-type MOSFETs.

[0015] The beneficial effects of this invention are: This invention discloses an optimized voltage stabilization scheme for a bootstrap switching circuit. By adding a MOSFET M8 corresponding to the lower end of the bootstrap capacitor's switching MOSFET M6, a stable and fast voltage response is achieved. The drain of the auxiliary MOSFET is connected to the lower end of the bootstrap capacitor, and its gate receives a control clock signal with the opposite phase to that of MOSFET M6, synchronously switching to suppress parasitic capacitance interference and accelerate the voltage level to a stable state. The aspect ratio of the auxiliary MOSFET M8 is initially set to half that of MOSFET M6, and is fine-tuned through simulation or testing based on process differences to optimize the effects of parasitic capacitance and significantly shorten the voltage stabilization time.

[0016] This invention reduces the negative voltage fluctuation amplitude by assisting the switching on and off of the MOSFET M8, enabling the lower end of the bootstrap capacitor to quickly reach the stable level of the input signal, thereby improving the timing response speed and stability of the circuit. It is suitable for high-precision, high-speed analog circuit applications and provides a reliable solution for high-performance circuit design.

[0017] Other features and advantages of the present invention will be described in detail in the following detailed description section. Attached Figure Description

[0018] The above and other objects, features and advantages of the present invention will become more apparent from the more detailed description of exemplary embodiments of the invention in conjunction with the accompanying drawings, wherein the same reference numerals generally represent the same components in the exemplary embodiments of the invention.

[0019] Figure 1 A schematic diagram of a conventional gate voltage bootstrap switching circuit-sampling switch in the background art is shown.

[0020] Figure 2 The diagram shows a schematic of a conventional gate voltage bootstrap switching circuit with a MOSFET sampling switch in the background art.

[0021] Figure 3 The diagram shows a conventional gate voltage bootstrap switching circuit-MOSFET sampling switching circuit in the background art.

[0022] Figure 4 The diagram illustrates the voltage fluctuation caused by parasitic effects when the MOSFET M6 switches between states in the background art; from top to bottom, these are the upper end of the bootstrap capacitor Cb, the lower end of Cb, and the gate voltage waveform of the MOSFET M6.

[0023] Figure 5 A diagram of the bootstrap switch circuit with high response speed of the present invention is shown.

[0024] Figure 6 This diagram illustrates a comparison between the level fluctuations caused by parasitic effects during the switching of the MOS transistor M6 of the present invention and the level fluctuations in the background art. Detailed Implementation

[0025] Preferred embodiments of the invention will now be described in more detail with reference to the accompanying drawings. While preferred embodiments of the invention are shown in the drawings, it should be understood that the invention can be implemented in various forms and should not be limited to the embodiments set forth herein.

[0026] This invention provides a bootstrap switching circuit with high response speed. By adding a MOSFET at the lower end of the bootstrap capacitor, the dynamic performance of the circuit is optimized, the voltage stabilization time is shortened, negative fluctuations are effectively suppressed, and the process of establishing a stable voltage level is accelerated.

[0027] like Figure 5 As shown, this invention provides a bootstrap switching circuit with high response speed, including a bootstrap capacitor Cb, a switching MOSFET M6, and a newly added auxiliary MOSFET M8. The lower end of the bootstrap capacitor Cb is connected to the drain of the switching MOSFET M6, and the gate of the switching MOSFET M6 receives the sampling signal. 1. Source grounded. The drain of the newly added auxiliary MOSFET M8 shares the same node as the drain of the switching MOSFET M6 and is connected to the lower end of the bootstrap capacitor Cb. The gate of the auxiliary MOSFET M8 is connected to the sampling signal. The inverted level is 1, with its source connected to the input Vin. To ensure optimized circuit performance, the channel length L of the auxiliary MOSFET M8 is the same as that of its corresponding switching MOSFET M6, while its channel width W is initially set to half that of the switching MOSFET M6, meaning the width-to-length ratio of the auxiliary MOSFET M8 is half that of the switching MOSFET M6.

[0028] In actual operation, when the sampling signal When switching to a low level, the switching MOSFET M6 is turned off, while the auxiliary MOSFET M8 is turned on. At this time, the auxiliary MOSFET M8 quickly pulls the voltage level at the lower end of the bootstrap capacitor Cb down to ground potential, thus significantly shortening the time required for the voltage to reach a stable state. Simultaneously, due to the fast response characteristics of the auxiliary MOSFET M8, it effectively suppresses negative fluctuations caused by parasitic inductance and capacitive coupling, and accelerates the voltage level towards a stable state. This process has been verified through simulation waveforms.

[0029] like Figure 6 As shown. From Figure 6 It can be clearly observed that after adding the auxiliary MOSFET M8, when the sampling signal... When the switching occurs, the stabilization time of the voltage across the bootstrap capacitor Cb is significantly shortened, and the negative fluctuation amplitude is greatly reduced.

[0030] Figure 6 In the middle, from top to bottom, are the voltages at the upper and lower ends of the bootstrap capacitor Cb, and the gate terminal of M6. 1. Voltage. A comparison of the waveforms of the upper and lower voltages, including those without and with M8, clearly shows that the voltage settle time is shorter after the improvement, meeting design expectations.

[0031] In practical applications, this improved bootstrap switching circuit can be widely used in power management or signal processing systems in high-frequency scenarios. For example, in the design of switching power supplies, traditional bootstrap switching circuits often fail to meet the requirements of high-frequency switching due to their long voltage stabilization time. By introducing an auxiliary MOSFET M8, the operating frequency of the circuit can be significantly improved, making it suitable for higher frequency switching operations.

[0032] In specific implementation, such as Figure 5 As shown, at the position of the bootstrap switch circuit, a MOS transistor M8 is added corresponding to the lower end of the bootstrap capacitor switching MOS transistor M6.

[0033] The drain terminal of this MOSFET is connected to the lower end of the bootstrap capacitor, just like the drain terminal of the switching MOSFET. In one state of the switching sequence, this segment will be connected to the input signal Vin.

[0034] The source terminal of this MOSFET is connected to the input signal Vin.

[0035] The gate of this MOSFET is connected to the control clock sampling signal. 1, and its phase is opposite to the phase of the gate terminal of the switch MOSFET.

[0036] For this MOSFET, assuming the range (L) is the same as that of the switching MOSFET, the initial W value is generally chosen to be half the W value of the switching MOSFET. Under this condition, the settling time will generally be optimized. Due to the differences in different semiconductor processes, it is also possible to make minor adjustments to this initial W, and find the optimal performance point through simulation or testing.

[0037] The various embodiments of the present invention have been described above. These descriptions are exemplary and not exhaustive, nor are they limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments.

Claims

1. A bootstrap switching circuit with high response speed, the bootstrap switching circuit comprising MOSFETs M1-M7, Ma, Mb, bootstrap capacitor Cb, and load capacitor C1; The source of MOSFET M5 is connected to the power supply Vdd, and the gate of MOSFET M5 is connected to the drains of MOSFETs M3 and M7, and the gates of MOSFETs M2 and M1. The drain of MOSFET M5 is connected in series with a bootstrap capacitor Cb and then to the drain of MOSFET M6 and the source of MOSFET M3. The gate of MOSFET M7 is connected to the power supply Vdd, and the source is connected to the drain of MOSFET M4. The source of MOSFET M4 is grounded. The source of MOSFET M2 is connected to the source of MOSFET Mb and the drain of MOSFET M6. The drain of MOSFET M2 is connected to the input signal Vin and the source of MOSFET M1. The drain of MOSFET M1 serves as the output signal Vout and is also connected in series with a load capacitor C1 and then grounded. The drain of MOSFET Mb is connected to the drain of MOSFET Ma and the gate of MOSFET M3. The source of MOSFET Ma is connected to the power supply Vdd, and the source of MOSFET M6 is grounded. The gates of the MOS transistors M4 and M6 receive sampling signals.

1. The gates of MOSFETs Ma and Mb are connected and receive the sampling signal. The inverted signal of 1; Its features A MOS transistor M8 is located next to the MOS transistor M6 at the lower end of the bootstrap capacitor Cb. The drain of the MOS transistor M8 is connected to the lower end of the bootstrap capacitor Cb, and the gate is connected to the sampling signal. The inverted signal of 1, the source-connected input signal Vin, in the sampling signal When 1 switches to low level, the lower end of the bootstrap capacitor Cb will be connected to the input signal Vin.

2. The bootstrap switching circuit with high response speed as described in claim 1, characterized in that... The initial width W of the MOS transistor M8 is half the width of the MOS transistor M6, and the length L is the same as that of the MOS transistor M6.

3. The bootstrap switching circuit with high response speed as described in claim 2, characterized in that... The aspect ratio of the MOS transistor M8 is adjusted through simulation or testing to reduce the negative fluctuation dip at the lower end of the bootstrap capacitor Cb, allowing the voltage to rise rapidly.

4. The bootstrap switching circuit with high response speed as described in claim 1, characterized in that... When sampling signal When the voltage is high, MOSFETs M6, M4, M7, and M5 are turned on, while MOSFETs M3, M2, and M1 are turned off. The bootstrap capacitor Cb is charged to the power supply voltage Vdd.

5. The bootstrap switching circuit with high response speed as described in claim 4, characterized in that... When sampling signal When 1 switches to low level, MOSFETs M6, M4, and M5 are turned off, and the lower end of the bootstrap capacitor Cb is connected to the input signal Vin.

6. The bootstrap switching circuit with high response speed as described in claim 1, characterized in that... MOSFETs M3, M5, and Ma are P-type MOSFETs.

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