Temperature control method, device, equipment and medium for dynamic burn-in of integrated circuits

Abstract

The application relates to a temperature control method, device, equipment and medium for dynamic burn-in of an integrated circuit, wherein the method comprises the following steps: in the process of dynamic burn-in of a to-be-tested integrated circuit, according to a burn-in temperature control strategy, the burn-in temperature of the to-be-tested integrated circuit in the burn-in process is controlled until a preset burn-in time length is reached; wherein the burn-in temperature control strategy comprises the following steps: according to a first temperature value and a target temperature value of the to-be-tested integrated circuit, a first control strategy of the burn-in temperature is determined; according to a second temperature value, a power consumption value and a preset temperature-power consumption mapping relationship model of the to-be-tested integrated circuit, a second control strategy of the burn-in temperature is determined; the second temperature value is a temperature value of the to-be-tested integrated circuit obtained after the first control strategy is adjusted. In this way, the trend of temperature rise or fall of a high-power integrated circuit can be predicted in advance, so that the controller can send a temperature rise or fall control signal in advance, and compared with a traditional method based on temperature regulation and control only, the temperature control precision is higher.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of integrated circuit burn-in, and in particular to a temperature control method, device, equipment and medium for integrated circuit dynamic burn-in. BACKGROUND

[0002] For high-power integrated circuits, dynamic burn-in technology can be used to screen out potentially failed products to improve the reliability and stability of the entire product batch.

[0003] In related technologies, when dynamic burn-in technology is used to burn-in high-power integrated circuits, there may be a problem of low temperature control accuracy for high-power integrated circuits during burn-in. SUMMARY

[0004] Therefore, it is necessary to provide a temperature control method, device, equipment and medium for integrated circuit dynamic burn-in to solve the above technical problems.

[0005] In a first aspect, the present application provides a temperature control method for integrated circuit dynamic burn-in, which comprises:

[0006] During the dynamic burn-in of the to-be-tested integrated circuit, according to a burn-in temperature control strategy, the burn-in temperature of the to-be-tested integrated circuit during the burn-in process is controlled until a preset burn-in time length is reached.

[0007] The burn-in temperature control strategy comprises:

[0008] According to a first temperature value and a target temperature value of the to-be-tested integrated circuit, a first control strategy of the burn-in temperature is determined.

[0009] According to a second temperature value, a power consumption value and a preset temperature-power consumption mapping relationship model of the to-be-tested integrated circuit, a second control strategy of the burn-in temperature is determined. The second temperature value is a temperature value of the to-be-tested integrated circuit obtained after adjustment based on the first control strategy.

[0010] In one of the embodiments, according to the second temperature value, the power consumption value and the preset temperature-power consumption mapping relationship model of the to-be-tested integrated circuit, the second control strategy of the burn-in temperature is determined, which comprises:

[0011] The second temperature value and the power consumption value are input into the preset temperature-power consumption mapping relationship model to obtain a power consumption prediction value.

[0012] In the case where the power consumption value is greater than the power consumption prediction value, the second control strategy is determined as a heat dissipation control strategy.

[0013] In the case where the power consumption value is not greater than the power consumption prediction value, the second control strategy is determined as a heating control strategy.

[0014] In one embodiment, the method further includes:

[0015] Acquire the temperature and power consumption sequences of the sample integrated circuit during the dynamic aging process;

[0016] A nonlinear model is used to fit the temperature and power consumption sequences to establish a preset temperature-power consumption mapping model.

[0017] In one embodiment, the nonlinear model includes: ;in, and , It is the total number of temperature sample values ​​in the temperature sequence of the sample integrated circuit. It is the total number of power consumption sample values ​​in the power consumption sequence of the sample integrated circuit. This is the predicted power consumption value. It is the first in the temperature sequence of the sample integrated circuit. Each temperature sample value, yes The weight, This is a correction factor.

[0018] In one embodiment, a nonlinear model is used to fit the temperature sequence and power consumption sequence to establish a preset temperature-power consumption mapping model, including:

[0019] A nonlinear model is used to fit the temperature and power consumption sequences, and the nonlinear model is updated accordingly. and A preset temperature-power consumption mapping model is obtained.

[0020] In one embodiment, obtaining the temperature sequence and power consumption sequence of the sample integrated circuit during the dynamic aging process includes:

[0021] During the dynamic aging process of the sample integrated circuit, a temperature sensor is used to obtain and store the initial temperature value of the sample integrated circuit.

[0022] During the dynamic curing process of the sample integrated circuit, a power measurement device is used to acquire the current and voltage values ​​of the sample integrated circuit, convert the current and voltage values ​​into initial power consumption values, and store the initial power consumption values.

[0023] The initial temperature and initial power consumption values ​​are read in a first-in-first-out manner. The read initial temperature and initial power consumption values ​​are then time-aligned to obtain the temperature sequence and power consumption sequence.

[0024] In one of the embodiments, the first control strategy of the burn-in temperature is determined according to a first temperature value of the integrated circuit to be tested and a target temperature value, including:

[0025] In the case that the first temperature value is greater than the target temperature value, the first control strategy is determined as a heat dissipation control strategy;

[0026] In the case that the first temperature value is not greater than the target temperature value, the first control strategy is determined as a heating control strategy.

[0027] In a second aspect, the present application further provides a temperature control device for dynamic burn-in of an integrated circuit, which includes:

[0028] A burn-in temperature control module is configured to control the burn-in temperature of the integrated circuit to be tested during the dynamic burn-in of the integrated circuit to be tested according to the burn-in temperature control strategy until a preset burn-in time length is reached; the burn-in temperature control module includes a first control strategy determination sub-module and a second control strategy determination sub-module;

[0029] The first control strategy determination sub-module is configured to determine the first control strategy of the burn-in temperature according to a first temperature value of the integrated circuit to be tested and a target temperature value.

[0030] The second control strategy determination sub-module is configured to determine the second control strategy of the burn-in temperature according to a second temperature value, a power consumption value of the integrated circuit to be tested and a preset temperature-power consumption mapping relationship model; the second temperature value is a temperature value of the integrated circuit to be tested obtained after adjustment based on the first control strategy.

[0031] In a third aspect, the present application further provides a computer device including a memory and a processor, the memory stores a computer program, and the processor implements the following steps when executing the computer program:

[0032] In the process of dynamic burn-in of the integrated circuit to be tested, the burn-in temperature of the integrated circuit to be tested during the burn-in is controlled according to the burn-in temperature control strategy until a preset burn-in time length is reached;

[0033] The burn-in temperature control strategy includes:

[0034] The first control strategy of the burn-in temperature is determined according to a first temperature value of the integrated circuit to be tested and a target temperature value.

[0035] The second control strategy of the burn-in temperature is determined according to a second temperature value, a power consumption value of the integrated circuit to be tested and a preset temperature-power consumption mapping relationship model; the second temperature value is a temperature value of the integrated circuit to be tested obtained after adjustment based on the first control strategy.

[0036] In a fourth aspect, the present application provides a computer readable storage medium, having stored thereon a computer program, the computer program being executed by a processor to implement the following steps:

[0037] In the process of dynamically aging the integrated circuit under test, the aging temperature of the integrated circuit under test in the aging process is controlled according to the aging temperature control strategy until a preset aging time length is reached.

[0038] The aging temperature control strategy includes:

[0039] A first control strategy of the aging temperature is determined according to a first temperature value of the integrated circuit under test and a target temperature value.

[0040] A second control strategy of the aging temperature is determined according to a second temperature value, a power consumption value and a preset temperature-power consumption mapping relationship model of the integrated circuit under test; the second temperature value is a temperature value of the integrated circuit under test obtained after adjustment based on the first control strategy.

[0041] In a fifth aspect, the present application provides a computer program product, comprising a computer program, the computer program being executed by a processor to implement the following steps:

[0042] In the process of dynamically aging the integrated circuit under test, the aging temperature of the integrated circuit under test in the aging process is controlled according to the aging temperature control strategy until a preset aging time length is reached.

[0043] The aging temperature control strategy includes:

[0044] A first control strategy of the aging temperature is determined according to a first temperature value of the integrated circuit under test and a target temperature value.

[0045] A second control strategy of the aging temperature is determined according to a second temperature value, a power consumption value and a preset temperature-power consumption mapping relationship model of the integrated circuit under test; the second temperature value is a temperature value of the integrated circuit under test obtained after adjustment based on the first control strategy.

[0046] The temperature control method, device, equipment and medium for dynamic burn-in of the integrated circuit provided by the above-mentioned application, in the process of dynamic burn-in of the integrated circuit to be tested, the burn-in temperature of the integrated circuit to be tested is controlled according to the burn-in temperature control strategy until the preset burn-in time length is reached; wherein the burn-in temperature control strategy comprises: determining a first control strategy of the burn-in temperature according to a first temperature value and a target temperature value of the integrated circuit to be tested; determining a second control strategy of the burn-in temperature according to a second temperature value, a power consumption value and a preset temperature-power consumption mapping relationship model of the integrated circuit to be tested; the second temperature value is a temperature value of the integrated circuit to be tested obtained after adjustment based on the first control strategy. The temperature control method for dynamic burn-in of the integrated circuit of the application can predict the trend of temperature rise or fall of the high-power integrated circuit in advance by establishing a temperature-power consumption mapping relationship model combined with power consumption information, so that the controller can send a control signal for temperature rise or fall in advance. Compared with the traditional method based on temperature regulation only, the temperature control precision is higher; in addition, the response time of independent temperature control of the high-power integrated circuit can be shortened, thereby reducing the hysteresis of temperature regulation, and the burn-in temperature can be adjusted more timely, thereby improving the temperature control efficiency. BRIEF DESCRIPTION OF DRAWINGS

[0047] Figure 1 The application environment diagram of the temperature control method for dynamic burn-in of the integrated circuit provided by some embodiments of the application is provided;

[0048] Figure 2 The flowchart of the burn-in temperature control strategy provided by some embodiments of the application is provided;

[0049] Figure 3 The flowchart of determining the second control strategy provided by some embodiments of the application is provided;

[0050] Figure 4 The flowchart of establishing the preset temperature-power consumption mapping relationship model provided by some embodiments of the application is provided;

[0051] Figure 5 The flowchart of obtaining the temperature sequence and the power consumption sequence provided by some embodiments of the application is provided;

[0052] Figure 6 The flowchart of determining the first control strategy provided by some embodiments of the application is provided;

[0053] Figure 7 The flowchart of the temperature control method for dynamic burn-in of the integrated circuit provided by one detailed embodiment of the application is provided;

[0054] Figure 8 The structural block diagram of the temperature control device for dynamic burn-in of the integrated circuit provided by some embodiments of the application is provided;

[0055] Figure 9This is an internal structural diagram of a computer device provided in some embodiments of this application. Detailed Implementation

[0056] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0057] The temperature control method for dynamic aging of integrated circuits provided in this application embodiment can be applied to, for example... Figure 1 The test system shown includes a fixture, a temperature sensor, a power measurement device, a power supply, and a controller. The fixture is a temperature-controlled fixture, specifically one with both heating and cooling devices. This fixture is used to fix the integrated circuit under test (ICD) and can heat the ICD via the heating device or dissipate heat via the cooling device. The temperature sensor, mounted on the fixture, acquires the casing temperature of the ICD to obtain its temperature value during the aging process. The power measurement device, located in the circuit between the power supply and the ICD, acquires the supply voltage and current of the ICD during the aging process to determine its power consumption based on the product of the supply voltage and current. The power supply provides a stable power supply to the ICD and the temperature-controlled fixture. The controller is an FPGA (Field Programmable Gate Array). The main controller of the field-programmable gate array (FPGA) is used to load and configure the curing vector of the integrated circuit under test, and to receive temperature data from the temperature sensor and power consumption value from the power measurement device during the curing process. The controller can also execute the temperature control method for dynamic curing of integrated circuits provided in the embodiments of this application to control the heating device or heat dissipation device on the fixture, thereby achieving precise temperature control during the dynamic curing process of the integrated circuit under test.

[0058] In one embodiment, the method is applied to Figure 1 The method is illustrated using a controller as an example. In this embodiment, the method includes: during the dynamic aging process of the integrated circuit under test, controlling the aging temperature of the integrated circuit under test during the aging process according to the aging temperature control strategy, until the preset aging time is reached.

[0059] The integrated circuit to be tested is an integrated circuit product that needs to be detected and screened to determine whether it is likely to fail during dynamic burn-in. The burn-in technology in this embodiment is a screening technology applied to integrated circuits and other electronic devices, aiming to simulate the actual use environment and working conditions, accelerate the early failure process of electronic devices, and screen out products with potential defects and easy failure, thereby improving the reliability and stability of the entire product batch. The preset burn-in duration is the duration of the burn-in before the dynamic burn-in of the integrated circuit. The preset duration can be determined based on the type of integrated circuit, application scenario, and experience data.

[0060] As shown in Figure 2 The burn-in temperature control strategy in this embodiment includes the following steps:

[0061] Step 202, determining a first control strategy of the burn-in temperature according to a first temperature value of the integrated circuit to be tested and a target temperature value.

[0062] The first temperature value is the temperature value obtained by real-time sampling of the shell temperature / surface environmental temperature of the integrated circuit to be tested using a high-precision temperature sensor integrated in the temperature control fixture at the initial stage of dynamic burn-in. The target temperature value is the target burn-in temperature value preset before dynamic burn-in, which can be set to 125℃, for example. The first control strategy is a preliminary control strategy of the burn-in temperature determined according to the comparison result of the first temperature value and the target temperature value. If the first temperature value is higher than the target temperature value, heat dissipation control can be started; if the first temperature value is lower than the target temperature value, heating control can be started.

[0063] Optionally, the first temperature value of the integrated circuit to be tested can be collected in real time by the FPGA master control using the high-precision temperature sensor in the temperature control fixture, and the collected first temperature value can be compared with the preset target temperature value. If the first temperature value is not higher than the target temperature value, the FPGA master control sends a heating control signal to the temperature control fixture to start the heating unit; if the first temperature value is higher than the target temperature value, the FPGA master control sends a heat dissipation control signal to the temperature control fixture to start the heat dissipation unit.

[0064] Step 204, determining a second control strategy of the burn-in temperature according to a second temperature value of the integrated circuit to be tested, a power consumption value, and a preset temperature-power consumption mapping relationship model.

[0065] The second temperature value is the temperature value of the integrated circuit under test collected by the high-precision temperature sensor in the temperature control clamp again after the burn-in temperature is adjusted based on the first control strategy through the FPGA master control. The power consumption value is obtained by multiplying the voltage value and the current value collected by the FPGA master control on the power supply voltage and the power supply current of the integrated circuit under test. The temperature-power consumption mapping relationship model is a model obtained by modeling the relationship between the collected temperature and power consumption through machine learning. The temperature-power consumption mapping relationship model is used to determine the second control strategy of the burn-in temperature according to the second temperature value and the power consumption value, and to obtain the target power consumption value combined with the model, so as to realize more accurate control of the burn-in temperature. The second control strategy is a further control strategy of the burn-in temperature determined according to the second temperature value, the power consumption value and the preset temperature-power consumption mapping relationship model of the integrated circuit under test.

[0066] Optionally, after adjusting the burn-in temperature based on the first control strategy, the second temperature value of the integrated circuit under test is collected again by the high-precision temperature sensor in the temperature control clamp through the FPGA master control; the power supply voltage and the power supply current of the integrated circuit under test are collected by the FPGA master control, and the power consumption value is converted; the second temperature value and the power consumption value are substituted into the preset temperature-power consumption mapping relationship model to obtain the target power consumption value; the second temperature value is compared with the target temperature value, and the power consumption value is compared with the target power consumption value; if the second temperature value is greater than the target temperature value or the power consumption value is greater than the target power consumption value, the FPGA master control sends a heat dissipation control signal to the temperature control clamp to start the heat dissipation unit; if the second temperature value is not greater than the target temperature value or the power consumption value is not greater than the target power consumption value, the FPGA master control sends a heating control signal to the temperature control clamp to start the heating unit.

[0067] The temperature control method for dynamic burn-in of the integrated circuit can predict the trend of temperature rise or fall of the high-power integrated circuit in advance by establishing a temperature-power consumption mapping relationship model combined with power consumption information, so that the controller can send a temperature rise or fall control signal in advance. Compared with the traditional method based on temperature regulation alone, the temperature control accuracy is higher; in addition, the response time of the independent temperature control of the high-power integrated circuit is shortened, and the hysteresis of temperature regulation is reduced, so that the burn-in temperature can be adjusted more timely, and the temperature control efficiency is improved.

[0068] In one embodiment, as shown in FIG. 3, Figure 3 determining the second control strategy of the burn-in temperature according to the second temperature value, the power consumption value and the preset temperature-power consumption mapping relationship model of the integrated circuit under test, comprises:

[0069] Step 302: input the second temperature value and the power consumption value into the preset temperature-power consumption mapping relationship model to obtain the power consumption prediction value.

[0070] The power consumption prediction value is a theoretical power consumption value calculated by the model according to the mapping rule in the model after the second temperature value and the power consumption value are input into the preset temperature-power consumption mapping relationship model.

[0071] Optionally, a multilayer perceptron (MLP) in a neural network model can be used to construct the preset temperature-power consumption mapping relationship model, the network includes an input layer, multiple hidden layers and an output layer; a large amount of historical temperature and power consumption data is used to train the model, and in the training process, a stochastic gradient descent or other improved algorithm (such as Adam optimization algorithm) is used to adjust the weights and biases of the network to minimize the mean square error between the prediction value and the actual value, thereby completing the model construction. In the prediction process, the collected second temperature value and power consumption value can be normalized to make the value range between 0 and 1, so as to improve the training and prediction efficiency of the model; the normalized second temperature value and power consumption value are input into the trained multilayer perceptron model, the model will calculate according to the input data through the nonlinear transformation and weighted summation of the hidden layer, and finally obtain the power consumption prediction value in the output layer.

[0072] Step 304, in the case that the power consumption value is greater than the power consumption prediction value, determining that the second control strategy is a heat dissipation control strategy.

[0073] The heat dissipation control strategy refers to a strategy of taking measures to reduce the temperature of the burn-in environment and reduce the heat accumulation of the integrated circuit, thereby reducing the power consumption. The heat dissipation control strategy can specifically include increasing the power of the heat dissipation device, increasing the speed of the heat dissipation fan, turning on the refrigeration device and the like.

[0074] Optionally, the actual power consumption value collected is compared with the power consumption prediction value calculated in step 202, if the actual power consumption value is greater than the power consumption prediction value, the heat dissipation control logic is triggered, the FPGA master sends a heat dissipation control signal to the temperature control fixture, and the heat dissipation unit is started. The heat dissipation unit can include a fan, a heat sink, a refrigeration device and the like, and the temperature of the integrated circuit to be measured is reduced by increasing air flow, conducting heat or refrigeration and the like.

[0075] Step 306, in the case that the power consumption value is not greater than the power consumption prediction value, determining that the second control strategy is a heating control strategy.

[0076] The heating control strategy refers to a series of operation methods for increasing the heat input of the burn-in environment and increasing the burn-in temperature, and the heating control strategy can specifically include increasing the power of the heating device, increasing the heating time and the like, so as to promote the power consumption of the integrated circuit to be measured to rise to the vicinity of the target power consumption value.

[0077] Optionally, when the actual power consumption value is not greater than the power consumption prediction value, heating control logic is triggered, and the FPGA master sends a heating control signal to the temperature control fixture to start the heating unit. The heating unit can be a heating wire, a heating plate, etc., which generates heat to increase the temperature of the integrated circuit under test.

[0078] In this embodiment, the preset temperature-power consumption mapping relationship model can more accurately predict the power consumption of the integrated circuit under test, and then adjust the burn-in temperature according to the comparison result of the actual power consumption and the predicted power consumption, so that the temperature control is more accurate. The temperature control method of the integrated circuit dynamic burn-in of the embodiment can make the temperature control precision ≤±3℃.

[0079] In one embodiment, as shown in Figure 4 , the method further comprises:

[0080] Step 402, obtaining a temperature sequence and a power consumption sequence of a sample integrated circuit during dynamic burn-in of the sample integrated circuit.

[0081] The sample integrated circuit is usually an integrated circuit of the same production batch as the integrated circuit under test. The temperature sequence of the sample integrated circuit refers to collecting the temperature of the sample integrated circuit at certain time intervals through a temperature collection device (such as a thermocouple, a thermistor, etc.) during the burn-in of the sample integrated circuit, and arranging the obtained series of temperature values in the order of collection time to form a temperature sequence, denoted as T i , where For example, the temperature is collected every 1 minute, and 100 times of collection are performed, so that , 1, 2, …, is the temperature collected for the first time, is the temperature collected for the second time, and so on. The power consumption sequence of the sample integrated circuit is also determined during the burn-in by measuring the supply voltage and supply current of the sample integrated circuit, and calculating the power consumption value at each time point according to the formula , where is the power consumption, is the voltage, and is the current. Arranging these power consumption values in the order of collection time obtains the power consumption sequence, denoted as , where

[0082] ​Optionally, a temperature acquisition device can be installed in the burn-in device and closely contact or approach the sample integrated circuit to accurately measure the temperature of the integrated circuit. The temperature data is transmitted to the FPGA master through a data acquisition card or a sensor interface. A suitable temperature sampling frequency is set, for example, according to the size of the power of the sample integrated circuit, the temperature is collected once per second or once every few minutes. In the FPGA master, the collected temperature data is time-stamped and stored in the data storage module in a first-in, first-out mode, constantly updating the old data.

[0083] The power supply voltage and current of the sample integrated circuit are measured using a power measuring device (such as a power meter, multimeter, etc.), and then the power consumption value is calculated according to the formula P = VI through the calculation module in the FPGA master. Similarly, the power consumption data is time-stamped and stored in the data storage module, and the data is updated in a first-in, first-out mode.

[0084] Step 404, a nonlinear model is used to fit the temperature sequence and the power consumption sequence, and a preset temperature-power consumption mapping relationship model is established.

[0085] Among them, considering the complex nonlinear relationship between temperature value and power consumption value, the nonlinear model can be logistic regression, polynomial fitting and support vector machine (Support Vector Machine, SVM) and the like.

[0086] In this embodiment, the nonlinear model is used to fit the real temperature sequence and the power consumption sequence of the sample integrated circuit obtained in the dynamic burn-in process, which can capture the complex nonlinear change rule between temperature and power consumption. Compared with a simple linear model, the mapping relationship between the two can be more accurately described, thereby providing a more reliable basis for subsequent burn-in temperature control.

[0087] In one embodiment, the nonlinear model includes: ; wherein, and , is the total number of temperature sample values in the temperature sequence of the sample integrated circuit, is the total number of power consumption sample values in the power consumption sequence of the sample integrated circuit, is the power consumption prediction value, is the temperature sample value in the temperature sequence of the sample integrated circuit, is the weight of , is a correction factor.

[0088] Specifically, the nonlinear model can be iteratively fitted based on the following loss function:

[0089] ;

[0090] wherein, is the mean square error; is the number of samples; is the predicted value of the power consumption value; is the actual value of the power consumption value.

[0091] In the iteration process, an optimization algorithm (such as gradient descent, least squares, etc.) can be used to optimize the parameters of the model, so that the error between the predicted value of the model and the actual power consumption value is minimized, that is, the function value of the loss function, that is, the loss value can be less than the preset loss value, so that the final temperature-power consumption mapping relationship model can be obtained.

[0092] In this embodiment, the nonlinear model is used to capture the nonlinear relationship between the temperature and the power consumption of the integrated circuit in practice, which can better fit the actual data, thereby improving the accuracy of power consumption prediction.

[0093] In one embodiment, a nonlinear model is used to fit the temperature sequence and the power consumption sequence, and a preset temperature-power consumption mapping relationship model is established, including:

[0094] The nonlinear model is used to fit the temperature sequence and the power consumption sequence, and the weight and the correction factor in the nonlinear model are updated to obtain the preset temperature-power consumption mapping relationship model.

[0095] Optionally, the weight and the correction factor in the aforementioned nonlinear model can be initialized first, that is, the weight can be initialized as a set of random small values, for example, randomly selected in the interval [-0.1, 0.1], can be initialized as 0; then the mean square error loss function is used to measure the error between the predicted value of the model and the actual value; then the gradient descent method is used to optimize the parameters of the model, so that the error between the predicted value of the model and the actual power consumption value is minimized, that is, the function value of the loss function, that is, the loss value can be less than the preset loss value, so that the final temperature-power consumption mapping relationship model can be obtained.

[0096] In one embodiment, as shown in Figure 5 , the temperature sequence and the power consumption sequence of the sample integrated circuit during dynamic burn-in are obtained, including:

[0097] Step 502, during dynamic burn-in of the sample integrated circuit, an initial temperature value of the sample integrated circuit is obtained by using a temperature sensor, and the initial temperature value is stored.

[0098] The initial temperature value of the sample integrated circuit is a temperature value of the sample integrated circuit obtained by the temperature sensor during dynamic aging of the sample integrated circuit.

[0099] Optionally, the temperature sensor can be connected to a data acquisition system (such as a data acquisition card), a suitable sampling frequency is set, and the initial temperature value of the sample integrated circuit is started to be collected. The data acquisition system converts the collected temperature data into digital signals and transmits them to the FPGA master or other storage devices. In the FPGA master or storage device, a data storage queue is created, and the initial temperature value is stored in the queue in chronological order. A FIFO storage module can be used to implement the first-in first-out storage mode.

[0100] In step 504, the power measurement device is used to obtain the current value and voltage value of the sample integrated circuit during dynamic aging of the sample integrated circuit, and the current value and voltage value are converted into an initial power consumption value, and the initial power consumption value is stored.

[0101] Optionally, the current value and voltage value of the sample integrated circuit measured by the power measurement device (such as a power meter, a multimeter, etc.) are multiplied to obtain the corresponding initial power consumption value.

[0102] In step 506, the initial temperature value and the initial power consumption value are read in a first-in first-out manner, and the read initial temperature value and the read initial power consumption value are time-aligned to obtain a temperature sequence and a power consumption sequence.

[0103] The first-in first-out manner is a data storage and reading strategy, in which new data is sequentially added to the tail of the data queue when storing data, and the data stored first is read first when reading data. The time alignment of the read initial temperature value and the read initial power consumption value means that the temperature data and the power consumption data are matched and corresponded according to the collection time. Since the sampling frequencies of the temperature sensor and the power measurement device may be different, or there is a certain time deviation during data collection, the collected temperature value and power consumption value may not be completely synchronized in time. Time alignment is to ensure that each temperature value can correspond to the power consumption value at the same time or at a similar time, so as to accurately analyze the relationship between temperature and power consumption and provide accurate data basis for subsequent mapping model establishment.

[0104] Optionally, the initial temperature value and the initial power consumption can be read from the head of the temperature data storage queue and the power consumption data storage queue in sequence; in the FPGA master control, the temperature data and the power consumption data are time-aligned by using an interpolation or matching algorithm according to the time marks of the temperature data and the power consumption data; if the sampling frequency of the temperature data is higher than that of the power consumption data, the power consumption value at the same time as the temperature value can be estimated by using a linear interpolation method according to the adjacent two power consumption values and the corresponding time; if the sampling frequencies of the two are similar, the temperature value and the power consumption value at the same time or within the allowable time difference can be matched according to the time marks; finally, the temperature value and the power consumption value after the time alignment are used to form a temperature sequence and a power consumption sequence, which are used for subsequent modeling of the mapping relationship.

[0105] In this embodiment, the initial temperature value and the initial power consumption are accurately collected and time-aligned, which can ensure the data accuracy and consistency of the temperature sequence and the power consumption sequence, thereby providing reliable data basis for subsequent modeling of the temperature-power consumption mapping model, and further improving the fitting precision and prediction accuracy of the model; the data is stored and read in the first-in first-out manner, so that the system can obtain the latest temperature and power consumption information of the sample integrated circuit in real time; in addition, the time alignment of the read initial temperature value and the read initial power consumption facilitates data analysis and processing, and can more accurately analyze the relationship between the temperature and the power consumption, thereby providing a basis for subsequent modeling of the temperature-power consumption mapping relationship.

[0106] In one embodiment, as shown in FIG. 6, Figure 6 According to the first temperature value and the target temperature value of the integrated circuit to be tested, a first control strategy of the burn-in temperature is determined, including:

[0107] In step 602, if the first temperature value is greater than the target temperature value, the first control strategy is determined as a heat dissipation control strategy.

[0108] It can be understood that a too high temperature can cause damage to the integrated circuit to be tested, affecting its performance and service life, and therefore, in the case that the first temperature value is greater than the target temperature value, the first control strategy needs to be determined first to make a preliminary adjustment to the burn-in temperature of the integrated circuit to be tested according to the first control strategy.

[0109] Optionally, a fan can be used as a heat dissipation device, and a fan with a suitable size and air volume can be selected according to the power and heat dissipation requirements of the integrated circuit; a heat dissipation control program can be written in the FPGA master control or other controllers to control the heat dissipation device. For example, the greater the difference, the higher the fan speed. The fan speed can be controlled by using a pulse width modulation (PWM) technology, the average voltage applied to the fan motor is changed by changing the duty cycle of the PWM signal, thereby realizing accurate control of the fan speed.

[0110] Step 604, in the case that the first temperature value is not greater than the target temperature value, determining the first control strategy as a heating control strategy.

[0111] It can be understood that when the collected temperature value of the integrated circuit under test is less than the preset temperature value, it indicates that the temperature of the integrated circuit under test is lower than the expected working temperature. In this case, in order to make the integrated circuit under test reach a suitable burn-in temperature, heating measures need to be taken, and therefore the regulation and control strategy of the burn-in temperature is determined as a heating control strategy.

[0112] Optionally, taking resistance heating as an example, a heating resistor is arranged near the integrated circuit, and when heating is needed, the power supply of the heating resistor is turned on. The heating power can be adjusted by controlling the power-on time and current size of the heating resistor. For example, a timer is used to control the power-on time of the heating resistor, and the current size is adjusted according to the difference between the first temperature value and the target temperature value. The greater the difference, the greater the current, so as to speed up the heating speed.

[0113] In this embodiment, according to the comparison result of the first temperature value of the integrated circuit under test and the target temperature value, the heat dissipation or heating control strategy is flexibly selected to ensure the burn-in effect of the integrated circuit.

[0114] In one detailed embodiment, as shown in Figure 7 The temperature control method for dynamic burn-in of the integrated circuit specifically includes the following steps:

[0115] Step 701, setting a burn-in target temperature value and a preset burn-in time length.

[0116] Step 702, power-on of the FPGA master control and modules such as the integrated circuit under test.

[0117] Step 703, burn-in vector loading and configuration.

[0118] Step 704, real-time collection of power supply voltage and current data of the integrated circuit under test.

[0119] Step 705, power consumption data storage.

[0120] Step 706, real-time collection of the first temperature value of the integrated circuit under test.

[0121] Step 707, temperature data storage.

[0122] Step 708, judging whether the first temperature value is greater than the target temperature value, in the case that the first temperature value is greater than the target temperature value, executing step 709; otherwise, in the case that the first temperature value is not greater than the target temperature value, executing step 710.

[0123] Step 709, determining the first control strategy as a heat dissipation control strategy.

[0124] Step 710, determining the first control strategy as a heating control strategy.

[0125] Step 711, collecting a second temperature value and a power consumption value of the integrated circuit to be tested.

[0126] Wherein, after collecting the second temperature value and the power consumption value of the integrated circuit to be tested, the second temperature value and the power consumption value are also stored.

[0127] Step 712, inputting a preset temperature-power consumption mapping model to obtain a power consumption prediction value.

[0128] Step 713, judging whether the power consumption value is greater than the power consumption prediction value, and executing step 714 in the case that the power consumption value is greater than the power consumption prediction value; otherwise, executing step 715 in the case that the power consumption value is not greater than the power consumption prediction value.

[0129] Step 714, determining the second control strategy as a heat dissipation control strategy.

[0130] Step 715, determining the second control strategy as a heating control strategy.

[0131] Step 716, judging whether a preset burn-in time length is reached, and ending the burn-in in the case that the preset burn-in time length is reached; otherwise, returning to execute step 706 in the case that the preset burn-in time length is not reached.

[0132] It should be understood that, although each step in the flowchart involved in each embodiment as described above is displayed in sequence according to the arrow, these steps are not necessarily executed in sequence according to the arrow. Unless explicitly stated herein, the execution of these steps is not strictly limited in sequence, and these steps can be executed in other sequences. Moreover, at least part of the steps in the flowchart involved in each embodiment as described above can include multiple steps or multiple stages, which are not necessarily executed at the same time, but can be executed at different times, and the execution sequence of these steps or stages is not necessarily sequential, but can be executed in rotation or alternation with at least part of other steps or steps or stages in other steps.

[0133] Based on the same inventive concept, the embodiments of the present application also provide an integrated circuit dynamic burn-in temperature control device for implementing the temperature control method for the integrated circuit dynamic burn-in as described above. The implementation scheme for solving the problem provided by the device is similar to the implementation scheme described in the above method, and therefore the specific limitations in one or more integrated circuit dynamic burn-in temperature control device embodiments provided below can refer to the limitations of the integrated circuit dynamic burn-in temperature control method described above, which will not be repeated here.

[0134] In one embodiment, asFigure 8 As shown, a temperature control device for integrated circuit dynamic burn-in is provided, comprising: a burn-in temperature control module 800, a first control strategy determination submodule 802 and a second control strategy determination submodule 804, wherein:

[0135] The burn-in temperature control module is configured to control the burn-in temperature of the integrated circuit under test during the dynamic burn-in of the integrated circuit under test according to the burn-in temperature control strategy until a preset burn-in time is reached. The burn-in temperature control module comprises a first control strategy determination submodule and a second control strategy determination submodule.

[0136] The first control strategy determination submodule is configured to determine a first control strategy of the burn-in temperature according to a first temperature value of the integrated circuit under test and a target temperature value.

[0137] The second control strategy determination submodule is configured to determine a second control strategy of the burn-in temperature according to a second temperature value, a power consumption value and a preset temperature-power consumption mapping relationship model of the integrated circuit under test. The second temperature value is a temperature value of the integrated circuit under test obtained after adjustment based on the first control strategy.

[0138] In one embodiment, the second control strategy determination submodule 804 is further configured to: input the second temperature value and the power consumption value into the preset temperature-power consumption mapping relationship model to obtain a power consumption prediction value; determine the second control strategy as a heat dissipation control strategy in a case where the power consumption value is greater than the power consumption prediction value; and determine the second control strategy as a heating control strategy in a case where the power consumption value is not greater than the power consumption prediction value.

[0139] In one embodiment, the device is further configured to: obtain a temperature sequence and a power consumption sequence of a sample integrated circuit during dynamic burn-in of the sample integrated circuit; and perform fitting processing on the temperature sequence and the power consumption sequence using a nonlinear model to establish the preset temperature-power consumption mapping relationship model.

[0140] In one embodiment, the device is further configured to: determine that the nonlinear model comprises: ; wherein, and , is the total number of temperature sample values in the temperature sequence of the sample integrated circuit, is the total number of power consumption sample values in the power consumption sequence of the sample integrated circuit, is the power consumption prediction value, is the th temperature sample value in the temperature sequence of the sample integrated circuit, is the weight of , and is a correction factor.

[0141] In an embodiment, the apparatus is further configured to: fit the temperature sequence and the power consumption sequence by using a nonlinear model, update parameters in the nonlinear model, and obtain a preset temperature-power consumption mapping relationship model. and

[0142] In an embodiment, the apparatus is further configured to: obtain an initial temperature value of the sample integrated circuit by using the temperature sensor during a dynamic burn-in process of the sample integrated circuit, and store the initial temperature value; obtain a current value and a voltage value of the sample integrated circuit by using the power measurement apparatus during the dynamic burn-in process of the sample integrated circuit, convert the current value and the voltage value into an initial power consumption value, and store the initial power consumption value; read the initial temperature value and the initial power consumption value in a first-in-first-out manner, and perform time alignment processing on the read initial temperature value and the read initial power consumption value to obtain a temperature sequence and a power consumption sequence.

[0143] In an embodiment, the first control strategy determination sub-module 802 is further configured to: determine the first control strategy as a heat dissipation control strategy when the first temperature value is greater than the target temperature value; and determine the first control strategy as a heating control strategy when the first temperature value is not greater than the target temperature value.

[0144] The above-mentioned various modules in the temperature control apparatus for dynamic burn-in of an integrated circuit can be realized by software, hardware, and combinations thereof, in whole or in part. The above-mentioned various modules can be embedded in or independent of a processor in a computer device in a hardware form, or can be stored in a memory in a computer device in a software form, so as to be called and executed by a processor to perform operations corresponding to the above-mentioned various modules.

[0145] In an embodiment, a computer device is provided, which can be a controller in a burn-in device, and an internal structure diagram of the computer device can be as shown in Figure 9 ​As shown in the figure. The computer device includes a processor, a memory, a communication interface, a display screen and an input device connected through a system bus. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The communication interface of the computer device is used for wired or wireless communication with external terminals. Wireless mode can be achieved through WIFI, mobile cellular network, NFC (near field communication) or other technologies. The computer program is executed by the processor to implement a temperature control method for integrated circuit dynamic aging. The display screen of the computer device can be a liquid crystal display screen or an electronic ink display screen. The input device of the computer device can be a touch layer overlaid on the display screen, or a key, trackball or touchpad provided on the shell of the computer device. It can also be an external keyboard, touchpad or mouse, etc.

[0146] Those skilled in the art can understand that, Figure 9 The structure shown in the figure is only a block diagram of part of the structure related to the scheme of the present application, and does not constitute a limitation on the computer device to which the scheme of the present application is applied. The specific computer device can include more or fewer components than those shown in the figure, or combine certain components, or have a different component arrangement.

[0147] In one embodiment, a computer device is provided, including a memory and a processor, the memory storing a computer program, and the processor executing the computer program to implement the steps in the above method embodiments.

[0148] In one embodiment, a computer readable storage medium is provided, which stores a computer program, and the computer program is executed by a processor to implement the steps in the above method embodiments.

[0149] In one embodiment, a computer program product is provided, including a computer program, and the computer program is executed by a processor to implement the steps in the above method embodiments.

[0150] It should be noted that the user information (including but not limited to user equipment information, user personal information, etc.) and data (including but not limited to data for analysis, stored data, displayed data, etc.) involved in the present application are all information and data authorized by the user or authorized by all parties.

[0151] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program. The computer program can be stored in a non-volatile computer readable storage medium, and when the computer program is executed, the processes of the above-mentioned embodiments of the methods can be included. Any reference to memory, database or other medium used in the embodiments provided in the present application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical storage, high-density embedded non-volatile memory, resistive memory (ReRAM), magnetoresistive random access memory (MRAM), ferroelectric memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. As an illustration but not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM), etc. The database involved in the embodiments provided in the present application can include at least one of a relational database and a non-relational database. The non-relational database can include a distributed database based on a block chain, etc., without being limited thereto. The processor involved in the embodiments provided in the present application can be a general-purpose processor, a central processing unit, a graphics processing unit, a digital signal processor, a programmable logic device, a data processing logic device based on quantum computing, etc., without being limited thereto.

[0152] Any combination of the technical features of the above embodiments can be made. In order to make the description simple, all possible combinations of the technical features in the above embodiments are not described, however, as long as the combination of the technical features does not exist, it should be considered as the scope of the present application.

[0153] The above embodiments only express several implementation manners of the present application, and the description is more specific and detailed, but it should not be understood as a limitation on the scope of the patent of the present application. It should be pointed out that for ordinary skilled in the art, without departing from the concept of the present application, a number of modifications and improvements can be made, which are within the scope of protection of the present application. Therefore, the protection scope of the present application should be subject to the appended claims.

Claims

1. A temperature control method for dynamic aging of integrated circuits, characterized in that, The method includes: During the dynamic aging process of the integrated circuit under test, the aging temperature is controlled according to the aging temperature control strategy until the preset aging time is reached. The aging temperature control strategy includes: Based on the first temperature value and the target temperature value of the integrated circuit under test, a first control strategy for aging temperature is determined; the first temperature value is the temperature value obtained by real-time sampling of the case temperature / surface ambient temperature of the integrated circuit under test. The second temperature value and power consumption value are input into a preset temperature-power consumption mapping model to obtain a predicted power consumption value. If the power consumption value is greater than the predicted power consumption value, the second control strategy is determined to be a heat dissipation control strategy. If the power consumption value is not greater than the predicted power consumption value, the second control strategy is determined to be a heating control strategy. The second temperature value is the temperature value of the integrated circuit under test obtained after adjusting the first control strategy. The power consumption value is the power consumption value of the integrated circuit under test obtained after adjusting the first control strategy.

2. The method according to claim 1, characterized in that, The method further includes: The temperature and power consumption sequences of the sample integrated circuit are obtained during the dynamic aging process. A nonlinear model is used to fit the temperature sequence and the power consumption sequence to establish the preset temperature-power consumption mapping relationship model.

3. The method according to claim 2, characterized in that, The nonlinear model includes: ;in, and , It is the total number of temperature sample values ​​in the temperature sequence of the sample integrated circuit. It is the total number of power consumption sample values ​​in the power consumption sequence of the sample integrated circuit. This is the predicted power consumption value. It is the first in the temperature sequence of the sample integrated circuit. Each temperature sample value, yes The weight, This is a correction factor.

4. The method according to claim 3, characterized in that, The step of fitting the temperature sequence and the power consumption sequence using a nonlinear model to establish the preset temperature-power consumption mapping model includes: The nonlinear model is used to fit the temperature sequence and the power consumption sequence, and the nonlinear model is updated accordingly. and The preset temperature-power consumption mapping model is obtained.

5. The method according to claim 2, characterized in that, The acquisition of the temperature sequence and power consumption sequence of the sample integrated circuit during the dynamic aging process includes: During the dynamic aging process of the sample integrated circuit, a temperature sensor is used to acquire the initial temperature value of the sample integrated circuit and store the initial temperature value. During the dynamic aging process of the sample integrated circuit, a power measurement device is used to acquire the current and voltage values ​​of the sample integrated circuit, and the current and voltage values ​​are converted into initial power consumption values ​​and stored. The initial temperature value and the initial power consumption value are read in a first-in-first-out manner, and the read initial temperature value and the read initial power consumption value are time-aligned to obtain the temperature sequence and the power consumption sequence.

6. The method according to claim 1, characterized in that, The first control strategy for determining the aging temperature based on the first temperature value and the target temperature value of the integrated circuit under test includes: If the first temperature value is greater than the target temperature value, the first control strategy is determined to be a heat dissipation control strategy. If the first temperature value is not greater than the target temperature value, the first control strategy is determined to be a heating control strategy.

7. A temperature control device for dynamic aging of integrated circuits, characterized in that, The device includes: The aging temperature control module is used to control the aging temperature of the integrated circuit under test during the dynamic aging process according to the aging temperature control strategy until the preset aging time is reached. The aging temperature control module includes a first control strategy determination submodule and a second control strategy determination submodule. The first control strategy determination submodule is used to determine the first control strategy for aging temperature based on the first temperature value and the target temperature value of the integrated circuit under test; the first temperature value is the temperature value obtained by real-time sampling of the case temperature / surface ambient temperature of the integrated circuit under test. The second control strategy determination submodule is used to input the second temperature value and power consumption value into a preset temperature-power consumption mapping model to obtain a power consumption prediction value; if the power consumption value is greater than the power consumption prediction value, the second control strategy is determined to be a heat dissipation control strategy; if the power consumption value is not greater than the power consumption prediction value, the second control strategy is determined to be a heating control strategy; the second temperature value is the temperature value of the integrated circuit under test obtained after adjustment based on the first control strategy; the power consumption value is the power consumption value of the integrated circuit under test obtained after adjustment based on the first control strategy.

8. The apparatus according to claim 7, characterized in that, The device is also used to acquire the temperature sequence and power consumption sequence of the sample integrated circuit during the dynamic aging process; and to use a nonlinear model to fit the temperature sequence and the power consumption sequence to establish the preset temperature-power consumption mapping relationship model.

9. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 6.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 6.

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