Chip performance automatic analysis method, electronic device, and medium

Abstract

The present application relates to the chip technical field, especially a kind of chip performance automatic analysis method, electronic equipment and medium, method includes steps S1, obtain the simulation waveform data file of to-be-processed test case and the target signal composition list of target chip module;Step S2, the preset chip performance automatic analysis script name, to-be-processed test case simulation waveform data file name, the target signal composition list name of target chip module, target time period information are added to chip performance automatic analysis script trigger instruction, start chip performance automatic analysis script trigger instruction;Step S3, call chip performance automatic analysis script to generate target signal data list;Step S4, based on target signal data list, call the chip performance index corresponding to each target chip module of chip performance automatic analysis script.The present application improves the efficiency and accuracy of chip performance analysis.

Description

Technical Field

[0001] This invention relates to the field of chip technology, and in particular to an automatic chip performance analysis method, electronic device, and medium. Background Technology

[0002] In chip development, chip performance is a crucial indicator. Besides differences in manufacturing processes, chip architecture design is also paramount. Test cases are typically written during the code implementation phase to analyze whether the chip's code-level performance meets theoretical performance targets. Current technologies often require printing, calculating, and summarizing large amounts of data for chip performance analysis. This often involves manual data entry into tables and calculations, or relying on tools to observe specific signal changes for rough judgments. This results in significant time costs and a high risk of errors, leading to low efficiency and accuracy in chip performance analysis. Therefore, improving the efficiency and accuracy of chip performance analysis is a pressing technical problem. Summary of the Invention

[0003] The purpose of this invention is to provide an automatic chip performance analysis method, electronic device, and medium, which improves the efficiency and accuracy of chip performance analysis.

[0004] According to a first aspect of the present invention, an automatic chip performance analysis method is provided, comprising:

[0005] Step S1: Obtain the simulation waveform data file of the test case to be processed and the target signal composition list of the target chip module;

[0006] Step S2: Add the preset chip performance automatic analysis script name, the simulation waveform data file name of the test case to be processed, the target signal composition list name of the target chip module, and the target time period information to the chip performance automatic analysis script trigger command, and start the chip performance automatic analysis script trigger command;

[0007] Step S3: Call the chip performance automatic analysis script to obtain the data corresponding to each signal in the target signal composition list of the target chip module within the target time period from the simulation waveform data file of the test case to be processed, and generate the target signal data list;

[0008] Step S4: Based on the target signal data list, call the chip performance automatic analysis script to obtain the chip performance index corresponding to each target chip module within the target time period according to the chip performance index acquisition method corresponding to each type of target signal data.

[0009] According to a second aspect of the present invention, an electronic device is provided, comprising: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, the instructions being configured to perform the method described in the first aspect of the present invention.

[0010] According to a third aspect of the present invention, a computer-readable storage medium is provided, storing computer-executable instructions for performing the method described in the first aspect of the present invention.

[0011] Compared with existing technologies, this invention has significant advantages and beneficial effects. Through the above technical solution, the automatic chip performance analysis method, electronic device, and medium provided by this invention achieve considerable technological advancement and practicality, and have broad industrial application value. It has at least the following beneficial effects:

[0012] This invention pre-sets an automatic chip performance analysis script and a trigger command for the script. It acquires the simulated waveform data file of the test case to be processed and the target signal composition list of the target chip module. The pre-set names of the automatic chip performance analysis script, the simulated waveform data file of the test case to be processed, the target signal composition list name of the target chip module, and the target time period information are added to the trigger command. The trigger command is then activated, invoking the automatic chip performance analysis script to automatically generate the target signal data list. Finally, based on the target signal data list, the automatic chip performance analysis script is invoked to obtain the chip performance indicators corresponding to each target chip module. This invention improves the efficiency and accuracy of chip performance analysis. Attached Figure Description

[0013] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0014] Figure 1 A flowchart of an automatic chip performance analysis method provided in an embodiment of the present invention. Detailed Implementation

[0015] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0016] This invention provides an automatic chip performance analysis method, such as... Figure 1 As shown, it includes:

[0017] Step S1: Obtain the simulation waveform data file of the test case to be processed and the target signal composition list of the target chip module.

[0018] The simulated waveform data file for the test cases to be processed is a .fsdb or .vf file, which can be obtained using simulation debugging tools. It includes data on the time-varying changes of all signals in the target chip module. There can be one or more target chip modules, all of which are component modules within the target chip. It should be noted that the target signal composition list can be reused, for example, when running different test cases on the same test platform, or for tests at different chip levels, such as IP-level tests, subsystem-level tests, or SOC-level tests.

[0019] Step S2: Add the preset chip performance automatic analysis script name, the simulation waveform data file name of the test case to be processed, the target signal composition list name of the target chip module, and the target time period information to the chip performance automatic analysis script trigger command, and start the chip performance automatic analysis script trigger command.

[0020] It should be noted that the automatic chip performance analysis script is a pre-built script, specifically a Python script. Calling the script automatically performs steps S3 and S4. The trigger command for the automatic chip performance analysis script is a pre-set command, including the automatic chip performance analysis script name data segment, the simulated waveform data file name data segment for the test cases to be processed, the target signal composition list name data segment for the target chip module, and the target time period information data segment. The automatic chip performance analysis script name data segment, the simulated waveform data file name data segment for the test cases to be processed, and the target signal composition list name data segment for the target chip module are mandatory, while the target time period information data segment is optional. If a specific time period needs to be specified, the corresponding target time period information is set in the target time period information data segment; otherwise, leaving the target time period information data segment empty defaults to the simulated time period of the test cases to be processed.

[0021] Step S3: Call the chip performance automatic analysis script to obtain the data corresponding to each signal in the target signal composition list of the target chip module within the target time period from the simulation waveform data file of the test case to be processed, and generate the target signal data list.

[0022] It should be noted that step S3 can automatically obtain target signal data from the simulation waveform data file of the test cases to be processed and generate a target signal data list.

[0023] Step S4: Based on the target signal data list, call the chip performance automatic analysis script to obtain the chip performance index corresponding to each target chip module within the target time period according to the chip performance index acquisition method corresponding to each type of target signal data.

[0024] It should be noted that, through step S4, the chip performance index corresponding to each target chip module within the target time period can be automatically obtained based on the target signal data list and according to the chip performance index acquisition method corresponding to each type of target signal data, thereby realizing the automated analysis of chip performance index.

[0025] As one embodiment, if the target time period information in step S2 is set to empty, then the target time period in steps S3 and S4 is determined as the default simulation time period for the test cases to be processed, that is, the entire simulation time period corresponding to the test cases to be processed. Otherwise, the target time period in steps S3 and S4 is determined as the time period corresponding to the target time period information specified in the chip performance automatic analysis script trigger instruction, that is, a portion of the simulation time period corresponding to the test cases to be processed. Through the above settings, the target time period can be flexibly set according to specific chip performance analysis needs.

[0026] As one embodiment, if the target chip module includes an interface conforming to the valid / ready interface protocol, the valid / ready interface protocol is an existing data transmission handshake mechanism in digital chip design, and will not be elaborated further here. The target signal composition list of the target chip module includes one or more sets of signals corresponding to the following types: {valid signal, ready signal}, {valid_req signal, hit_req signal}, and {req_tag}. Among them, the valid signal and ready signal are signal pairs of the valid / ready interface protocol. The valid_req signal represents a valid request signal, and the hit_req signal represents a hit request signal. The req_tag is a unique identifier for the request.

[0027] In the target signal data list, the data corresponding to {valid signal, ready signal} and {valid_req signal, hit_req signal} are the signal values ​​for each cycle within the target time period. The data corresponding to {req_tag} is the time when the target chip module initiates the corresponding request and the time when it returns information to the target chip module based on the corresponding request.

[0028] The preset automatic chip performance analysis script sets up a corresponding acquisition method for each type of chip performance indicator. As one embodiment, if the chip performance indicator corresponding to the target signal data is the ratio of the target module being back-voltaged by the downstream module or the target module load, then step S4 includes:

[0029] Step S41: Call the chip performance automatic analysis script to obtain the number of valid signal values ​​of 1 (A1), the number of valid signal values ​​of 1 and corresponding ready signal values ​​of 0 (A2), and the number of valid signal values ​​of 1 and corresponding ready signal values ​​of 1 (A3) of the target module within the target time period.

[0030] It should be noted that the number of valid signal values ​​of 1 (A1) and the number of valid signal values ​​of 1 with corresponding ready signal values ​​of 0 (A2) of the target module within the target time period are used to obtain the proportion of the target module being back-pressured by downstream modules. The number of valid signal values ​​of 1 with corresponding ready signal values ​​of 1 (A3) is used to obtain the load of the target module. It can be understood that if the chip performance indicator corresponding to the target signal data is only the proportion of the target module being back-pressured by downstream modules, then only A1 and A2 need to be obtained, and step S42 should be executed. If the chip performance indicator corresponding to the target signal data is only the load of the target module, then only A3 needs to be obtained, and step S43 should be executed.

[0031] Step S42: Divide quantity A2 by quantity A1 to determine the proportion of the target module being back-pressured by the downstream module.

[0032] Step S43: Divide the quantity A3 by the total number of clock cycles T corresponding to the target time period to determine the load of the target module.

[0033] As one embodiment, if the chip performance index corresponding to the target signal data is the hit rate, then step S4 includes:

[0034] Step C41: Call the chip performance automatic analysis script to obtain the number of valid_req signal values ​​of 1 (B1) and the number of hit_req signal values ​​of 1 (B2).

[0035] Step C42: Divide the quantity B2 by the quantity B1 to determine the hit rate of the target module.

[0036] As one embodiment, if the chip performance index corresponding to the target signal data is data signal processing time, then step S4 includes:

[0037] Step D41: Call the chip performance automatic analysis script to obtain the data corresponding to req_tag, which is the time t1 when the target chip module initiates the corresponding request and the time t2 when the target chip module returns information based on the corresponding request.

[0038] Step D42: Determine the difference between t2 and t1 as the data signal processing time corresponding to req_tag.

[0039] As one embodiment, if the chip performance index corresponding to the target signal data is the delay path time, then step S4 includes:

[0040] Step E41: Call the chip performance automatic analysis script to obtain the delay path analysis points {A1,A2,...,A} corresponding to the preset req_tag. n ,...,A N}, A n Let A1, A2, ..., A be the nth delay path analysis point, where n ranges from 1 to N, and N is the total number of delay path analysis points. n ,...,A N Arranged according to the order in which the target signal data arrives, A n To A n+1 The nth delay path R between them corresponds to the target signal data. n All delay paths constitute the full path corresponding to the target signal data, and the delay path analysis point is the interface through which the target signal data passes.

[0041] The interface through which the target signal data passes refers to the interface of the upstream module, intermediate module, or downstream module through which the target signal data passes. It should be noted that intermediate modules may be absent, or one or more may exist. Specifically, intermediate modules may be buffer modules, arbitration modules, etc. The location of the delay path analysis points can be set according to the specific delay path of interest.

[0042] Step E42: Call the chip performance automatic analysis script to obtain the performance of each A. n The corresponding target signal data arrival time T n .

[0043] Step E43, T n+1 With T n The difference is determined as R. n The corresponding delay path time.

[0044] It should be noted that the method described in this invention is not only applicable to the processing of the valid / ready interface protocol, but also to the processing of other protocols, such as the send / free protocol. As an example, if the target chip module includes an interface conforming to the send / free protocol, the send / free protocol is a handshake mechanism used for shared resource management in existing digital chip designs, which will not be elaborated further here. The target signal composition list of the target chip module may include send signals. The chip performance automatic analysis script is invoked, and the number of send signals with a value of 1 (C1) during the target time period is obtained. The value of C1 divided by the total number of clock cycles T corresponding to the target time period is determined as the load of the target module.

[0045] As one embodiment, step S4 is followed by step S5, which calls the automatic chip performance analysis script to plot a trend chart of each chip performance indicator based on the chip performance indicators corresponding to each target chip module. This helps users identify bottleneck modules in the chip and optimize code design. Taking the acquisition of latency path time as an example, since the latency path time is obtained, the time of each latency path can be accurately and intuitively presented in the trend chart, reducing the time cost in the analysis process and improving data accuracy.

[0046] This invention pre-sets an automatic chip performance analysis script and a trigger command for the script. It acquires the simulated waveform data file of the test case to be processed and the target signal composition list of the target chip module. The preset automatic chip performance analysis script name, the simulated waveform data file name of the test case to be processed, the target signal composition list name of the target chip module, and the target time period information are added to the automatic chip performance analysis script trigger command. The trigger command is then activated, calling the automatic chip performance analysis script to automatically generate the target signal data list. Finally, based on the target signal data list, the automatic chip performance analysis script is called again to obtain the chip performance indicators corresponding to each target chip module. This invention improves the efficiency and accuracy of chip performance analysis.

[0047] It should be noted that some exemplary embodiments are described as processes or methods depicted as flowcharts. Although the flowcharts describe the steps as sequential processes, many of these steps can be performed in parallel, concurrently, or simultaneously. Furthermore, the order of the steps can be rearranged. A process can be terminated when its operation is complete, but it may also have additional steps not included in the figures. A process can correspond to a method, function, procedure, subroutine, subroutine, etc.

[0048] This invention also provides an electronic device, including: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, the instructions being configured to perform the method described in this invention.

[0049] This invention also provides a computer-readable storage medium storing computer-executable instructions for performing the methods described in this invention.

[0050] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention in any way. Although the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can make some modifications or alterations to the above-disclosed technical content to create equivalent embodiments without departing from the scope of the present invention. Any simple modifications, equivalent changes, and alterations made to the above embodiments based on the technical essence of the present invention without departing from the scope of the present invention shall still fall within the scope of the present invention.

Claims

1. A method of automatically analyzing performance of a chip, characterized by, The method comprises the following steps: Step S1, obtaining a to-be-processed test case simulation waveform data file and a target signal composition list of a target chip module; The to-be-processed test case simulation waveform data file is an.fsdb or.vf file, and comprises data of all signals in the target chip module changing over time; Step S2, adding a preset chip performance automatic analysis script name, a to-be-processed test case simulation waveform data file name, a target chip module target signal composition list name, and target time period information to a chip performance automatic analysis script trigger instruction, and starting the chip performance automatic analysis script trigger instruction; The chip performance automatic analysis script can be called to automatically implement steps S3 and S4; Step S3, calling the chip performance automatic analysis script to obtain data corresponding to each signal in the target signal composition list of the target chip module in the target time period from the to-be-processed test case simulation waveform data file, and generating a target signal data list; Step S4, based on the target signal data list, calling the chip performance automatic analysis script to obtain a chip performance index corresponding to each target chip module in the target time period according to a chip performance index acquisition mode corresponding to each type of target signal data; If the target chip module comprises an interface complying with a valid / ready interface protocol, the target signal composition list of the target chip module comprises signals corresponding to a {req_tag} type, req_tag is a request unique identifier, and data corresponding to {req_tag} is a time when the target chip module initiates a corresponding request and a time when information is returned to the target chip module based on the corresponding request; If the chip performance index corresponding to the target signal data is a delay path time, the step S4 comprises: Step E41, calling the chip performance automatic analysis script to obtain preset delay path analysis points {A1, A2,..., A n ,...,A N} corresponding to req_tag, A n is the nth delay path analysis point, n is in the range of 1 to N, N is the total number of delay path analysis points, A1, A2,..., A n ,...,A N are arranged according to the order of the target signal data, A n to A n+1 are the nth delay paths R n corresponding to the target signal data, all delay paths form a full path corresponding to the target signal data, and the delay path analysis points are interfaces passed through by the target signal data; Step E42, call the chip performance automatic analysis script to obtain each A n The corresponding target signal data arrival time T n ; Step E43, determine R n+1 as the difference between T n and T n corresponding delay path time.

2. The method of claim 1, wherein, If the target time period information in the step S2 is set as empty, the target time period in the steps S3 and S4 is determined as a default to-be-processed test case simulation time period, otherwise, the target time period in the steps S3 and S4 is determined as a time period corresponding to the target time period information specified in the chip performance automatic analysis script trigger instruction.

3. The method of claim 1, wherein, The target signal composition list of the target chip module further comprises signals corresponding to {valid signal, ready signal} and {valid_req signal, hit_req signal}, wherein the valid signal and the ready signal are a signal pair of the valid / ready interface protocol, the valid_req signal represents a valid request signal, and the hit_req signal represents a hit request signal; In the target signal data list, data corresponding to the {valid signal, ready signal} and the {valid_req signal, hit_req signal} is a signal value corresponding to each period in the target time period.

4. The method of claim 3, wherein, If the chip performance index corresponding to the target signal data is the proportion of the target module being back-pressured by the downstream module or the load of the target module, the step S4 comprises: Step S41, calling the chip performance automatic analysis script to obtain the number A1 of valid signal values being 1, the number A2 of valid signal values being 1 and corresponding ready signal values being 0, and the number A3 of valid signal values being 1 and corresponding ready signal values being 1 of the target module in the target time period; Step S42, determining the value of the number A2 divided by the number A1 as the proportion of the target module being back-pressured by the downstream module; Step S43, determining the value of the number A3 divided by the total number T of clock cycles corresponding to the target time period as the load of the target module.

5. The method of claim 3, wherein, If the chip performance index corresponding to the target signal data is the hit rate, the step S4 comprises: Step C41, calling the chip performance automatic analysis script to obtain the number B1 of valid_req signal values being 1 and the number B2 of hit_req signal values being 1; Step C42, determining the value of the number B2 divided by the number B1 as the hit rate of the target module.

6. The method of claim 3, wherein, If the chip performance index corresponding to the target signal data is the data signal processing time, the step S4 comprises: Step D41, calling the chip performance automatic analysis script to obtain the data corresponding to req_tag as the time t1 of initiating a corresponding request to the target chip module and the time t2 of returning information to the target chip module based on the corresponding request; Step D42, determining the difference between t2 and t1 as the data signal processing time corresponding to req_tag.

7. The method of claim 6, wherein, The interface through which the target signal data passes is the interface of the upstream module, the intermediate module or the downstream module through which the target signal data passes, and the intermediate module comprises a cache module and an arbitration module.

8. An electronic device, comprising: Comprise: At least one processor; And a memory in communication connection with the at least one processor; Wherein the memory stores instructions executed by the at least one processor, and the instructions are arranged to execute the method of any one of the preceding claims 1-7.

9. A computer-readable storage medium, characterized in that, Computer executable instructions are stored, and the computer executable instructions are used to execute the method of any one of the preceding claims 1-7.

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