Multilayer ceramic capacitor

Abstract

Provided is a highly reliable multilayer ceramic capacitor in which deterioration of insulation resistance is suppressed. A second outer layer part covering the second main surface from the lamination direction; a first side edge part covering the inner layer part and the first and second outer layer parts from one side in the width direction; a second side edge part covering the inner layer part and the first and second outer layer parts from the other side in the width direction; and a pair of external electrodes. The dielectric particles constituting the ceramic dielectric constituting the inner layer portion and the first and second side edge portions respectively include dielectric particles having pores therein, and the ratio of pores in the particles at the center portion of the inner layer portion and the ratio of pores in the particles at the first and second side edge portions satisfy N [inner layer center portion] lt; the relationship of N [side edge portion], the D50 diameter of the dielectric particles at the end portion of the inner layer portion in the width direction, and the D50 diameter of the dielectric particles at the center portion of the inner layer portion satisfy the relationship 1.00 < = D50 [inner layer W end portion] / D50 [inner layer center portion] < = 1.40.

Description

TECHNICAL FIELD

[0001] The present application relates to a multilayer ceramic capacitor. BACKGROUND

[0002] With miniaturization of electronic devices typified by portable telephones and high speed of CPUs, the demand for multilayer ceramic capacitors (MLCC) is becoming higher and higher. The multilayer ceramic capacitor has a high dielectric constant dielectric layer which is thinned. Therefore, it has a large electrostatic capacitance although it is small. Various kinds of multilayer ceramic capacitors using various materials are known, but a multilayer ceramic capacitor using a ceramic dielectric such as barium titanate (BaTiO3) for the dielectric layer and a base metal such as nickel (Ni) for the internal electrode layer is widely used because it is inexpensive and shows high characteristics.

[0003] The multilayer ceramic capacitor has an inner layer portion in which dielectric layers and internal electrode layers formed of ceramic dielectrics are alternately laminated, upper and lower outer layer portions which cover the inner layer portion, and a side edge portion which covers the side edges of the inner layer portion and the outer layer portions from the width direction. The inner layer portion functions as a capacitance element. The outer layer portions and the side edge portion are regions which are provided around the inner layer portion and do not contain the internal electrode layers. It can be said that they have a function of protecting the inner layer portion which functions as a capacitance element from the outside environment.

[0004] For the multilayer ceramic capacitor, it is required to increase the electrostatic capacitance per unit volume (volume capacitance) while increasing the rated voltage. In order to increase the volume capacitance, it is effective to thin the thickness of each of the dielectric layer and the internal electrode layer, and to increase the number of laminated layers (multilayer) as much as possible so that they are electrically connected in parallel. In addition, it is also effective to reduce the volume of the outer layer portions, the side edge portions, and the internal electrode lead-out portions among the components of the multilayer ceramic capacitor. Thereby, the volume of the inner layer portion which functions as a capacitance element relatively becomes large, and thus the volume capacitance can be increased.

[0005] Further, the ceramic dielectric of the multilayer ceramic capacitor is produced by firing a dielectric powder such as a BaTiO3 powder. The dielectric powder is synthesized by a solid phase method, a hydrothermal method, a sol-gel method, an alkoxide method, a solvothermal method, or an oxalate method. Among them, the hydrothermal method (hydrothermal synthesis method) is a method of synthesizing inorganic powder using an aqueous solution at high temperature and high pressure, and has an advantage that a fine powder having a uniform particle size can be produced at a relatively low cost. Therefore, if a multilayer ceramic capacitor is produced using a dielectric powder (hydrothermal synthesis powder) synthesized by the hydrothermal method, thinning of the dielectric layer and high capacitance can be achieved. In addition, the particle size deviation of the dielectric particles can be suppressed, and thus an increase in the dielectric constant and reliability can be sought.

[0006] In the hydrothermal method, a hydroxide is used as a raw material. For example, a Ba source such as barium hydroxide (Ba(OH)2) and a Ti source such as titanyl phosphate (TiO(OH)2) or titanium oxide (TiO2) are reacted in water at high temperature and high pressure, and the obtained reaction product is heat-treated to obtain BaTiO3 powder. The OH group contained in the hydroxide is detached from the raw material at the time of heat treatment, but a void (in-particle void) is formed in the inside of the particles constituting the dielectric powder. Moreover, if a dielectric powder having an in-particle void is used to manufacture a multilayer ceramic capacitor, the in-particle void also remains in the obtained capacitor. In contrast, in the case where a dielectric powder synthesized by a method other than the hydrothermal method is used, an in-particle void is not formed.

[0007] In Patent Literature 1, it is disclosed that a hydrothermal synthesis powder is used for the dielectric layer of a multilayer ceramic capacitor. Specifically, a manufacturing method of a ceramic capacitor is disclosed, which includes a production step of producing a green sheet using a ceramic slurry containing a first ceramic powder synthesized by a hydrothermal method and a second ceramic powder synthesized by a method other than the hydrothermal method, and a step of firing the obtained green sheet (claim 5 of Patent Literature 1). Furthermore, in Patent Literature 1, it is described that piezoelectric strain is relaxed due to the voids (voids) present in the ceramic particles, which is related to the suppression of cracks (

[0031] of Patent Literature 1).

[0008] Prior Art Documents

[0009] Patent Literature

[0010] Patent Literature 1: Japanese Patent Application Publication No. 2019-102655

[0011] With the progress of electronic components and electronic devices, further miniaturization and large capacitance of multilayer ceramic capacitors are expected. Furthermore, as the use of multilayer ceramic capacitors is expanding, the demand for improvement in reliability is becoming higher and higher. Therefore, there is an urgent need to develop a multilayer ceramic capacitor that is excellent in reliability while promoting thin layering, although the degradation of insulation resistance is less. However, in the technology proposed in the past, although there is a certain effect, there is still room for improvement. SUMMARY

[0012] PROBLEMS TO BE SOLVED BY THE INVENTION

[0013] The present inventors have conducted intensive studies in view of such problems. As a result, the following insight has been obtained, that is, by providing internal voids to the dielectric particles at the inner layer portion and the side edge portion of a multilayer ceramic capacitor, and controlling the internal void ratio and the D50 diameter of the dielectric particles, a multilayer ceramic capacitor that is high in reliability with suppressed degradation of insulation resistance can be obtained.

[0014] The present application has been achieved based on such insight, and provides a multilayer ceramic capacitor with high reliability in which insulation resistance deterioration is suppressed as a problem to be solved.

[0015] Technical solution for solving the problem

[0016] The present application includes the following modes. In addition, in the present specification, expressions such as "to" include both ends of the numerical value. That is, "X to Y" is synonymous with "X or more and Y or less". Furthermore, in the present specification, any combination of appropriate modes can be adopted as long as technical integration can be sought. For example, one of the appropriate numerical ranges and the other can be arbitrarily combined.

[0017] According to one embodiment of the present application, a multilayer ceramic capacitor is provided, having:

[0018] an inner layer portion in which a first internal electrode layer and a second internal electrode layer are alternately stacked with a dielectric layer formed of a ceramic dielectric, and having a first main surface as a surface in a stacking direction, a second main surface as a surface on the opposite side of the first main surface, a first side surface as a surface in a width direction orthogonal to the first main surface and the second main surface and from which the first internal electrode layer and the second internal electrode layer are drawn, a second side surface as a surface on the opposite side of the first side surface and from which the first internal electrode layer and the second internal electrode layer are drawn, a first end surface as a surface in a length direction orthogonal to the first main surface, the second main surface, the first side surface, and the second side surface and from which the first internal electrode layer is drawn, and a second end surface as a surface on the opposite side of the first end surface and from which the second internal electrode layer is drawn;

[0019] a first outer layer portion formed of a ceramic dielectric, covering the first main surface from the stacking direction;

[0020] a second outer layer portion formed of a ceramic dielectric, covering the second main surface from the stacking direction;

[0021] a first side edge portion formed of a ceramic dielectric, covering the inner layer portion, the first outer layer portion, and the second outer layer portion from one side of the width direction;

[0022] a second side edge portion formed of a ceramic dielectric, covering the inner layer portion, the first outer layer portion, and the second outer layer portion from the other side of the width direction; and

[0023] a pair of external electrodes provided on the first end surface and the second end surface and connected to the first internal electrode layer and the second internal electrode layer, respectively,

[0024] The dielectric particles that constitute the ceramic dielectric of the inner layer portion, the first side edge portion, and the second side edge portion each contain dielectric particles having a void inside,

[0025] The ratio of the void inside the particles at the central portion of the inner layer portion (N[inner layer central portion]) and the ratio of the void inside the particles at the first side edge portion and the second side edge portion (N[side edge portion]) satisfy the relationship of N[inner layer central portion]<N[side edge portion],

[0026] The D50 diameter of the dielectric particles at the width direction end portion of the inner layer portion (D50[inner layer W end portion]) and the D50 diameter of the dielectric particles at the central portion of the inner layer portion (D50[inner layer central portion]) satisfy the relationship of 1.00≤D50[inner layer W end portion] / D50[inner layer central portion]≤1.40.

[0027] Effects of Invention

[0028] According to the present application, a multilayer ceramic capacitor with high reliability in which degradation of insulation resistance is suppressed can be provided. BRIEF DESCRIPTION OF DRAWINGS

[0029] Figure 1 is a perspective view showing the outer shape of a multilayer ceramic capacitor.

[0030] Figure 2 is a cross-sectional view schematically showing the internal structure of a multilayer ceramic capacitor.

[0031] Figure 3 is a cross-sectional view schematically showing the internal structure of a multilayer ceramic capacitor.

[0032] Figure 4 is a view for explaining the inner layer central portion and the inner layer W end portion.

[0033] Figure 5 is a view showing the distribution of the void inside the particles in the dielectric layer.

[0034] Figure 6 is a view for explaining the measurement of the polarity IR generation rate.

[0035] Figure 7 is a view for explaining the flex test.

[0036] EXPLANATION OF REFERENCE NUMERALS

[0037] 2: dielectric layer;

[0038] 4: internal electrode layer;

[0039] 6: body portion;

[0040] 8a: first external electrode;

[0041] 8b: second external electrode;

[0042] 10a: first external main surface;

[0043] 10b: second external main surface;

[0044] 12a: first external side surface;

[0045] 12b: second external side surface;

[0046] 14a: first external end surface;

[0047] 14b: second external end surface;

[0048] 16: inner layer portion;

[0049] 18a: first external layer;

[0050] 18b: second external layer;

[0051] 20a: first lateral edge portion;

[0052] 20b: second lateral edge portion;

[0053] 22: internal region;

[0054] 100: laminated ceramic capacitor. DETAILED DESCRIPTION

[0055] A specific embodiment of the present application (hereinafter, referred to as "the present embodiment") will be described. In addition, the present application is not limited to the following embodiment, and various changes can be made within the scope of the gist of the present application.

[0056] <<1. Laminated ceramic capacitor>>

[0057] The laminated ceramic capacitor of the present embodiment has an inner layer portion, a first outer layer portion, a second outer layer portion, a first side edge portion, a second side edge portion, and a pair of external electrodes. The inner layer portion is a region in which a first internal electrode layer and a second internal electrode layer are alternately laminated with a dielectric layer formed of a ceramic dielectric interposed therebetween. The inner layer portion has a first main surface, a second main surface, a first side surface, a second side surface, a first end surface, and a second end surface. The first main surface is a surface in the lamination direction of the dielectric layer, the first internal electrode layer, and the second internal electrode layer. The second main surface is a surface on the opposite side of the first main surface. The first side surface is a surface in the width direction orthogonal to the first main surface and the second main surface. The second side surface is a surface on the opposite side of the first side surface. The first end surface is a surface in the length direction orthogonal to the first main surface, the second main surface, the first side surface, and the second side surface, and is a surface from which the first internal electrode layer is drawn out. The second end surface is a surface on the opposite side of the first end surface, and is a surface from which the second internal electrode layer is drawn out. The first outer layer portion is formed of a ceramic dielectric, and covers the first main surface from the lamination direction. The second outer layer portion is formed of a ceramic dielectric, and covers the second main surface from the lamination direction. The first side edge portion is formed of a ceramic dielectric, and covers the inner layer portion, the first outer layer portion, and the second outer layer portion from one side in the width direction. The second side edge portion is formed of a ceramic dielectric, and covers the inner layer portion, the first outer layer portion, and the second outer layer portion from the other side in the width direction. The pair of external electrodes is provided on the first end surface and the second end surface, and is connected to any one of the first internal electrode layer and the second internal electrode layer. The dielectric particles that constitute the ceramic dielectric that constitutes the inner layer portion, the first side edge portion, and the second side edge portion each contain dielectric particles having a void inside. A ratio of the void inside the particles at the central portion of the inner layer portion (N[inner layer central portion]) and a ratio of the void inside the particles at the first side edge portion and the second side edge portion (N[side edge portion]) satisfy the relationship of N[inner layer central portion]<N[side edge portion]. A D50 diameter of the dielectric particles at the width direction end portion of the inner layer portion (D50[inner layer W end portion]) and a D50 diameter of the dielectric particles at the central portion of the inner layer portion (D50[inner layer central portion]) satisfy the relationship of 1.00≤D50[inner layer W end portion] / D50[inner layer central portion]≤1.40.

[0058] One embodiment of a laminated ceramic capacitor will be described below. Figures 1-3 One embodiment of a laminated ceramic capacitor will be described below. Figure 1 is a perspective view showing the external shape of a laminated ceramic capacitor. Figure 2 is a cross-sectional view of the laminated ceramic capacitor shown in Figure 1 is a cross-sectional view of the laminated ceramic capacitor shown in Figure 3 is a cross-sectional view of the laminated ceramic capacitor shown in Figure 1 is a cross-sectional view of the laminated ceramic capacitor shown in

[0059] The multilayer ceramic capacitor (100) includes a body portion (6) and a pair of external electrodes (8a, 8b) provided on both end surfaces (14a, 14b) of the body portion (6). The multilayer ceramic capacitor (100) and the body portion (6) have a substantially rectangular parallelepiped shape. The substantially rectangular parallelepiped includes not only a rectangular parallelepiped but also a rectangular parallelepiped in which corner portions and / or edge portions are rounded.

[0060] The multilayer ceramic capacitor (100) and the body portion (6) have a first outer major surface (10a) and a second outer major surface (10b) facing each other in a thickness direction T, a first outer side surface (12a) and a second outer side surface (12b) facing each other in a width direction W, and a first outer end surface (14a) and a second outer end surface (14b) facing each other in a length direction L. Here, the thickness direction T is a direction in which the dielectric layers (2) and the internal electrode layers (4) included in the body portion (6) are stacked. The length direction L is a direction orthogonal to the thickness direction T and in which the outer end surfaces (14a, 14b) face each other. The width direction W is a direction orthogonal to the thickness direction T and the length direction L. A surface including the thickness direction T and the width direction W is defined as a WT surface, a surface including the width direction W and the length direction L is defined as an LW surface, and a surface including the length direction L and the thickness direction T is defined as an LT surface.

[0061] The body portion (6) includes an inner layer portion (16), a first outer layer portion (18a), a second outer layer portion (18b), a first side edge portion (20a), and a second side edge portion (20b).

[0062] The inner layer portion (16) is a region in which the internal electrode layers (4) are alternately stacked with the dielectric layers (2) interposed therebetween. The dielectric layers (2) are formed of ceramic dielectrics. The internal electrode layers (4) are composed of a plurality of first internal electrode layers (4a) and a plurality of second internal electrode layers (4b).

[0063] The inner layer portion (16) has a first main surface, a second main surface, a first side surface, a second side surface, a first end surface, and a second end surface. The first main surface is a surface perpendicular to the stacking direction of the dielectric layer (2) and the internal electrode layer (4a, 4b). The second main surface is a surface opposite to the first main surface (opposite surface). The first side surface is a surface orthogonal to the first main surface and the second main surface, that is, a surface perpendicular to the width direction W. The second side surface is a surface opposite to the first side surface (opposite surface). The first end surface is a surface orthogonal to the first main surface, the second main surface, the first side surface, and the second side surface, that is, a surface perpendicular to the length direction L. The second end surface is a surface opposite to the first end surface (opposite surface). The internal electrode layer (4a, 4b) is led out at the first side surface and the second side surface. That is, the end portion of the internal electrode layer is exposed on both the first side surface side and the second side surface side. The first internal electrode layer (4a) is led out at the first end surface, but the second internal electrode layer (4b) is not led out. The second internal electrode layer (4b) is led out at the second end surface, but the first internal electrode layer (4a) is not led out.

[0064] The first outer layer portion (18a) is a region covering the first main surface of the inner layer portion (16) from the stacking direction (thickness direction T). The second outer layer portion (18b) is a region covering the second main surface of the inner layer portion (16) from the stacking direction. The first side edge portion (20a) is a region covering the inner layer portion (16), the first outer layer portion (18a), and the second outer layer portion (18b) from one side (first side surface side) of the width direction. The second side edge portion (20b) is a region covering the inner layer portion (16), the first outer layer portion (18a), and the second outer layer portion (18b) from the other side (second side surface side) of the width direction. The first outer layer portion (18a), the second outer layer portion (18b), the first side edge portion (20a), and the second side edge portion (20b) are formed of a ceramic dielectric.

[0065] The external electrode (8a, 8b) is composed of the first external electrode (8a) provided at the first outer end surface (14a) of the body portion (6) and the second external electrode (8b) provided at the second outer end surface (14b). The first external electrode (8a) and the second external electrode (8b) are not in contact and are electrically separated.

[0066] The stacked ceramic capacitor (100) and the body portion (6) are not particularly limited in size. For example, the length direction L is 0.2 mm or more and 3.2 mm or less, the width direction W is 0.1 mm or more and 2.5 mm or less, and the stacking direction T is 0.1 mm or more and 2.5 mm or less. In addition, the length direction L, the width direction W, and the stacking direction T are not necessarily orthogonal to each other. Figures 1-3In the present embodiment, the length direction L dimension is shown to be larger than the width direction W dimension, but the multilayer ceramic capacitor of the present embodiment is not limited to a multilayer ceramic capacitor having such dimensions. The length direction L dimension can also be smaller than the width direction W dimension.

[0067] <Inner layer portion - dielectric layer>

[0068] The inner layer portion is a region in which the internal electrode layers (the 1st internal electrode layer, the 2nd internal electrode layer) are alternately laminated with the dielectric layer formed of a ceramic dielectric. The dielectric layer is composed of a ceramic dielectric produced by firing a green sheet for an inner layer containing a dielectric raw material. The ceramic dielectric contains a sintered polycrystal (ceramic) in which a large number of dielectric particles are bonded via grain boundaries and triple points. That is, the dielectric particles (dielectric grains) are contained as a main component. In addition, the main component is a component having the largest content ratio in the ceramic dielectric, that is, a component of 50% by mass or more.

[0069] The dielectric particles are composed of a perovskite-type oxide. The perovskite-type oxide has a composition represented by the general formula: ABO3, and has a crystal structure that is cubic, tetragonal, orthorhombic, or rhombohedral, or a similar cubic crystal at room temperature. In addition, the atoms of the A-site element (hereinafter referred to as "A-site atoms") and the atoms of the B-site element (hereinafter referred to as "B-site atoms") are ionized and occupy the A-site and the B-site of the perovskite structure, respectively. As the A-site element, elements having a large ion size such as barium (Ba), calcium (Ca), and strontium (Sr) can be exemplified, and as the B-site element, elements having a small ion size such as titanium (Ti), zirconium (Zr), and hafnium (Hf) can be exemplified. The combination of the A-site element and the B-site element is not particularly limited as long as the perovskite-type structure is maintained. The A-site element and the B-site element can each contain only one element, or can contain a plurality of elements in combination. Furthermore, the molar ratio of the A-site element to the B-site element can deviate from 1:1 as long as the perovskite-type structure can be maintained.

[0070] As specific examples of the perovskite-type oxide, barium titanate (BaTi03)-based compounds, calcium titanate (CaTi03)-based compounds, strontium titanate (SrTi03)-based compounds, and mixed crystals and solid solutions thereof can be exemplified. Preferably, the element at the A site contains barium (Ba), and the element at the B site contains titanium (Ti). That is, suitably, the perovskite-type oxide is a barium titanate (BaTi03)-based compound. The dielectric constant of the BaTi03-based compound is high. Therefore, it is particularly suitable for large capacitance of the multilayer ceramic capacitor. In addition, the BaTi03-based compound contains not only BaTi03, but also a compound in which a part of Ba of BaTi03is substituted with Sr and / or Ca or other element at the A site, or a compound in which a part of Ti is substituted with Zr and / or Hf or other element at the B site.

[0071] The ceramic dielectric can also contain a sub-component. As the sub-component, without limitation, rare earth elements (RE), magnesium (Mg), manganese (Mn), iron (Fe), chromium (Cr), cobalt (Co), nickel (Ni), silicon (Si), aluminum (Al), vanadium (V), and compounds thereof, etc. can be exemplified. Furthermore, as the rare earth element (RE), dysprosium (Dy) is preferable. As the sub-component, the above components can be contained alone, or a plurality of components can be contained in combination. The existence form of the sub-component is not limited. It is only necessary to be contained in any one of the dielectric particles, the grain boundaries, and the triple points.

[0072] The dielectric particles can also contain core-shell particles. The so-called core-shell particles are particles having a structure in which at least a part of the sub-component is solid-solved at a high concentration in the surface layer (shell portion) of the particles, and the sub-component is solid-solved at a low concentration or the sub-component is not solid-solved in the central portion (core portion) of the particles. Alternatively, dielectric particles in which the sub-component is solid-solved in the entire region of the particles can also be contained.

[0073] The thickness of the dielectric layer in the inner layer portion is preferably 0.6 μm or more and 3.0 μm or less. By setting the thickness of the dielectric layer to a given value or more, generation of insulation breakdown and degradation of the life at the time of use of the multilayer ceramic capacitor can be suppressed. Furthermore, by setting the thickness of the dielectric layer to a given value or less, the dielectric layer is thinned, and further large capacitance of the multilayer ceramic capacitor can be achieved. The number of layers of the dielectric layer is not particularly limited. The number of layers of the dielectric layer constituting the inner layer portion is preferably 100 layers or more and 2000 layers or less.

[0074] <Inner layer portion - internal electrode layer>

[0075] The internal electrode layer (first internal electrode layer, second internal electrode layer) is composed of a counter electrode portion and a lead electrode portion, and constitutes an inner layer portion together with the dielectric layer. The counter electrode portion sandwiches the dielectric layer, and has a function of exhibiting a function as a capacitor element. The lead electrode portion has a function of electrically connecting the counter electrode portion and an external electrode. The internal electrode layer contains a conductive metal. As the conductive metal, a known electrode material such as nickel (Ni), copper (Cu), silver (Ag), palladium (Pd), silver (Ag)-palladium (Pd) alloy, and / or gold (Au) can be used. The internal electrode layer is produced by sintering a conductive paste layer printed on the surface of a green sheet for an inner layer.

[0076] The internal electrode layer can also contain other components in addition to the conductive metal. As the other components, a ceramic component that functions as a common material can be cited. Further, the thickness of the internal electrode layer is preferably 0.40 μm or more and 1.5 μm or less. By setting the thickness of the internal electrode layer to be a given value or more, it is possible to prevent problems such as electrode interruption. Further, by setting it to be a given value or less, it is possible to prevent a decrease in the proportion of the dielectric layer in the capacitor, which contributes to large capacitance. Furthermore, the number of layers of the internal electrode layer is preferably 100 or more and 2000 or less.

[0077] <outer layer portion>

[0078] The outer layer portion (first outer layer portion, second outer layer portion) is provided above and below the inner layer portion, respectively. The outer layer portion is composed of a ceramic dielectric, and is a region in which the internal electrode layer is not contained in the inside thereof. The outer layer portion is produced by firing a green sheet for an outer layer containing a dielectric raw material.

[0079] <side edge portion>

[0080] The side edge portion (first side edge portion, second side edge portion) is provided so as to sandwich the inner layer portion and the outer layer portion along the side surface of the multilayer ceramic capacitor. The side edge portion is also referred to as a side gap portion or a side portion. The side edge portion is composed of a ceramic dielectric, and is a region in which the internal electrode layer is not contained in the inside thereof. By providing the side edge portion, it is possible to prevent moisture from invading into the inner layer portion from the side surface.

[0081] In the production of the multilayer ceramic capacitor, the side edge portion is formed separately from the inner layer portion and the outer layer portion. Specifically, it is only necessary to produce a green body portion by adhering a green body for a side edge to the side surface of a laminated small sheet that becomes the inner layer portion and the outer layer portion, and to produce it by firing the green body portion. In this case, the composition and / or the fine structure of the ceramic dielectric that constitutes the side edge portion are sometimes discontinuous from the ceramic dielectric that constitutes the inner layer portion and / or the outer layer portion. Therefore, a physical / chemical boundary is sometimes present between the side edge portion and the inner layer portion and / or the outer layer portion.

[0082] <Outer electrode>

[0083] The outer electrode (first outer electrode, second outer electrode) functions as an input / output terminal of the multilayer ceramic capacitor. The first outer electrode and the second outer electrode are provided on both end surfaces of the multilayer ceramic capacitor. The first outer electrode is connected to the first internal electrode layer, and the second outer electrode is connected to the second internal electrode layer. As the outer electrode, a publicly known structure can be employed. For example, a base electrode layer and a plating layer disposed thereon can be provided. Alternatively, the outer electrode can be constituted only by the plating layer without providing the base electrode layer.

[0084] <In-particle void ratio>

[0085] In the multilayer ceramic capacitor of the present embodiment, the ceramic dielectric constituting the inner layer portion, the first side edge portion, and the second side edge portion each contains a dielectric particle having a void (in-particle void) in the interior. That is, the in-particle void exists in at least a part of the particles among the dielectric particles constituting the ceramic dielectric. Here, the in-particle void is a void existing in the interior of the dielectric particle. In other words, it is a region existing in the interior of the dielectric particle and not containing a solid component such as a main component constituting the dielectric particle, a secondary component intentionally added, and the like. Therefore, it is distinguished from the inter-particle void existing at the interface between the particles, the three-point. The dielectric particle having a void in the interior is referred to as a void-containing particle. The ceramic dielectric having such a void-containing particle is made of a hydrothermally synthesized powder.

[0086] By causing the ceramic dielectric constituting the inner layer portion (hereinafter, sometimes collectively referred to as "inner layer ceramic") to contain the void-containing particle, it is possible to suppress deterioration of the insulation resistance (IR) of the multilayer ceramic capacitor and to seek improvement in reliability. Although it should not be limitedly interpreted, the following aspects are considered as a reason thereof.

[0087] If the dielectric layer and the internal electrode layer are multilayered in order to increase the static capacitance per unit volume, i.e., the volume capacitance, the area of the interface between these layers increases. If the smoothness of the interface is impaired, the electric field concentrates at the time of voltage application, and thus the IR easily deteriorates. Therefore, it becomes difficult to increase the high voltage rating of the multilayer ceramic capacitor. On the other hand, regarding the hydrothermally synthesized powder, the shape thereof is close to a spherical shape, and thus if the hydrothermally synthesized powder is used, the interface between the dielectric layer and the internal electrode is smoothed at the stage before firing, and this state is maintained even after firing. Therefore, it is preferable to use the hydrothermally synthesized powder as the dielectric layer raw material in the inner layer portion, and it is particularly preferable to use the hydrothermally synthesized powder in which a BaTiO3-based compound exhibiting a high dielectric constant is used as a main component. By using the hydrothermally synthesized powder, the void-containing particle is formed in the ceramic dielectric.

[0088] Further, by making the ceramic dielectric (hereinafter, sometimes collectively referred to as "side edge ceramic") constituting the side edge portion (first side edge portion, second side edge portion) contain a hollow particle, it is possible to achieve an increase in bulk capacitance and further suppression of IR deterioration. Although not to be construed as being limited, the following aspects are considered as reasons therefor.

[0089] It is effective to thin the thickness of the side edge portion in the width (W) direction in order to increase the bulk capacitance of the multilayer ceramic capacitor. Moreover, by separately preparing the inner layer portion precursor and the side edge portion precursor, and by adopting a process of integrally sintering after bonding them, it is possible to easily manufacture such a multilayer ceramic capacitor. At this time, as the raw material of the side edge portion, it is preferable to use a hydrothermally synthesized powder, and particularly preferably a hydrothermally synthesized powder having BaTi03-based compound as the main component, the same as the inner layer portion. This is because the hydrothermally synthesized powder has high fluidity, and thus by using this powder, it is possible to improve the adhesiveness of the side edge portion precursor and the inner layer portion precursor, which relates to the suppression of IR deterioration.

[0090] As described above, it is known that by using a hydrothermally synthesized powder for the inner layer portion and the side edge portion, it relates to the suppression of IR deterioration. In addition to this, the inventors have repeatedly and intensively studied from the viewpoint of suppressing IR deterioration, and have found that by appropriately controlling the intragranular hollow ratio remaining in the inner layer portion and the side edge portion after sintering, it is possible to more appropriately suppress IR deterioration. Specifically, in the multilayer ceramic capacitor of the present embodiment, the intragranular hollow ratio at the central portion of the inner layer portion (inner layer central portion) (N[inner layer central portion]) and the intragranular hollow ratio at the side edge portion (first side edge portion and second side edge portion) (N[side edge portion]) satisfy the relationship of N[inner layer central portion]<N[side edge portion]. That is, the ceramic structure is controlled so that the intragranular hollow ratio of the ceramic dielectric at the side edge portion is greater than the intragranular hollow ratio of the ceramic dielectric at the inner layer central portion. In addition, the inner layer central portion is a region occupying the vicinity of the center of the inner layer portion, and is determined by the method described later. Further, the intragranular hollow ratio is the number of intragranular hollows per unit area in the cross section (WT surface) of the multilayer ceramic capacitor across the central portion in the length direction, and is measured by the method described later.

[0091] The inventors of the present application have found, through experiments, that by controlling the intragranular hollow ratio at the inner layer central portion and the side edge portion so as to satisfy the above relationship, it is possible to more effectively suppress insulation resistance (IR) deterioration.

[0092] In the multilayer ceramic capacitor of this embodiment, the D50 diameter of the dielectric particles at the width direction end portion of the inner layer portion (D50 [inner layer W end portion]) and the D50 diameter of the dielectric particles at the central portion of the inner layer portion (D50 [inner layer central portion]) satisfy the relationship of the formula: 1.00 ≤ D50 [inner layer W end portion] / D50 [inner layer central portion] ≤ 1.40. That is, the difference between the D50 diameter of the dielectric particles at the inner layer central portion and the D50 diameter of the dielectric particles at the inner layer W end portion is relatively small. Thereby, IR degradation can be more effectively suppressed. Although not to be limited to the explanation, the following aspects are considered as the reason. In addition, the inner layer central portion is a region of the inner layer portion that occupies the vicinity of the center, and the inner layer W end portion is a region of the inner layer portion that occupies the width (W) direction end portion. They are determined by the method described later.

[0093] As described above, in the inner layer W end portion, particle growth is likely to occur compared to the inner layer central portion. Moreover, if particle growth is promoted in the inner layer W end portion, the number of dielectric particles in the dielectric layer thickness direction decreases, thereby causing IR degradation. In contrast to this, if the ratio of the D50 diameter at the inner layer W end portion to the D50 diameter at the inner layer central portion is controlled to satisfy the above relationship, particle growth at the inner layer W end portion can be suppressed. As a result, the number of dielectric particles in the dielectric layer thickness direction can be ensured, which relates to the suppression of IR degradation. From the viewpoint of suppressing IR degradation, D50 [inner layer W end portion] and D50 [inner layer central portion] preferably satisfy the relationship of the formula: 1.00 ≤ D50 [inner layer W end portion] / D50 [inner layer central portion] ≤ 1.17, and more preferably satisfy the relationship of the formula: 1.00 ≤ D50 [inner layer W end portion] / D50 [inner layer central portion] ≤ 1.06.

[0094] As long as D50 [inner layer central portion] and D50 [inner layer W end portion] satisfy the above relationship, the respective values are not limited. However, by moderately increasing the particle diameter, the effects of improving the crystallinity of the particles and various characteristics accompanying the same can be sufficiently exerted. On the other hand, by moderately suppressing the particle diameter, further thinning of the dielectric layer can be promoted. D50 [inner layer central portion] is preferably 150 nm or more and 360 nm or less. Furthermore, D50 [inner layer W end portion] is also preferably 150 nm or more and 500 nm or less. In addition, the above D50 diameters (D50 [inner layer central portion], D50 [inner layer W end portion]) are D50 diameters with respect to the entire dielectric particles including not only particles including voids but also particles not including voids.

[0095] The inner layer central portion is determined as follows. In the body portion of the laminated ceramic capacitor from which the external electrode is removed, a dielectric layer located at about 1 / 2 of the thickness T dimension is specified. In the specified dielectric layer, a region of the body portion located at about 1 / 2 of the length L dimension and about 1 / 2 of the width W dimension is determined as the inner layer central portion (inner layer central portion) Figure 4 ).

[0096] The number of intragranular voids at the inner layer central portion is found by transmission electron microscope (TEM) observation. Specifically, a field of view is selected from a region of 10 μm (W direction) x 10 μm (L direction) x dielectric layer thickness (T direction) at the inner layer central portion to perform TEM observation. Further, the D50 diameter of the dielectric particles at the inner layer central portion (D50 [inner layer central portion]) is found by scanning electron microscope (SEM) observation. Specifically, in the WT surface, a region of 3 μm (W direction) x dielectric layer thickness (T direction) at the inner layer central portion is determined, the particle diameters of the dielectric particles contained in the region are measured, and the average thereof is calculated as the D50. The SEM observation can be performed, for example, under a magnification of 25,000 times. Further, at the time of the particle diameter measurement, not only the particle diameters of the void-containing particles but also the particle diameters of the void-free particles are measured.

[0097] The inner layer W end portion is determined as follows. Focusing on the dielectric layer specified at the time of the determination of the inner layer central portion, the boundary of the internal electrode layer and the side edge portion is determined with respect to the dielectric layer. Specifically, the W direction end portions of the pair of internal electrode layers opposing each other with the aforementioned dielectric layer interposed therebetween are determined as the boundary. At this time, in the case where the end portions of the pair of internal electrode layers each deviate in the W direction, the end portion closer to the inner layer central portion is set as the boundary. Then, the portion of the dielectric layer contained up to a distance of 3 μm from the boundary toward the inner layer central portion is determined as the inner layer W end portion (inner layer W end portion) Figure 4 ).

[0098] The number of intragranular voids at the inner layer W end portion is found by TEM observation of the inner layer W end portion. The D50 diameter (D50 [inner layer W end portion]) is found by SEM observation of the inner layer W end portion. The SEM observation can be performed, for example, under a magnification of 25,000 times. Further, at the time of the particle diameter measurement, not only the particle diameters of the void-containing particles but also the particle diameters of the void-free particles are measured.

[0099] Preferably, the intragranular void ratio (N [inner layer central portion]) at the inner layer central portion is 10 / μm 2The following. By reducing N [inner layer central portion], it is possible to suppress the polarity IR problem. Here, the so-called polarity IR is a phenomenon in which the value of the insulation resistance (IR) changes depending on the orientation (polarity) of the applied voltage. That is, in a multilayer ceramic capacitor, the external electrode and the internal electrode are connected. Therefore, if the polarity of the voltage applied to the external electrode is reversed, the orientation of the voltage applied to the dielectric ceramic of the inner layer portion is reversed. At this time, the value of the IR sometimes changes depending on the orientation of the voltage. This is called polarity IR. If the polarity IR is large enough to be ignored, the value of the IR becomes significantly changed depending on the mounting direction of the multilayer ceramic capacitor. In the case of actual operation, it becomes a cause of IR value deviation, so it is preferable to suppress the polarity IR as much as possible.

[0100] As a reason why it is possible to suppress the polarity IR by reducing N [inner layer central portion], the interpretation should not be limited, but the following aspects are considered.

[0101] As described above, if the hydrothermally synthesized powder is used, the interface between the dielectric layer and the internal electrode layer becomes smooth, so it is advantageous for the suppression of IR degradation. However, if the hydrothermally synthesized powder is used, a particle with a void remains in the dielectric layer. If this void is located at a position equidistant from both of the pair of internal electrodes opposed to each other with the dielectric layer interposed therebetween, there is no problem, however, if the void is located closer to either one, polarity IR occurs. This is because the direction of application of the electric field around the void changes, and the electric field intensity distribution changes when the voltage application direction is changed. The void is easily left in the dielectric particles that do not grow during firing. In the dielectric layer (inner layer portion), the dielectric particles with a small particle growth length are sometimes distributed in blocks (FIG. 1). Figure 5 On the basis of the particle size distribution of such dielectric particles, the distribution of the voids within the particles also becomes uneven, so the difference in the electric field intensity when the voltage application direction is changed is emphasized, becoming a cause of the occurrence of polarity IR.

[0102] On the other hand, in the case where the void ratio within the particles at the inner layer central portion (N [inner layer central portion]) is small, it can be considered that the voids are randomly distributed (FIG. 2). Figure 5 Further, since the number of voids themselves is small, the change in the direction of application of the electric field around the voids is small enough to be ignored. Therefore, it is possible to significantly suppress the polarity IR.

[0103] In the case where the thickness of the dielectric layer is 3.0 μm or less, in order to suppress the polarity IR occurrence rate, N [inner layer central portion] is preferably more than 0 pieces / μm 2 and 10 pieces / μm 2 Hereinafter, more preferably more than 0 pieces / μm 2 and 7 pieces / μm 2 Hereinafter, further preferably more than 0 pieces / μm 2 and 4 pieces / μm 2The following. N [inner layer central portion] can also be 1 / μm 2 The above.

[0104] Further, as long as the above-described relationship of N [inner layer central portion] and N [lateral edge portion] is satisfied, the intragranular void ratio of the lateral edge portion (N [lateral edge portion]) is not limited. However, from the viewpoint of further exerting the effect of suppressing IR degradation, N [lateral edge portion] is preferably 5 / μm 2 The above and 26 / μm 2 The following, more preferably 10 / μm 2 The above and 26 / μm 2 The following, further preferably 15 / μm 2 The above and 26 / μm 2 The following.

[0105] In addition, the lateral edge portion includes a first lateral edge portion and a second lateral edge portion. The intragranular void ratio of the first lateral edge portion and the intragranular void ratio of the second lateral edge portion can be the same or can be different. However, preferably, both are greater than the intragranular void ratio of the inner layer central portion.

[0106] Preferably, the ceramic dielectric (hereinafter, sometimes collectively referred to as "outer layer ceramic") constituting the outer layer portion (first outer layer portion, second outer layer portion) includes a void-containing particle. Thereby, it is possible to effectively suppress the generation of cracks in the multilayer ceramic capacitor. Although should not be limitedly interpreted, the following aspects are considered as a reason thereof.

[0107] In the firing process at the time of manufacturing the multilayer ceramic capacitor, not only the lateral edge portion, but also the dielectric particles of the outer layer portion easily undergo particle growth compared to the inner layer portion. In the case where particle growth is performed, the D50 diameter of the dielectric particles becomes large, and not only that, but the particle size distribution also becomes wide. In a ceramic sintered body, the stress received by adjacent particles is balanced as a whole, and thus a high mechanical strength can be maintained. In a sintered body having a particle size distribution, the coordination number of adjacent particles and the diameter of adjacent particles differ for each dielectric particle, and when observed microscopically, this becomes a cause of strength deviation. As a result of this, in the case where the multilayer ceramic capacitor is subjected to a flexure test for a mounting substrate, it becomes easy to generate cracks.

[0108] In contrast to this, if the dielectric particles of the outer layer portion are made to have internal voids to suppress particle growth and minimize the particle size distribution, the mechanical strength is uniform microscopically, and as a result, it is possible to effectively suppress the generation of cracks.

[0109] Preferably, the ratio of intragranular voids at the central portion of the inner layer portion (N[inner layer central portion]) and the ratio of intragranular voids at the first outer layer portion and the second outer layer portion (N[outer layer portion]) satisfy the relation of N[inner layer central portion]<N[outer layer portion]. Thereby, the generation of cracks of the multilayer ceramic capacitor can be further significantly suppressed. Although not to be construed as being limited, the following aspects are considered as the reason.

[0110] For the mounting of the multilayer ceramic capacitor to the printed board, in the case of a vertical board in which the outer layer portion (W direction) is perpendicular to the board surface, if the board is bent, tensile stress is applied to the side edge portion. In contrast, in the case of a horizontal board in which the outer layer portion (W direction) is parallel to the board surface, if the board is bent, tensile stress is applied to the outer layer portion. Generally, the mounting direction is random, and thus tensile stress caused by the bending of the board is applied to both the outer layer portion and the side edge portion. In the case where the ratio of intragranular voids of the side edge portion is larger than that of the inner layer portion and the ratio of intragranular voids of the outer layer portion is larger than that of the inner layer portion, even if tensile stress is applied to both the side edge portion and the outer layer portion, the microscopic mechanical strength is uniform due to the presence of the intragranular voids present at a relatively high ratio, which is related to the prevention of cracks.

[0111] The diameter of the dielectric particles in which intragranular voids are present is relatively small, and thus the grain boundary area of the side edge portion and the outer layer portion containing such dielectric particles increases. This means an increase in the grain boundary area that is strengthened, and thus is also related to the prevention of cracks from this viewpoint. That is, by making the ratio of intragranular voids of the side edge portion larger than that of the inner layer portion, and making the ratio of intragranular voids of the outer layer portion larger than that of the inner layer portion, the generation of cracks can be further significantly suppressed. Specifically, in a bending test in which the bending amount is set to 2.5 mm, the generation rate of cracks can be suppressed to 5% or less.

[0112] From the viewpoint of seeking to reduce the generation rate of cracks in the bending test of the mounted board, the ratio of intragranular voids of the outer layer portion (N[outer layer portion]) is preferably 1 / μm 2 25 / μm 2 More preferably, 8 / μm 2 25 / μm 2 Further preferably, 12 / μm 2 25 / μm 2The following. In addition, in the outer layer portion, a first outer layer portion and a second outer layer portion are included. The intragranular void ratio of the first outer layer portion and the intragranular void ratio of the second outer layer portion can be the same, or can be different. However, in the case where N[inner layer central portion] and N[outer layer portion] satisfy the above-described relationship (N[inner layer central portion]<N[outer layer portion]), it is preferable that both the intragranular void ratio of the first outer layer portion and the intragranular void ratio of the second outer layer portion satisfy this relationship.

[0113] According to a suitable one mode, the zirconium concentration of the ceramic dielectric constituting the inner layer portion (Zr[inner layer portion]) and the zirconium concentration of the ceramic dielectric constituting the side edge portion (Zr[side edge portion]) satisfy Zr[side edge portion]<Zr[inner layer portion]. As described later, in the manufacture of the multilayer ceramic capacitor, a particle growth promoting material such as Zr is added to the inner layer green sheet and the side edge green body, and by controlling the amount thereof, the intragranular void ratio can be adjusted. Further, in this case, in the finally obtained multilayer ceramic capacitor, the concentration of the particle growth promoting material (Zr, etc.) in the inner layer portion becomes higher than that in the side edge portion.

[0114] According to another suitable mode, the dielectric particles included in the inner layer portion and the side edge portion include a perovskite-type oxide having a composition represented by ABO3. Further, preferably, the molar ratio (A / B ratio) of the dielectric particles included in the side edge portion is larger than the molar ratio (A / B ratio) of the dielectric particles included in the inner layer portion. As described later, in the manufacture of the multilayer ceramic capacitor, by controlling the molar ratio (A / B ratio) of the main component powder included in the inner layer green sheet and the side edge green body, the intragranular void ratio can be adjusted. Further, in this case, in the finally obtained multilayer ceramic capacitor, the molar ratio of the dielectric particles included in the side edge portion becomes larger than the molar ratio of the dielectric particles included in the inner layer portion.

[0115] The multilayer ceramic capacitor of the present embodiment includes dielectric particles having a void inside (void-containing particles) in the inner layer portion and the side edge portion, and further controls the intragranular void ratio (N[inner layer central portion], N[side edge portion]) to satisfy a given relationship. Therefore, it is possible to suppress degradation of the insulation resistance (IR), and to have the advantage of high reliability. Although not limited, for example, the mean time to failure (MTTF) in a highly accelerated life test (HALT) can be set to 30 hours or more, 50 hours or more, or 70 hours or more. In addition, the mean time to failure can be found by the method described in the examples described later, or a method based thereon.

[0116] While not limited, the multilayer ceramic capacitor of the present embodiment can suppress polarity IR by controlling the ratio of the intraparticle voids at the inner layer central portion (N[inner layer central portion]) to be within a given range. For example, the polarity IR generation rate can be set to 3% or less or 1% or less. In addition, the polarity IR generation rate is calculated as follows. First, a forward voltage is applied to the multilayer ceramic capacitor and the insulation resistance (IR) is calculated. Next, a reverse voltage is applied and the insulation resistance (IR) is calculated Figure 6 ). After the respective IR (insulation resistance) values measured for the direction of the applied voltage change are converted to the difference in the common logarithm values, the proportion of the number of samples for which the absolute value of the difference exceeds 0.3 (the number of bits of the antilog exceeds 0.3) is calculated as the polarity IR generation rate. More specifically, the calculation is performed by the method described in the examples below or a method based thereon.

[0117] While not limited, the multilayer ceramic capacitor of the present embodiment can effectively suppress crack generation by including void-containing particles in the outer layer portion and further controlling the ratio of the intraparticle voids (N[inner layer central portion], N[outer layer portion]). For example, the crack generation rate in a flex test in which the amount of flexing of the mounting substrate is set to 2.5 mm can be set to 5% or less, 3% or less, or 1% or less. In addition, the flex test is calculated by the method described in the examples below or a method based thereon.

[0118] <<2. Method for manufacturing multilayer ceramic capacitor>>

[0119] The manufacturing method of the multilayer ceramic capacitor of the present embodiment is not limited as long as the above requirements are satisfied. However, a suitable manufacturing method includes the following processes: a process of synthesizing a main component powder for a ceramic dielectric (synthesis process); a process of mixing a subcomponent raw material in the main component powder to obtain a dielectric raw material (mixing process); a process of adding and mixing a binder and a solvent in the dielectric raw material and performing slurryization, and forming a green sheet for an inner layer and a green sheet for an outer layer from the obtained slurry (forming process); a process of forming a patterned conductive paste layer on the surface of the green sheet for an inner layer using an internal electrode conductive paste (printing process); a process of stacking a plurality of green sheets for an inner layer on which the conductive paste layer is formed, and stacking the green sheet for an outer layer on the upper and lower layers, and performing press bonding on the whole to manufacture a stacked block (stacking process); a process of cutting the obtained stacked block into a stacked chip (cutting process); a process of attaching a side edge green body to the side surface of the obtained stacked chip to manufacture a green body portion (side edge portion forming process); a process of performing a binder removal treatment and a firing treatment on the obtained green body portion to become a body portion (firing process); and a process of forming an external electrode on the obtained body portion to manufacture a multilayer ceramic capacitor (external electrode forming process). Furthermore, in the obtained multilayer ceramic capacitor, the ceramic dielectric constituting the inner layer portion and the side edge portion (the first side edge portion and the second side edge portion) respectively contains a hollow particle, and the manufacturing conditions are controlled so that the relationship N[inner layer central portion]<N[side edge portion] is satisfied, and the relationship 1.00≤D50[inner layer W end portion] / D50[inner layer central portion]≤1.40 is also satisfied. Details of each process are described below.

[0120] <synthesis process>

[0121] In the synthesis process, a main component powder for forming a ceramic dielectric is synthesized. The main component powder is a dielectric powder having a perovskite structure (ABO3) such as a BaTiO3-based compound. As the main component powder of the ceramic dielectric, a hydrothermal synthesis powder is used. Thereby, a multilayer ceramic capacitor including a dielectric particle (hollow particle) having a hollow inside can be manufactured.

[0122] As for the synthesis of the hydrothermally synthesized powder, a raw material containing an A-site element constituting a perovskite structure (A-site raw material) and a raw material containing a B-site element (B-site raw material) are subjected to a hydrothermal reaction at high temperature and high pressure. Specifically, the raw materials are put into a sealed container such as an autoclave together with water, and a hydrothermal reaction is induced by heating. As the A-site raw material, a hydroxide such as barium hydroxide (Ba(OH)2) is used. As the B-site raw material, an oxide such as titanium oxide (TiO2) and metatitanic acid (TiO(OH)2), and a hydrate thereof are used. The heating temperature is not limited, but can be 150°C or higher and 250°C or lower. The product obtained by the hydrothermal reaction is dried to obtain a dielectric powder. In addition, in order to improve the crystallinity of the dielectric powder, the product can be subjected to heat treatment. The heat treatment is performed at a temperature of 800°C or higher and 1000°C or lower, for example.

[0123] <mixing step>

[0124] In the mixing step, a sub-component (Ni, RE, Mg, Mn, Si, Al, V, etc.) raw material is mixed in the main component powder to obtain a dielectric raw material. As the sub-component raw material, a known ceramic raw material such as an oxide, a carbonate, a hydroxide, a nitrate, an organic acid salt, an alkoxide, and / or a chelate can be used. In addition, a composition control agent of the main component powder can be added in addition to the sub-component raw material. For example, in the case where the main component powder is barium titanate (BaTiO3) powder, by adding a Ba raw material such as barium carbonate (BaCO3), it is possible to control the main component composition (A / B ratio) of the ceramic dielectric contained in the multilayer ceramic capacitor. The mixing method is not particularly limited. For example, a method in which weighed main component powder and sub-component raw material are mixed and pulverized together with a pulverizing medium and pure water using a ball mill in a wet manner can be exemplified. In the case where wet mixing is performed, the mixture is only subjected to drying.

[0125] <shaping step>

[0126] In the shaping step, a binder and a solvent are added and mixed in the dielectric raw material, and slurry is performed, and a green sheet for an inner layer and a green sheet for an outer layer are formed from the obtained slurry. As the binder, a known organic binder such as a polyvinyl butyral-based binder can be used. In addition, as the solvent, a known organic solvent such as toluene and ethanol can be used. An additive such as a plasticizer can be added as needed. The shaping can be performed by a known method such as a doctor blade (RIP) method. The thickness of the sheet after shaping is, for example, 4 μm or less.

[0127] <printing step>

[0128] In the printing step, the surface of the inner layer green sheet is formed with a patterned conductive paste layer using a conductive paste. The conductive paste layer becomes the internal electrode layer after firing. As the conductive metal contained in the conductive paste, a conductive material such as nickel (Ni), copper (Cu), silver (Ag), palladium (Pd), and alloys containing them can be used. In addition, a ceramic component that functions as a common material can be added to the conductive paste. As the ceramic component, the main component powder of the dielectric layer can be used. The method of forming the conductive paste layer is not particularly limited. For example, methods such as screen printing, gravure printing, and the like can be listed.

[0129] <Layering Step>

[0130] In the layering step, a plurality of inner layer green sheets on which the conductive paste layer is formed are layered, and outer layer green sheets are layered on the upper and lower surfaces thereof. Then, the entire body is press-bonded, thereby producing a layered block. The inner layer green sheet becomes a ceramic dielectric (inner layer ceramic) that constitutes the inner layer portion of the layered ceramic capacitor after the firing step. The outer layer green sheet becomes a ceramic dielectric (outer layer ceramic) that constitutes the outer layer portion. The number of green sheets to be layered is adjusted so that the desired capacitance is obtained.

[0131] <Cutting Step>

[0132] In the cutting step, the obtained layered block is cut to become a layered chip. The cutting is performed so that a chip of a given size can be obtained and the conductive paste layer is exposed on the end surface and the side surface of the layered chip.

[0133] <Sideways Edge Portion Forming Step>

[0134] In the sideways edge portion forming step, a sideways edge green body is attached to the side surface of the layered chip, thereby producing a green body portion. The conductive paste layer exposed on the side surface of the layered chip is covered with the sideways edge green body. In addition, the sideways edge green body becomes the sideways edge portion of the layered ceramic capacitor after firing. As the raw material of the sideways edge green body (sideways edge portion raw material powder), the main component powder used to produce the inner layer green sheet and the sub-component raw material, and the like can be used.

[0135] The production and attachment of the sideways edge green body can be performed by a publicly known method. For example, a method in which a green sheet is produced from a dielectric raw material that becomes the sideways edge portion raw material and the green sheet is adhered to the side surface of the layered chip can be listed. At this time, in order to make the adhesion of the green sheet reliable, an adhesion aid such as an organic solvent can be applied to the side surface of the layered chip in advance. Alternatively, a method in which a paste is produced from a dielectric raw material and the paste is applied and dried on the side surface of the layered chip can be listed. The sideways edge green body can be a single layer, or can be a laminate containing a plurality of layers. The sideways edge green body containing a laminate can be obtained by a method in which a plurality of green sheets are layered on the side surface of the layered chip, a method in which the application and drying of the paste are repeated.

[0136] The green body portion can also be subjected to barrel polishing as needed. By this process, the corner portions and / or the ridge line portions of the green body portion can be rounded.

[0137] <the firing step>

[0138] In the firing step, the green body portion is subjected to debinding and firing processes, thereby becoming the body portion. The conductive paste layer and the inner layer green sheet are co-fired by the firing process, thereby becoming the internal electrode layer and the ceramic dielectric constituting the inner layer portion. The outer layer green sheet is sintered, thereby becoming the ceramic dielectric constituting the outer layer portion. The side edge green body is sintered, thereby becoming the ceramic dielectric constituting the side edge portion.

[0139] The conditions of the debinding process can be determined according to the types of the organic binder contained in the green sheet and the conductive paste layer. Further, the firing process can be performed at a temperature at which the laminated green sheet is sufficiently densified. For example, it can be performed at a temperature of 1200°C or higher and 1400°C or lower for 0 minutes or more and 10 minutes or less. Further, the firing is performed in an atmosphere in which the main component compound such as BaTiO3 is not reduced and oxidation of the conductive material is inhibited. For example, it can be performed in a N2-H2-H2O gas stream having an oxygen partial pressure of 1.7 x 10 -7 ~ 5.8 x 10 -10 MPa. The annealing process can also be performed after the firing.

[0140] <the external electrode forming step>

[0141] In the external electrode forming step, the external electrode is formed on the body portion, thereby becoming the laminated ceramic capacitor. The formation of the external electrode can be performed by a known method. For example, on the end surface of the internal electrode of the body portion, which is exposed, a conductive paste having a conductive component such as Cu or Ni as a main component is applied and fired, thereby forming a base layer. The base layer can also be formed by a method in which the conductive paste is applied to both end surfaces of the green body portion before the firing and the firing process is performed. Electroless plating can be performed after the base layer is formed, thereby forming a plated film of Ni, Sn, or the like on the surface of the base layer. Thus, the laminated ceramic capacitor is produced.

[0142] <control of the ratio of the intragranular void>

[0143] In the production method of the present embodiment, the production conditions are controlled so that the ceramic dielectric that constitutes the inner layer portion and the side edge portions (the first side edge portion and the second side edge portion) respectively contains the hollow particles in the obtained multilayer ceramic capacitor. Specifically, as the main component powder contained in at least the inner layer green sheet and the side edge green body, the hydrothermally synthesized powder is used. As the main component powder, only the hydrothermally synthesized powder can be used, or the hydrothermally synthesized powder and a powder synthesized by a method other than the hydrothermal method can be used in combination. As the method other than the hydrothermal method, although not limited, the solid phase method, the sol-gel method, the alkoxide method, the solvothermal method, or the oxalate method can be exemplified. Further, the main component powder after synthesis can be pulverized to adjust the particle diameter.

[0144] On the other hand, as the main component powder contained in the outer layer green sheet, the hydrothermally synthesized powder can be used, or a dielectric powder synthesized by a method other than the hydrothermal method can be used. However, the hydrothermally synthesized powder is preferably used. Thereby, the ceramic dielectric that constitutes the outer layer portion can be made to have hollow particles.

[0145] Further, in the production method of the present embodiment, the production conditions are controlled so that, in the obtained multilayer ceramic capacitor, the intragranular hollow ratio at the inner layer central portion (N[inner layer central portion]) and the intragranular hollow ratio at the side edge portions (the first side edge portion and the second side edge portion) (N[side edge portion]) satisfy the relationship of the formula: N[inner layer central portion]<N[side edge portion], and further, the D50 diameter of the dielectric particles at the inner layer W end portion (D50[inner layer W end portion]) and the D50 diameter of the dielectric particles at the inner layer central portion (D50[inner layer central portion]) satisfy the relationship of the formula: 1.00≤D50[inner layer W end portion] / D50[inner layer central portion]≤1.40.

[0146] The method of controlling the intragranular hollow ratio and the D50 diameter is not limited. For example, a method of adding a particle growth promoting material, a particle growth inhibiting material to the main component powder and adjusting the amount thereof can be exemplified. As the particle growth promoting material, zirconium (Zr), silicon (Si), vanadium (V), and / or aluminum (Al), etc. can be exemplified. In the firing process, the dielectric particles undergo particle growth. At this time, the more the particle growth is promoted, the smaller the intragranular hollow becomes, and according to the case, disappears. Therefore, by adding the particle growth promoting material to the inner layer green sheet, the outer layer green sheet, or the side edge green body and adjusting the amount thereof, the intragranular hollow ratio at each portion can be controlled.

[0147] Alternatively, a method of adjusting the composition of the main component powder can be cited. The main component powder is a perovskite oxide having a composition represented by the formula: ABO3, with BaTiO3 being representative. With respect to the perovskite oxide, the smaller the molar ratio of the element at the A site (Ba, etc.) to the element at the B site (Ti, etc.) (A / B ratio), the more the particle growth is promoted. Therefore, by adjusting the molar ratio (A / B ratio) of the main component powder contained in the inner layer green sheet, the outer layer green sheet, or the side edge green body, the ratio of the intragranular pores at each portion can be controlled.

[0148] Further, a method of adjusting the particle diameter of the raw material particles such as the main component powder can be cited. The smaller the raw material particles, the more the particle growth is promoted. Therefore, by adjusting the particle diameter of the main component powder of the inner layer green sheet, the outer layer green sheet, or the side edge green body, the ratio of the intragranular pores at each portion can be controlled.

[0149] As another method, a method other than the hydrothermal method, for example, a method of adding a dielectric powder synthesized by a solid phase method to the main component powder can be cited. As described previously, the hydrothermal synthesis powder has intragranular pores, and in contrast, the dielectric powder synthesized by a method other than the hydrothermal method does not have intragranular pores. Therefore, by using both the hydrothermal synthesis powder and the dielectric powder synthesized by a method other than the hydrothermal method and adjusting the ratio thereof, the ratio of the intragranular pores at each portion can be controlled.

[0150] In the finally obtained laminated ceramic capacitor, as long as the ratio of the intragranular pores, the D50 diameter of the inner layer portion, the outer layer portion, and the side edge portion can be controlled so as to satisfy a given relationship, the method is not limited.

[0151] [Embodiment]

[0152] The present embodiment will be described more specifically by the following examples. However, the present application is not limited to the following examples.

[0153] (1) Production of Laminated Ceramic Capacitor

[0154] [Example 1]

[0155] In Example 1, a barium titanate (BaTiO3) powder synthesized by a hydrothermal method was used as a main component powder to produce an inner layer green sheet, an outer layer green sheet, and a side edge green body, and a laminated ceramic capacitor was produced using them. The specific production process is shown below.

[0156] <Synthesis of Main Component Powder>

[0157] A barium titanate (BaTiO3) powder was synthesized by a hydrothermal method. First, titanium oxide (TiO2) powder and barium hydroxide (Ba(OH)2) powder were weighed, and pure water was added thereto to prepare a slurry. Then, the prepared slurry was put into a sealed container, and the temperature of the slurry was raised to 200 to 250°C while stirring. Then, the slurry was maintained at 200 to 250°C for 4 to 24 hours to promote a liquid phase reaction. Then, the internal pressure of the sealed container was returned to atmospheric pressure, the heating of the sealed container was stopped, and the slurry was left to stand. After cooling, the slurry was taken out of the sealed container and put into a drier to evaporate moisture. In this way, a hydrothermally synthesized BaTiO3 powder having an average particle diameter of 130 nm was obtained.

[0158] <Manufacture of a green sheet for an inner layer>

[0159] Unlike the hydrothermally synthesized BaTiO3 powder, as a subcomponent raw material, dysprosium oxide (Dy2O3), magnesium carbonate (MgCO3), manganese carbonate (MnCO3), silicon oxide (SiO2), and vanadium oxide (V2O5) were prepared. Further, barium carbonate (BaCO3) and zirconium oxide (ZrO2) were prepared. These subcomponent raw materials, BaCO3, and ZrO2 were added to the BaTiO3 powder (average particle diameter: 130 nm), and the resulting mixture was wet-pulverized (blended) in water for 24 hours using a ZrO2 ball mill, and then dried to become a dielectric raw material for an inner layer. The amount of BaCO3 added was adjusted so that the Ba / Ti ratio of the ceramic dielectric (inner layer ceramic) constituting the inner layer portion of the finally obtained multilayer ceramic capacitor became 1.0027. In addition, the Ba / Ti ratio is the ratio of the molar amounts. Further, the amount of ZrO2 added was set to 0.55% by mass with respect to the BaTiO3 powder. Next, a polyvinyl butyral-based binder and ethanol as an organic solvent were added to the resulting dielectric raw material, and wet-mixed for a given time using a ball mill to prepare a slurry. The slurry was sheet-formed to prepare a green sheet for an inner layer.

[0160] <Manufacture of a green sheet for an outer layer>

[0161] Dy2O3, magnesium carbonate (MgCO3), manganese carbonate (MnCO3), silicon oxide (SiO2), vanadium oxide (V2O5) were prepared as the subcomponent raw materials. Further, barium carbonate (BaCO3) and zirconium oxide (ZrO2) were prepared. These subcomponent raw materials, BaCO3, and ZrO2 were added to the BaTiO3 powder (average particle diameter: 130 nm), and the resulting mixture was wet-pulverized (blended) in water for 24 hours using a ZrO2 ball mill, and then dried to become the dielectric raw material for the outer layer. The BaCO3 addition amount was adjusted so that the Ba / Ti ratio of the ceramic dielectric (outer layer ceramic) constituting the outer layer portion of the finally obtained multilayer ceramic capacitor became 1.0027. Further, the ZrO2 addition amount was set to 0.55 mass% with respect to the BaTiO3 powder. Next, a polyvinyl butyral-based binder and ethanol as an organic solvent were added to the resulting dielectric raw material, and wet-mixed for a given time using a ball mill, thereby preparing a slurry. The slurry was sheet-formed, thereby preparing a green sheet for the outer layer.

[0162] <Manufacture of side edge green body>

[0163] Dy2O3, magnesium carbonate (MgCO3), manganese carbonate (MnCO3), silicon oxide (SiO2), vanadium oxide (V2O5) were prepared as the subcomponent raw materials. Further, barium carbonate (BaCO3) was prepared. These subcomponent raw materials and BaCO3 were added to the BaTiO3 powder (average particle diameter: 130 nm), and the resulting mixture was wet-pulverized (blended) in water for 12 hours using a ZrO2 ball mill, and then dried to become the dielectric raw material for the side edge green body. The BaCO3 addition amount was adjusted so that the Ba / Ti ratio of the ceramic dielectric (side edge ceramic) constituting the side edge portion of the finally obtained multilayer ceramic capacitor became 1.0040. Next, a polyvinyl butyral-based binder and ethanol as an organic solvent were added to the resulting dielectric raw material, and wet-mixed for a given time using a ball mill, thereby preparing a slurry. The slurry was sheet-formed, thereby preparing a side edge green body.

[0164] <Manufacture of multilayer body>

[0165] On the surface of the obtained inner layer green sheet, a conductive paste mainly containing Ni was screen-printed to form a conductive paste layer which became an internal electrode layer. Then, the plurality of inner layer green sheets on which the conductive paste layer was formed were laminated, and outer layer green sheets on which the conductive paste layer was not formed were arranged above and below the laminated green sheets, and the whole was press-bonded to produce a laminated block. Then, the obtained laminated block was cut by a cutting machine to become a laminated chip. The laminating was performed so that the end portions of the conductive paste layer were staggered. Further, the cutting was performed so that the conductive paste layer was exposed on the side surfaces, and the lead-out portions of the conductive paste layer were exposed on the end surfaces.

[0166] The side surface edges of the cut laminated chip on which the conductive paste layer was exposed were adhered with side edge green bodies to produce a green body portion.

[0167] The obtained green body portion was heat-treated at a maximum temperature of 270°C in a N2 stream, and further heat-treated at a maximum temperature of 800°C in a N2-H2O-H2 stream. Then, firing was performed in a N2-H2O-H2 stream. The firing was performed at a maximum temperature of 1250 to 1320°C, a temperature increase rate of 20 to 60°C / sec, a holding time of 60 minutes, and an oxygen partial pressure of 3.2 x 10 -9 to 6.4 x 10 -10 MPa. Subsequently, heat treatment was performed at a maximum temperature of 1050°C x 60 minutes in a N2-H2O-H2 stream. Thus, the body portion was obtained.

[0168] On the end surfaces of the body portion obtained by the firing from which the internal electrode layer was led out, a conductive paste mainly containing copper (Cu) was applied. Then, the applied conductive paste was fired at 900°C to form a base layer of an external electrode. Further, on the surface layer of the base layer, Ni plating and Sn plating were sequentially performed by wet plating. In this way, a multilayer ceramic capacitor was produced.

[0169] The length L dimension of the produced multilayer ceramic capacitor was 1.0 mm, the width direction W dimension was 0.5 mm, and the thickness direction T dimension was 0.5 mm. Further, the thickness of the dielectric layer at the inner layer portion was 0.80 μm, the thickness of the internal electrode layer was 0.47 μm, and the number of layers of the dielectric layer was 345 layers.

[0170] [Example 2]

[0171] In Example 2, the BaCO3 addition amount was adjusted so that the Ba / Ti ratio of the inner layer ceramic became 1.0015 when making the green sheet for the inner layer. In addition, the ZrO2 addition amount was changed from 0.55 mass% to 0.3 mass%. Further, the ZrO2 addition amount added when making the green sheet for the outer layer was changed from 0.55 mass% to 0.3 mass%. Other than this, the multilayer ceramic capacitor was made in the same manner as in Example 1.

[0172] [Example 3]

[0173] In Example 3, the BaCO3 addition amount was adjusted so that the Ba / Ti ratio of the side edge ceramic became 1.0027 when making the side edge green body. In addition, ZrO2 was added together with BaCO3, and the addition amount thereof (ZrO2 addition amount) was set to 0.3 mass% with respect to the BaTiO3 powder. Further, the pulverization time was changed from 12 hours to 24 hours. Other than this, the multilayer ceramic capacitor was made in the same manner as in Example 1.

[0174] [Example 4]

[0175] In Example 4, the BaCO3 addition amount was adjusted so that the Ba / Ti ratio of the side edge ceramic became 1.0027 when making the side edge green body. In addition, ZrO2 was added together with BaCO3, and the addition amount thereof (ZrO2 addition amount) was set to 0.3 mass% with respect to the BaTiO3 powder. Other than this, the multilayer ceramic capacitor was made in the same manner as in Example 1.

[0176] [Example 5]

[0177] In Example 5, the ZrO2 addition amount added when making the ceramic green sheet for the inner layer was changed from 0.55 mass% to 0.4 mass%. Other than this, the multilayer ceramic capacitor was made in the same manner as in Example 1.

[0178] [Example 6]

[0179] In Example 6, the ZrO2 addition amount added when making the ceramic green sheet for the inner layer was changed from 0.55 mass% to 0.3 mass%. Other than this, the multilayer ceramic capacitor was made in the same manner as in Example 1.

[0180] [Example 7]

[0181] In Example 7, the ZrO2 addition amount added when making the ceramic green sheet for the outer layer was changed from 0.55 mass% to 0.3 mass%. Other than this, the multilayer ceramic capacitor was made in the same manner as in Example 1.

[0182] [Example 8]

[0183] In Example 8, the added amount of ZrO2 added at the time of making the ceramic green sheet for the outer layer was changed from 0.55 mass% to 0.4 mass%. Other than this, the multilayer ceramic capacitor was made in the same manner as in Example 1.

[0184] [Example 9]

[0185] In Example 9, at the time of making the green sheet for the outer layer, hydrothermally synthesized BaTiO3 powder (average particle diameter: 160 nm) was used instead of the hydrothermally synthesized BaTiO3 powder (average particle diameter: 130 nm). Other than this, the multilayer ceramic capacitor was made in the same manner as in Example 1. In addition, regarding the hydrothermally synthesized BaTiO3 powder (average particle diameter: 160 nm), in addition to increasing the slurry temperature at the time of hydrothermal synthesis, the synthesis was performed by the same process as the hydrothermally synthesized BaTiO3 powder (average particle diameter: 130 nm).

[0186] [Example 10]

[0187] In Example 10, at the time of making the green sheet for the outer layer, the BaCO3 added amount was adjusted so that the Ba / Ti ratio of the outer layer ceramic became 1.0040. In addition, ZrO2 was not added. Further, the pulverization time was changed from 24 hours to 12 hours. Other than this, the multilayer ceramic capacitor was made in the same manner as in Example 1.

[0188] [Example 11]

[0189] In Example 11, at the time of making the green sheet for the outer layer, the BaCO3 added amount was adjusted so that the Ba / Ti ratio of the outer layer ceramic became 1.0040, and ZrO2 was not added. Further, the pulverization time was changed from 24 hours to 12 hours.

[0190] In addition, at the time of making the side edge green body, hydrothermally synthesized BaTiO3 powder (average particle diameter: 100 nm) was used instead of the hydrothermally synthesized BaTiO3 powder (average particle diameter: 130 nm). Further, the BaCO3 added amount was adjusted so that the Ba / Ti ratio of the side edge ceramic became 1.0045. Other than this, the multilayer ceramic capacitor was made in the same manner as in Example 1. In addition, regarding the hydrothermally synthesized BaTiO3 powder (average particle diameter: 100 nm), in addition to decreasing the slurry temperature at the time of hydrothermal synthesis, the synthesis was performed by the same process as the hydrothermally synthesized BaTiO3 powder (average particle diameter: 130 nm).

[0191] [Example 12]

[0192] In Example 12, in the production of the green sheet for the outer layer, hydrothermally synthesized BaTi03 powder (average particle diameter: 100 nm) was used instead of the hydrothermally synthesized BaTi03 powder (average particle diameter: 130 nm). In addition, the BaCO3 addition amount was adjusted so that the Ba / Ti ratio of the outer layer ceramic became 1.0045, and Zr02 was not added. Further, the pulverization time was changed from 24 hours to 12 hours. Other than this, the multilayer ceramic capacitor was produced in the same manner as in Example 1.

[0193] [Example 13]

[0194] In Example 13, the Zr02 addition amount added in the production of the ceramic green sheet for the inner layer was changed from 0.55 mass% to 0.2 mass%. Other than this, the multilayer ceramic capacitor was produced in the same manner as in Example 1.

[0195] [Comparative Example 1]

[0196] In Comparative Example 1, in the production of the side edge green body, hydrothermally synthesized BaTi03 powder (average particle diameter: 150 nm) was used instead of the hydrothermally synthesized BaTi03 powder (average particle diameter: 130 nm). In addition, the BaCO3 addition amount was adjusted so that the Ba / Ti ratio of the side edge ceramic became 1.0027. Further, Zr02 was added together with the BaCO3, and the addition amount (Zr02 addition amount) was set to 0.55 mass% with respect to the BaTi03 powder. Other than this, the pulverization time was changed from 12 hours to 24 hours. Other than this, the multilayer ceramic capacitor was produced in the same manner as in Example 1. In addition, with respect to the hydrothermally synthesized BaTi03 powder (average particle diameter: 150 nm), in addition to increasing the slurry temperature at the time of hydrothermal synthesis, the synthesis was performed by the same process as the hydrothermally synthesized BaTi03 powder (average particle diameter: 130 nm).

[0197] The production conditions of the multilayer ceramic capacitors of Examples 1 to 13 and Comparative Example 1 are shown in Table 1 below.

[0198] [Table 1]

[0199]

[0200] (2) Evaluation

[0201] The multilayer ceramic capacitors produced in Examples 1 to 13 and Comparative Example 1 were evaluated for various characteristics as follows.

[0202] [TEM observation]

[0203] The intragranular porosity was investigated for the inner layer central portion, inner layer W end portion, side edge portion, and outer layer portion of the multilayer ceramic capacitor using a transmission electron microscope (TEM) as follows. First, the body portion was polished to a size of about 1 / 2 of the length L direction of the multilayer ceramic capacitor to expose the WT face. Next, a dielectric layer located at a position of about 1 / 2 of the thickness T dimension in the polished body portion was specified, and a region located at a position of about 1 / 2 of the width W dimension was specified as the inner layer central portion (A). Figure 4 In addition, the boundary between the internal electrode layer and the side edge portion was specified for the specified dielectric layer, and the portion of the dielectric layer included up to a distance of 3 μm toward the inner layer central portion from the boundary was specified as the inner layer W end portion (B). Figure 4 At this time, in the case where the end portions of the pair of internal electrode layers were offset in the W direction, the end portion closer to the inner layer central portion was set as the boundary. Figure 4 The inner layer central portion and the inner layer W end portion were cut out so as to include each of the regions thus specified, and each was thinned to 100 nm or less as a TEM observation sample for investigating the intragranular porosity of the inner layer central portion and the inner layer W end portion. As for the side edge portion, a sample was cut out from a position of about 1 / 2 of the thickness T dimension and about 1 / 2 of the side edge width in the polished body portion, and was thinned to 100 nm or less as a TEM sample for investigating the intragranular porosity. As for the outer layer portion, a sample was cut out from a position of about 1 / 2 of the width W dimension and about 1 / 2 of the outer layer thickness in the polished body portion, and was thinned to 100 nm or less as a TEM sample for investigating the intragranular porosity.

[0204] Next, TEM observation was performed for the inner layer central portion, inner layer W end portion, outer layer portion, and side edge portion, respectively. From the TEM observation sample thus prepared, the number of pores present in the dielectric particles was counted, and the number thus obtained was divided by the area of the ceramic portion (10 μm 2 or more) to thereby calculate the number per unit area (1 μm 2 The same operation was performed at three places (n = 3) in each of the inner layer central portion, inner layer W end portion, side edge portion, and outer layer portion, and the average of the number of intragranular pores per unit area was calculated as the intragranular porosity.

[0205] <SEM observation>

[0206] The WT surface of the multilayer ceramic capacitor was observed using a scanning electron microscope (SEM), and the thickness of the dielectric layer was investigated. Specifically, the multilayer ceramic capacitor was ground to expose a cross section (WT surface) at the center in the L direction. Next, in the exposed cross section, the thickness of the dielectric layer of the inner layer portion near the center in the thickness direction was measured on a total of five lines including the center line in the W direction and two lines drawn at equal intervals on both sides of the center line in the W direction, and the average value thereof was taken as the thickness of the dielectric layer.

[0207] Further, under conditions of a magnification of 25000 times, an acceleration voltage of 15 kV, and a field of view of 4 pm x 5 pm, an SEM image of the dielectric particles in the dielectric layer in the WT cross section near the center in the L direction was captured. At this time, the capturing was performed so as to include the dielectric layer portion of the inner layer central portion near the center in the W direction and the T direction, and also so as to include the inner layer W end portion of the same dielectric layer. Next, using an image processing software, the rims of all the dielectric particles included in the region divided in the W direction at a length of 3 pm and the thickness of the dielectric layer were recognized (equivalent to grain boundaries). Then, the cross-sectional area of each particle recognized was calculated, a hypothetical circle equal to the area was considered, and the diameter of the hypothetical circle (circle equivalent diameter) was defined as the particle diameter. The dielectric particles in which a part of the particle protruded outside the specified division were excluded, and the circle equivalent diameters of all the dielectric particles included in the captured range were measured. Then, the D50 diameter of the inner layer central portion (D50 [inner layer central portion]) and the D50 diameter of the inner layer W end portion (D50 [inner layer W end portion]) were found. In addition, the D50 diameter is a cumulative 50% diameter based on the cross-sectional area of the dielectric particles. That is, the cross-sectional areas of all the measured dielectric particles were added to find the total cross-sectional area, and the cross-sectional area was normalized so as to be 100%. Next, the cumulative cross-sectional area was found by sequentially adding the cross-sectional areas from the particles having a small cross-sectional area, and the circle equivalent diameter of the particle at which the cumulative cross-sectional area reached 50% of the total cross-sectional area was found as the D50 diameter.

[0208] <halt>

[0209] Multilayer ceramic capacitors were used as samples for ultra-accelerated life testing (HALT) to determine the mean time to failure (MTTF). In the test, a load of 150°C and 50V was applied to the samples. The time it took for the insulation resistance (IR) to fall below 200kΩ was defined as the failure time. The failure time was measured for 72 samples manufactured under the same conditions.

[0210] Next, the obtained data is plotted on Weibull probability paper to derive the Weibull distribution. A linear regression is then performed on the relationship between failure time and cumulative failure rate in the obtained Weibull distribution, and its slope is calculated as the shape parameter m. Furthermore, the failure time when the cumulative failure rate reaches 63.2% is taken, and the mean time to failure (MTTF) is defined using this failure time and the shape parameter m, which corresponds to the slope of the regression line.

[0211] <Polar IR>

[0212] A 25V voltage was applied to 100 samples at room temperature for 60 seconds, and the current flowing through the samples was measured at this time. The forward IR was calculated using Ohm's law. Next, the voltage application direction was reversed, and a 25V voltage was applied to the samples at room temperature for 60 seconds. The current flowing through the samples was measured at this time, and the reverse IR was calculated using Ohm's law. Based on the common logarithms of the forward and reverse IR, the absolute value of the difference between the two (IR difference) was calculated. The number of samples with an absolute IR difference exceeding 0.3 was counted, and the proportion relative to the number of samples measured was calculated as the polarity IR generation rate (%).

[0213] <Flexion Test>

[0214] The solder of the multilayer ceramic capacitor is mounted (vertically) on a glass epoxy board (FR-4, 1.6mm thick) such that the outer layer is perpendicular to the substrate surface. Figure 7 A load was applied from above at a speed of 1.0 mm / s to the center of the ceramic body of the multilayer ceramic capacitor, and held for 5 ± 1 seconds starting from the time points when the deflection reached 2.0 mm and 2.5 mm. Then, the LW surface of the held multilayer ceramic capacitor was ground in the T direction perpendicular to the surface to half the size of the T direction dimension. The ground surface was observed, and the presence of cracks was investigated. The results were recorded. Ten samples were used in this vertically mounted deflection test.

[0215] Next, prepare other multilayer ceramic capacitors and perform solder mounting (horizontal mounting) so that the outer layer is parallel to the surface of the glass epoxy board. Figure 7 ), from the time points at which the deflection amount reached 2.0 mm and 2.5 mm as a starting point, the load was applied at a speed of 1.0 mm / sec from above, and the laminate ceramic capacitor was held for 5 ± 1 seconds. Then, the LT face of the held laminate ceramic capacitor was polished to 1 / 2 of the W dimension in the W direction perpendicular to the face, the polished face was observed, and the presence or absence of cracks was investigated, and the results obtained were recorded. The number of samples for the horizontal mounting deflection test was set to 10.

[0216] Then, based on the results of the vertical mounting test and the horizontal mounting test, the crack generation rate was calculated according to the following (1). In the following (1), n[vertical] represents the number of samples in which cracks were generated in the vertical mounting test, and n[horizontal] represents the number of samples in which cracks were generated in the horizontal mounting test. In addition, N[total] is the total number of samples (20) used in the tests (vertical mounting test, horizontal mounting test).

[0217] [Mathematical expression 1]

[0218]

[0219] (3) Evaluation results

[0220] The evaluation results obtained for Examples 1 to 13 and Comparative Example 1 are summarized in Table 2.

[0221] In Examples 1 to 13, the intragranular void ratio at the side edge portion (N[side edge portion]) was larger than the intragranular void ratio at the inner layer central portion (N[inner layer central portion]). In addition, the ratio of the average particle diameter of the dielectric particles at the inner layer central portion to the D50 diameter of the dielectric particles at the inner layer W end portion (D50[inner layer W end portion] / D50[inner layer central portion]) satisfied a relationship of 1.00 or more and 1.40 or less. Therefore, the mean time to failure (MTTF) was relatively long, and was 30 hours or more.

[0222] Examples 1 to 12 suppressed the polarity IR in addition to the above-described effects. Specifically, the intragranular void ratio at the inner layer central portion was 10 / μm 2 Therefore, the polarity IR generation rate was as low as 3% or less.

[0223] Examples 7, 8, and 10 to 12 suppressed the generation of cracks in addition to the above-described effects. Specifically, the intragranular void ratio at the outer layer portion (N[outer layer portion]) was larger than the intragranular void ratio at the inner layer central portion (N[outer layer portion]). Therefore, the crack generation rate in the deflection test in which the deflection amount was set to 2.5 mm was as low as 5% or less.

[0224] In contrast, in Comparative Example 1, the ratio of the intragranular voids at the side edge portion (N[side edge portion]) is smaller than the ratio of the intragranular voids at the inner layer central portion (N[inner layer central portion]). Therefore, the MTTF is shorter, at 27 hours.

[0225] [Table 2]

[0226]

[0227] According to the above results, it is understood that according to the present embodiment, a multilayer ceramic capacitor with high reliability in which deterioration of insulation resistance is suppressed can be provided.< / halt>

Claims

1. A multilayer ceramic capacitor having: An inner layer portion in which a first internal electrode layer and a second internal electrode layer are alternately stacked with a dielectric layer formed of a ceramic dielectric, and having a first main surface as a surface in the stacking direction, a second main surface as a surface opposite to the first main surface, a first side surface as a surface in the width direction orthogonal to the first main surface and the second main surface and from which the first internal electrode layer and the second internal electrode layer are led out, a second side surface as a surface opposite to the first side surface and from which the first internal electrode layer and the second internal electrode layer are led out, a first end surface as a surface in the length direction orthogonal to the first main surface, the second main surface, the first side surface and the second side surface and from which the first internal electrode layer is led out, and a second end surface as a surface opposite to the first end surface and from which the second internal electrode layer is led out; A first outer layer portion formed of a ceramic dielectric and covering the first main surface from the stacking direction; A second outer layer portion formed of a ceramic dielectric and covering the second main surface from the stacking direction; A first side edge portion formed of a ceramic dielectric and covering the inner layer portion, the first outer layer portion and the second outer layer portion from one side in the width direction; A second side edge portion formed of a ceramic dielectric and covering the inner layer portion, the first outer layer portion and the second outer layer portion from the other side in the width direction; and A pair of external electrodes provided on the first end surface and the second end surface and respectively connected to the first internal electrode layer and the second internal electrode layer, The dielectric particles constituting the ceramic dielectric of the inner layer portion, the first side edge portion and the second side edge portion respectively contain voids inside, The intra-granular void ratio N[inner layer central portion] at the central portion of the inner layer portion, i.e., the inner layer central portion, and the intra-granular void ratio N[side edge portion] at the first side edge portion and the second side edge portion satisfy the relationship of the formula: N[inner layer central portion] < N[side edge portion]; The D50 diameter D50[inner layer W end portion] of the dielectric particles at the width direction end portion of the inner layer portion, i.e., the inner layer W end portion, and the D50 diameter D50[inner layer central portion] of the dielectric particles at the central portion of the inner layer portion, i.e., the inner layer central portion, satisfy the relationship of the formula: 1.00 ≤ D50[inner layer W end portion] / D50[inner layer central portion] ≤ 1.

40.

2. The multilayer ceramic capacitor according to claim 1, wherein, The intragranular porosity ratio, N[inner layer central portion], at the central part of the inner layer is 10 particles / μm. 2 the following.

3. The multilayer ceramic capacitor according to claim 1 or 2, wherein, The ceramic dielectric constituting the first outer layer portion and the second outer layer portion contains dielectric particles having voids inside, The intra-granular void ratio N[inner layer central portion] at the central portion of the inner layer portion, i.e., the inner layer central portion, and the intra-granular void ratio N[outer layer portion] at the first outer layer portion and the second outer layer portion satisfy the relationship of the formula: N[inner layer central portion] < N[outer layer portion].

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