A downlink synchronization system and method for a satellite communication terminal device

Abstract

The application discloses a kind of downlink synchronization systems and methods for satellite communication terminal equipment, it is related to satellite communication technical field, including frequency shift module: frequency shift is carried out to the time domain data received;Downsample module: data is downsampled;PSS detection module: correlation processing is carried out using data and PSS local sequence on time domain;SSS detection module: correlation processing is carried out using SSS data and different SSS local sequence respectively on time domain;SSBIndex calculation module: obtain SSBIndex value;Frame header calibration module: whether synchronization is judged according to whether PCI is stable, SSBIndex value is used to calculate radio frame boundary, compared with the frame header of current use radio frame, offset is calculated, and frame header is recalibrated according to synchronous state;The application solves the access process of terminal and satellite, using low storage, quickly and accurately identify SSB, and enhances the anti-interference ability of communication.

Description

Technical Field

[0001] This invention relates to the field of satellite communication technology, and in particular to a downlink synchronization system and method for terminal equipment in satellite communication. When the terminal communicates with the satellite, it receives and parses the synchronization signal in real time to ensure smooth communication. Background Technology

[0002] In satellite communication, terminals and satellites need to ensure correct parsing of synchronization signals to maintain system stability and efficient data transmission. Terminal equipment performs physical layer cell search by receiving synchronization signals (SS) transmitted by the satellite. The synchronization signals include a primary synchronization signal (PSS) and a secondary synchronization signal (SSS), which respectively carry the intra-cell ID number and cell ID group number of the Physical-layer Cell Identities (PCI). The demodulation reference signal (DMRS) in the PBCH is generated from the PCI and SSBIndex. The aforementioned PSS, SSS, and PBCH DMRS information are encapsulated in the SS / PBCH block. Synchronization can be achieved by parsing the SS / PBCH block (SSB). Since the distance of the SSB relative to the actual radio frame is known under a given subcarrier, the boundary of the actual radio frame can be calculated based on the SSBIndex value.

[0003] The distribution of SSBs in both the time and frequency domains is partially concentrated. In the time domain, the position of the radio frame header is uncertain before synchronization, making it impossible to directly obtain SSB data from a specific location. Typically, the transmission period of SSBs is on the order of milliseconds, while the received signal sampling rate is high. Storing the entire data segment for processing would place enormous demands on storage space. Secondly, the periodic transmission of SSBs means that if the calculation time for a single cycle is too slow, it will affect the calculation of the new signal in the next cycle, which is detrimental to maintaining system stability. In the frequency domain, when selecting full-bandwidth data, other channel signals may significantly interfere with the parsing of the synchronization signal. Therefore, a synchronization method that requires low storage, fast computation, and is resistant to interference is needed. Summary of the Invention

[0004] The purpose of this invention is to address the problems of large data storage requirements, slow speed, and susceptibility to interference during synchronization signal parsing in the synchronization process between the terminal and the satellite, by providing a downlink synchronization system and method for terminal equipment in satellite communication.

[0005] To achieve the above objectives, the technical solution adopted by the present invention is: a downlink synchronization system for terminal equipment in satellite communication, comprising:

[0006] Frequency shift module: used to transmit the time-domain data received by the FPGA from the RF interface after frequency shifting to the downsampling module, ensuring that the SSB is located at the center frequency;

[0007] Downsampling module: downsamples the data by 16 times and 32 times respectively; then transmits the downsampled data to the PSS detection module;

[0008] The PSS detection module generates three local sequences based on three candidate values ​​(0, 1, 2) of the PSS cell group ID number. The cell group ID number is denoted as... In the time domain, 32x downsampled data and PSS local sequences are used in parallel for correlation processing;

[0009] SSS Detection Module: Based on the cell group ID number in the received PSS and the candidate values ​​of the corresponding SSS cell ID group number (0~335), it serially generates the SSS local sequence, with the cell ID group number denoted as... In the time domain, correlation processing is performed using SSS data and SSS local sequences. Based on the correlation peak values, the cell ID group number carried in the corresponding SSS is found.

[0010] SSBIndex calculation module: Based on the cell group ID number in PSS and the cell ID group number in SSS The PCI value is calculated, and the SSB value is obtained by using the PCI value and SSB data through DMRS in the frequency domain solution of PBCH.

[0011] Frame header calibration module: Under a given subcarrier, the distance of the SSBIndex value relative to the actual radio frame is fixed. The boundary of the actual radio frame is calculated based on the SSBIndex value.

[0012] First, it is necessary to determine whether the PCI values ​​are consistent in 5 consecutive cycles. If they are consistent, it is determined to be synchronized. The offset of the current wireless frame header is calculated, and the new frame header position is changed to achieve frame header recalibration. If they are inconsistent, it is determined to be out of synchronization, and the original frame header is not changed.

[0013] The calculation method for the relevant processing in the PSS detection module and SSS detection module is as follows:

[0014]

[0015] in For data indexing, For the length of the relevant point data, For sequence delay, For signal Lagging data, For local sequences The conjugate of complex numbers.

[0016] In a preferred embodiment of the present invention, the PSS detection module includes:

[0017] For the processed results, using the SSB transmission period as the basic period, relevant peak values ​​are searched. The candidate values ​​corresponding to these peak values ​​are the cell group IDs carried in the PSS. Simultaneously, the peak position is detected and denoted as... There is a computational delay from the input of raw data to the output of relevant results. Using the detection peak position Subtract relevant calculation delays The location of the SSB data segment is obtained, and then the SSS data segment with a 32x downsampling and the DMRS data segment with a 16x downsampling are stored according to the location of the SSB data segment.

[0018] In a preferred embodiment of the present invention, the PCI value is calculated in the SSBIndex calculation module as follows:

[0019] .

[0020] In a preferred embodiment of the present invention, the SSBIndex calculation module includes:

[0021] The lower 3 bits of SSBIndex can carry 8 candidate values. Based on the PCI value, 8 local DMRS sequences can be generated. The DMRS data is then converted to the frequency domain for channel estimation and power calculation. The calculation method is as follows:

[0022]

[0023] in For subcarrier index, For subcarrier The frequency domain DMRS data received above, For subcarrier DMRS local sequence on For subcarrier The estimated channel frequency response, For SSB index The corresponding cumulative power.

[0024] The index corresponding to the power peak is the SSBIndex value.

[0025] As a preferred embodiment of the present invention, the specific method for calculating the actual wireless frame boundary based on the SSBIndex value is as follows:

[0026] ,

[0027] in, This is the distance corresponding to SSBIndex; The signal delay is 32 times the data downsampled.

[0028] Based on the above synchronization system, the present invention also provides a downlink synchronization method for satellite communication terminal equipment, comprising the following steps:

[0029] Step 1: Signal shifting: After receiving the RF signal, the FPGA sends the data to the frequency shifting module, which then transmits the frequency-shifted data to the downsampling module.

[0030] Step 2: Signal downsampling: After receiving the data from the frequency shift module, the downsampling module performs downsampling processing and transmits the processed data stream to the PSS module;

[0031] Step 3: Primary Synchronization Signal Detection: After receiving the 32x downsampled data from the downsampling module, the PSS detection module calculates the cell group ID number in the PSS based on the relevant peak value, using the SSB transmission period as the basic period, and detects the peak position. It saves the SSS data segment at 32x sampling rate and the SSB data segment at 16x sampling rate, waits for the period to end, and then transmits the cell group ID number and SSS data segment in the PSS to the SSS detection module, and transmits the cell group ID number and SSB data segment in the PSS to the SSBindex module.

[0032] Step 4: Auxiliary Synchronization Signal Detection: After receiving the cell group ID number and SSS data segment from the PSS, the SSS detection module starts to perform correlation processing on the SSS data and SSS local sequence in the time domain, calculates the cell group ID number in the SSS based on the correlation peak, and sends it to the SSBindex calculation module.

[0033] Step 5: SSBindex Calculation: After receiving the intra-cell ID number in the calculated PSS and the cell ID group number in the SSS, the SSBindex module calculates the PCI value. At the same time, it receives the SSB data segment stored in the PSS detection module, obtains the SSBindex value through DMRS in the frequency domain PBCH decomposition, and sends the SSBindex value to the frame header calibration module.

[0034] Step 6: Wireless frame header calibration: After receiving a valid value of SSBIndex, the frame header calibration module performs a synchronization status judgment. If it is determined to be synchronized, it calculates the offset of the currently used wireless frame header and modifies the new frame header position to achieve frame header recalibration. If it is determined to be out of sync, it does not modify the original frame header.

[0035] Step 7: Repeat steps 1-6 to detect the synchronization status in real time and maintain the frame header position.

[0036] Compared with the prior art, by applying the technical solution provided by this invention, in the communication between the terminal and the satellite, the terminal can receive and parse the synchronization signal in real time, store a small amount of data, speed up the calculation, enhance the anti-interference capability, quickly and accurately identify the SSB, complete the synchronization with the satellite, and ensure smooth communication. Attached Figure Description

[0037] Figure 1 This is a schematic diagram of a downlink synchronization system structure for a terminal device in satellite communication in this embodiment.

[0038] Figure 2 This is a schematic diagram illustrating the specific design flow of the FPGA code in this embodiment. Detailed Implementation

[0039] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0040] When the terminal and satellite are not synchronized, the position of the wireless frame header is uncertain in the time domain, making it impossible to directly obtain SSB data from a specific location. Typically, the SSB transmission period is on the order of milliseconds, and the received signal sampling rate is high. Storing the entire data segment for processing would place enormous demands on storage space. Secondly, the periodic transmission of SSBs means that if the completion time of a single calculation is too slow, it will affect the calculation of the new signal in the next cycle, which is detrimental to maintaining system stability. In the frequency domain, when selecting full-bandwidth data, other channel signals may significantly interfere with the parsing of the synchronization signal.

[0041] Please see Figure 1 To address the aforementioned technical issues, this example provides a downlink synchronization system for satellite communication terminal equipment, comprising a frequency shifting module, a downsampling module, a PSS detection module, an SSS detection module, an SSBindex calculation module, and a frame header calibration module, specifically:

[0042] Frequency shift module: used to transmit the time-domain data received by the FPGA from the RF interface after frequency shifting to the downsampling module, ensuring that the SSB is located at the center frequency;

[0043] Downsampling module: downsamples the data by 16 times and 32 times respectively; then transmits the downsampled data to the PSS detection module;

[0044] The PSS detection module generates three local sequences based on three candidate values ​​(0, 1, 2) of the PSS cell group ID number. The cell group ID number is denoted as... In the time domain, 32x downsampled data and PSS local sequences are used in parallel for correlation processing;

[0045] SSS Detection Module: Based on the cell group ID number in the received PSS and the candidate values ​​of the corresponding SSS cell ID group number (0~335), it serially generates the SSS local sequence, with the cell ID group number denoted as... In the time domain, correlation processing is performed using SSS data and SSS local sequences. Based on the correlation peak values, the cell ID group number carried in the corresponding SSS is found.

[0046] SSBIndex calculation module: Based on the cell group ID number in PSS and the cell ID group number in SSS The PCI value is calculated, and the SSB value is obtained by using the PCI value and SSB data through DMRS in the frequency domain solution of PBCH.

[0047] Frame header calibration module: Under a given subcarrier, the distance of the SSBIndex value relative to the actual radio frame is fixed. The boundary of the actual radio frame is calculated based on the SSBIndex value.

[0048] First, it is necessary to determine whether the PCI values ​​are consistent in 5 consecutive cycles. If they are consistent, it is determined to be synchronized. The offset of the current wireless frame header is calculated, and the new frame header position is changed to achieve frame header recalibration. If they are inconsistent, it is determined to be out of synchronization, and the original frame header is not changed.

[0049] As a preferred embodiment, the calculation method for the relevant processing in the PSS detection module and the SSS detection module is as follows:

[0050]

[0051] in For data indexing, For the length of the relevant point data, For sequence delay, For signal Lagging data, For local sequences The conjugate of complex numbers.

[0052] As a preferred embodiment, the PSS detection module includes:

[0053] For the processed results, using the SSB transmission period as the basic period, relevant peak values ​​are searched. The candidate values ​​corresponding to these peak values ​​are the cell group IDs carried in the PSS. Simultaneously, the peak position is detected and denoted as... There is a computational delay from the input of raw data to the output of relevant results. Using the detection peak position Subtract relevant calculation delays The location of the SSB data segment is obtained, and then the SSS data segment with a 32x downsampling and the DMRS data segment with a 16x downsampling are stored according to the location of the SSB data segment.

[0054] As a preferred embodiment, the PCI value is calculated in the SSBIndex calculation module as follows:

[0055] .

[0056] As a preferred embodiment, in the SSBIndex calculation module:

[0057] The lower 3 bits of SSBIndex can carry 8 candidate values. Based on the PCI value, 8 local DMRS sequences can be generated. The DMRS data is then converted to the frequency domain for channel estimation and power calculation. The calculation method is as follows:

[0058]

[0059] in For subcarrier index, For subcarrier The frequency domain DMRS data received above, For subcarrier DMRS local sequence on For subcarrier The estimated channel frequency response, For SSB index The corresponding cumulative power.

[0060] The index corresponding to the power peak is the SSBIndex value.

[0061] As a preferred embodiment, the specific method for calculating the actual wireless frame boundary based on the SSBIndex value is as follows:

[0062] ;

[0063] in, This is the distance corresponding to SSBIndex; The signal delay is 32 times the data downsampled.

[0064] Please see Figure 2 To address the aforementioned technical problems, this embodiment also provides a downlink synchronization method for satellite communication terminal equipment, comprising the following steps:

[0065] Step 1: Signal shifting: After receiving the RF signal, the FPGA sends the data to the frequency shifting module, which then transmits the frequency-shifted data to the downsampling module.

[0066] Step 2: Signal downsampling: After receiving the data from the frequency shift module, the downsampling module performs downsampling processing and transmits the processed data stream to the PSS detection module;

[0067] Step 3: Primary Synchronization Signal Detection: After receiving the 32x downsampled data from the downsampling module, the PSS detection module calculates the cell group ID number in the PSS based on the relevant peak value, using the SSB transmission period as the basic period, and detects the peak position. It saves the SSS data segment at 32x sampling rate and the SSB data segment at 16x sampling rate. After waiting for the period to end, it transmits the cell group ID number and SSS data segment in the PSS to the SSS detection module, and transmits the cell group ID number and SSB data segment in the PSS to the SSBindex calculation module.

[0068] Step 4: Auxiliary Synchronization Signal Detection: After receiving the cell group ID number and SSS data segment from the PSS, the SSS detection module starts to perform correlation processing on the SSS data and SSS local sequence in the time domain, calculates the cell group ID number in the SSS based on the correlation peak, and sends it to the SSBindex calculation module.

[0069] Step 5: SSBindex Calculation: After receiving the intra-cell ID number in the calculated PSS and the cell ID group number in the SSS, the SSBindex module calculates the PCI value. At the same time, it receives the SSB data segment stored by the PSS detection module, obtains the SSBindex value through DMRS in the frequency domain PBCH decryption, and sends the SSBindex value to the frame header calibration module.

[0070] Step 6: Wireless frame header calibration: After receiving a valid value of SSBIndex, the frame header calibration module performs a synchronization status judgment. If it is determined to be synchronized, it calculates the offset of the currently used wireless frame header and modifies the new frame header position to achieve frame header recalibration. If it is determined to be out of sync, it does not modify the original frame header.

[0071] Step 7: Repeat steps 1 to 6 to monitor the synchronization status in real time and maintain the frame header position.

Claims

1. A downlink synchronization system for satellite communication terminal equipment, characterized in that, include: Frequency shift module: used to transmit the time-domain data (after frequency shifting) received from the FPGA at the RF interface to the downsampling module; Downsampling module: used to downsample the data by 16 times and 32 times respectively, and then transmit the downsampled data to the PSS detection module; The PSS detection module generates three local sequences based on three candidate values ​​(0, 1, 2) of the PSS cell group ID number. The cell group ID number is denoted as... In the time domain, 32x downsampled data and PSS local sequences are used in parallel for correlation processing; SSS Detection Module: Based on the cell group ID number in the received PSS and the candidate values ​​of the corresponding SSS cell ID group number (0~335), it serially generates the SSS local sequence, with the cell ID group number denoted as... In the time domain, correlation processing is performed using SSS data and SSS local sequences. Based on the correlation peak values, the cell ID group number carried in the corresponding SSS is found. SSBIndex calculation module: Based on the cell group ID number in PSS and the cell ID group number in SSS The PCI value is calculated, and the SSB value is obtained by using the PCI value and SSB data through DMRS in the frequency domain solution of PBCH. Frame header calibration module: Given a specific subcarrier, the distance between the SSBIndex value and the actual radio frame is fixed. The boundary of the actual radio frame is calculated based on the SSBIndex value. First, it is necessary to determine whether the PCI values ​​are consistent in 5 consecutive cycles. If they are consistent, it is determined to be synchronized. The offset of the current wireless frame header is calculated and the new frame header position is changed to achieve frame header recalibration. If they are inconsistent, it is determined to be out of synchronization. The original frame header is not changed. The calculation method for the relevant processing in the PSS detection module and SSS detection module is as follows: ， in, The results are related to the sequence delay m. For data indexing, For the length of the relevant point data, For sequence delay, For signal Lagging data, For local sequences The conjugate of complex numbers.

2. The downlink synchronization system for satellite communication terminal equipment according to claim 1, characterized in that, In the PSS detection module: For the processed results, using the SSB transmission period as the basic period, relevant peak values ​​are searched. The candidate values ​​corresponding to these peak values ​​are the cell group IDs carried in the PSS. Simultaneously, the peak position is detected and denoted as... There is a computational delay from the input of raw data to the output of relevant results. Using the detection peak position Subtract relevant calculation delays The location of the SSB data segment is obtained, and then the SSS data segment with a 32x downsampling and the DMRS data segment with a 16x downsampling are stored according to the location of the SSB data segment.

3. The downlink synchronization system for satellite communication terminal equipment according to claim 1, characterized in that, The PCI value is calculated using the SSBIndex calculation module as follows: 。 4. The downlink synchronization system for satellite communication terminal equipment according to claim 1, characterized in that, In the SSBIndex calculation module: The lower 3 bits of SSBIndex can carry 8 candidate values. Based on the PCI value, 8 DMRS local sequences can be generated. The DMRS data is then converted to the frequency domain for channel estimation and power calculation. The calculation method is as follows: ， in For subcarrier index, For subcarrier The frequency domain DMRS data received above, For subcarrier DMRS local sequence on For subcarrier The estimated channel frequency response, For SSB index The corresponding cumulative power; The index corresponding to the power peak is the SSBIndex value.

5. A downlink synchronization system for satellite communication terminal equipment according to claim 2, characterized in that, The specific method for calculating the actual wireless frame boundary based on the SSBIndex value is as follows: ； in, This is the distance corresponding to SSBIndex; The signal delay is 32 times the data downsampled.

6. A downlink synchronization system for satellite communication terminal equipment according to claim 2, characterized in that: The cell group ID number and SSS data segment in PSS will be sent to the SSS detection module, and the cell group ID number and SSB data segment in PSS will be sent to the SSBindex calculation module.

7. A method for a downlink synchronization system based on any one of the satellite communication terminal equipment according to claims 1-6, characterized in that, Includes the following steps: Step 1: Signal shifting: After receiving the RF signal, the FPGA sends the data to the frequency shifting module, which then transmits the frequency-shifted time-domain data to the downsampling module. Step 2: Signal downsampling: After receiving the data from the frequency shift module, the downsampling module performs downsampling processing and transmits the processed data stream to the PSS detection module; Step 3: Primary Synchronization Signal Detection: After receiving the 32x downsampled data from the downsampling module, the PSS detection module calculates the cell group ID number in the PSS based on the relevant peak value, using the SSB transmission period as the basic period, and detects the peak position. It saves the SSS data segment at 32x sampling rate and the SSB data segment at 16x sampling rate, waits for the period to end, and then transmits the cell group ID number and SSS data in the PSS to the SSS detection module, and transmits the cell group ID number and SSB data segment in the PSS to the SSBindex calculation module. Step 4: Auxiliary Synchronization Signal Detection: After receiving the cell group ID number and SSS data from the PSS, the SSS detection module starts to perform correlation processing in the time domain using the SSS data and the local SSS sequence. Based on the correlation peak, it calculates the cell group ID number in the SSS and sends it to the SSBindex calculation module. Step 5: SSBindex Calculation: After receiving the cell group ID number in the PSS and the cell group ID number in the SSS, the SSBindex calculation module calculates the PCI value. At the same time, it receives the SSB data stored in the PSS detection module, obtains the SSBindex value through DMRS in the frequency domain PBCH decomposition, and sends the SSBindex value to the frame header calibration module. Step 6: Wireless Frame Header Calibration: After receiving a valid value of SSBIndex, the frame header calibration module performs a synchronization status check. If it is determined to be synchronized, it calculates the offset of the currently used wireless frame header and modifies the new frame header position to achieve frame header recalibration. If it is determined to be out of sync, it does not modify the original frame header. Step 7: Repeat steps 1 to 6 to monitor the synchronization status in real time and maintain the frame header position.

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