Method, apparatus, and storage medium for mask pattern optimization

Abstract

Methods, apparatuses and storage media for mask pattern optimization are provided according to example embodiments of this disclosure. The method includes generating respective simulation signals of at least one pattern segment in a mask pattern by utilizing at least one lithography imaging model respectively corresponding to at least one process condition; constructing a respective signal error optimization target of the at least one pattern segment based on respective correction parameters for adjusting the at least one pattern segment and a difference between the respective simulation signals and a target signal; and optimizing the respective correction parameters based on the respective signal error optimization target. In this way, the performance of mask pattern optimization can be improved.

Description

Technical Field

[0001] The embodiments of this disclosure are primarily related to the field of integrated circuit technology, and more specifically, to methods, apparatus, and storage media for mask pattern optimization. Background Technology

[0002] As semiconductor manufacturing processes continue to evolve towards smaller feature sizes and higher integration densities, the imaging accuracy requirements during photolithography have significantly increased. Especially in advanced processes, even minute fluctuations in factors such as exposure dose, focal length deviation, photoresist properties, and mask pattern details can cause significant changes in the imaging signal, thereby widening the deviation between the designed pattern and the actual imaged pattern.

[0003] To reduce this imaging deviation, Optical Proximity Correction (OPC) technology is widely used in mask design and optimization. By adjusting the edge positions or auxiliary structures of the mask pattern, distortions caused by the optical system and process conditions can be compensated for to some extent. However, with the advancement of process nodes, traditional OPC methods are gradually facing bottlenecks in terms of optimization efficiency and manufacturability. How to achieve high-precision and stable optimization of mask patterns has become an important issue in the field of photolithography manufacturing. Summary of the Invention

[0004] In a first aspect of this disclosure, a method for mask pattern optimization is provided. The method includes: generating corresponding simulated signals for at least one patterned segment in a mask pattern using at least one lithographic imaging model corresponding to at least one process condition; constructing a corresponding signal error for the at least one patterned segment based on corresponding correction parameters for adjusting the at least one patterned segment and the difference between the corresponding simulated signal and a target signal; and optimizing the corresponding correction parameters based on an optimization target for the corresponding signal error.

[0005] In a second aspect of this disclosure, an electronic device is provided. The electronic device includes a processor and a memory coupled to the processor. The memory has instructions stored therein, which, when executed by the processor, cause the electronic device to perform a method according to a first aspect of this disclosure.

[0006] In a third aspect of this disclosure, a computer-readable storage medium is provided. A computer program is stored on the computer-readable storage medium. When executed by a processor, the computer program implements the method according to a first aspect of this disclosure.

[0007] As will be understood from the following description, according to embodiments of this disclosure, firstly, corresponding simulated signals for at least one patterned segment in a mask pattern are generated using at least one photolithographic imaging model, each corresponding to at least one process condition. Further, a corresponding signal error optimization target for at least one patterned segment is constructed based on corresponding correction parameters used to adjust the at least one patterned segment and the difference between the corresponding simulated signal and a target signal. Further still, the corresponding correction parameters are optimized based on the corresponding signal error optimization target. In this manner, the imaging performance of the mask pattern under different process conditions can be improved.

[0008] It should be understood that the content described in this summary section is not intended to limit the key or essential features of the embodiments of this disclosure, nor is it intended to restrict the scope of this disclosure. Other features of this disclosure will become readily apparent from the following description. Attached Figure Description

[0009] The above and other features, advantages, and aspects of the embodiments of this disclosure will become more apparent from the accompanying drawings and the following detailed description. In the drawings, the same or similar reference numerals denote the same or similar elements, wherein:

[0010] Figure 1 A schematic diagram of an example environment in which the various embodiments of this disclosure can be implemented is shown;

[0011] Figure 2 A flowchart of a process for mask pattern optimization according to some embodiments of the present disclosure is shown; and

[0012] Figure 3 A block diagram of an electronic device in which one or more embodiments of the present disclosure may be implemented is shown. Detailed Implementation

[0013] Embodiments of this disclosure will now be described in more detail with reference to the accompanying drawings. While some embodiments of this disclosure are shown in the drawings, it should be understood that this disclosure can be implemented in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of this disclosure. It should be understood that the accompanying drawings and embodiments of this disclosure are for illustrative purposes only and are not intended to limit the scope of protection of this disclosure.

[0014] In the description of embodiments of this disclosure, the term "comprising" and similar terms should be understood as open-ended inclusion, i.e., "including but not limited to". The term "based on" should be understood as "at least partially based on". The term "one embodiment" or "the embodiment" should be understood as "at least one embodiment". The terms "first", "second", etc., may refer to different or the same objects. Other explicit and implicit definitions may also be included below.

[0015] The following will describe in detail various example implementations of this scheme with reference to the accompanying drawings.

[0016] First see Figure 1 It illustrates a schematic diagram of an example environment 100 in which the various embodiments of this disclosure can be implemented. For example... Figure 1 As shown, the example environment 100 may generally include electronic device 110.

[0017] In some embodiments, the electronic device 110 can interact with other devices (not shown). For example, the electronic device 110 can receive input information from other devices and output feedback information to other devices. In some embodiments, the input message from other devices can be design layout data 120. The electronic device 110 can perform corresponding mathematical operations on the design layout data and output the corresponding operation result 130 to other devices. In some embodiments, the operation result can be corrected layout data.

[0018] In example environment 100, electronic device 110 can be any type of computing-capable device, including terminal devices or server devices. Terminal devices can be any type of mobile terminal, fixed terminal, or portable terminal, including mobile phones, desktop computers, laptop computers, notebook computers, netbook computers, tablet computers, media computers, multimedia tablets, personal communication system (PCS) devices, personal navigation devices, personal digital assistants (PDAs), audio / video players, digital cameras / camcorders, positioning devices, television receivers, radio receivers, e-book devices, gaming devices, or any combination of the foregoing, including accessories and peripherals of these devices or any combination thereof. Server devices can include, for example, computing systems / servers, such as mainframes, edge computing nodes, computing devices in cloud environments, and so on.

[0019] It should be understood that the structure and function of environment 100 are described for illustrative purposes only and do not imply any limitation on the scope of this disclosure. Exemplary embodiments according to this disclosure will now be described in detail with reference to the accompanying drawings.

[0020] As briefly mentioned above, with the continuous evolution of semiconductor manufacturing processes towards smaller feature sizes and higher integration densities, the precision requirements for photolithography imaging have significantly increased. In order to achieve high-fidelity pattern transfer on the wafer, it is usually necessary to use optical proximity correction methods to correct the pattern during the mask design stage, so that the actual imaging result is as consistent as possible with the target design pattern.

[0021] However, as photolithography processes are pushed further to their limits (e.g., 28nm and below), the contrast of the model imaging signal also decreases further. The imaging signal curve becomes flatter, weakening the impact of local adjustments to the mask edge positions on the imaging signal, thus leading to a decrease in feedback sensitivity during the correction process. Due to this low contrast characteristic of the model signal, traditional mask correction methods often require more iterations to converge. During multiple correction iterations, the correction results may also fail to converge or converge incorrectly.

[0022] Traditionally, OPC (Optical Point Correction) technology is typically measured based on geometric edge placement error (EPE). EPE reflects the geometric offset between the design boundary and the actual imaging boundary. However, in advanced processes with low signal contrast, this geometric error is often significantly affected by noise and process fluctuations, making it difficult to guarantee the stability and convergence of the correction results. This problem is further exacerbated, especially when considering process windows and introducing simulation models with different process conditions (such as process edge models).

[0023] To address this, embodiments of the present disclosure propose a scheme for mask pattern optimization. According to embodiments of the present disclosure, firstly, at least one lithographic imaging model corresponding to at least one process condition is used to generate corresponding simulated signals for at least one pattern segment in the mask pattern. Further, a corresponding signal error optimization target for at least one pattern segment is constructed based on corresponding correction parameters for adjusting the at least one pattern segment and the difference between the corresponding simulated signal and the target signal. Still further, the corresponding correction parameters are optimized based on the corresponding signal error optimization target.

[0024] In the embodiments of this disclosure, simulated signal errors are used instead of predicted value deviations such as edge placement bias as the basis for mask optimization. This approach directly reflects the true response characteristics of the process model to the imaging results at the signal level, thereby avoiding the instability of feature calculations under low signal contrast and significantly reducing the number of correction cycles. Furthermore, by comprehensively considering different process conditions, the overall robustness of the process window can be ensured while maintaining imaging accuracy. In this way, the final correction result can maintain stable imaging performance under different process fluctuations, effectively expanding the process applicability range of the mask optimization results.

[0025] The following describes various example implementations of this scheme in further detail with reference to the accompanying drawings. In some embodiments, the process of determining the mask pattern described above can be performed by, for example... Figure 1 The electronic device 110 shown is performing this operation. The following is in conjunction with... Figure 2 Let me explain in detail.

[0026] Figure 2A flowchart of a process 200 for mask pattern optimization according to some embodiments of the present disclosure is shown. At block 210, electronic device 110 can generate a corresponding simulation signal for at least one patterned segment in the mask pattern using at least one photolithographic imaging model corresponding to at least one process condition. The at least one photolithographic imaging model may include at least one simulation model based on optical imaging principles, photoresist response characteristics, or other exposure parameters. Each photolithographic imaging model can be used to characterize the imaging response of the mask pattern on the wafer under a process condition.

[0027] In advanced lithography processes, it is necessary to consider the process window, which refers to ensuring image quality while maintaining the quality of the pattern within the allowable fluctuation range of key process parameters such as focal length and exposure dose. As feature sizes continue to decrease, the imaging of mask patterns becomes increasingly sensitive to process fluctuations. Mask correction based solely on simulation results under a single process condition often fails to guarantee imaging stability and yield during mass production. To comprehensively consider imaging performance under different process fluctuation conditions in mask optimization, the electronic device 110 can introduce a lithography imaging model under multiple process conditions, thereby balancing imaging accuracy and process robustness during the correction and solution process.

[0028] In some embodiments, at least one photolithographic imaging model may include a first photolithographic imaging model under ideal process conditions. Ideal process conditions (or process center conditions) refer to conditions where process parameters such as exposure dose and focal length are set at the center. The simulation signal of the first photolithographic imaging model established under these conditions has high contrast and stability, and can reflect the imaging performance under ideal conditions.

[0029] Alternatively or additionally, in some embodiments, at least one lithographic imaging model may include at least one second lithographic imaging model under at least one edge process condition. Edge process conditions (or process edge conditions) may include underfocus, overfocus, exposure energy shift, etc. Accordingly, the simulation signal of the second lithographic imaging model can be used to reflect the imaging variation characteristics of the mask pattern under these off-center process fluctuations.

[0030] By introducing process center and process edge models, the electronic device 110 can obtain imaging simulation signals under multiple process conditions, which can then be used to comprehensively evaluate the overall effectiveness of mask correction. In subsequent mask optimization, considering simulation signals under different process conditions ensures that the final correction result has high accuracy under center conditions while maintaining sufficient process window under edge conditions.

[0031] In some embodiments, for a graphic segment in at least one graphic segment, the electronic device 110 can use a lithographic imaging model in at least one lithographic imaging model to determine a set of simulated signals for the graphic segment under corresponding process conditions. Further, the electronic device 110 can determine the simulated signal of the graphic segment at a target sampling point from the set of simulated signals as the simulated signal of the graphic segment.

[0032] For example, for each photolithography imaging model, the electronic device 110 can calculate a set of simulated signals for the pattern segment under corresponding process conditions based on the geometry of the mask pattern, exposure parameters, and photoresist response characteristics. This set of simulated signals can be represented as signal distribution data along the edge of the pattern segment or a key imaging region, used to describe the imaging response under those process conditions.

[0033] In the presence of multiple process conditions, the electronic device 110 can obtain multiple sets of simulated signals for the same graphic segment under different process conditions. Furthermore, the electronic device 110 can extract the simulated signal of the graphic segment at the target sampling point from the multiple sets of simulated signals under different process conditions to represent the imaging signal response under different process conditions.

[0034] In some embodiments, the target sampling point can be a sampling point determined based on predetermined feature rules. For example, the target sampling point is a feature sampling point located at the edge of the graphic, the center of a critical size, or a light intensity transition region. Alternatively, the target sampling point can be a combination of multiple sampling points. In this case, the electronic device 110 can combine the simulated signals at multiple sampling points (e.g., by weighting, averaging, etc.) to obtain a representative simulated signal value for the graphic segment.

[0035] In some embodiments, the electronic device 110 can determine the difference between a corresponding simulated signal and a target signal for at least one graphic segment. The target signal may represent a reference light intensity or a target threshold under ideal imaging conditions; for example, the target signal may be a critical threshold of a light intensity curve. The difference between the corresponding simulated signal and the target signal for at least one graphic segment can be used to characterize the degree of deviation between the simulated imaging result and the ideal target, thereby reflecting the offset trend of the graphic segment at the physical imaging level after the current mask correction.

[0036] Traditional mask optimization methods, based on geometric boundary offsets to reflect imaging errors, rely on the local gradient strength of the simulated signal for effectiveness. Under the extreme conditions of advanced lithography processes, the contrast of the imaging signal further decreases, and the signal curve tends to flatten. At this point, a signal change of the same magnitude can lead to a large change in the image distortion potential (EPE), causing inconsistent EPE responses under different process conditions or pattern types, and even rendering them physically incomparable. Therefore, by employing an error metric based on the signal level, changes in imaging behavior can be directly reflected in the simulation domain. This approach avoids the instability caused by the reliance on geometric boundary detection in traditional EPE methods, thereby improving the accuracy of correction judgments and the physical consistency of the calculations.

[0037] In some embodiments, for each of the at least one graphic segment, the electronic device 110 can determine, for each of the at least one process condition, the difference between the simulated signal of the graphic segment under that process condition and the target signal under that process condition. By calculating the difference between the simulated signal and the target signal under that process condition, the degree of deviation between the mask pattern imaging and the ideal imaging under the current correction state and process condition can be quantified.

[0038] Furthermore, the electronic device 110 can calculate the difference between the simulated signal and the target signal of the graphic segment based on the corresponding difference under at least one process condition. This difference can be used to characterize the overall imaging deviation of the graphic segment under at least one process condition in the current correction state, thereby reflecting the stability and imaging uniformity of the graphic segment under different process fluctuation environments.

[0039] Continue to refer to Figure 2 In box 220, the electronic device 110 can construct a corresponding signal error optimization target for at least one graphic segment based on the corresponding correction parameters used to adjust at least one graphic segment and the difference between the corresponding simulated signal and the target signal. Further, in box 230, the electronic device 110 can optimize the corresponding correction parameters based on the corresponding signal error optimization target. Through this linked solution method based on signal error, the imaging deviation relationship of each graphic segment can be characterized in a unified error signal space.

[0040] In some embodiments, the electronic device 110 can determine the corresponding correction parameters for at least one graphic segment by solving for the corresponding signal error optimization objective. In this process, the electronic device 110 can transform the mask correction problem into an optimization problem aimed at minimizing signal error. For example, the electronic device 110 can utilize simulated signal data of each graphic segment under different process conditions, and combine the differences between these simulated signals and the target signal, to establish a signal error optimization objective reflecting imaging deviation.

[0041] This signal error optimization objective can be used to quantify the overall deviation of the current mask pattern in the imaging space. By relating the correction parameters of each pattern segment to the imaging response within this signal error optimization objective, joint control of the correction direction and magnitude of each segment can be achieved. In this way, the electronic device 110 can comprehensively consider the variation patterns at the simulation signal level during the optimization process, rather than relying solely on geometric boundary errors for correction, thereby improving the physical consistency and convergence stability of the mask correction.

[0042] The imaging behavior of different graphic segments is usually not independent, but rather involves a certain optical and technological coupling relationship. For example, the spacing, shape changes, or relative orientation between adjacent graphic segments will affect the local light intensity distribution and energy transfer during exposure and development, thus causing the geometric adjustment of one segment to simultaneously affect the imaging results of surrounding segments. Correction methods that make local adjustments based on the geometric deviation of a single segment fail to fully consider the linkage effect between segments, resulting in slow overall convergence or even non-convergence. By using this linkage solution based on signal error, the corresponding correction parameters for all graphic segments can be determined at once, and the relationship between graphic segments can be considered as a whole during the solution process, thereby efficiently determining the correction parameters on a global scale.

[0043] In some embodiments, for a given process condition, the electronic device 110 can determine the rate of change information of the simulation signal of each graphic segment in at least one graphic segment relative to the correction parameters of other graphic segments under that process condition. The rate of change information can represent the correlation between the correction parameters of the graphic segment in at least one graphic segment and the simulation signals of other graphic segments. In other words, the rate of change information can characterize the coupling relationship between different graphic segments, thereby enabling the consideration of inter-segment linkage effects during the correction solution process.

[0044] In some embodiments, based on difference and rate of change information determined separately for at least one graphic segment, electronic device 110 can establish a signal error optimization target for at least one graphic segment under the given process conditions. In this process, electronic device 110 can treat signal error as the optimization target and rate of change information as coupling constraints between segments, thereby simultaneously calculating the correction amounts for multiple segments within the overall solution framework.

[0045] As an example, to simplify the explanation, let's take four graphic segments a, b, c, and d in the mask pattern as an example. Electronic device 110 can establish the equation using the following formula:

[0046] (1);

[0047] in, This represents the rate of change of the corresponding simulation signal vector D of at least one graphic segment relative to the correction parameters of other graphic segments. Represents a vector of correction parameters for at least one graphic segment. This represents the relationship between the corresponding simulated signal vector D and the target signal vector. The differences between them This represents the corresponding signal error optimization objective for at least one graphic segment.

[0048] Through this rate of change information The electronic device 110 can describe the correction linkage relationship of multiple graphic segments in the signal space. Furthermore, the electronic device 110 can solve for each correction quantity x, y, z, w that makes the signal error optimization target E zero or close to zero, thereby making the simulated signal of each graphic segment approach its target threshold. When the signal error optimization target E approaches zero, it means that the imaging result of the corrected mask pattern under the given process conditions reaches the optimal matching state.

[0049] Continuing with the example of four graphic segments a, b, c, and d in the mask pattern, at least one photolithographic imaging model can include a first photolithographic imaging model f() under ideal process conditions. The electronic device 110 can optimize the corresponding signal error using the following formula:

[0050] (2);

[0051] in, Let represent the rate of change of the simulation signal of graphic segment 'a' under ideal process conditions relative to the correction parameter 'x', where x, y, z, and w represent the correction parameters for graphic segments 'a', 'b', 'c', and 'd', respectively, and f(a), f(b), f(c), and f(d) represent the corresponding simulation signals for the respective graphic segments, with threshold representing the threshold. a threshold b threshold c threshold d represents the target signal thresholds of graphic segments a, b, c, and d under ideal process conditions, respectively, and a_error, b_error, c_error, and d_error represent the signal error optimization targets of the corresponding graphic segments.

[0052] In this example, the rate of change information matrix reflects the coupling relationship between the simulated signal for each graphical segment and the correction parameters for each graphical segment. f(a)-threshold aThis represents the difference between the current simulated signal and the target signal for segment a. Solving for the signal error optimization objective can be understood as an iterative convergence process: electronic device 110 continuously adjusts the correction parameters x, y, z, and w, causing the signal error (error) on the right side of the equation to gradually decrease and eventually reach or approach 0. In other words, if the signal error (error) approaches 0, it means that the current correction parameters have made the simulated signal of the graphic segment close to the target signal, thus achieving optimal mask correction under ideal process conditions.

[0053] If only the process center conditions are considered, the signal error optimization objective can represent the lithographic imaging error of the pattern segment under ideal process conditions. To ensure that the correction results are consistent with the process window in actual production (e.g., considering imaging variations that may result from fluctuations in process parameters such as exposure dose and focal length shift), process edge conditions can be introduced simultaneously. In this case, the signal error optimization objective can reflect the imaging differences under process edge conditions, thereby evaluating the imaging consistency of the current mask correction results within the process window.

[0054] As another example, continuing with the four graphic segments a, b, c, and d in the mask pattern, to further improve the adaptability of the correction results under different process conditions, the electronic device 110 can introduce an imaging model under process edge conditions. For example, at least one lithography imaging model may include a second lithography imaging model g() under a first edge process condition. Alternatively or additionally, at least one lithography imaging model may include a second lithography imaging model h() under a second edge process condition. The electronic device 110 can construct corresponding signal error optimization targets for the first edge process condition and the second edge process condition respectively using the following formula:

[0055] (3);

[0056] (4);

[0057] Equations (3) and (4) represent the signal error optimization objectives constructed based on the process edge models g() and h(), respectively. g(a), g(b), g(c), g(d) and h(a), h(b), h(c), h(d) represent the corresponding simulated signals of the graphic segments under the first edge process conditions and the second edge process conditions, respectively. The matrices on the left side of the equations are the rate-of-change matrices of the simulated signals of graphic segments a, b, c, d under the first edge process conditions and the second edge process conditions, respectively, relative to their own and other segments' correction parameters x, y, z, w. For example, This represents the rate of change of the simulated signal of graphic segment a with respect to the correction parameter x under the first edge processing condition. This represents the rate of change of the simulated signal of graphic segment a under the second edge process condition relative to the correction parameter x. a _g、threshold b _g、threshold c _g、threshold d _g and threshold a _h、threshold b _h、threshold c _h、threshold d _h represents the target signal thresholds for graphic segments a, b, c, and d under the first and second edge processing conditions, respectively. a_error_g, b_error_g, c_error_g, d_error_g, and a_error_h, b_error_h, c_error_h, d_error_h represent the signal error optimization targets for the corresponding graphic segments under the first and second edge processing conditions, respectively.

[0058] It should be noted that the scenario described in the above example represents the signal error optimization target construction process considering a single process condition (e.g., ideal process condition or single edge process condition). In this case, the electronic device 110 can construct a corresponding error optimization target based on the difference between the simulated signal and the target signal under this process condition. By solving the error optimization target under the corresponding process condition, the correction parameters for each graphic segment can be determined, so that the signal error of the mask pattern under this process condition converges to zero or close to zero, thereby obtaining the optimal correction result under this process condition.

[0059] In actual photolithography production, different process conditions (e.g., different exposure doses, focal length shifts, or development rate variations) can lead to significant imaging differences. Solving for correction parameters based solely on a single process condition may result in corrections deviating from the target under other process conditions, thereby reducing overall imaging robustness and the process window width. Therefore, it is necessary to consider imaging under multiple process conditions simultaneously to maintain imaging consistency within a larger process window. In this case, the electronic device 110 can determine the signal error optimization target for at least one graphic segment under at least one process condition by weighting the corresponding predetermined weights for at least one process condition and the corresponding signal error optimization target for at least one graphic segment under at least one process condition.

[0060] For example, electronic device 110 can construct signal error targets under ideal process conditions and under various edge process conditions respectively. Further, electronic device 110 can weight these signal error targets using predetermined weights to obtain a comprehensive signal error optimization target reflecting the overall process window performance. In subsequent iterative solutions, electronic device 110 can continuously adjust the correction parameters of each graphic segment to gradually reduce the comprehensive signal error optimization target under multiple process conditions, eventually converging to zero or near zero. Electronic device 110 can obtain correction parameters for graphic segments that satisfy imaging constraints under different process conditions. The mask pattern corrected based on these correction parameters can achieve a superior imaging balance under multiple process conditions. In this way, synergistic optimization of imaging consistency and stability can be achieved within the overall process window, thereby significantly improving the robustness and mass production applicability of the mask correction results.

[0061] Continuing with the example of four graphic segments a, b, c, and d in the mask pattern, at least one lithographic imaging model can include a first lithographic imaging model under ideal process conditions. The second lithographic imaging model g() under the first edge process condition and the second lithographic imaging model under the second edge process condition. Electronic device 110 can construct signal error optimization targets under multiple process conditions using the following formula:

[0062] (5);

[0063] Where a_error_F, b_error_F, c_error_F, and d_error_F represent the comprehensive signal error optimization targets for graphic segments a, b, c, and d under multiple process conditions, respectively. a_error, a_error_g, and a_error_h represent the signal error optimization targets for graphic segment a under process center conditions, first edge process conditions, and second edge process conditions, respectively, and so on for other graphic segments. Δ g Δ h These represent the predetermined weights of the first and second edge process conditions, respectively, used to adjust the influence intensity of the edge process conditions during the overall correction process.

[0064] In some embodiments, the values ​​of the predetermined weights can be obtained through calibration calculations when establishing the mask optimization procedure. Once determined, they do not need to be frequently modified in subsequent correction processes. For example, they can be adjusted from an initial value of 0.5 / N (where N is the number of process edge conditions to be considered). By introducing predetermined attenuation weights into the calculation, the electronic device 110 can moderately balance the errors under edge conditions while keeping the dominant correction direction determined by the process center conditions.

[0065] It should be noted that the number of lithographic imaging models and pattern fragments under different process edge conditions is not limited to the examples above. More or fewer process conditions and corresponding lithographic imaging models can be flexibly set according to the specific process complexity, or more or fewer correction parameters for pattern fragments can be determined. This disclosure does not limit this.

[0066] In the embodiments of this disclosure, by performing error calculation directly in the "signal domain," the deviations of each pattern segment can be compared and weighted on a uniform physical scale, without needing to adjust weight parameters separately for different process conditions or pattern types. By employing an error calculation method based on simulated signals, the electronic device 110 can more accurately capture the actual changing trends during the photolithography imaging process at the physical level. In this way, the convergence stability and robustness across process conditions of the correction solution can be improved.

[0067] Furthermore, by employing a weighted calculation mechanism for signal errors under different process conditions, the electronic device 110 can comprehensively consider the imaging characteristics of both the process center and process edge conditions during the correction solution. In this way, the final correction parameters can exhibit higher imaging consistency and convergence stability under multiple process conditions, thereby significantly expanding the manufacturable process window.

[0068] In some embodiments, the electronic device 110 can correct the geometric features of at least one graphic segment based on corresponding correction parameters for that graphic segment. Exemplarily, the correction parameters can represent the amount of geometric change that each graphic segment should be adjusted in the current correction iteration. For example, the correction parameters may include edge position offsets, corner compensation amounts, or adjustments to the graphic size. The electronic device 110 can update the corresponding geometric features in the mask pattern based on the correction parameters corresponding to each graphic segment, thereby generating a corrected mask pattern. By applying the correction parameters to the mask geometry, the electronic device 110 can reflect the signal optimization results obtained from solving the equations at the graphic level, making the updated mask closer to the target signal distribution in imaging simulation.

[0069] In some embodiments, the electronic device 110 can determine a corresponding correction simulation signal for at least one corrected pattern segment based on at least one photolithographic imaging model. The electronic device 110 can determine the correction difference between the correction simulation signal and the target signal to evaluate the imaging effect of the corrected mask pattern in the current iteration. For example, after correction, the electronic device 110 can re-invoke the photolithographic imaging model to perform simulated imaging of the corrected mask pattern, calculate the difference between the corrected simulation signal and the target signal, and thus obtain the correction difference.

[0070] In some embodiments, if the correction difference does not meet a predetermined convergence condition, the electronic device 110 can optimize the corresponding correction parameters of at least one image segment based on the signal error optimization target. For example, if the correction difference is lower than a preset threshold or the change in signal error is lower than the minimum adjustment step size, the current correction result can be determined to have converged. If the correction difference does not meet the convergence condition, the electronic device 110 can redetermine the corresponding correction parameters of each image segment based on the latest correction result using the aforementioned solution method. Through this closed-loop correction mechanism based on simulated signals, the electronic device 110 can continuously optimize the mask pattern, making its imaging performance under multiple process conditions gradually approach the target state.

[0071] In summary, the mask pattern optimization scheme of the embodiments of this disclosure achieves direct quantification of pattern imaging deviation within the physical signal space by replacing traditional geometric boundary errors with an error metric based on imaging signals. This avoids the problem of geometric error amplification and distortion under low signal contrast conditions, thereby resulting in higher performance and stability in the solution process for correction parameters. Furthermore, by comprehensively considering the imaging characteristics of process center conditions and multiple process edge conditions during the solution process, both imaging accuracy and process window stability can be simultaneously considered in the correction calculation. Therefore, the embodiments of this disclosure not only improve optimization solution performance but also enhance the manufacturability and stability of mask optimization results within the mass production process window, thereby achieving more efficient and reliable mask pattern optimization.

[0072] Figure 3 A block diagram is shown of an electronic device 300 in which one or more embodiments of the present disclosure may be implemented. The electronic device 300 may, for example, be used to implement... Figure 1 The electronic device 110 shown. It should be understood that, Figure 3 The electronic device 300 shown is merely exemplary and should not be construed as limiting the functionality and scope of the embodiments described herein.

[0073] like Figure 3 As shown, electronic device 300 is in the form of a general-purpose electronic device. Components of electronic device 300 may include, but are not limited to, one or more processors 310 or processing units, memory 320, storage device 330, one or more communication units 340, one or more input devices 350, and one or more output devices 360. The processing unit may be a physical or virtual processor and is capable of performing various processes according to programs stored in memory 320. In a multiprocessor system, multiple processing units execute computer-executable instructions in parallel to improve the parallel processing capability of electronic device 300.

[0074] Electronic device 300 typically includes multiple computer storage media. Such media can be any available media accessible to electronic device 300, including but not limited to volatile and non-volatile media, removable and non-removable media. Memory 320 can be volatile memory (e.g., registers, cache, random access memory (RAM)), non-volatile memory (e.g., read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory), or some combination thereof. Storage device 330 can be a removable or non-removable medium and can include machine-readable media, such as flash drives, disks, or any other media that can be used to store information and / or data (e.g., training data for training) and can be accessed within electronic device 300.

[0075] Electronic device 300 may further include additional removable / non-removable, volatile / non-volatile storage media. Although not explicitly stated... Figure 3 As shown, disk drives for reading from or writing to removable, non-volatile disks (e.g., "floppy disks") and optical disk drives for reading from or writing to removable, non-volatile optical disks can be provided. In these cases, each drive can be connected to a bus (not shown) via one or more data media interfaces. Memory 320 may include computer program product 325 having one or more program modules configured to perform various methods or actions of various embodiments of this disclosure.

[0076] The communication unit 340 enables communication with other electronic devices via a communication medium. Additionally, the functionality of the components of the electronic device 300 can be implemented using a single computing cluster or multiple computing machines capable of communicating via communication connections. Therefore, the electronic device 300 can operate in a networked environment using logical connections to one or more other servers, network personal computers (PCs), or another network node.

[0077] Input device 350 can be one or more input devices, such as a mouse, keyboard, trackball, etc. Output device 360 ​​can be one or more output devices, such as a monitor, speaker, printer, etc. Electronic device 300 can also communicate with one or more external devices (not shown) via communication unit 340 as needed. These external devices include storage devices, display devices, etc., and can communicate with one or more devices that enable user interaction with electronic device 300, or with any device that enables electronic device 300 to communicate with one or more other electronic devices (e.g., network card, modem, etc.). Such communication can be performed via input / output (I / O) interface (not shown).

[0078] According to an exemplary implementation of this disclosure, a computer-readable storage medium is provided that stores one or more computer instructions, wherein one or more computer instructions are executed by a processor to implement the methods described above.

[0079] Various aspects of this disclosure are described herein with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products implemented according to this disclosure. It should be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer-readable program instructions.

[0080] These computer-readable program instructions can be provided to a processing unit of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus to produce a machine such that, when executed by the processing unit of the computer or other programmable data processing apparatus, they create means for implementing the functions / actions specified in one or more blocks of the flowchart and / or block diagram. These computer-readable program instructions can also be stored in a computer-readable storage medium that causes a computer, programmable data processing apparatus, and / or other device to operate in a particular manner. Thus, the computer-readable medium storing the instructions comprises an article of manufacture that includes instructions for implementing aspects of the functions / actions specified in one or more blocks of the flowchart and / or block diagram.

[0081] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable data processing apparatus, or other device to produce a computer-implemented process, thereby causing the instructions that execute on the computer, other programmable data processing apparatus, or other device to perform the functions / actions specified in one or more boxes of a flowchart and / or block diagram.

[0082] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of this disclosure. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of an instruction, which contains one or more executable instructions for implementing the specified logical function. In some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, may be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer instructions.

[0083] Various implementations of this disclosure have been described above. The foregoing description is exemplary and not exhaustive, nor is it limited to the disclosed implementations. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described implementations. The terminology used herein is chosen to best explain the principles, practical applications, or improvements to technology in the market, or to enable others skilled in the art to understand the implementations disclosed herein.

Claims

1. A method for mask pattern optimization, characterized in that, include: Using at least one photolithography imaging model corresponding to at least one process condition, generate a corresponding simulation signal for at least one graphic segment in the mask pattern; Based on the corresponding correction parameters used to adjust the at least one graphic segment, and the difference between the corresponding simulated signal and the target signal, a corresponding signal error optimization objective for the at least one graphic segment is constructed. This objective is used to solve for and determine the corresponding correction parameters, which represent the amount of geometric change that the corresponding graphic segment should be adjusted. Based on the corresponding signal error optimization objective, the corresponding correction parameters are optimized.

2. The method for mask pattern optimization according to claim 1, characterized in that, At least one lithographic imaging model corresponding to at least one process condition includes a first lithographic imaging model corresponding to an ideal process condition in at least one process condition and at least one second lithographic imaging model corresponding to at least one edge process condition.

3. The method for mask pattern optimization according to claim 1, characterized in that, Determining the corresponding simulation signal value of the at least one graphic segment includes: For the graphic segment in the at least one graphic segment, Using the lithography imaging model in at least one of the lithography imaging models, determine the set of simulation signals for the pattern fragment under the corresponding process conditions; and The simulated signal of the graphic segment at the target sampling point in the set of simulated signals is determined as the simulated signal of the graphic segment.

4. The method for mask pattern optimization according to claim 1, characterized in that, The corresponding simulation signal includes the corresponding simulation signal of the at least one graphic segment under the at least one process condition, and the difference between the corresponding simulation signal and the target signal is determined by the following method: For each of the at least one graphic segment, For each of the at least one process conditions, determine the difference between the simulated signal of the graphic segment under that process condition and the target signal under that process condition; as well as Based on the corresponding difference of the graphic segment under the at least one process condition, the difference between the simulated signal of the graphic segment and the target signal is calculated, and the difference represents the overall imaging deviation of the graphic segment under the at least one process condition.

5. The method for mask pattern optimization according to claim 1, characterized in that, The corresponding signal error optimization objective for constructing the at least one graphic segment includes: For the process conditions in the at least one process condition. Determine the rate of change information of the simulation signal of each graphic segment in the at least one graphic segment under the process conditions relative to its own and other graphic segments' correction parameters, wherein the rate of change information represents the correlation between the simulation signal of the graphic segment in the at least one graphic segment and its own and other graphic segments' correction parameters; and Based on the difference and rate of change information determined for the at least one graphic segment, a signal error optimization target for the at least one graphic segment under the process conditions is established.

6. The method for mask pattern optimization according to claim 5, characterized in that, The method further includes: Based on the corresponding predetermined weights for the at least one process condition and the corresponding signal error optimization target of the at least one graphic segment under the at least one process condition, the corresponding signal error optimization target of the graphic segment under the at least one process condition is weighted to determine the signal error optimization target of the at least one graphic segment under the at least one process condition.

7. The method for mask pattern optimization according to claim 1, characterized in that, Optimizing the corresponding correction parameters of the at least one graphic segment includes: By solving the corresponding signal error optimization objective, the corresponding correction parameters for at least one graphic segment are determined.

8. The method for mask pattern optimization according to claim 1, characterized in that, The method further includes: The geometric features of the at least one graphic segment are corrected based on the corresponding correction parameters of the at least one graphic segment.

9. The method for mask pattern optimization according to claim 8, characterized in that, Also includes: Based on the at least one photolithographic imaging model, determine the corresponding correction simulation signal for at least one corrected graphic segment; Determine the correction difference between the corrected simulation signal and the target signal; In response to the correction difference not meeting the predetermined convergence condition, the corresponding correction parameters of the at least one graphic segment are optimized based on the signal error optimization objective.

10. The method for mask pattern optimization according to claim 1, characterized in that, The corresponding signal error optimization objective is constructed based on the following formula: in, This represents the rate of change information of the corresponding simulation signal vector D of the at least one graphic segment relative to the correction parameters of itself and other graphic segments. Represents the correction parameter vector of the at least one graphic segment. This represents the relationship between the corresponding simulated signal vector D and the target signal vector. The differences between them This represents the corresponding signal error optimization target for the at least one graphic segment.

11. The method for mask pattern optimization according to claim 1, characterized in that, The at least one photolithography imaging model includes a first photolithography imaging model under ideal process conditions. The corresponding signal error optimization objective is constructed according to the following formula: in, Let represent the rate of change of the simulation signal of graphic segment 'a' under ideal process conditions relative to the correction parameter 'x', where x, y, z, and w represent the correction parameters for graphic segments 'a', 'b', 'c', and 'd', respectively, and f(a), f(b), f(c), and f(d) represent the corresponding simulation signals for the respective graphic segments, with threshold representing the threshold. a threshold b threshold c threshold d represents the target signal thresholds of graphic segments a, b, c, and d under ideal process conditions, respectively, and a_error, b_error, c_error, and d_error represent the signal error optimization targets of the corresponding graphic segments.

12. The method for mask pattern optimization according to claim 1, characterized in that, The at least one photolithographic imaging model includes a second photolithographic imaging model g() under the first edge process condition, and the corresponding signal error optimization objective is constructed according to the following formula: in, Let represent the rate of change of the simulated signal of graphic segment 'a' under the first edge processing condition relative to the correction parameter 'x', where x, y, z, and w represent the correction parameters for graphic segments 'a', 'b', 'c', and 'd', respectively. Let g(a), g(b), g(c), and g(d) represent the corresponding simulated signals for the respective graphic segments, and threshold. a _g、threshold b _g、threshold c _g、threshold d _g represents the target signal threshold of graphic segments a, b, c, and d under the first edge process condition, respectively, and a_error_g, b_error_g, c_error_g, and d_error_g represent the signal error optimization targets of the corresponding graphic segments, respectively.

13. The method for mask pattern optimization according to claim 1, characterized in that, The at least one photolithography imaging model includes a second photolithography imaging model under the second edge process condition. The corresponding signal error optimization objective is constructed according to the following formula: in, Let represent the rate of change of the simulated signal of graphic segment 'a' under the second edge processing condition relative to the correction parameter 'x', where x, y, z, and w represent the respective correction parameters for graphic segments 'a', 'b', 'c', and 'd', respectively. Let h(a), h(b), h(c), and h(d) represent the corresponding simulated signals for the corresponding graphic segments, and threshold. a _h、threshold b _h、threshold c _h、threshold d _h represents the target signal threshold of graphic segments a, b, c, and d under the second edge process condition, respectively, and a_error_h, b_error_h, c_error_h, and d_error_h represent the signal error optimization targets of the corresponding graphic segments.

14. The method for mask pattern optimization according to claim 1, characterized in that, The at least one photolithography imaging model includes a first photolithography imaging model under ideal process conditions. The second lithographic imaging model g() under the first edge process condition and the second lithographic imaging model under the second edge process condition. The corresponding signal error optimization objective is constructed according to the following formula: Wherein, a_error_F, b_error_F, c_error_F, and d_error_F represent the signal error optimization targets of graphic segments a, b, c, and d under multiple process conditions, respectively; a_error, b_error, c_error, and d_error represent the signal error optimization targets of graphic segments a, b, c, and d under the ideal process condition, respectively; a_error_g, b_error_g, c_error_g, and d_error_g represent the signal error optimization targets of graphic segments a, b, c, and d under the first edge process condition, respectively; and a_error_h, b_error_h, c_error_h, and d_error_h represent the signal error optimization targets of graphic segments a, b, c, and d under the second edge process condition, respectively. Δ g Δ is a predetermined weight for the first edge process condition. h This represents the predetermined weight of the second edge process condition.

15. An electronic device, characterized in that, include: At least one processing unit; as well as At least one memory coupled to the at least one processing unit and storing instructions for execution by the at least one processing unit, the instructions causing the electronic device to perform the method according to any one of claims 1 to 14 when executed by the at least one processing unit.

16. A computer-readable storage medium, characterized in that, It stores a computer program that can be executed by a processor to implement the method according to any one of claims 1 to 14.

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