Overlay mark and overlay error measuring method thereof

By introducing continuous offset design and optical diffraction measurement into the overlay marking, the problems of insufficient signal strength and low efficiency of DBO technology in semiconductor manufacturing are solved, and high-precision and high-efficiency overlay error measurement is achieved.

CN121209221APending Publication Date: 2025-12-26SHANGHAI HUALI INTEGRATED CIRCUIT CORP
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Patent Information

Application Number
CN202511736808.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-11-24
Publication Date
2025-12-26

AI Technical Summary

Technical Problem

Existing DBO technology faces signal strength and stability issues in semiconductor manufacturing, and multi-wavelength measurement results in low measurement efficiency, making it difficult to meet the high precision and high efficiency requirements of advanced processes.

Method used

Design an overlay marking system that divides the marking system into four quadrants. The offset between the current layer and the previous layer in each quadrant is continuously varying. The system is measured using an optical diffraction measurement system, and the overlay error is calculated using the diffraction signals.

Benefits of technology

It significantly improves measurement sensitivity and signal-to-noise ratio, enhances measurement stability and process adaptability, increases measurement efficiency, and reduces production costs.

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Abstract

The invention relates to an overlay mark and an overlay error measuring method thereof.The overlay mark is divided into a first quadrant area, a second quadrant area, a third quadrant area and a fourth quadrant area, the overlay mark comprises a current-layer overlay structure and a front-layer overlay structure, and patterns of the current-layer overlay structure and the front-layer overlay structure are arranged in the four quadrant areas respectively; in each quadrant region, the current-layer overlay structure comprises a plurality of current-layer patterns which are distributed at intervals and are parallel to one another, and the front-layer overlay structure comprises a plurality of front-layer patterns which are distributed at intervals and are parallel to one another; wherein the extension direction of the current-layer pattern in the same quadrant region is parallel to the extension direction of the previous-layer pattern; and the offsets of the current-layer pattern and the previous-layer pattern in the same quadrant region in the direction perpendicular to the extension direction of the current-layer pattern and the previous-layer pattern are continuously changed. The offset of the overlay mark is changed from a fixed value to continuous change, so that the signal strength can be effectively improved, the noise interference is reduced, and the measurement sensitivity and stability are improved.
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Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing technology, and in particular to an overlay marking and a method for measuring overlay error. Background Technology

[0002] In semiconductor manufacturing, photolithography is a crucial process for precisely transferring circuit patterns from a photomask onto a semiconductor wafer. Overlay accuracy is a core indicator measuring the alignment accuracy between the current photolithographic layer pattern and previously formed patterns. With the continuous development of integrated circuit technology, device feature sizes are shrinking to the nanometer and even sub-nanometer levels, placing extremely stringent demands on overlay accuracy control in photolithography. On the one hand, advancements in technology nodes have drastically reduced the tolerance window for overlay errors; on the other hand, advanced technologies such as multi-patterning, widely adopted to overcome the resolution limits of single-shot lithography, require multiple lithography and etching steps to complete a single device layer, significantly increasing the risk of cumulative errors in overlay alignment. Therefore, controlling overlay accuracy has become one of the major challenges restricting the yield and performance improvement of advanced semiconductor manufacturing.

[0003] To accurately monitor overlay errors, the industry commonly employs specialized overlay measurement markers. Currently, the mainstream measurement technologies are mainly divided into two categories: IBO (Integrated Overlay Marking based on Image Recognition Technology) and DBO (Diffraction Intensity Based Overlay Marking). IBO technology directly acquires images of the overlay marks using an optical microscope and calculates the positional deviation between the upper and lower layers of patterns using image processing algorithms. While this method is intuitive, its measurement accuracy is limited by the optical diffraction limit, and the marker size is usually large, making it difficult to place within the limited space inside the chip.

[0004] In contrast, DBO technology is increasingly becoming the preferred solution for advanced process nodes due to its higher measurement accuracy, better repeatability, and potential for marker miniaturization. Traditional DBO overlay marking typically consists of two periodic grating structures located on the front and current layers, respectively. The basic principle is that when incident light illuminates this grating structure, diffracted light is generated. Under ideal alignment, the intensities of the positive and negative first-order diffracted light are symmetrical; however, when overlay errors exist, this symmetry is disrupted. By detecting the asymmetry in the intensities of the positive and negative first-order diffracted light, the overlay deviation value can be calculated. For example... Figure 1 As shown, in the prior art, diffraction overlay marking is achieved by adding a preset fixed offset between the current layer pattern 2 and the previous layer pattern 1, and the overlay error is measured by utilizing the phase change of the diffraction signal. The preset offset is positive / negative 20nm.

[0005] However, in practical applications, especially in increasingly complex advanced manufacturing processes, traditional DBO technology has gradually revealed its inherent limitations and shortcomings:

[0006] Signal strength and stability issues: When process conditions change significantly (such as fluctuations in film thickness and material properties), or when the topology of the preceding layer is complex (e.g., the preceding layer is a via process layer with a large aspect ratio), the diffraction signal from the bottom grating will experience severe attenuation and distortion during propagation. This leads to a significant reduction in the DBO measurement signal strength and a deterioration in the signal-to-noise ratio, making the measurement results highly susceptible to process fluctuations and resulting in poor stability and reliability.

[0007] Measurement efficiency bottleneck: To address the aforementioned signal quality degradation issues and improve measurement robustness under complex processes, DBO measurements in advanced manufacturing typically require scanning and analysis using multiple measurement wavelengths. While this multi-wavelength measurement strategy can improve measurement capabilities to some extent, it undoubtedly significantly increases the data acquisition and processing time for a single measurement, resulting in a substantial reduction in measurement throughput efficiency, thereby increasing production cycle time and costs.

[0008] Therefore, there is an urgent need in this field for a new overlay marking and measurement method that can effectively improve the strength and stability of the measurement signal while maintaining the high precision advantage of DBO technology, and overcome the efficiency bottleneck caused by multi-wavelength measurement, so as to better adapt to the needs of advanced semiconductor manufacturing processes. Summary of the Invention

[0009] The purpose of this invention is to provide an overlay marking and a method for measuring overlay error, which can effectively improve signal strength, reduce noise interference, and improve measurement sensitivity and stability, thereby solving the problems of insufficient sensitivity and poor process adaptability faced by overlay accuracy measurement in advanced semiconductor manufacturing.

[0010] To achieve the above objectives, the present invention provides an overlay mark, which is divided into a first quadrant, a second quadrant, a third quadrant, and a fourth quadrant. The overlay mark includes a current layer overlay structure and a previous layer overlay structure. The patterns of the current layer overlay structure and the previous layer overlay structure are respectively disposed within the four quadrants. Within each quadrant, the current layer overlay structure includes multiple parallel current layer patterns distributed at intervals, and the previous layer overlay structure includes multiple parallel previous layer patterns distributed at intervals.

[0011] The extension direction of the current layer pattern located in the same quadrant is parallel to the extension direction of the previous layer pattern; and the offset of the current layer pattern and the previous layer pattern located in the same quadrant in the direction perpendicular to their extension changes continuously.

[0012] Optionally, the continuous change is a gradient change, and the offset changes continuously from a positive offset to a negative offset.

[0013] Optionally, within each quadrant, the pattern of the current layer overlay structure is divided into upper and lower patterns or left and right patterns, each pattern consisting of equally spaced graphics, and the pattern layout of the previous layer overlay structure corresponds to the current layer overlay structure.

[0014] Optionally, within the same quadrant, when the patterns of the current layer overlay structure and the previous layer overlay structure are divided into upper and lower parts, the offset change trend of the current layer pattern and the previous layer pattern in the upper part of the pattern is opposite to the offset change trend of the current layer pattern and the previous layer pattern in the lower part of the pattern.

[0015] Optionally, the pitch of the current layer graphic is different from the pitch of the previous layer graphic.

[0016] Optionally, the current layer graphic and / or the previous layer graphic may be one or more combinations of solid lines, cut solid lines, and dot matrix structures.

[0017] Optionally, the overall shape of the overprinted mark is square.

[0018] Optionally, both the current layer overlay structure and the previous layer overlay structure are centrally symmetrical structures.

[0019] Based on this, the present invention also provides a method for measuring the overprinting error of the overprinted mark as described above, comprising the following steps:

[0020] A wafer is provided, on which the overlay markings are formed;

[0021] The overprinted markings are measured using an optical diffraction measurement system to obtain diffraction signals;

[0022] Based on the correspondence between the diffraction signal and the overlay error, the overlay error value is calculated.

[0023] Optionally, the overlay error component in the Y direction is obtained based on the diffraction signals in the first and third quadrants, and the overlay error component in the X direction is obtained based on the diffraction signals in the second and fourth quadrants, wherein the Y direction and the X direction are perpendicular to each other.

[0024] The overprinting mark and its overprinting error measurement method provided by the present invention have at least one of the following beneficial effects:

[0025] 1) Significantly improved measurement sensitivity and signal-to-noise ratio: The overlay marker contains a large number of rectangular units with minute size differences in multiple quadrants. These units actually constitute a micro-grating array with continuously varying offsets. This design allows a rich set of measurement references to be contained within a single marker. During measurement, even a small overlay error will trigger a coordinated change in the diffraction signals of multiple micro-grating units, thereby amplifying and enhancing the weak error signal. This is equivalent to upgrading the traditional "single-point measurement" to "multi-point, multi-parameter curve fitting measurement," greatly improving the measurement sensitivity and signal-to-noise ratio, and enabling more accurate detection of nanometer-level overlay deviations.

[0026] 2) Significantly enhanced measurement stability and process adaptability: The highly ordered and symmetrical (e.g., centrosymmetric structure) design of the overlay markings. When process conditions fluctuate (e.g., changes in the thickness of the preceding layer or slight variations in the material's refractive index), the impact of these fluctuations on all symmetrically distributed micrograting units within the overlay markings is similar or identical (i.e., common-mode noise). Subsequent signal processing algorithms compare the signal differences between symmetrical units, effectively canceling this common-mode interference and extracting signal changes purely caused by overlay errors. This makes the invention highly robust and stable to complex process variations, especially when the preceding layer is a via layer with a complex topology.

[0027] 3) Effectively improves measurement efficiency: Traditional DBO technology often requires multi-wavelength measurement to compensate for process fluctuations, which severely restricts production capacity. This invention, through a gradient-varying offset design, can obtain far more information than a fixed offset marker under a single wavelength illumination. The rich built-in gradient information provides sufficient signal redundancy, enabling stable and reliable measurement results to be obtained without switching multiple wavelengths under most process conditions, thereby significantly improving measurement throughput efficiency and reducing production costs. Attached Figure Description

[0028] Those skilled in the art will understand that the accompanying drawings are provided to better understand the invention and do not constitute any limitation on the scope of the invention. Wherein:

[0029] Figure 1 This is a schematic diagram of the structure of diffraction overlay marking in the prior art;

[0030] Figure 2 This is an overall schematic diagram of an overprinted mark provided in an embodiment of the present invention.

[0031] Figure 3 for Figure 2 A partial cross-sectional view along the AA direction.

[0032] The attached figures are labeled as follows:

[0033] 1 - Previous layer graphic; 2 - Current layer graphic; 100 - Previous layer graphic; 200 - Current layer graphic. Detailed Implementation

[0034] To make the objectives, technical solutions, and advantages of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0035] Therefore, the following detailed description of the embodiments of the invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the invention without inventive effort are within the scope of protection of the invention.

[0036] In the description of this invention, it should be understood that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the product is in use, or the orientation or positional relationship commonly understood by those skilled in the art. They are only used to facilitate the description of this invention and to simplify the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0037] Furthermore, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such an article or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the article or apparatus that includes said element. Those skilled in the art will understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0038] Please refer to Figures 2-3This invention provides an overlay mark, which is divided into a first quadrant, a second quadrant, a third quadrant, and a fourth quadrant. The overlay mark includes a current layer overlay structure and a previous layer overlay structure. The patterns of the current layer overlay structure and the previous layer overlay structure are respectively disposed within the four quadrants. Within each quadrant, the current layer overlay structure includes multiple spaced and parallel current layer graphics 200, and the previous layer overlay structure includes multiple spaced and parallel previous layer graphics 100.

[0039] The extension direction of the current layer pattern 200 located in the same quadrant is parallel to the extension direction of the previous layer pattern 100; and the offset of the current layer pattern 200 and the previous layer pattern 100 in the same quadrant is continuously changing in the direction perpendicular to their extension.

[0040] The ingenuity of the invention lies in its fundamental upgrade of the measurement method from passive "single-point sampling" to active "curve fitting" by changing the offset of the overlay mark from a fixed value to a continuously varying value. This can effectively improve signal strength, reduce noise interference, and improve measurement sensitivity and stability, thereby solving the problems of insufficient sensitivity and poor process adaptability faced by overlay accuracy measurement in advanced semiconductor manufacturing.

[0041] In this embodiment, the overall shape of the overprinted mark is preferably square, and it is divided into a first quadrant area ( Figure 2 The upper right part of the middle), the second quadrant ( Figure 2 The upper left part of the middle), the third quadrant ( Figure 2 The lower left part of the middle) and the fourth quadrant ( Figure 2 (The lower right part of the image). This quadrant division method helps to simultaneously obtain overlay error information in both the X and Y directions.

[0042] Among them, such as Figure 3 As shown, the offset between the current layer graphic 200 and the previous layer graphic 100 located in the same quadrant is perpendicular to their extension direction. It changes continuously, preferably with a gradient. For example, this offset... It can be continuously and equally spaced from a positive offset (e.g., +20nm) to a negative offset (e.g., -20nm), forming an offset gradient.

[0043] To further improve the anti-interference capability and accuracy of the measurement, in a preferred embodiment, the current layer overlay structure pattern and the previous layer overlay structure pattern within each quadrant can be further divided into upper and lower parts (or left and right parts). Each part of the pattern consists of equally spaced graphics, and the layout of the previous layer overlay structure corresponds to that of the current layer overlay structure. For example, as... Figure 2As shown, in the first and third quadrants, both the overlay structure pattern and the previous overlay structure pattern are divided into left and right parts. In the second and fourth quadrants, both the overlay structure pattern and the previous overlay structure pattern are divided into upper and lower parts.

[0044] More preferably, within the same quadrant, the offset trend between the current layer pattern 200 and the preceding layer pattern 100 in the upper part of the pattern is opposite to the offset trend in the lower part of the pattern. For example, in the second quadrant, the offset in the upper half changes from negative to positive from left to right, while in the lower half it changes from positive to negative. This symmetrical, opposite-trend design allows the measurement system to effectively eliminate common-mode noise caused by process fluctuations through differential signal processing technology, thereby extracting a purer overlay error signal and greatly improving the stability and repeatability of the measurement.

[0045] In this embodiment, both the layer overlay structure and the preceding layer overlay structure are centrosymmetric structures. For example, the pattern in the first quadrant of the layer overlay structure is centrosymmetric to the pattern in the third quadrant, and the pattern in the second quadrant is centrosymmetric to the pattern in the fourth quadrant. The preceding layer overlay structure is also centrosymmetric. Traditional overlay marks are prone to measurement deviations when the wafer or pattern rotates. However, centrosymmetric structures are insensitive to rotation due to their inherent symmetry. Regardless of the pattern rotation, the position of its center point and the overall symmetry remain unchanged, providing an extremely stable reference for measurement and significantly reducing measurement errors introduced by wafer placement or deformation. Furthermore, by calculating the difference between the signals of the two symmetrical patterns (such as their distance from the center point or the difference in their diffraction intensity), common-mode noise is cleverly canceled, and the signal of overlay error is amplified, thereby greatly improving the signal-to-noise ratio and accuracy of the measurement.

[0046] Preferably, the pitch of layer pattern 200 is set differently from the pitch of the preceding layer pattern 100. In this embodiment, such as... Figure 3 As shown, the pitch of layer pattern 200 is smaller than the pitch of the preceding layer pattern 100. This design can utilize the moiré fringe effect to amplify minute overlay errors, thereby significantly improving measurement sensitivity.

[0047] In this embodiment, the layer graphic 200 and / or the previous layer graphic 100 can take various forms, such as solid lines, cut solid lines, dot matrix structures, or combinations of these structures, to adapt to different process conditions and precision requirements.

[0048] Based on the same inventive concept, embodiments of the present invention also provide a method for measuring overprinting error according to the above overprinting markings, comprising the following steps:

[0049] S1. Provide a wafer and form an overlay mark on the wafer;

[0050] S2. Measure the overprinted markings using an optical diffraction measurement system to obtain diffraction signals;

[0051] S3. Based on the correspondence between diffraction signals and overlay errors, the overlay error value is calculated.

[0052] First, S1 is executed, providing a semiconductor wafer, and through a series of standard semiconductor manufacturing processes such as photolithography and etching, a front layer overlay structure and a current layer overlay structure are sequentially formed on the wafer, thereby forming a complete overlay mark.

[0053] Then, S2 is executed, illuminating the overlay marks using an optical diffraction measurement system (such as a DBO measurement device). Due to the gradient shift and possible pitch differences between the layer pattern 200 and the preceding layer pattern 100, the illuminating light will diffract, generating a diffraction signal containing rich information about overlay errors.

[0054] Finally, in step S3, the system collects information such as the intensity distribution of the diffracted light. Since the offset changes with a gradient, the diffraction signal (such as the intensity of diffracted light of a specific order) will also show a regular change. By establishing a mathematical model between the diffraction signal and the known offset gradient, the actual overlay error value can be deduced with high precision.

[0055] Preferably, the error values ​​in the two directions can be calculated by analyzing the diffraction signals of different quadrants (for example, the first and third quadrants are mainly sensitive to errors in the Y direction, and the second and fourth quadrants are mainly sensitive to errors in the X direction), with the Y direction and the X direction being perpendicular to each other.

[0056] Since the overprinting error measurement method provided by this invention belongs to the same inventive concept as the overprinting mark mentioned above, the overprinting error measurement method provided by this invention has all the advantages of the overprinting mark mentioned above. Therefore, the beneficial effects of the overprinting error measurement method provided by this invention will not be described in detail here.

[0057] In summary, the overlay marking and its overlay error measurement method provided by this invention fundamentally upgrades the measurement method from passive "single-point sampling" to active "curve fitting" by changing the offset of the overlay mark from a fixed value to a continuously varying value. This can effectively improve signal strength, reduce noise interference, and improve measurement sensitivity and stability, thereby solving the problems of insufficient sensitivity and poor process adaptability faced by overlay accuracy measurement in advanced semiconductor manufacturing.

[0058] The above description is merely a description of preferred embodiments of the present invention and is not intended to limit the scope of the invention in any way. Any changes or modifications made by those skilled in the art based on the above disclosure are within the protection scope of the present invention. Obviously, those skilled in the art can make various modifications and variations to the present invention without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the present invention and its equivalents, the present invention also intends to include these modifications and variations.

Claims

1. A type of overprinted mark, characterized in that, The overlay markings are divided into a first quadrant, a second quadrant, a third quadrant, and a fourth quadrant. Each overlay marking includes a current layer overlay structure and a previous layer overlay structure. The patterns of the current layer overlay structure and the previous layer overlay structure are respectively set within the four quadrants. Within each quadrant, the current layer overlay structure includes multiple parallel and spaced-apart current layer graphics, and the previous layer overlay structure includes multiple parallel and spaced-apart previous layer graphics. The extension direction of the current layer pattern located in the same quadrant is parallel to the extension direction of the previous layer pattern; and the offset of the current layer pattern and the previous layer pattern located in the same quadrant in the direction perpendicular to their extension changes continuously.

2. The overprinted marking according to claim 1, characterized in that, The continuous change is a gradient change, and the offset changes continuously from a positive offset to a negative offset.

3. The overprinted marking according to claim 1, characterized in that, Within each quadrant, the pattern of the current layer overlay structure is divided into upper and lower or left and right patterns. Each pattern is composed of equally spaced graphics, and the pattern layout of the previous layer overlay structure corresponds to that of the current layer overlay structure.

4. The overprinted mark according to claim 3, characterized in that, Within the same quadrant, when the patterns of the current layer overlay structure and the previous layer overlay structure are divided into upper and lower parts, the trend of the offset between the current layer pattern and the previous layer pattern in the upper part of the pattern is opposite to the trend of the offset between the current layer pattern and the previous layer pattern in the lower part of the pattern.

5. The overprinted mark according to claim 1, characterized in that, The pitch of the current layer graphic is different from the pitch of the previous layer graphic.

6. The overprinted mark according to claim 1, characterized in that, The current layer graphic and / or the previous layer graphic are one or more combinations of solid lines, cut solid lines, and dot matrix structures.

7. The overprinted mark according to claim 1, characterized in that, The overall shape of the overprinted mark is square.

8. The overprinted mark according to claim 1, characterized in that, Both the current layer overlay structure and the previous layer overlay structure are centrally symmetrical structures.

9. A method for measuring the overprinting error of an overprinted mark according to any one of claims 1-8, characterized in that, Includes the following steps: A wafer is provided, on which the overlay markings are formed; The overprinted markings are measured using an optical diffraction measurement system to obtain diffraction signals; Based on the correspondence between the diffraction signal and the overlay error, the overlay error value is calculated.

10. The method for measuring overlay error according to claim 9, characterized in that, The overlay error component in the Y direction is obtained based on the diffraction signals in the first and third quadrants, and the overlay error component in the X direction is obtained based on the diffraction signals in the second and fourth quadrants, wherein the Y direction and the X direction are perpendicular to each other.