Glass packaging carrier plate and manufacturing method thereof

Abstract

The invention relates to a glass packaging carrier plate and a manufacturing method thereof, and the manufacturing method comprises the steps: providing a glass substrate which is provided with a first surface and a second surface which are oppositely arranged; forming a communicating hole in the glass substrate, wherein the communicating hole extends from the first surface to the second surface; injecting metal ions into the glass substrate by using a high-energy ion injection technology so as to form an ion injection layer in the glass substrate; and forming conductive columns in the communicating holes. According to the manufacturing method of the glass packaging carrier plate, the metal ions can be injected into all the areas, surrounding the communicating holes, of the glass substrate, so that the coverage rate is wide, the defects of uneven filling, cavities or bubbles and the like in the subsequent conductive column forming process can be effectively prevented, and high-performance and high-reliability glass through hole interconnection is achieved. Moreover, the ion implantation layer is composed of metal ions and glass, so that the ion implantation layer can be used as an excellent bonding layer of a metal material and a glass substrate in a subsequent process.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor integrated circuits, in particular to a glass packaging carrier and a manufacturing method thereof. BACKGROUND

[0002] With the vigorous development of emerging fields such as wearable devices, smart phones, automotive electronics, artificial intelligence, integrated circuit applications are also developing towards diversified applications, and advanced packaging technology has gradually become one of the important means to realize the miniaturization, lightweight and multifunctionalization of electronic products.

[0003] TGV (Through Glass Via, glass via) interconnection technology has a wide application prospect in the fields of radio frequency devices, micro-electro-mechanical systems, and optoelectronic system integration due to its excellent high-frequency electrical characteristics, good surface flatness, and strong mechanical stability.

[0004] However, the existing glass via interconnection technology usually has the problem of uneven via filling, which is easy to produce defects such as voids or bubbles, thereby affecting the electrical conductivity and further affecting the normal function of the packaging system. SUMMARY

[0005] Therefore, it is necessary to provide a glass packaging carrier and a manufacturing method thereof for the problem of uneven via filling in the glass via interconnection technology.

[0006] A glass packaging carrier manufacturing method, comprising:

[0007] providing a glass substrate, the glass substrate having a first surface and a second surface arranged opposite to each other;

[0008] forming a through hole on the glass substrate, the through hole extending from the first surface to the second surface;

[0009] injecting metal ions into the glass substrate by using high-energy ion implantation technology to form an ion implantation layer in the glass substrate;

[0010] forming a conductive column in the through hole;

[0011] wherein part of the ion implantation layer circumferentially surrounds the through hole, part of the ion implantation layer is located on the side of the glass substrate having the first surface, and part of the ion implantation layer is located on the side of the glass substrate having the second surface.

[0012] In one of the embodiments, the hole wall of the through hole extends obliquely relative to the central axis of the through hole.

[0013] In one embodiment, from one end near the first surface to one end near the second surface, the wall of the connecting hole first extends inclined toward the central axis and then extends inclined away from the central axis, and the diameter of the connecting hole first gradually decreases and then gradually increases.

[0014] In one embodiment, the connecting hole is formed using laser-induced wet etching technology.

[0015] In one embodiment, the implantation energy of the metal ions is greater than 400 keV, and the implantation dose of the metal ions is greater than 10. 15 ions / cm².

[0016] In one embodiment, prior to the step of forming a conductive post within the connecting hole, the method further includes:

[0017] Protective films are respectively applied to the first and second surfaces of the glass substrate.

[0018] In one embodiment, after the step of forming a conductive post within the connecting hole, the method further includes:

[0019] Remove the protective film;

[0020] A wiring layer and a dielectric layer are formed on the first surface and the second surface, respectively.

[0021] A glass encapsulation substrate is formed using the above-described glass encapsulation substrate manufacturing method.

[0022] In one embodiment, the glass encapsulation carrier includes a glass substrate having a first surface and a second surface disposed opposite to each other, and the glass substrate having a through hole extending from the first surface to the second surface;

[0023] The glass substrate has an ion implantation layer on the portion surrounding the through hole, on the side of the glass substrate having the first surface, and on the side of the glass substrate having the second surface.

[0024] In one embodiment, the thickness of the ion implantation layer is greater than 20 nm.

[0025] The aforementioned glass encapsulation substrate fabrication method utilizes high kinetic energy to overcome the surface resistance of the glass substrate, injecting metal ions into the glass substrate to form an ion implantation layer. Since the metal ions can be implanted into all areas of the glass substrate surrounding the vias, it achieves broad coverage, effectively preventing defects such as uneven filling, voids, or bubbles during subsequent conductive pillar formation, thus realizing high-performance, high-reliability glass via interconnects. Furthermore, because the ion implantation layer is composed of both metal ions and glass, it serves as an excellent bonding layer between the metal material and the glass substrate in subsequent processes, enhancing the adhesion between the metal material and the glass substrate. Attached Figure Description

[0026] The accompanying drawings, which form part of this application, are used to provide a further understanding of this application. The illustrative embodiments of this application and their descriptions are used to explain this application and do not constitute an undue limitation of this application.

[0027] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0028] Figure 1 This is a schematic flowchart illustrating a method for manufacturing a glass encapsulation substrate according to an embodiment of this application.

[0029] Figure 2 This is a schematic diagram of step S100 of a glass encapsulation substrate manufacturing method according to an embodiment of this application.

[0030] Figure 3 This is a schematic diagram of step S200 of a glass encapsulation substrate fabrication method according to an embodiment of this application.

[0031] Figure 4 This is a schematic diagram of step S300 of a glass encapsulation substrate fabrication method according to an embodiment of this application.

[0032] Figure 5 This is a schematic diagram of step S400 of a glass encapsulation substrate fabrication method according to an embodiment of this application.

[0033] Figure 6 This is a schematic diagram of step S500 of a glass encapsulation substrate fabrication method according to an embodiment of this application.

[0034] Figure 7 This is a schematic diagram of step S600 of a glass encapsulation substrate fabrication method according to an embodiment of this application.

[0035] Figure 8This is a schematic diagram of step S710 of a glass encapsulation substrate fabrication method according to an embodiment of this application.

[0036] Figure 9 This is a schematic diagram of step S720 of a glass encapsulation substrate fabrication method according to an embodiment of this application.

[0037] Figure 10 This is a schematic diagram of step S730 of a glass encapsulation substrate fabrication method according to an embodiment of this application.

[0038] Figure 11 This is a schematic diagram of step S740 of a glass encapsulation substrate fabrication method according to an embodiment of this application.

[0039] Figure 12 This is a schematic diagram of step S750 of a glass encapsulation substrate fabrication method according to an embodiment of this application.

[0040] Explanation of reference numerals in the attached figures:

[0041] 100, Glass encapsulation substrate; 110, Glass substrate; 110a, First surface; 110b, Second surface; 110c, Through hole; 112, Ion implantation layer; 120, Protective film; 130, Conductive pillar; 140, Photoresist layer; 150, Metal wiring layer; 160, Dielectric layer. Detailed Implementation

[0042] To make the above-mentioned objectives, features, and advantages of this application more apparent and understandable, the specific embodiments of this application are described in detail below with reference to the accompanying drawings. Many specific details are set forth in the following description to provide a thorough understanding of this application. However, this application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar modifications without departing from the spirit of this application. Therefore, this application is not limited to the specific embodiments disclosed below.

[0043] In the description of this application, it should be understood that if terms such as "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential" appear, these terms indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0044] Furthermore, where the terms "first" and "second" appear, these terms are for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined with "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, where the term "multiple" appears, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0045] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "joining," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise expressly limited. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0046] In this application, unless otherwise expressly specified and limited, the use of descriptions such as "above" or "below" the second feature indicates that the first and second features are in direct contact or indirect contact via an intermediate medium. Furthermore, "above," "on top of," and "over" the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. Similarly, "below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0047] It should be noted that if an element is referred to as being "fixed to" or "set on" another element, it can be directly on the other element or there may be an intervening element. If an element is considered to be "connected to" another element, it can be directly connected to the other element or there may be an intervening element. If so, the terms "vertical," "horizontal," "upper," "lower," "left," "right," and similar expressions used in this application are for illustrative purposes only and do not represent the only possible implementation.

[0048] As described in the background section, glass via interconnect technology, as a packaging technology, achieves electrical connection and signal transmission between the upper and lower surfaces of a glass substrate by creating tiny interconnecting holes on the substrate and filling these holes with conductive materials such as copper to form conductive pillars. Compared with traditional silicon via technology, the lower dielectric constant and good insulation of the glass substrate result in less signal delay and lower loss during transmission, and effectively prevents crosstalk between signals.

[0049] In existing glass via interconnect technology, physical vapor deposition (PVD) is typically used to deposit metallic materials such as titanium or copper on the walls of the via to form a seed layer. Then, conductive materials such as copper are filled into the via to form conductive pillars for conduction.

[0050] The seed layer, as a continuous and uniform metal film covering the hole wall, provides a foundation for the subsequent deposition of conductive materials. It can also serve as an adhesion layer between the conductive metal and the glass substrate, preventing the conductive metal from delaminating or falling off under subsequent heat treatment or mechanical stress.

[0051] However, with the development of glass via interconnect technology, the depth-to-diameter ratio (the ratio of hole depth to hole diameter) of some vias has reached 10:1. As a result, during the formation of the seed layer, it is difficult for metal materials to enter the interior of the glass via, especially the middle part of the glass via. This leads to defects such as uneven filling, voids or bubbles in the subsequent formation of conductive pillars, thus making it impossible to achieve high-performance and high-reliability glass via interconnects.

[0052] To address the aforementioned technical issues, such as Figure 1 As shown, an embodiment of this application provides a method for manufacturing a glass encapsulation substrate, which includes the following steps:

[0053] Step S100: A glass substrate is provided, the glass substrate having a first surface and a second surface disposed opposite to each other.

[0054] like Figure 2 As shown, in some embodiments, the glass substrate 110 has a flat plate structure formed of glass material as an amorphous solid. The glass substrate 110 has a first surface 110a and a second surface 110b disposed opposite to each other in its thickness direction. The first surface 110a and the second surface 110b are parallel to each other and both are perpendicular to the thickness direction of the glass substrate 110.

[0055] It is understood that the material forming the glass substrate 110 is not limited. In some embodiments, the material forming the glass substrate 110 may include pure silica glass, soda-lime glass, borosilicate glass, and aluminosilicate glass, etc. In other embodiments, fluorine glass, phosphate glass, chalcogenide glass, etc., may also be used as the material for the glass substrate 110. In other embodiments, the material forming the glass substrate 110 may also include other additives to form glass with specific physical properties. These additives may include magnesium, sodium, calcium, manganese, aluminum, lead, boron, iron, chromium, potassium, sulfur, antimony, and carbonates of these elements and other elements.

[0056] Step S200: A connecting hole is formed on the glass substrate, extending from the first surface to the second surface.

[0057] like Figure 3 As shown, the cross-section of the connecting hole 110c is circular, and the central axis of the connecting hole 110c extends along the thickness direction of the glass substrate 110, thereby penetrating the glass substrate 110 along the thickness direction to connect the first surface 110a and the second surface 110b of the glass substrate 110. It can be understood that the shape of the connecting hole 110c is not limited to this, and can be used to meet different requirements.

[0058] In some embodiments, the wall of the connecting hole 110c extends obliquely relative to the central axis of the connecting hole 110c, thereby facilitating subsequent processes. As a preferred embodiment, the angle of inclination of the wall of the connecting hole 110c relative to the central axis of the connecting hole 110c is greater than 1° and less than 10°. It is understood that the angle of inclination of the wall of the connecting hole 110c relative to the central axis of the connecting hole 110c is not limited and can be set as needed to meet different requirements.

[0059] In one specific embodiment, the longitudinal section of the connecting hole 110c is an isosceles trapezoid. From one end near the first surface 110a to one end near the second surface 110b, the hole wall of the connecting hole 110c extends inclined towards the direction close to the central axis or away from the central axis, and the diameter of the connecting hole 110c gradually increases or decreases.

[0060] In other embodiments, from one end near the first surface 110a to one end near the second surface 110b, the wall of the connecting hole 110c first extends inclined toward the central axis, and then extends inclined away from the central axis, and the diameter of the connecting hole 110c first gradually decreases and then gradually increases.

[0061] In some specific embodiments, the connecting hole 110c includes a first connecting segment and a second connecting segment connected to each other, and the length of the first connecting segment is equal to the length of the second connecting segment. One end of the first connecting segment connects to the first surface 110a, and the other end of the first connecting segment connects to one end of the second connecting segment, which in turn connects to the second surface 110b. The longitudinal section of the first connecting hole 110c is an isosceles trapezoid. From the end near the first surface 110a to the end near the second surface 110b, the hole wall of the first connecting segment extends inclined towards the central axis, and the diameter of the second connecting segment gradually decreases. The longitudinal section of the second connecting hole 110c is also an isosceles trapezoid. From the end near the first surface 110a to the end near the second surface 110b, the hole wall of the second connecting segment extends inclined away from the central axis, and the diameter of the second connecting segment gradually increases.

[0062] In some embodiments, the via 110c can be formed using laser-induced wet etching technology. Specifically, in one embodiment, the via region of the glass substrate 110 is first modified using a laser. The laser can scan the glass substrate 110 point by point or layer by layer according to a preset path. The laser energy, through nonlinear absorption effect, can cause changes in the internal structure of the glass substrate 110, including the generation of microcracks and defects, density changes, and chemical bond breaking, thereby significantly improving the glass chemical activity of the via region. Then, the via region is etched using a solution such as hydrofluoric acid. Hydrofluoric acid can react chemically with silicon dioxide to generate soluble silicates, thereby achieving the effect of dissolving the glass.

[0063] In some embodiments, the etching process begins at the first surface 110a of the glass substrate 110 and rapidly advances towards the second surface 110b of the glass substrate 110 until a through-hole 110c is formed through the glass substrate 110. The longitudinal section of the through-hole 110c is an isosceles trapezoid, and from one end near the first surface 110a to one end near the second surface 110b, the hole wall of the through-hole 110c extends obliquely toward or away from the central axis, and the diameter of the through-hole 110c gradually increases or decreases.

[0064] In other embodiments, the etching process begins simultaneously on the first surface 110a and the second surface 110b of the glass substrate 110 and rapidly advances into the interior of the glass substrate 110 until a through hole 110c is formed. From the end near the first surface 110a to the end near the second surface 110b, the hole wall of the through hole 110c first extends inclined towards the central axis, and then extends inclined away from the central axis. The diameter of the through hole 110c first gradually decreases and then gradually increases.

[0065] Laser-induced wet etching technology can not only form interconnect holes 110c with an aspect ratio greater than 10:1 or even higher to meet the needs of high-density interconnection and effectively avoid microcracks and edge chipping caused by thermal stress, but also make the hole wall of the interconnect hole 110c extend at an angle relative to the central axis of the interconnect hole 110c to facilitate subsequent processes.

[0066] After step S200, step S300 is also included: metal ions are implanted into the glass substrate using high-energy ion implantation technology to form an ion implantation layer in the glass substrate.

[0067] like Figure 4As shown, specifically, a portion of the ion implantation layer 112 surrounds the connecting hole 110c circumferentially, a portion of the ion implantation layer 112 is located on the side of the glass substrate 110 having the first surface 110a, and a portion of the ion implantation layer 112 is located on the side of the glass substrate 110 having the second surface 110b. It should be noted that the ion implantation layer 112 is formed in the glass substrate 110, and not on the surface of the glass substrate 110.

[0068] High-energy ion implantation is a technique that accelerates high-energy charged ions to a very high energy level and forcibly implants them to a specific depth below the surface of a solid material. Compared with traditional thermal diffusion techniques, high-energy ion implantation can use high kinetic energy to overcome the obstacles on the surface of the glass substrate 110, implanting metal ions into the interior of the glass substrate 110 to form an ion implantation layer 112. Since metal ions can be implanted into all areas of the glass substrate 110 surrounding the via 110c, it has a wide coverage, which can effectively prevent defects such as uneven filling, voids, or bubbles from occurring during the subsequent formation of the conductive pillars 130, thus achieving high-performance and high-reliability glass via interconnects.

[0069] Furthermore, since the ion implantation layer 112 is composed of metal ions and glass, it can serve as an excellent bonding layer between the metal material and the glass substrate 110 in subsequent processes, thereby enhancing the bonding force between the metal material and the glass substrate 110.

[0070] In some embodiments, the metal ions include titanium (Ti) and copper (Cu), the implantation energy of the metal ions is greater than 400 keV, and the implantation dose of the metal ions is greater than 10. 15 The ion implantation angle is parallel to the central axis of the via 110c, and the thickness of the ion implantation layer 112 is greater than 20 nm, thus ensuring good adhesion to the glass substrate 110. It is understood that in other embodiments, the process parameters of high-energy ion implantation technology are not limited to these and can be set as needed to meet different requirements.

[0071] In some embodiments, since the hole wall of the connecting hole 110c of the glass substrate 110 extends at an angle relative to the central axis of the connecting hole 110c, the hole wall of the connecting hole 110c can intercept metal ions during ion implantation, thereby allowing metal ions to pass through the hole wall and enter the glass substrate 110. This effectively prevents metal ions from directly passing through the connecting hole 110c and failing to deposit in the glass substrate 110, thereby further improving the coverage of the ion implantation layer 112 and further improving the yield of subsequent processes.

[0072] After step S300, step S400 is further included: covering the first surface and the second surface of the glass substrate with protective films respectively.

[0073] likeFigure 5 As shown, in some embodiments, in order to protect the first surface 110a and the second surface 110b of the glass substrate 110 in subsequent processes while processing the connecting hole 110c, a protective film 120 is respectively covered on the first surface 110a and the second surface 110b, and the protective film 120 only covers the areas of the first surface 110a and the second surface 110b where the connecting hole 110c is not opened, so that both ends of the connecting hole 110c are exposed to the external environment.

[0074] In one specific embodiment, the material of the protective film 120 includes, but is not limited to, polyimide (PI), polyethylene terephthalate (PET), and epoxy resin, thereby providing good protection for the glass substrate 110. It is understood that the material of the protective film 120 is not limited to these and can be configured as needed to meet different requirements.

[0075] After step S400, step S500 is also included: forming a conductive post in the connecting hole.

[0076] like Figure 6 As shown, in some embodiments, the filling material forming the conductive pillar 130 includes, but is not limited to, at least one of copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), and titanium (Ti). The filling material is filled throughout the connecting hole 110c to form the conductive pillar 130 via an electroplating process, and the two end faces of the conductive pillar 130 in the thickness direction of the glass substrate 110 are flush with the first surface 110a and the second surface 110b, respectively. It is understood that the filling material forming the conductive pillar 130 is not limited and can be configured as needed to meet different requirements.

[0077] Since a protective film 120 is applied to the first surface 110a and the second surface 110b before the conductive pillar 130 is formed, the filling material for forming the conductive pillar 130 can be effectively prevented from depositing on the first surface 110a and the second surface 110b. Therefore, it is not necessary to use complex chemical mechanical polishing (CMP) or other methods to remove the filling material deposited on the first surface 110a and the second surface 110b in subsequent steps, thus effectively simplifying the production process and improving production efficiency.

[0078] In some embodiments, the methods for forming the conductive pillar 130 include, but are not limited to, chemical vapor deposition (CVD), physical vapor deposition (PVD), electroless plating, and electroplating.

[0079] In one specific embodiment, the conductive pillar 130 is formed by an electroplating process. In the electroplating process, an electric current is first applied to the glass substrate 110 to make it an electroplating cathode. Then, the glass substrate 110 is brought into contact with the electroplating solution. Copper ions in the electroplating solution absorb electrons to form elemental copper, which adheres to the ion implantation layer 112 surrounding the through hole 110c until the glass through hole is completely filled with copper metal to form the conductive pillar 130.

[0080] After step S500, step S600 is also included: removing the protective film.

[0081] like Figure 7 As shown, after the conductive pillar 130 is formed, the protective film 120 covering the first surface 110a and the second surface 110b can be removed to re-expose the first surface 110a and the second surface 110b for subsequent processing. It is understood that the method of removing the protective film 120 is not limited, and methods such as chemical etching, plasma etching, laser ablation, and thermal decomposition removal can be selectively used.

[0082] After step S600, step S700 is further included: forming a metal wiring layer and a dielectric layer on the first surface and the second surface, respectively.

[0083] In some embodiments, step S700 specifically includes the following steps:

[0084] Step S710: A photoresist layer is formed on the first surface and the second surface, the photoresist layer covering a portion of the first surface and the second surface.

[0085] like Figure 8 As shown, a photoresist layer 140 with a preset pattern is formed on the first surface 110a and the second surface 110b by means of coating, exposure and development. The photoresist layer 140 covers a portion of the first surface 110a and the second surface 110b to protect these areas in the next process.

[0086] Specifically, in some embodiments, firstly, liquid photoresist material is uniformly coated onto the first surface 110a and the second surface 110b by spin coating. Then, the photoresist material is heated to remove most of the solvent, transforming it from a liquid to a solid film. Next, using a light source of a specific wavelength, such as ultraviolet light, the photoresist material is selectively irradiated through a photomask with a preset pattern. The irradiated areas undergo a photochemical reaction. Then, the exposed glass substrate 110 is immersed in a specific chemical solution, where the exposed portions dissolve, leaving unexposed areas, thus forming a patterned photoresist layer 140. Finally, the photoresist layer 140 is dried to cure it, thereby improving the stability of the photoresist layer 140 in subsequent processes.

[0087] Step S720: Form a metal wiring layer in the area of ​​the first and second surfaces where the photoresist layer is not covered.

[0088] like Figure 9 As shown, since the photoresist layer 140 only covers a portion of the first surface 110a and the second surface 110b, while the remaining areas of the first surface 110a and the second surface 110b are exposed to the external environment, a metal wiring layer 150 can be formed in the areas of the first surface 110a and the second surface 110b that are not covered by the photoresist layer 140.

[0089] The metal wiring layer 150 contacts the conductive post 130 for leading the electrical signal of the conductive post 130 to the first surface 110a and the second surface 110b of the glass substrate 110. The metal wiring layer 150 may include signal patterns, power patterns, ground patterns, etc., and these patterns may each have various forms such as lines, planes and pads.

[0090] In some embodiments, the material forming the metal wiring layer 150 may include, but is not limited to, at least one of copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), and titanium (Ti). Methods for forming the metal wiring layer 150 include, but are not limited to, chemical vapor deposition (CVD), physical vapor deposition (PVD), electroless plating, and electroplating.

[0091] S730: Remove the photoresist layer.

[0092] like Figure 10 As shown, after forming a metal wiring layer 150 in a portion of the first surface 110a and the second surface 110b, the photoresist layer 140 of the first surface 110a and the second surface 110b can be removed to expose the remaining areas of the first surface 110a and the second surface 110b. In some embodiments, the process for removing the photoresist layer 140 includes dry stripping, wet stripping, laser ablation, etc.

[0093] S740: Remove the ion implantation layer and conductive pillars from one side of the glass substrate having a first surface, and remove the ion implantation layer and conductive pillars from one side of the glass substrate having a second surface.

[0094] like Figure 11 As shown, after removing the photoresist layer 140, the first surface 110a and the second surface 110b can be micro-etched using an acidic or alkaline etching solution to remove the exposed ion implantation layer 112 and part of the conductive pillars 130, thereby forming new first surface 110a and second surface 110b. The ion implantation layer 112 and part of the conductive pillars 130 located below the metal wiring layer 150 are retained to serve as electrical connections.

[0095] S750: Dielectric layers are formed on the first surface and the second surface, respectively.

[0096] like Figure 12 As shown, after removing the ion implantation layer 112, the newly formed first surface 110a and second surface 110b are coated with an organic insulating material to form a dielectric layer 160. The dielectric layer 160 covers surface 110a or the second surface 110b and is disposed adjacent to the metal wiring layer 150, or may partially cover the metal wiring layer 150. The dielectric layer 160 serves as insulation to prevent short circuits, and also prevents the metal wiring from being scratched, oxidized, or affected by environmental pollution and moisture.

[0097] In some embodiments, the organic insulating material forming the dielectric layer 160 includes, but is not limited to, thermosetting resins (such as epoxy resins), thermoplastic resins (such as polyimide), and photosensitive dielectrics (PIDs).

[0098] It is understood that the number of metal wiring layers 150 and dielectric layers 160 is unlimited. Multiple metal wiring layers 150 and dielectric layers 160 can be stacked along the thickness direction of the glass substrate 110, thereby forming glass encapsulation carriers 100 with different structures as needed.

[0099] The above-mentioned glass encapsulation substrate fabrication method forms a through-hole 110c with inclined hole wall extension on the glass substrate 110 using laser-induced wet etching technology, and then uses high-energy ion implantation technology to implant metal ions into the glass substrate 110 to form an ion implantation layer 112. This results in the ion implantation layer 112 having good coverage, effectively improving the yield of subsequent processes, and effectively preventing defects such as uneven filling, voids or bubbles from occurring during the subsequent formation of conductive pillars 130, thus achieving high-performance and high-reliability glass through-hole interconnection.

[0100] like Figure 11 As shown, this application also provides a glass encapsulation substrate 100, which is manufactured using the above-described glass encapsulation substrate 100 manufacturing method.

[0101] The glass encapsulation carrier 100 includes a glass substrate 110, which has a first surface 110a and a second surface 110b disposed opposite to each other, and the glass substrate 110 has a through hole 110c that connects the first surface 110a and the second surface 110b.

[0102] The cross-section of the connecting hole 110c is circular, and the central axis of the connecting hole 110c extends along the thickness direction of the glass substrate 110. The hole wall of the connecting hole 110c extends obliquely relative to the central axis of the connecting hole 110c. As a preferred embodiment, the oblique angle of the hole wall of the connecting hole 110c relative to the central axis of the connecting hole 110c is greater than 10° and less than 20°.

[0103] In some embodiments, the wall of the connecting hole 110c extends obliquely from one end near the first surface 110a to one end near the second surface 110b, and the diameter of the connecting hole 110c gradually increases or decreases from one end near the first surface 110a to one end near the second surface 110b.

[0104] In other embodiments, the diameter of the connecting hole 110c gradually decreases and then gradually increases in the direction from the first surface 110a to the second surface 110b. Specifically, the connecting hole 110c includes a first connecting segment and a second connecting segment connected to each other, and the length of the first connecting segment is equal to the length of the second connecting segment. One end of the first connecting segment is connected to the first surface 110a, and the other end of the first connecting segment is connected to one end of the second connecting segment, which in turn is connected to the second surface 110b. The diameter of the first connecting segment gradually decreases from the end near the first surface 110a to the end near the second surface 110b, and the diameter of the second connecting segment gradually increases from the end near the first surface 110a to the end near the second surface 110b.

[0105] An ion implantation layer 112 is formed on the portion of the glass substrate 110 near the wall of the through-hole 110c, a portion of the glass substrate 110 on the side having the first surface 110a, and a portion of the glass substrate 110 on the side having the second surface 110b. The ion implantation layer 112 is composed of metal ions (e.g., titanium (Ti) and copper (Cu)) and glass, thus serving as an excellent bonding layer between the metal material and the glass substrate 110 in subsequent processes, enhancing the adhesion between the metal material and the glass substrate 110. The thickness of the ion implantation layer 112 is greater than 20 nm, thereby ensuring good adhesion to the glass substrate 110.

[0106] Furthermore, the connecting hole 110c is also filled with conductive pillars 130. The material forming the conductive pillars 130 includes, but is not limited to, at least one of copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), and titanium (Ti). The two end faces of the conductive pillars 130 in the thickness direction of the glass substrate 110 are flush with the first surface 110a and the second surface 110b, respectively. By setting the conductive pillars 130, the first surface 110a and the second surface 110b of the glass substrate 110 can be electrically connected.

[0107] In some embodiments, a metal wiring layer 150 and a dielectric layer 160 are respectively provided on the first surface 110a and the second surface 110b, and the metal wiring layer 150 and the dielectric layer 160 are disposed adjacent to each other. The metal wiring layer 150 contacts the conductive post 130 for leading the electrical signal of the conductive post 130 to the first surface 110a and the second surface 110b of the glass substrate 110. The metal wiring layer 150 may include signal patterns, power patterns, ground patterns, etc., and these patterns may each have various forms such as lines, planes, and pads. In some embodiments, the materials forming the metal wiring layer 150 include, but are not limited to, at least one of copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), and titanium (Ti).

[0108] The dielectric layer 160 serves as insulation to prevent short circuits and also protects the metal circuitry from scratches, oxidation, or environmental contamination and moisture. In some embodiments, the materials forming the dielectric layer 160 include, but are not limited to, thermosetting resins (such as epoxy resins), thermoplastic resins (such as polyimide), and photosensitive dielectrics (PIDs).

[0109] The glass encapsulation substrate 100 described above has an improved yield of subsequent processes because the walls of the through holes 110c are entirely formed by the ion implantation layer 112. This effectively prevents defects such as uneven filling, voids, or bubbles from occurring during the formation of the conductive pillars 130, thus achieving high-performance and high-reliability glass through-hole interconnects.

[0110] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0111] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A method for manufacturing a glass encapsulation substrate, characterized in that, The application relates to a glass packaging substrate manufacturing method. Providing a glass substrate with a first surface and a second surface oppositely arranged; Forming a through hole in the glass substrate, the through hole extending from the first surface to the second surface; Implanting metal ions into the glass substrate by using a high-energy ion implantation technology to form an ion implantation layer in the glass substrate; Forming a conductive column in the through hole; Part of the ion implantation layer circumferentially surrounds the through hole, part of the ion implantation layer is located on the side of the glass substrate with the first surface, and part of the ion implantation layer is located on the side of the glass substrate with the second surface.

2. The method of claim 1, wherein The hole wall of the through hole extends obliquely relative to the central axis of the through hole.

3. The method of claim 2, wherein the glass package panel is made by a process comprising: From one end close to the first surface to one end close to the second surface, the hole wall of the through hole first extends obliquely towards the direction close to the central axis and then extends obliquely towards the direction away from the central axis, and the hole diameter of the through hole first gradually decreases and then gradually increases.

4. The method of claim 1, wherein The through hole is formed by using a laser-induced wet etching technology.

5. The method of claim 1, wherein the glass package panel is made by a process comprising: The implantation energy of the metal ions is greater than 400 keV, and the implantation dose of the metal ions is greater than 10 15 ions / cm².

6. The method of claim 1, wherein Before the step of forming the conductive column in the through hole, the method further comprises: Covering protective films on the first surface and the second surface of the glass substrate respectively.

7. The method of claim 6, wherein the glass package panel is made by a process comprising: After the step of forming the conductive column in the through hole, the method further comprises: Removing the protective films; Forming metal wiring layers and dielectric layers on the first surface and the second surface respectively.

8. A glass package carrier board, characterized by, The glass packaging substrate is manufactured by using the glass packaging substrate manufacturing method according to any one of claims 1 to 7.

9. The glass package board of claim 8, wherein, The glass packaging substrate comprises a glass substrate with a first surface and a second surface oppositely arranged, and the glass substrate is provided with a through hole extending from the first surface to the second surface; The glass substrate has ion implantation layers on the part surrounding the through hole, the side of the glass substrate with the first surface, and the side of the glass substrate with the second surface respectively.

10. The glass package board of claim 9, wherein, The thickness of the ion implantation layer is greater than 20 nm.

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