Method and system for power semiconductor performance evaluation based on data analysis

CN121276281BActive Publication Date: 2026-06-23MEIPUSEN CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
MEIPUSEN CO LTD
Filing Date
2025-10-09
Publication Date
2026-06-23

AI Technical Summary

Technical Problem

Traditional power semiconductor performance evaluation methods cannot effectively simulate extreme transient events in real-world operating conditions, resulting in evaluation results that cannot predict long-term reliability in the field, lack of systematicity, and neglect of the statistical stability and potential degradation trends of parameter distributions.

Method used

By using a data analysis-based approach, the system receives performance evaluation instructions for power semiconductors, identifies the target failure stress, conducts multiple performance tests, generates basic and upgraded performance values, sets multiple extreme test combinations, uses interpolation algorithms to generate test conditions covering values ​​from standard to limit, performs extreme test operations, and combines multiple extreme performance values ​​and upgraded performance thresholds to confirm the performance status.

Benefits of technology

It improves the accuracy and efficiency of power semiconductor performance evaluation, enabling earlier detection of potential failure risks, ensuring reliability under extreme operating conditions, and avoiding misjudgments and potential performance degradation.

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Abstract

The application relates to the field of power electronics, and relates to a power semiconductor performance evaluation method and system based on data analysis, which comprises the following steps: receiving a performance evaluation instruction of a power semiconductor, confirming a target failure stress of the power semiconductor based on the performance evaluation instruction, performing performance testing on the power semiconductor when the target failure stress of the power semiconductor is a low failure stress, confirming a basic performance state of the power semiconductor by using a basic performance value and a preset basic performance threshold value, setting a plurality of extreme test combinations when an upgrade performance value is greater than the upgrade performance threshold value, performing extreme test operations on the power semiconductor by using the plurality of extreme test combinations, performing performance testing on the power semiconductor after the extreme test operations are completed, obtaining a plurality of extreme performance values, and confirming an extreme performance state of the power semiconductor by using the plurality of extreme performance values, the upgrade performance value and the upgrade performance threshold value. The application can improve the accuracy of power semiconductor performance evaluation.
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