A graphene-based quantum voltage chip operating at liquid helium temperatures
By optimizing the fabrication process of graphene Josephson junctions and the design of microwave antennas, stable operation of graphene quantum voltage chips at a liquid helium temperature of 4.2 K was achieved, solving the problem of signal distortion at low temperatures and demonstrating the potential for multi-parameter electrical quantum metrology.
Patent Information
- Application Number
- CN202511843372.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-09
- Publication Date
- 2026-02-24
- Estimated Expiration
- 2045-12-09
AI Technical Summary
Existing graphene-based Josephson junctions operate at relatively low temperatures, typically below 1.5K, leading to a heavy reliance on cooling equipment. Dissipation resistance causes distortion of the quantum voltage signal, making it difficult to operate stably at higher temperatures.
By employing an optimized Josephson junction fabrication process to improve the contact quality between the superconducting electrode and graphene, and by improving the microwave antenna design, a graphene quantum voltage chip was fabricated that can operate at a liquid helium temperature of 4.2 K and output a quantized resistance signal after a magnetic field is applied.
It achieves stable operation at a liquid helium temperature of 4.2 K, reducing dependence on dilution refrigerators, reducing system size and power consumption, while outputting a clear quantum voltage platform at high temperatures and having the potential for quantum Hall resistance output, supporting the integration of multi-parameter electrical quantum metering chips.
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Abstract
Description
Technical Field
[0001] This invention relates to the field of electrical quantum precision measurement technology, and in particular to a quantum voltage chip based on graphene operating at liquid helium temperatures. Background Technology
[0002] Metrology serves as a bridge between the science and technology of measurement and its applications, and between theory and experiment. The development of quantum theory and technology has spurred continuous quantum-based transformations in the International System of Units (SI). Electrical metrology, represented by voltage, resistance, and current, is a crucial component of metrology technology. These three electrical parameters can be directly correlated with fundamental physical constants through quantum effects in solid materials: quantum resistance corresponds to the quantum Hall effect, quantum voltage to the Josephson effect, and quantum current to the single-electron tunneling effect. The Josephson quantum voltage chip, based on the principle of dissipationless tunneling of superconducting Cooper pairs, can produce a quantized voltage output precisely corresponding to the microwave frequency f by applying microwave irradiation, with an output voltage value of V. n =nhf / 2e, where n is an integer, h is Planck's constant, e is the elementary charge, and f is the applied microwave frequency. Its basic configuration requires constructing a non-superconducting barrier layer between two superconductors to achieve the Cooper pair tunneling effect. The choice of material and the size of this barrier layer significantly affect the properties and performance of the resulting Josephson junction. Limited by the superconducting coherence length and the quantum tunneling characteristics, the required thickness of the barrier layer varies depending on the material used. With insulating materials, the barrier layer thickness is typically below 3 nm, while with metallic materials, it is usually controlled to below 100 nm. Once the superconducting coherence length is exceeded, the superconducting current in the Josephson junction decays exponentially with increasing thickness. Furthermore, the uniformity requirements of the barrier layer are extremely stringent. This makes the fabrication of Josephson junctions for quantum voltage very difficult, and the quality of domestic fabrication lags significantly behind that of foreign counterparts.
[0003] Using two-dimensional materials, represented by graphene, offers a new technological path. Graphene possesses atomic-level flatness, and its large mean free path of electrons allows for longer channel widths, reducing fabrication difficulty. Furthermore, graphene offers further unique advantages. Currently, quantum resistance measurement has been achieved based on graphene. If the Josephson effect and single-electron tunneling effect are further combined, it is hoped that multi-parameter quantum metrology chips with multiple electrical parameters can be integrated into a single system, creating multi-parameter quantum metrology chips that integrate quantum resistance, voltage, and current references.
[0004] However, the operating temperature of graphene-based Josephson junctions is generally low, usually less than 1.5K. At higher temperatures, there is often dissipation resistance and quantum voltage signal distortion, which makes them heavily dependent on cooling equipment, have harsh operating environment requirements, and consume a lot of power. Summary of the Invention
[0005] The purpose of this invention is to provide a graphene-based quantum voltage chip operating at liquid helium temperatures. This chip, with a graphene Josephson junction as its core, can output a quantized voltage at a corresponding frequency at a liquid helium temperature of 4.2 K through microwave radiation. Simultaneously, a magnetic field can be applied to output a quantized resistance, achieving the purpose of precise electrical quantum measurement. By optimizing the Josephson junction fabrication process, improving the contact quality between the superconducting electrode and graphene, and refining the microwave antenna design, the fabricated graphene quantum voltage chip can operate at 4.2 K (liquid helium temperature) and output a quantized resistance signal after applying a magnetic field. This realizes a novel quantum voltage chip, providing direction for further development of multi-parameter electrical quantum metrology chips.
[0006] To achieve the above objectives, the present invention provides a quantum voltage chip based on graphene that operates at liquid helium temperatures, comprising:
[0007] Si / SiO2 substrate;
[0008] Josephson junction units are fabricated on the Si / SiO2 substrate;
[0009] A microwave antenna for radiating microwave signals to the Josephson junction unit;
[0010] The Josephson junction unit includes a left superconducting electrode, a right superconducting electrode, and a graphene unit disposed between the left and right superconducting electrodes.
[0011] The graphene unit has a sandwich structure from bottom to top, comprising a lower hexagonal boron nitride insulating layer, a graphene layer, and an upper hexagonal boron nitride insulating layer.
[0012] Preferably, both the left and right superconducting electrodes are Ti / Nb composite superconducting electrodes, wherein the bottom layer in contact with the graphene unit is a Ti layer and the top layer is an Nb layer.
[0013] Preferably, the thickness of the Ti layer is 3-10 nm, and the thickness of the Nb layer is 50-100 nm.
[0014] Preferably, the thickness of the upper hexagonal boron nitride insulating layer and the lower hexagonal boron nitride insulating layer is 10-30 nm.
[0015] Preferably, the graphene layer is a single layer of graphene.
[0016] Preferably, the microwave antenna is integrated and fabricated on the Si / SiO2 substrate by electron beam exposure and magnetron sputtering processes, and is arranged adjacent to the Josephson junction unit for receiving external microwave source signals and irradiating the Josephson junction unit.
[0017] The method for fabricating the quantum voltage chip includes the following steps:
[0018] S1. On a Si / SiO2 substrate with a marker array, the upper hexagonal boron nitride insulating layer, the graphene layer and the lower hexagonal boron nitride insulating layer are extracted sequentially by mechanical exfoliation and dry transfer techniques, and graphene units are transferred to form graphene units.
[0019] S2. The graphene unit is etched into a predetermined shape using electron beam lithography and reactive ion etching techniques.
[0020] S3. Using electron beam lithography, the patterned areas of superconducting electrodes and microwave antennas are defined on the sample, and the upper hexagonal boron nitride insulating layer on top of the graphene unit within the patterned area is etched away.
[0021] S4. Ti and Nb metal layers are sequentially deposited in the patterned area using magnetron sputtering technology to form a Ti / Nb composite superconducting electrode and microwave antenna.
[0022] S5. Remove excess photoresist and metal through a stripping process to complete chip fabrication.
[0023] The method for the quantum voltage chip to output quantized electrical signals includes a quantized voltage output mode:
[0024] Place the chip in a liquid helium temperature environment;
[0025] A microwave signal of a specific frequency is radiated to the Josephson junction unit through the microwave antenna;
[0026] A scanning DC bias current is applied between the left and right superconducting electrodes;
[0027] By measuring the voltage difference across the left and right superconducting electrodes, a quantized voltage plateau that precisely corresponds to the microwave frequency is obtained.
[0028] The method for the quantum voltage chip to output quantized electrical signals also includes a quantized resistance output mode:
[0029] Turn off microwave signals;
[0030] A fixed DC bias current is applied between the left and right superconducting electrodes;
[0031] Apply and scan a magnetic field perpendicular to the plane of the device;
[0032] The voltage difference across the left and right superconducting electrodes is measured to obtain the quantized Hall resistance signal.
[0033] Preferably, the liquid helium temperature environment is 3.5K-4.5K.
[0034] Preferably, the stable temperature range of the chip when operating in a liquid helium environment is 3.5K-4.5K, and when a microwave signal with a frequency of 5-10GHz is applied, the output voltage value of the quantized voltage platform is close to the theoretical value. The deviation is less than 1%, of which It is an integer. is Planck's constant. The fundamental charge, It is a microwave frequency.
[0035] Therefore, the quantum voltage chip based on graphene operating at liquid helium temperature using the above structure of the present invention has the following beneficial effects:
[0036] (1) High operating temperature: The stable operating temperature of graphene Josephson junction is increased from below 1.5K in the traditional way to about 4.2K liquid helium temperature, which reduces the dependence on expensive and complex dilution refrigerators and greatly reduces the size, power consumption and cost of the system.
[0037] (2) Excellent performance: At a temperature of 4.2 K, when a microwave signal of 5-10 GHz is applied, it can generate a clear and flat quantized voltage plateau, and the output voltage value is consistent with the theoretical formula. Highly compatible.
[0038] (3) Great potential for functional integration: The same device can also output a quantized Hall resistance after a magnetic field is applied, demonstrating the great potential to realize multi-parameter (voltage, resistance) quantum measurement on a single chip.
[0039] (4) High processing feasibility: The “hBN-G-hBN” structure and Ti / Nb electrode process adopted are compatible with the current two-dimensional material micro-nano processing technology, with good repeatability and reliability, which is conducive to industrial application.
[0040] The technical solution of the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description
[0041] Figure 1 This is a schematic diagram of the Josephson junction unit structure of the quantum voltage chip provided in the embodiment of the present invention;
[0042] Figure 2 These are optical microscope images of the complete quantum voltage chip provided in the embodiments of the present invention;
[0043] Figure 3 This is a resistance-temperature (RT) curve of the device provided in the embodiment of the present invention, proving that it enters the superconducting state at about 5K;
[0044] Figure 4This is a graph showing the current-voltage (IV) characteristic curves measured at different microwave frequencies at a liquid helium temperature of 4K according to an embodiment of the present invention, demonstrating the quantum voltage platform;
[0045] Figure 5 This is a comparison chart of the actual measured values and theoretical expected values of the quantum voltage platform in this embodiment of the invention;
[0046] Figure 6 This is a quantized Hall resistance output diagram measured after applying a magnetic field in an embodiment of the present invention;
[0047] Figure 7 This is a schematic diagram of the quantum voltage output principle of the present invention;
[0048] Figure 8 This is a schematic diagram of the chip testing structure of the present invention;
[0049] Figure 9 This is a schematic diagram of the chip test circuit of the present invention. Figure 1 ;
[0050] Figure 10 This is a schematic diagram of the chip test circuit of the present invention. Figure 2 . Detailed Implementation
[0051] The technical solution of the present invention will be further described below with reference to the accompanying drawings and embodiments.
[0052] Unless otherwise defined, the technical or scientific terms used in this invention shall have the ordinary meaning understood by one of ordinary skill in the art to which this invention pertains. The terms "first," "second," and similar terms used in this invention do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as "comprising" or "including" mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. Terms such as "connected" or "linked" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. Terms such as "upper," "lower," "left," and "right" are used only to indicate relative positional relationships; when the absolute position of the described object changes, the relative positional relationship may also change accordingly.
[0053] Example
[0054] like Figure 1As shown in the schematic diagram of the Josephson junction unit structure, this invention provides a quantum voltage chip based on graphene that operates at liquid helium temperatures. The structure, as shown in the diagram, comprises: a Si / SiO2 substrate, a Josephson junction unit, and a microwave antenna. The Josephson junction unit, fabricated on the Si / SiO2 substrate, sequentially includes a left Ti / Nb superconducting electrode, a graphene unit, and a right Ti / Nb superconducting electrode. The graphene unit, from bottom to top, consists of a lower hexagonal boron nitride insulating protective layer, a graphene layer, and an upper hexagonal boron nitride insulating protective layer. Current is introduced through the right superconducting electrode as the source, passes through the middle graphene layer, and is finally discharged through the left superconducting electrode as the drain. The quantum voltage chip outputs quantized voltage and resistance signals at 4.2 K. To output a quantum voltage signal, the graphene carrier concentration is first increased by applying a gate voltage on the Si / SiO2 substrate, thereby increasing the critical current of the Josephson junction. A microwave antenna is then connected to a microwave source to radiate a microwave signal into the Josephson junction. A DC bias current is then applied with the right Ti / Nb superconducting electrode as the source and the left Ti / Nb superconducting electrode as the drain to obtain the quantized voltage signal.
[0055] This invention also provides a specific method for manufacturing the device:
[0056] Prepare four clean Si / SiO2 substrates, with SiO2 layers no less than 285 nm. Select one of them and cut it into... A square is formed by electron beam exposure and electron beam evaporation of metal to create a Mark array.
[0057] A single layer of graphene and two thin layers of hexagonal boron nitride were dissociated from the remaining three clean Si / SiO2 substrates by mechanical exfoliation. The thickness of the thin layers of hexagonal boron nitride was about 20 nm.
[0058] A "glass slide / PDMS / PC" structure, called a "tape frame," is prepared for lifting and lowering hexagonal boron nitride or graphene. Using the pick-up transfer method, one thin layer of hexagonal boron nitride, one monolayer of graphene, and another thin layer of hexagonal boron nitride are sequentially lifted and heated to release them onto a Si / SiO2 substrate with a prepared Mark array, forming a sandwich-like structure, namely "BN / G / BN".
[0059] The residual resist on the obtained sample was removed using chloroform, and then PMMA A6 photoresist was uniformly applied. The resulting "BN / G / BN" was etched into a width of approximately [width missing] using electron beam lithography and RIE etching. The long strip was then washed with acetone to remove PMMAA6.
[0060] Then, PMMA A6 is uniformly applied, and the Josephson junction superconducting electrode and microwave antenna are located on the sample by electron beam lithography. Then, RIE etching is used to remove the top hexagonal boron nitride layer in the electrode contact area of the "BN / G / BN" structure.
[0061] A superconducting metal electrode was formed by depositing 5 nm of Ti and 70 nm of Nb using magnetron sputtering. The Ti layer was used to achieve good contact with graphene, and the Nb layer was used to improve superconductivity at higher temperatures.
[0062] Finally, using a lift-off method, acetone was used to remove PMMA A6 and strip away excess metal, ultimately yielding the following result: Figure 2 The optical microscope image of the complete quantum voltage chip shows a graphene quantum voltage chip. The chip is on the Si / SiO2 substrate mentioned above. The black frame area in the middle is the Josephson junction unit, and the leftmost electrode is the microwave antenna used to apply microwave irradiation. The microwave antenna introduces radio frequency signals into the sample through capacitive coupling.
[0063] Figure 7 The diagram illustrates the principle of quantum voltage output. By irradiating a microwave signal onto a Josephson junction, a quantized voltage signal can be obtained across the junction.
[0064] Figure 8 The schematic diagram of the chip test structure shows the working environment of this chip and the required external sources and instruments. The chip needs to be placed in a cryostat to work at a low temperature. At the same time, a microwave source is used to irradiate the sample with microwaves, and a bias DC source is used to make it reach the quantum voltage platform. Finally, a nanovoltmeter is used to read the voltage signal generated by the chip. Figure 9 and Figure 10 This is a schematic diagram of the circuit structure on the chip. A voltage source is used to apply a gate voltage through a Si / SiO2 substrate to adjust the graphene carrier concentration. A bias current source allows DC current to flow from one side of the Josephson junction and the other side. A microwave source is used to irradiate the side of the Josephson junction through a microwave antenna, and a nanovoltmeter is used to read the voltage difference across the Josephson junction. Figure 9 The microwave signal has no DC path to the Josephson junction unit; it is capacitively coupled. The specific test procedure is as follows:
[0065] The obtained graphene quantum voltage chip was placed in a cryostat and its temperature was lowered to the operating temperature of about 4.2 K.
[0066] The Josephson junction properties are optimized by applying a gate voltage through a Si / SiO2 substrate using a voltage source to increase the carrier concentration in the graphene.
[0067] Connect the microwave source to the microwave antenna on the chip via a coaxial cable and bonding wire, and set the microwave frequency and power to radiate microwave signals to the Josephson junction.
[0068] A current source is connected to a bonded wire with one side of the Josephson junction as the source and the other side as the drain. The DC bias current is gradually increased, and a voltmeter is used to measure the voltage difference between the two sides through the bonded wire to obtain the quantum voltage signal.
[0069] To obtain the quantum resistance output, the microwave source must be turned off, while the applied current is kept constant and the magnetic field is increased. The quantum resistance signal can then be measured on both sides of the junction.
[0070] The graphene Josephson junction-based quantum voltage chip of the present invention can output quantized resistance by applying a magnetic field, compared with the traditional Josephson junction quantum voltage system. Compared with previous graphene Josephson junction devices, by improving the contact quality between the superconducting electrode and graphene and improving the microwave antenna design, the prepared graphene quantum voltage chip can operate at 4.2 K, i.e., the liquid helium temperature. Figure 3 The figure shows the RT (resistance-temperature) curve of this chip. Without external magnetic field and microwave irradiation, when a gate voltage of +30 V and a DC bias current of 1 μA are applied, it can be seen that this chip has entered the fully superconducting state at around 5 K, which provides the basis for its quantum voltage output at liquid helium temperature. Figure 4 The figure shows the IV (current-voltage) characteristic curves obtained under microwave irradiation at frequencies of 5, 6, 7, 8, 9, and 10 GHz at 4.2 K, clearly demonstrating the characteristics of its quantum voltage plateau. The specific testing method was as follows: the temperature was fixed at the liquid helium temperature of 4.2 K, a gate voltage of +30 V (applied from the silicon substrate) was applied, and the bias current was scanned sequentially at six fixed frequency values from 5 GHz to 10 GHz in 1 GHz steps. The resulting current-voltage characteristic curves (as shown in the figure) are obtained. Figure 4 As shown, among them I (where V is the bias current and V is the output voltage) accurately represents the quantized voltage plateau, and the obtained plateau voltage value matches the expected value from the formula. The expected voltage value at the first Shapiro step when n=1, which is commonly used as a standard for quantum voltage, is consistent. It can be confirmed that it corresponds to the voltage value of the first voltage plateau measured in the experiment at each of the six frequencies, such as... Figure 5 The experimental and calculated frequency-voltage comparison graph is shown below. The straight lines in the graph represent the values calculated using the formula. The plotted frequency-voltage curve shows that the solid squares represent the voltage values measured at the chip's first voltage plateau at the corresponding frequencies, demonstrating good agreement with theoretical expectations. Furthermore, the chip can output a quantized resistance signal after applying a magnetic field. Figure 6The magnetic field-resistance curve was obtained by turning off microwave irradiation, adjusting the grid voltage to regulate the graphene carrier concentration, applying a fixed DC bias current of 1 μA, and then setting the magnetic field to +12 T. Scanning from +12 T to -12 T, it was observed that the resistance value reached a plateau when the absolute value of the magnetic field |H| > 9 T, indicating that the graphene entered the quantum Hall region, thus achieving quantized resistance signal output. These results demonstrate that we have realized a novel quantum voltage chip and provide direction for further realization of multi-parameter electrical quantum metrology chips.
[0071] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit them. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can still be made to the technical solutions of the present invention, and these modifications or equivalent substitutions cannot cause the modified technical solutions to deviate from the spirit and scope of the technical solutions of the present invention.
Claims
1. A graphene-based liquid helium temperature quantum voltage chip, characterized in that, include: Si / SiO2 substrate; Josephson junction units are fabricated on the Si / SiO2 substrate; A microwave antenna for radiating microwave signals to the Josephson junction unit; The Josephson junction unit includes a left superconducting electrode, a right superconducting electrode, and a graphene unit disposed between the left and right superconducting electrodes. The graphene unit has a sandwich structure from bottom to top, comprising a lower hexagonal boron nitride insulating layer, a graphene layer, and an upper hexagonal boron nitride insulating layer in sequence. Both the left and right superconducting electrodes are Ti / Nb composite superconducting electrodes, wherein the bottom layer in contact with the graphene unit is a Ti layer and the top layer is an Nb layer; The microwave antenna is integrated and fabricated on the Si / SiO2 substrate by electron beam exposure and magnetron sputtering processes, and is arranged adjacent to the Josephson junction unit. It is used to receive external microwave source signals and irradiate the Josephson junction unit. The chip operates stably in a liquid helium environment within a temperature range of 3.5K-4.5K, and when a microwave signal with a frequency of 5-10GHz is applied, the output voltage value of the quantized voltage platform is close to the theoretical value. The deviation is less than 1%, of which It is an integer. is Planck's constant. The fundamental charge, It is a microwave frequency.
2. The quantum voltage chip according to claim 1, characterized in that, The thickness of the Ti layer is 3-10 nm, and the thickness of the Nb layer is 50-100 nm.
3. The quantum voltage chip according to claim 1, characterized in that, The thickness of the upper hexagonal boron nitride insulating layer and the lower hexagonal boron nitride insulating layer is 10-30 nm.
4. The quantum voltage chip according to claim 1, characterized in that, The graphene layer is a single layer of graphene.
5. A method for fabricating a quantum voltage chip according to any one of claims 1-4, characterized in that, Includes the following steps: S1. On a Si / SiO2 substrate with a marker array, the upper hexagonal boron nitride insulating layer, the graphene layer and the lower hexagonal boron nitride insulating layer are extracted sequentially by mechanical exfoliation and dry transfer techniques, and graphene units are transferred to form graphene units. S2. The graphene unit is etched into a predetermined shape using electron beam lithography and reactive ion etching techniques. S3. Using electron beam lithography, the patterned areas of superconducting electrodes and microwave antennas are defined on the sample, and the upper hexagonal boron nitride insulating layer on top of the graphene unit within the patterned area is etched away. S4. Ti and Nb metal layers are sequentially deposited in the patterned area using magnetron sputtering technology to form a Ti / Nb composite superconducting electrode and microwave antenna. S5. Remove excess photoresist and metal through a stripping process to complete chip fabrication.
6. A method for outputting quantized electrical signals using any one of the quantum voltage chips described in claims 1-4, characterized in that, Including quantized voltage output mode: Place the chip in a liquid helium temperature environment; A microwave signal of a specific frequency is radiated to the Josephson junction unit through the microwave antenna; A scanning DC bias current is applied between the left and right superconducting electrodes; By measuring the voltage difference across the left and right superconducting electrodes, a quantized voltage plateau that precisely corresponds to the microwave frequency is obtained.
7. The method according to claim 6, characterized in that, It also includes a quantized resistance output mode: Turn off microwave signals; A fixed DC bias current is applied between the left and right superconducting electrodes; Apply and scan a magnetic field perpendicular to the plane of the device; The voltage difference across the left and right superconducting electrodes is measured to obtain the quantized Hall resistance signal.
Citation Information
Patent Citations
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