ESD (Electro-Static Discharge) anti-interference method and device for display equipment
By detecting abnormal DE signals and replacing them with normal data from the previous row, combined with an odd-even row caching mechanism, the problem of abnormal screen display under ESD interference was solved, achieving stability and high-efficiency anti-interference capability of the display device.
Patent Information
- Application Number
- CN202511138489.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-08-14
- Publication Date
- 2026-01-09
AI Technical Summary
Existing technologies cannot effectively prevent display devices from displaying abnormalities such as distorted or black screens under ESD interference, especially in high-speed serial interfaces, where abnormal data interruption can lead to display chip resets or system crashes.
By detecting abnormal DE signals and generating an abnormal flag signal, the data writing of the current abnormal row is skipped, and the previous row of normal data is repeatedly output using the caching module. Combined with the odd-even row alternating caching mechanism, the continuity and stability of the display are ensured.
It significantly improves the anti-interference capability of display devices, avoids screen abnormalities, ensures display stability and user experience, and is suitable for high-reliability scenarios such as automotive, medical and industrial control.
Smart Images

Figure CN121306019A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of display technology, and in particular to an ESD anti-interference method and apparatus for display devices. Background Technology
[0002] In fields such as LCD and touch displays, display devices typically receive image data via high-speed serial interfaces. However, these interfaces often experience data anomalies during electrostatic discharge (ESD) testing due to external electrostatic interference (such as human contact or device friction). This manifests as: abnormal interruption of the horizontal data enable (DE) signal; garbled image data, screen distortion, or a black screen; and in severe cases, it can lead to display chip reset or system crash. Although existing technologies improve hardware anti-interference capabilities by adding filter capacitors and optimizing grounding design, these measures cannot completely prevent high-speed data from being damaged by ESD interference during transmission.
[0003] Interfaces of display devices such as LCD screens or touch screens, including EDP / DP / VBYONE / LVDS / HDMI, are susceptible to ESD (Electrostatic Discharge) in the following two situations. ① Friction between the human body or equipment may generate thousands of volts of static electricity, which can enter the electronic device through the interface and easily cause display abnormalities, such as screen distortion or black screen.
[0004] ② The stability and reliability of the display need to be tested to see if it conforms to international standards (IEC 61000-4-2) to prove whether the circuit has the ability to effectively release and resist static electricity.
[0005] Disadvantages of existing technology: To address the various issues associated with ESD, hardware and structural optimizations are typically implemented, such as adding filter capacitors to absorb high-frequency pulses, using low-impedance grounding, or selecting high-interference-resistance drivers. These measures provide protection for the hardware. However, the input data at the high-speed interface front end is inevitably damaged by ESD or lost due to data enable (DE), leading to a black screen or IP reset, or the distorted data being directly sent to the screen for display. Summary of the Invention
[0006] (a) Technical problems to be solved This invention provides an ESD anti-interference method and apparatus for display devices, which aims to effectively identify abnormal DE signals and automatically replace them with normal data from the previous line, thereby avoiding abnormal screen display and improving the anti-interference capability and user experience of display devices.
[0007] (II) Technical Solution To achieve the above objectives, the present invention proposes the following technical solution: In a first aspect, the present invention provides an ESD anti-interference method for a display device, comprising: It receives image data input through a high-speed interface and parses out the valid signal DE and pixel data; The DE signal is detected to be abnormally interrupted within the effective area of the image. If the DE signal is continuously low for more than a threshold within the preset effective length hactive of the image, an abnormal flag signal de_exception is generated. In response to the abnormal flag signal, the data writing operation of the current abnormal line is skipped, and the buffer module linebuffer is controlled to repeatedly output the previous line of normal image data to the display end to replace the abnormal line data. The cache module implements data caching through an alternating read / write mechanism for odd and even rows, and maintains the continuity of read / write timing when handling abnormal rows.
[0008] Preferably, the high-speed interface includes any one of EDP, DP, VBYONE, LVDS, MIPI, HDMI, or VGA.
[0009] Preferably, the anomaly detection of the DE signal is based on image time-series parameters hactive, vactive, htotal, and blanking, specifically including: When a high level of DE is detected in the blanking region, it is determined to be the start of the valid region; if the duration of the high level of the DE signal in the valid region is less than the number of clock cycles of hactive, the abnormal flag signal is triggered.
[0010] Preferably, the caching module includes: a first caching unit (linebuffer_odd) and a second caching unit (linebuffer_even), used to cache odd-numbered rows and even-numbered rows of data, respectively; and a control unit, used to skip write operations when there are abnormal rows and maintain the repeated output of the previous row of data.
[0011] Preferably, the control unit achieves repeated output by prohibiting the writing of the current abnormal data in the cache unit corresponding to the abnormal line, while reading the previous line of data from another cache unit and outputting it to the display end.
[0012] The present invention also provides an ESD anti-interference device for a display device, comprising: The interface receiving module is used to receive image data from the high-speed interface and parse out the DE signal and pixel data. An anomaly detection module, connected to the interface receiving module, is used to detect abnormal interruptions of the DE signal within the effective area of the image and generate an anomaly flag signal. The caching module includes at least two row cache units for alternately caching odd and even rows of data. The control module, connected to the anomaly detection module and the cache module, is used to control the cache module to repeatedly output the previous line of normal data to replace the abnormal line data when the anomaly flag signal is triggered.
[0013] The anomaly detection module includes: The DE level timer is used to count the duration of the low level of the DE signal within the valid region. A comparator is used to compare the duration with a preset threshold and generate an anomaly flag signal when the threshold is exceeded.
[0014] The caching module is further used for: Timing differences in synchronizing multi-channel (lane) data; When handling abnormal rows, write operations are disabled to prevent abnormal data from being passed to subsequent modules.
[0015] The control module implements the following operations through a state machine: During normal operations, read and write operations of the parity cache units are alternately controlled; When an abnormal row occurs, the previous row of data is maintained according to the behavior of de_exception. If repeated output is required, the number of repeated rows can be controlled by the configuration value.
[0016] In a third aspect, the present invention also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps of the method described in any one of the first aspects.
[0017] Compared with the prior art, the beneficial effects of the present invention are: 1) Significantly improved anti-interference capability: Under ESD interference, there is no screen distortion, black screen or flickering phenomenon; 2) Strong compatibility: Applicable to all mainstream high-speed display interfaces; 3) Low resource consumption: Efficient data replacement is achieved through a row caching mechanism, without the need for complex algorithms; Excellent user experience: Ensures display stability, making it particularly suitable for high-reliability scenarios (such as automotive, medical, and industrial control). Attached Figure Description
[0018] Figure 1 The method flow provided by the present invention Figure 1 ; Figure 2 The timing diagram for alternating read and write operations of the linebuffer provided by this invention. Figure 3 The method flow provided for the second embodiment of the present invention Figure 2 Figure 4 Timing diagram for alternating read / write of linebuffer in odd and even rows provided in the second embodiment of the present invention Detailed Implementation
[0019] In the following description, specific details such as particular system architectures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of this application. However, those skilled in the art will understand that this application may also be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, apparatuses, circuits, and methods have been omitted so as not to obscure the description of this application with unnecessary detail.
[0020] This embodiment provides an ESD anti-interference display method, including: Step S1: Receive image data through a high-speed interface and parse out the valid signal DE and pixel data; Step S2: Monitor the level of the DE signal in the effective area (hactive) of the image in real time. If the DE signal is abnormally low in the effective area and the duration exceeds the set threshold, an abnormality flag signal (de_exception) is generated. Step S3: Respond to the exception flag signal, skip the data writing operation of the current exception row, and control the cache module to repeatedly output the previous row of normal image data to replace the exception row data; Step S4: Data caching and synchronization are achieved through the odd-even alternating caching mechanism (linebuffer_odd / linebuffer_even) to ensure display continuity.
[0021] Specifically, an ESD anti-interference display device includes: Interface receiving module: used to receive high-speed interface data and parse DE signals and pixel data; Anomaly detection module: used to detect abnormal interruptions of the DE signal within the valid area and generate anomaly flag signals; Cache module: includes at least two line buffer units (linebuffer_odd / linebuffer_even) for alternately caching odd and even rows of data; Control module: Used to control the read and write operations of the cache module according to the abnormal flag signal, so as to replace and repeat the output of abnormal row data.
[0022] Example 1 like Figure 1 As shown, This embodiment is applicable to any high-speed interface of image display type, such as EDP / DP / VBYONE / LVDS / MIPI / HDMI / VGA, etc., as the receiving end (RX), which receives image data in line-by-line format. After the RX end performs alignment, decoding, unpacking and other operations on the received data, it generates the data and de signals of the effective area of the image.
[0023] When ESD occurs, both the de and data outputs of the RX will be interfered with, resulting in de interruption and data corruption. At this time, the DE DETECTION and FILLUP module will detect the abnormal signal.
[0024] Specifically, the behavior of image deduplication (DE) is determined by using known properties of the effective image region length (hactive), effective image region width (vactive), overall image length (htotal), and the blanking region. If DE is not triggered within a certain time, it can be assumed that the image is currently transmitting within the blanking region. When DE is triggered, it indicates that the image has entered the effective region. Under normal circumstances, `de` will be high for the entire length of `hactive`. If it goes low within this length, it indicates an exception. The `de_exception` signal counts the instances of `de` that are low during exceptions. If the set threshold (which is configurable) is reached, this signal is triggered. The trigger time is in the blanking area of the line containing the exception. The purpose is for the subsequent CONTROL module to control the reading and writing of the linebuffer; de_fillup will be pulled high when de is pulled low in the valid area to prevent abnormal signals from being passed to subsequent modules.
[0025] The linebuffer module primarily receives data signals from multiple lanes input from the preceding module. `linebuffer_odd` and `linebuffer_eve` buffer data from odd and even rows respectively, alternating between reading and writing. `CONTROL` controls the order of this alternation. Figure 2 The diagram shows the read / write order of linebuffer_odd and linebuffer_eve when sending 7 lines of data. W (Write) represents writing, R (Read) represents reading, EXCEPTION represents the de_exception signal, linebuffer_normal represents the case where no exception occurred, and linebuffer_exception represents the case where an exception occurred.
[0026] First, when writing the first line, linebuffer_odd is written, and no reading is performed at this time; for the second line, linebuffer_eve is written, and linebuffer_odd is read, and so on, alternating between the two. When an exception occurs in line 4, no write operation is performed on its linebuffer. The transformation was performed on line 5, still reading data from linebuffer_odd, i.e., the data from the previous line, while linebuffer_eve also wrote normal lines, thus realizing the transition and transformation for handling abnormal lines.
[0027] It is worth mentioning that: In this embodiment, 1. Correct any abnormal values to normal values.
[0028] The transmission of abnormal de will affect subsequent modules, such as algorithm modules after RX. It usually causes data loss or function interruption during data processing, and is easily misjudged as image boundary, especially affecting functions such as convolution and linear interpolation. Normal de, on the other hand, ensures the continuity of data processing, and the processed data is transmitted to the TX end, thus avoiding such abnormalities on the TX end.
[0029] 2. When an exception (de) is triggered, a de_exception control signal is generated.
[0030] The timing and image space at which the de_exception emits an exception are uncertain. de_exception can accurately inform subsequent modules which line of de has an exception, making it easier to handle the location of the exception.
[0031] 3. Line buffer caching.
[0032] The linebuffer serves three main purposes in this scheme: ① Under certain circumstances, although the input source is transmitted line by line and pixel by pixel, when transmitting a line, there may be a situation where the line is divided into multiple areas and multiple areas are transmitted pixel by pixel at the same time. Therefore, in order to transmit each line of the image from left to right in a normal manner, a line buffer is needed. ② The transmission speeds between different lanes may differ too much. In order to transmit synchronously to the sending end (TX), buffering is also required before synchronous transmission. ③ When a `de_exception` occurs, the buffering order of the two line buffers can be adjusted, preventing the response to and writing of abnormal data, thus implementing the repeat function and avoiding the transmission of the exception to subsequent modules. The repeat method maximizes the guarantee of image display effect and transmission quality when an exception occurs.
[0033] Therefore, the linebuffer also functions as a line buffer, synchronization, and exception handling function.
[0034] This reduces the read / write control of the line buffer for abnormal DE signals. After DE FILLUP, DE is always in a normal state. This solution is simple to implement and consumes few resources.
[0035] Example 2 like Figure 3 As shown, based on Example 1, a DE FILLUP module is added before the line buffer. The data and de data parsed by the RX end are processed solely through the DE FILLUP module, and the reading and writing of the line buffer are unaffected. This reduces the read and write control of the line buffer due to abnormal de signals. After DE FILLUP, the de signal is always in a normal state. This solution is simple to implement and consumes few resources.
[0036] Example 3 like Figure 4 As shown, a DE FILLUP module is added after the line buffer. The line buffer only caches the valid DE area. Abnormal DE and data will no longer be cached and retained. Since the DE is padded after the line buffer, in the event of an exception, blanking data will be added at the end of the line for display.
[0037] During the linebuffer stage, only normal and valid de and data are cached. In this case, abnormal data and de are discarded. Discarding abnormal data means that the normal data in the corresponding row will be spliced and displayed. When the de is filled in later, the discarded image will also be filled in at the end of the row. However, the filling is blanking data, which is an abnormal transfer, to ensure that the display effect is normal.
[0038] It should be noted that the information interaction and execution process between the above-mentioned devices / units are based on the same concept as the method embodiments of this application. For details on their specific functions and technical effects, please refer to the method embodiments section, and they will not be repeated here.
[0039] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional units and modules is merely an example. In practical applications, the above functions can be assigned to different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiments can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit. Furthermore, the specific names of the functional units and modules are only for easy differentiation and are not intended to limit the scope of protection of this application. The specific working process of the units and modules in the above system can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.
[0040] This application also provides a network device, which includes: at least one processor, a memory, and a computer program stored in the memory and executable on the at least one processor, wherein the processor executes the computer program to implement the steps in any of the above method embodiments.
[0041] This application provides a computer program product that, when run on a mobile terminal, enables the mobile terminal to implement the steps described in the above-described method embodiments.
[0042] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium, and when executed by a processor, it can implement the steps of the various method embodiments described above. The computer program includes computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. The computer-readable medium can include at least: any entity or device capable of carrying computer program code to a photographic device / terminal device, a recording medium, a computer memory, a read-only memory (ROM), a random access memory (RAM), an electrical carrier signal, a telecommunication signal, and a software distribution medium. Examples include USB flash drives, portable hard drives, magnetic disks, or optical disks. In some jurisdictions, according to legislation and patent practice, computer-readable media cannot be electrical carrier signals or telecommunication signals.
[0043] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.
[0044] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.
[0045] In the embodiments provided in this application, it should be understood that the disclosed apparatus / network devices and methods can be implemented in other ways. For example, the apparatus / network device embodiments described above are merely illustrative. For instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.
[0046] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.
[0047] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.
Claims
1. An ESD anti-interference method for display devices, characterized in that, include: It receives image data input through a high-speed interface and parses out the valid signal DE and pixel data; The system detects whether the DE signal is abnormally interrupted within the effective area of the image. If the DE signal remains low for more than a threshold within the preset effective length hactive of the image, an abnormal flag signal de_exception is generated. In response to the abnormal flag signal, the data writing operation of the current abnormal line is skipped, and the buffer module linebuffer is controlled to repeatedly output the previous line of normal image data to the display end to replace the abnormal line data. The buffer module implements data caching through an alternating read and write mechanism for odd and even lines, and maintains the continuity of the read and write sequence during abnormal line processing.
2. The ESD anti-interference method for a display device according to claim 1, characterized in that, The high-speed interface includes any one of EDP, DP, VBYONE, LVDS, MIPI, HDMI, or VGA.
3. The ESD anti-interference method for a display device according to claim 1, characterized in that, The anomaly detection of the DE signal is based on the image timing parameters hactive, vactive, htotal, and blanking. Specifically, it includes: when a high level of DE is detected in the blanking region, it is determined to be the start of the valid region; if the duration of the high level of the DE signal in the valid region is less than the number of clock cycles of hactive, the anomaly flag signal is triggered.
4. The ESD anti-interference method for a display device according to claim 1, characterized in that, The caching module includes: a first caching unit linebuffer_odd and a second caching unit linebuffer_even, which are used to cache odd-numbered rows and even-numbered rows of data, respectively. The control unit is used to skip write operations when there are abnormal rows and maintain the repeated output of the previous row of data.
5. The ESD anti-interference method for a display device according to claim 4, characterized in that, The control unit achieves repeated output by prohibiting the writing of the current abnormal data in the cache unit corresponding to the abnormal line, while reading the previous line of data from another cache unit and outputting it to the display end.
6. An ESD anti-interference device for a display device, characterized in that, include: The interface receiving module is used to receive image data from the high-speed interface and parse out the DE signal and pixel data. An anomaly detection module, connected to the interface receiving module, is used to detect abnormal interruptions of the DE signal within the effective area of the image and generate an anomaly flag signal. The caching module includes at least two row caching units for alternately caching odd and even rows of data; the control module is connected to the anomaly detection module and the caching module for controlling the caching module to repeatedly output the previous row of normal data to replace the abnormal row data when the anomaly flag signal is triggered.
7. The apparatus according to claim 6, characterized in that, The anomaly detection module includes: a DE level timer for counting the duration of the low level of the DE signal within the valid region; and a comparator for comparing the duration with a preset threshold and generating an anomaly flag signal when the threshold is exceeded.
8. The apparatus according to claim 6, characterized in that, The cache module is further used to: synchronize timing differences of multi-channel lane data; and prevent abnormal data from being passed to subsequent modules by disabling write operations during abnormal row processing.
9. The apparatus according to claim 6, characterized in that, The control module implements the following operations through a state machine: during normal rows, it alternately controls the reading and writing of the parity buffer unit; during abnormal rows, it maintains the output of the previous row of data according to the behavior of de_exception; if repeated output is required, the number of repeated output rows can be controlled by a configuration value.
10. A computer-readable storage medium storing a computer program, characterized in that, When the program is executed by a processor, it implements the steps of the method according to any one of claims 1-5.
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