Capacitive microphone, semiconductor device and method of manufacturing the same

Abstract

The application provides a condenser microphone, a semiconductor device and a manufacturing method thereof, and is applied to the technical field of semiconductors.In the application, a groove isolation structure is arranged in a substrate under a vibrating diaphragm structure, a high insulation resistance is additionally arranged at the weakest position of the substrate under the vibrating diaphragm structure, then a possible leakage current path between the vibrating diaphragm structure and the substrate is avoided by physical isolation, the leakage resistance between the vibrating diaphragm structure and the substrate is further increased, the parasitic capacitance between the vibrating diaphragm structure and the substrate is reduced, and the problems of the reduced leakage resistance between the vibrating diaphragm structure and the substrate and the reduced signal-to-noise ratio caused by the loss of the first opening with a rounded corner in the first sacrificial layer to the isolation layer are solved.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a condenser microphone, a semiconductor device, and a method for manufacturing the same. Background Technology

[0002] Condenser microphones (MEMS microphones) primarily utilize the principle of capacitance, consisting of a diaphragm and a backplate. A gap of a few micrometers exists between the diaphragm and the backplate, forming a capacitor structure. The highly sensitive diaphragm senses external audio pressure signals and then changes the distance between the diaphragm and the backplate.

[0003] Currently, in order to better control the side-cab distance of the sacrificial layer release, a stop layer for the sacrificial layer release is generally set. For example, silicon nitride is used as an insulating isolation layer on the side wall of the side-cab cutoff position of the first sacrificial layer under the microphone diaphragm. In addition, for structural requirements, the first sacrificial layer is usually etched into a structure with a rounded top through an etching process, which results in a large loss of the bottom insulating isolation layer. If the thickness of the insulating isolation layer is insufficient, it will lead to insufficient leakage resistance between the diaphragm and the substrate and a reduced signal-to-noise ratio. Summary of the Invention

[0004] One objective of this invention is to provide a capacitive microphone, a semiconductor device, and a method for manufacturing the same, so as to ensure that the thickness of the isolation layer meets the design requirements and to improve the leakage resistance and signal-to-noise ratio between the diaphragm structure and the substrate.

[0005] In a first aspect, in order to solve the above-mentioned technical problems, the present invention provides a method for manufacturing a semiconductor device, comprising: providing a substrate.

[0006] Multiple spaced trench isolation structures are formed within the substrate.

[0007] An isolation layer and a first sacrificial layer are formed, stacked sequentially from bottom to top on the top surface of the substrate.

[0008] A portion of the first sacrificial layer is removed to form a first opening within the first sacrificial layer. The apex of the first opening is rounded. The first opening is located above the trench isolation structure, and the outer edge of the first opening in the horizontal direction is located within the outer edge of the trench isolation structure in the horizontal direction.

[0009] A diaphragm structure is formed that conformally covers the first sacrificial layer.

[0010] The diaphragm structure is a composite structure, which includes a first nitride layer, a second polycrystalline silicon layer and a third nitride layer stacked sequentially from bottom to top.

[0011] Furthermore, the width of the first opening in the horizontal direction is smaller than the width of the trench isolation structure in the horizontal direction.

[0012] Furthermore, prior to forming the trench isolation structure, it may also include:

[0013] An ion implantation region is formed within the substrate, and the depth of the ion implantation region in the vertical direction is less than the depth of the trench isolation structure in the vertical direction.

[0014] Furthermore, the trench isolation structure may have a depth greater than 4µm in the vertical direction.

[0015] Furthermore, after forming the diaphragm structure, it may also include:

[0016] A second sacrificial layer with a second opening is formed on the diaphragm structure.

[0017] A third sacrificial layer is formed on top of the second sacrificial layer, and the third sacrificial layer fills the second opening.

[0018] Furthermore, after forming the third sacrificial layer, the following may also be included:

[0019] The backsheet layer is formed on the third sacrificial layer.

[0020] Multiple release holes are formed within the backsheet layer, the release holes penetrating the backsheet layer to expose the second sacrificial layer at the bottom.

[0021] A portion of the substrate is removed from the bottom surface of the substrate to form a back cavity within the substrate.

[0022] Using the first nitride layer in the diaphragm structure as the etching stop layer, a sacrificial layer release process is performed on the first sacrificial layer, the second sacrificial layer, and the third sacrificial layer to form a vibration gap located between the diaphragm structure and the back plate layer and communicating with the release hole and the back cavity.

[0023] Furthermore, the two sidewalls of the vibration gap in the horizontal direction expose the first nitride layer.

[0024] Furthermore, the width of the first nitride layer in the horizontal direction is smaller than the width of the trench isolation structure in the horizontal direction.

[0025] Furthermore, the material of the trench isolation structure is an oxide, including silicon dioxide.

[0026] Secondly, based on the same inventive concept, this embodiment of the invention also provides a semiconductor device, comprising:

[0027] The substrate includes a back cavity formed on the back side.

[0028] Multiple trench isolation structures are located within the substrate on both sides of the back cavity.

[0029] An isolation layer is located on the substrate and the trench isolation structure.

[0030] A first sacrificial layer is located on the isolation layer and includes a first opening with a rounded apex. The first opening is located above the trench isolation structure, and the outer edge of the first opening in the horizontal direction is located within the outer edge of the trench isolation structure in the horizontal direction.

[0031] A diaphragm structure is supported on the first sacrificial layer and the isolation layer, and the outer edge of the portion of the diaphragm structure in contact with the isolation layer is located within the outer edge of the groove isolation structure in the horizontal direction.

[0032] The backplate layer is located on the diaphragm structure.

[0033] The diaphragm structure is a composite structure, which includes a first nitride layer, a second polysilicon layer and a third nitride layer stacked sequentially from bottom to top, and the width of the diaphragm structure in the horizontal direction is smaller than the width of the trench isolation structure in the horizontal direction.

[0034] Furthermore, the semiconductor device may also include:

[0035] The ion implantation region is located within the substrate and its depth in the vertical direction is less than the depth of the trench isolation structure in the vertical direction.

[0036] Thirdly, based on the same inventive concept, the present invention also provides a capacitive microphone, wherein the capacitive microphone includes a semiconductor device manufactured using the manufacturing method described above, or includes a semiconductor device as described above.

[0037] Compared with the prior art, the technical solution provided by the present invention has at least one of the following beneficial effects:

[0038] In this invention, by setting a trench isolation structure in the substrate under the diaphragm structure, a high insulation resistance is added to the weakest part of the substrate under the diaphragm structure. This physical isolation avoids possible leakage current paths between the diaphragm structure and the substrate, further increases the leakage resistance between the diaphragm structure and the substrate, reduces the parasitic capacitance between them, and compensates for the reduced leakage resistance and signal-to-noise ratio between the diaphragm structure and the substrate caused by the loss of the isolation layer due to the formation of the rounded first opening in the first sacrificial layer. Attached Figure Description

[0039] The accompanying drawings provide a more detailed understanding of embodiments of the invention and are incorporated herein by reference as a whole. These drawings and descriptions are used to illustrate the principles of some embodiments. It should be noted that all drawings are schematic diagrams, and for illustrative and drafting purposes, relative sizes and proportions have been adjusted. The same symbols represent corresponding or similar features in different embodiments.

[0040] Figure 1 This is a schematic flowchart of a semiconductor device manufacturing method according to an embodiment of the present invention.

[0041] Figures 2-11 This is a schematic diagram of the structure corresponding to each step of the manufacturing process of the semiconductor device in one embodiment of the present invention.

[0042] The attached figures are labeled as follows:

[0043] 100-Substrate, 101-Trench, 110-Insulating material layer, 111-Trench isolation structure, 120-Isolation layer, 130-First sacrificial layer, 102-First opening, 140-Diaphragm structure, 141-First nitride layer in diaphragm structure, 142-Second polysilicon layer in diaphragm structure, 143-Third nitride layer in diaphragm structure, 103-Release hole / vent hole, 150-Second sacrificial layer, 104-Second opening, 160-Third sacrificial layer, 170-Backplate layer, 105-Back cavity, 106-Cavity.

[0044] In the accompanying drawings, the same parts are referred to by the same reference numerals, and the drawings are not drawn to scale. Detailed Implementation

[0045] To make the technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions of the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Although exemplary implementation methods of the present invention are shown in the accompanying drawings, it should be understood that the present invention can be implemented in various forms and should not be limited to the embodiments described herein. Rather, these embodiments are provided to enable a more thorough understanding of the present invention and to fully convey the scope of the present invention to those skilled in the art.

[0046] The invention is described more specifically by way of example in the following paragraphs with reference to the accompanying drawings. The advantages and features of the invention will become clearer from the following description and claims. It should be noted that the drawings are in a very simplified form and use non-precise proportions, intended only to facilitate and clarify the illustration of the embodiments of the invention. It is understood that the terms "on," "above," and "over" in this invention should be interpreted in the broadest sense, such that "on" means not only "on" something without any intervening feature or layer (i.e., directly on something), but also includes "on" something with an intervening feature or layer.

[0047] Furthermore, for ease of description, regional relative terms such as “on,” “above,” “above,” “upper,” “above,” “upper,” etc., may be used herein to describe the relationship between one element or feature and another element or feature as shown in the figures. In addition to the orientations depicted in the figures, regional relative terms are intended to cover different orientations of the device in use or operation. The device may be oriented in other ways (rotated 90 degrees or in other orientations) and the regional relative descriptive terms used herein may be interpreted accordingly.

[0048] In the embodiments of the present invention, the terms "first," "second," etc., are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be noted that the technical solutions described in the embodiments of the present invention can be arbitrarily combined without conflict.

[0049] As described in the background technology introduction, the main function of existing condenser microphones is to convert sound signals into electrical signals by changing the capacitance. Their structure generally consists of a diaphragm, a backplate, and a sacrificial layer between two layers. The sacrificial layer below the diaphragm forms the space for diaphragm vibration, while the sacrificial layer above the diaphragm forms the cavity between the diaphragm and the backplate, allowing sound to enter through the acoustic aperture and cause the diaphragm to vibrate. A typical simplified manufacturing process for this structure includes: growth and photolithography of the first sacrificial layer, diaphragm growth and photolithography, growth and photolithography of the second and third sacrificial layers, backplate growth and photolithography, backplate thinning, backplate cavity creation, and sacrificial layer release.

[0050] Currently, in order to better control the side-cab distance of the sacrificial layer release, a stop layer for the sacrificial layer release is generally set. For example, silicon nitride is used as an insulating isolation layer on the side wall of the side-cab cutoff position of the first sacrificial layer under the microphone diaphragm. In addition, for structural requirements, the first sacrificial layer is usually etched into a structure with a rounded top through an etching process, which results in a large loss of the bottom insulating isolation layer. If the thickness of the insulating isolation layer is insufficient, it will lead to insufficient leakage resistance between the diaphragm and the substrate and a reduced signal-to-noise ratio.

[0051] To address the aforementioned issues, this invention provides a capacitive microphone, a semiconductor device, and a method for manufacturing the same. Specifically, by setting a trench isolation structure within the substrate under the diaphragm structure, a high insulation resistance is added to the weakest point of the substrate under the diaphragm structure. This physical isolation avoids potential leakage current paths between the diaphragm structure and the substrate, further increasing the leakage resistance between the diaphragm structure and the substrate and reducing the parasitic capacitance between them. It also compensates for the reduced leakage resistance and signal-to-noise ratio between the diaphragm structure and the substrate caused by the loss of the isolation layer due to the rounded first opening in the first sacrificial layer.

[0052] The semiconductor devices and their manufacturing methods provided in the embodiments of the present invention will be described in detail below.

[0053] Please see Figure 1 , Figure 1 This is a schematic flowchart illustrating a method for manufacturing a capacitive microphone and a semiconductor device according to an embodiment of the present invention. Figure 1 As shown, the method for manufacturing the semiconductor device may include at least the following steps:

[0054] Step S101: Provide a substrate.

[0055] Step S102: A plurality of spaced trench isolation structures are formed within the substrate.

[0056] Step S103: An isolation layer and a first sacrificial layer are formed, which are stacked sequentially from bottom to top on the top surface of the substrate.

[0057] Step S104: Remove a portion of the first sacrificial layer to form a first opening within the first sacrificial layer. The apex of the first opening is rounded. The first opening is located above the trench isolation structure, and the outer edge of the first opening in the horizontal direction is located within the outer edge of the trench isolation structure in the horizontal direction.

[0058] Step S105: A diaphragm structure is formed conformally covering the first sacrificial layer; wherein the diaphragm structure is a composite structure, and the composite structure includes a first nitride layer, a second polysilicon layer and a third nitride layer stacked sequentially from bottom to top.

[0059] In order to enable those skilled in the art to easily understand the manufacturing method of the semiconductor device in the embodiments of the present invention, the manufacturing method of the semiconductor device proposed in the present invention will be further described below with reference to the various structural schematic diagrams of the manufacturing process.

[0060] in, Figures 2-11This is a schematic diagram of the structure during the fabrication process of a semiconductor device manufacturing method according to an embodiment of the present invention. The following is in conjunction with... Figures 2 to 11 The manufacturing method of the semiconductor device provided in this embodiment will be described in detail.

[0061] For ease of understanding, the following text defines directions parallel to the substrate 100 and directions perpendicular to the surface of the substrate 100. For simplicity, the direction parallel to the surface of the substrate 100 is simply referred to as the horizontal direction, and the direction perpendicular to the surface of the substrate 100 is simply referred to as the vertical direction.

[0062] Please see Figure 2 Step S101: A substrate 100 is provided, wherein the substrate 100 serves as a platform for subsequently forming a capacitive microphone comprising components and / or parts such as the plurality of trench isolation structures, diaphragm structures, and backplane layers. In one embodiment, the material of the substrate 100 can be any suitable substrate material well known to those skilled in the art, such as at least one of the following materials: silicon, silicon-on-insulator (SOI), silicon-on-insulator stacked (SSOI), silicon-on-insulator stacked (S-SiGeOI), silicon-on-insulator (SiGeOI), and germanium-on-insulator (GeOI), etc. This application does not limit the material of the substrate 100. P-type or N-type ion implantation can be performed on the substrate 100 using an ion implantation process to form an ion implantation region (not shown) within the substrate 100.

[0063] Next, step S102 is performed: The substrate 100 after ion implantation is etched vertically using an etching process, such as at least one of dry etching or wet etching, to form a plurality of trenches 101 within the substrate 100. Then, an insulating material layer 110 is formed on the substrate 100 using a deposition process, such as at least one of physical vapor deposition, chemical vapor deposition, or atomic layer deposition. The insulating material layer 110 at least fills the plurality of trenches 101. In one embodiment, the plurality of trenches 101 may have different widths in the horizontal direction, or they may be the same. However, the width of the trenches 101 that align with or at least partially overlap with the subsequently formed diaphragm structure in the horizontal direction must be greater than the width of the diaphragm structure in the horizontal direction. Therefore, in this embodiment… Figure 2For example, two wider horizontal trenches 101 are formed on the outer side of the substrate 100, and a narrower horizontal trench 101 is formed on the inner side of the two trenches 101. In other embodiments, all trenches 101 formed in the substrate 100 may have the same width in the horizontal direction, and are not limited thereto. The material of the insulating material layer 110 may include silicon oxide (SiO2), silicon nitride (SiN), silicon oxynitride (SiON), silicon carbide nitride (SiCN), or combinations thereof, but is not limited thereto, and is preferably silicon oxide.

[0064] It should be noted that, since the trench 101 in this embodiment is wider in the horizontal direction, when the insulating material layer 110 is formed using the deposition process, the top surface of the insulating material layer 110 will be uneven. That is, the top surface of the insulating material layer 110 in the trench 101 is lower than its top surface on the substrate 100, but this is not a limitation. Secondly, in order to better physically isolate the possible leakage current path between the diaphragm structure and the substrate, reduce the parasitic capacitance between them, and increase the leakage resistance, the depth of the ion implantation region located in the substrate 100 in this embodiment in the vertical direction is less than the depth of the trench 101 (i.e., the position corresponding to the trench isolation structure) in the vertical direction.

[0065] Please refer to Figure 3 Continue with step S102: The insulating material layer 110 can be annealed first to remove impurities from the insulating material layer 110, and then the insulating material layer 110 can be further planarized, for example, by chemical mechanical polishing or etching back, so that the remaining insulating material layer 110 only fills the trench 101, thus forming the trench isolation structure 111. In this way, the top surface of the trench isolation structure 111 is flush with the top surface of the substrate 100, but this is not a limitation. In this embodiment, the trench isolation structure 111 needs to have a depth greater than 4µm in the vertical direction. For example, the depth of the trench isolation structure 111 extending into the substrate 100 in the vertical direction can be 4µm, 5µm, 6µm, 7µm, 8µm, etc., which can be related to the depth of the ion implantation region in the substrate 100. For example, the depth of the trench isolation structure 111 in the substrate 100 can be N times the depth of the ion implantation region in the substrate 100, where N is 1.1 to 3, but is not limited thereto.

[0066] Please refer to Figure 4Step S103: Using a deposition process such as chemical vapor deposition, an isolation layer 120 and a first sacrificial layer 130 are sequentially formed from bottom to top on the top surface of the substrate 100 and the plurality of trench isolation structures 111. In one embodiment, the material of the isolation layer 120 may be an insulating material such as a nitride, and preferably silicon nitride, and the material of the first sacrificial layer 130 is also an insulating material such as silicon oxide.

[0067] Please refer to Figure 5 Step S104: Using an etching process, such as a dry etching process, a plurality of first openings 102 are formed in the first sacrificial layer 130 in the vertical direction. The first openings 102 must at least partially overlap or align with the trench isolation structure 111 in the substrate 100. That is, the outer edge (or its extension) of the first opening 102 in the horizontal direction is located within the outer edge (or its extension) of the trench isolation structure 111 in the vertical direction. Alternatively, the width of the first opening 102 in the horizontal direction is smaller than the width of the trench isolation structure 111 in the horizontal direction. In one embodiment, by adjusting parameters such as the etching process time, the apex of the first opening 102 can be rounded, and the width of the first opening 102 in the horizontal direction must be smaller than the width of the trench isolation structure 111 directly below it in the horizontal direction. This blocks the leakage current path of the trench between the subsequently formed diaphragm structure within the second opening 104 and the substrate 100, and also achieves the addition of high insulation resistance at the weakest point of the substrate under the diaphragm structure.

[0068] Please refer to Figure 6 and Figure 7 Step S105: A diaphragm structure 140 is conformally formed on the substrate 100 using a deposition process. The diaphragm structure 140 is a composite structure comprising a first nitride layer 141, a second polysilicon layer 142, and a third nitride layer 143 stacked sequentially from bottom to top. In one embodiment, the first nitride layer 141 is made of silicon nitride, the second polysilicon layer 142 is made of polysilicon, and the third nitride layer 143 is made of silicon nitride. The first nitride layer 141 conformally covers not only the sidewall of the first opening 102 but also extends to cover the surface of the first sacrificial layer 130. The second polysilicon layer 142, after filling the remaining space of the first opening 102, extends laterally to cover the first nitride layer 141. The third nitride layer 143 covers the surface of the second polysilicon layer 142, forming a sandwich structure consisting of three film layers.

[0069] It should be noted that, since the diaphragm structure 140 is located within the first opening 102, and the width of the first opening 102 in the horizontal direction is smaller than the width of the trench isolation structure 111 located below it in the horizontal direction, the portion of the diaphragm structure 140 within the first opening 102 is also smaller in the horizontal direction than the width of the trench isolation structure 111 located below it. This can minimize the formation of a leakage path between the diaphragm structure 140 and the substrate 100. In other words, by setting a wider trench isolation structure 111, the insulation resistance between the diaphragm structure 140 and the substrate 100 is increased, which increases the leakage resistance between the diaphragm structure 140 and the substrate 100 and reduces the parasitic capacitance between them.

[0070] Please refer to Figure 8 Following step S105: After forming the sandwich-structured diaphragm structure 140, an etching process, such as dry etching, can be used to form multiple vent holes (marked by reference numeral 103) within the diaphragm structure 140 to balance air pressure during sound wave action. Alternatively, multiple release holes can be provided to allow etchant to enter during manufacturing, removing the sacrificial layer and forming cavities. These are all existing technologies, and this invention does not specifically limit them. It should be understood that during the etching process of forming multiple vent holes or release holes in this step, the excess portion of the sandwich-structured diaphragm structure 140 on the first sacrificial layer 130 can be simultaneously removed by adjusting the coverage area of ​​the photoresist layer (not shown), for example... Figure 7 The first nitride layer 141 shown is on the first sacrificial layer 130 covering both sides of the third nitride layer 143, but is not limited thereto.

[0071] Please refer to Figure 9 Following step S105: Next, a second sacrificial layer 150 can be formed on the diaphragm structure 140 using a deposition process such as chemical vapor deposition. Then, a portion of the second sacrificial layer 150 is removed using an etching process to form a plurality of second openings 104 within the second sacrificial layer 150. In one embodiment, the materials of the second sacrificial layer 150 and the first sacrificial layer 130 can be the same, for example, both being silicon oxide. Of course, they can also be different, and are not limited thereto.

[0072] Please refer to Figure 10Following step S105: A third sacrificial layer 160 and a backsheet layer 170 are then formed on the second sacrificial layer 150 having the second opening 104 using a deposition process. In one embodiment, the material of the third sacrificial layer 160 may be the same as that of the first sacrificial layer 130, for example, both being silicon oxide, but they may also be different, and the third sacrificial layer 160 fills the second opening 104. The backsheet layer 170 may be a multilayer composite film comprising silicon nitride and polycrystalline silicon, or it may be a single-layer film structure, but is not limited thereto.

[0073] Please refer to Figure 11 Following step S105: Bosch etching can then be performed along the bottom of the substrate 100 in a vertical direction to form a back cavity 105 within the substrate. In this embodiment, since the diaphragm structure 140 is a composite structure, and it includes a first nitride layer 141, a second polysilicon layer 142, and a third nitride layer 143 stacked sequentially, and the material of the first nitride layer 141 located on the sidewall of the first sacrificial layer 130 is silicon nitride, the first nitride layer 141 is used to compensate for the loss of silicon nitride material in the isolation layer 120 caused by the formation of the first opening 102 (and also to compensate for the reduced leakage resistance and signal-to-noise ratio between the diaphragm structure 140 and the substrate 100 caused by the loss of the isolation layer 120 caused by the formation of the rounded first opening 102 in the first sacrificial layer 130). At the same time, the first nitride layer 141 can also serve as an etching stop layer for forming the back cavity 105, thereby allowing the lateral etching depth and longitudinal etching depth of the isotropic etching process to be well controlled, thus avoiding damage to the back plate layer 170 and the lateral surface by penetrating the diaphragm structure 140. The first sacrificial layer 130 surrounding the first nitride layer 141 is eventually removed from the area where the cavity to be formed is surrounded by the first nitride layer 141, which serves as an etching stop layer, along with the isolation layer below it, to form the required back cavity 105. Then, multiple release holes are formed vertically on the back plate layer 170 and the third sacrificial layer 160. Liquid etching liquid or gaseous etching gas is then introduced through the release holes (located on the back plate layer 170 and the third sacrificial layer 160) to remove (or release) the third sacrificial layer 160 and the second sacrificial layer 150 in the area where the cavity to be formed through isotropic etching processes such as wet etching or vapor phase etching (the etchant is hydrogen fluoride gas, etc.) to form the cavity 106. Furthermore, a vibration gap (not labeled) is formed between the diaphragm structure 140 and the back plate layer 170 and is connected to the release holes and the cavity 106.

[0074] It should be understood that in other embodiments, the order in which the back cavity 105 and the cavity 106 are formed may be reversed, i.e., the cavity 106 is formed first, and then the back cavity 105 is formed. Furthermore, pad structures (not shown) for electrically connecting the second polysilicon layer 142 in the diaphragm structure 140 or other structures required for microphone capacitors may also be formed in the edge region.

[0075] Furthermore, based on the manufacturing method described above, embodiments of the present invention also provide a semiconductor device, comprising:

[0076] The substrate 100 includes a back cavity 105 formed on the back side.

[0077] Multiple trench isolation structures 111 are located within the substrate 100 on both sides of the back cavity 105.

[0078] An isolation layer 120 is located on the substrate 100 and the trench isolation structure 111.

[0079] The first sacrificial layer 130 is located on the isolation layer 120.

[0080] The diaphragm structure 140 is supported on the first sacrificial layer 130 and the isolation layer 120, and the outer edge of the portion of the diaphragm structure 140 that contacts the isolation layer 120 is located within the outer edge of the groove isolation structure 111 in the horizontal direction.

[0081] A backplate layer 170 is located on the diaphragm structure 130; wherein the diaphragm structure 140 is a composite structure, the composite structure including a first nitride layer 141, a second polysilicon layer 142 and a third nitride layer 143 stacked sequentially from bottom to top, and the width of the diaphragm structure 140 in the horizontal direction is smaller than the width of the trench isolation structure 111 in the horizontal direction.

[0082] Furthermore, the semiconductor device also includes:

[0083] The ion implantation region is located within the substrate 100 and its depth in the vertical direction is less than the depth of the trench isolation structure 111 in the vertical direction.

[0084] Furthermore, based on the manufacturing method or semiconductor device described above, this embodiment of the invention also provides a capacitive microphone, which includes at least the substrate 100, a plurality of trench isolation structures 111, an isolation layer 120, a first sacrificial layer 130, a diaphragm structure 140, and a backplate layer 170.

[0085] In summary, in this invention, by setting a trench isolation structure in the substrate under the diaphragm structure, a high insulation resistance is added to the weakest part of the substrate under the diaphragm structure. This physical isolation avoids possible leakage current paths between the diaphragm structure and the substrate, further increases the leakage resistance between the diaphragm structure and the substrate, reduces the parasitic capacitance between them, and compensates for the reduced leakage resistance and signal-to-noise ratio between the diaphragm structure and the substrate caused by the loss of the isolation layer due to the formation of the rounded first opening in the first sacrificial layer.

[0086] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0087] The various embodiments in this specification are described in a related manner. Similar or identical parts between embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, the embodiments of apparatus, electronic devices, and computer-readable storage media are basically similar to the method embodiments, and therefore the descriptions are relatively simple; relevant parts can be referred to the descriptions of the method embodiments.

[0088] The above description is merely a preferred embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention are included within the scope of protection of the present invention.

Claims

1. A method for manufacturing a semiconductor device, characterized in that, include: Provide substrate; A plurality of spaced trench isolation structures are formed within the substrate, wherein the step of forming the plurality of spaced trench isolation structures includes: forming a plurality of trenches within the substrate, and forming an insulating material layer that at least fills the plurality of trenches; An isolation layer and a first sacrificial layer are formed, which are stacked sequentially from bottom to top on the top surface of the substrate; A portion of the first sacrificial layer is removed to form a first opening within the first sacrificial layer. The apex of the first opening is rounded. The first opening is located above the trench isolation structure, and the outer edge of the first opening in the horizontal direction is located within the outer edge of the trench isolation structure in the horizontal direction. A diaphragm structure is formed conformally covering the first sacrificial layer, the diaphragm structure being located within the first opening, and the width of the first opening in the horizontal direction being smaller than the width of the groove isolation structure located below it in the horizontal direction; The diaphragm structure is a composite structure, which includes a first nitride layer, a second polycrystalline silicon layer and a third nitride layer stacked sequentially from bottom to top.

2. The method for manufacturing a semiconductor device as described in claim 1, characterized in that, Before forming the trench isolation structure, the following is also included: An ion implantation region is formed within the substrate, and the depth of the ion implantation region in the vertical direction is less than the depth of the trench isolation structure in the vertical direction.

3. The method for manufacturing a semiconductor device as described in claim 1, characterized in that, The trench isolation structure has a depth greater than 4µm in the vertical direction.

4. The method for manufacturing a semiconductor device as described in claim 1, characterized in that, After forming the diaphragm structure, the method further includes: A second sacrificial layer with a second opening is formed on the diaphragm structure; A third sacrificial layer is formed on top of the second sacrificial layer, and the third sacrificial layer fills the second opening.

5. The method for manufacturing a semiconductor device as described in claim 4, characterized in that, After the formation of the third sacrificial layer, the process also includes: The backsheet layer is formed on the third sacrificial layer; Multiple release holes are formed within the backsheet layer, the release holes penetrating the backsheet layer to expose the second sacrificial layer at the bottom; A portion of the substrate is removed from the bottom surface of the substrate to form a back cavity within the substrate; Using the first nitride layer in the diaphragm structure as the etching stop layer, a sacrificial layer release process is performed on the first sacrificial layer, the second sacrificial layer, and the third sacrificial layer to form a vibration gap located between the diaphragm structure and the back plate layer and communicating with the release hole and the back cavity.

6. The method for manufacturing a semiconductor device as described in claim 5, characterized in that, The vibration gap exposes the first nitride layer on its two sidewalls in the horizontal direction.

7. The method for manufacturing a semiconductor device as described in claim 1, characterized in that, The trench isolation structure is made of oxides, including silicon dioxide.

8. A semiconductor device manufactured according to the manufacturing method of any one of claims 1 to 7, characterized in that, include: The substrate includes a back cavity formed on the back side; Multiple trench isolation structures are located within the substrate on both sides of the back cavity; An isolation layer is located on the substrate and the trench isolation structure; The first sacrificial layer is located on the isolation layer; A diaphragm structure is supported on the first sacrificial layer and the isolation layer, and the outer edge of the portion of the diaphragm structure in contact with the isolation layer is located within the outer edge of the groove isolation structure in the horizontal direction. The backplate layer is located on the diaphragm structure; The diaphragm structure is a composite structure, which includes a first nitride layer, a second polycrystalline silicon layer and a third nitride layer stacked sequentially from bottom to top.

9. The semiconductor device as claimed in claim 8, characterized in that, Also includes: The ion implantation region is located within the substrate and its depth in the vertical direction is less than the depth of the trench isolation structure in the vertical direction.

10. A condenser microphone, characterized in that, It includes semiconductor devices prepared using the manufacturing method according to any one of claims 1 to 7, or semiconductor devices according to any one of claims 8 to 9.

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