Photoelectric interconnection packaging structure and preparation method thereof

Abstract

The invention provides a photoelectric interconnection packaging structure and a preparation method thereof, a first through hole penetrating through a glass substrate from top to bottom is formed by adopting a first laser method, a second through hole penetrating through the glass substrate from bottom to top is formed by adopting a second laser method, and the formed second through hole and the first through hole are arranged in a staggered manner. Therefore, the high-performance TGV adapter plate which is small in spacing, suitable for high-density setting and capable of effectively avoiding overlapping of the metal columns can be prepared on the glass substrate based on the laser method; furthermore, an optical waveguide layer is arranged in the glass substrate and the rewiring layer, and an electric chip and an optical chip are connected by combining a TGV adapter plate, so that the metal wiring is more flexible, the photoelectric interconnection integration is realized, the packaging size is reduced, the power consumption is reduced, the reliability is improved, the optical waveguide layer is suitable for high-density integrated packaging, and good photoelectric signal transmission can be realized.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of semiconductor, and relates to an optoelectronic interconnection packaging structure and a preparation method thereof. BACKGROUND

[0002] Optics has excellent performances such as small signal attenuation, low energy consumption, high bandwidth and compatibility with CMOS, and the industry generally believes that introducing optical technology into semiconductor processes can not only reduce chip size, cost and power consumption, but also improve reliability, so that functional chips can be connected through optical fibers in an edge coupling manner, but as the chip pitch is reduced, the application mode of optical fiber coupling is limited.

[0003] In semiconductor 2.5D / 3D packaging, organic adapter plates, through-silicon via (TSV) adapter plates and through-glass via (TGV) adapter plates are the mainstream adapter plate materials, wherein the main purpose of setting the adapter plate is to solve some challenges in semiconductor packaging, such as improving integration, reducing cost and improving electrical performance.

[0004] Among them, since glass is an insulating material, its dielectric constant is low (about 1 / 3 of that of silicon), and its loss factor is small (about 2-3 orders of magnitude smaller than that of silicon), and its high-frequency performance is excellent, which enables glass to significantly reduce insertion loss and crosstalk at high frequencies. However, the key problem faced by TGV technology is the lack of a deep etching process similar to silicon, making it difficult to quickly manufacture glass deep holes or trenches with high aspect ratio. Traditional TGV adapter plate preparation methods include sandblasting, mechanical drilling, dry etching, wet etching, focused discharge and laser methods, but all of the above methods have obvious shortcomings. The most widely used method at present is the laser method, but because the energy curve excited by the laser itself is a Gaussian energy curve, the glass via formed by the laser method is tapered and cannot form a 90° vertical hole. Therefore, when high-density openings are made, the overlayer phenomenon may occur on the upper part of the hole, causing the metal in the adjacent opening to be filled, and in order to avoid the overlayer phenomenon, the pitch of the adjacent TGV hole needs to be increased, so that the existing laser method cannot be applied to the preparation of high-density and high-performance products.

[0005] Therefore, it is necessary to provide an optoelectronic interconnection packaging structure and a preparation method thereof. SUMMARY

[0006] In view of the above-mentioned shortcomings of the prior art, the purpose of the present application is to provide an optoelectronic interconnection packaging structure and a preparation method thereof, which solves the problem of limited application of optical fiber coupling in the prior art.

[0007] To achieve the above object and other related objects, the present application provides a preparation method of an optoelectronic interconnection packaging structure, comprising the following steps:

[0008] A glass substrate is provided, which comprises a first surface and a second surface arranged oppositely;

[0009] A first through-hole is formed from the top to the bottom of the glass substrate by using a first laser method, and a second through-hole is formed from the bottom to the top of the glass substrate by using a second laser method, wherein the second through-hole is arranged alternately with the first through-hole;

[0010] A first TGV metal column is formed in the first through-hole to fill the first through-hole, and a second TGV metal column is formed in the second through-hole to fill the second through-hole;

[0011] A first groove is formed in the glass substrate by using a third laser method from the first surface of the glass substrate;

[0012] A first optical waveguide layer is formed in the first groove;

[0013] A first rewiring layer is formed on the first surface of the glass substrate, and a second rewiring layer is formed on the second surface of the glass substrate, wherein the first rewiring layer and the second rewiring layer are respectively electrically connected with the first TGV metal column and the second TGV metal column;

[0014] The first rewiring layer is patterned to form a second groove in the first rewiring layer, and the second groove exposes the first optical waveguide layer;

[0015] A second optical waveguide layer is formed in the second groove, and the second optical waveguide layer is connected with the first optical waveguide layer;

[0016] An electrical chip and an optical chip with a photosensitive region are provided, and the electrical chip and the optical chip are bonded on the first rewiring layer, wherein the electrical chip and the optical chip are electrically connected with the first rewiring layer, and the photosensitive region of the optical chip is arranged correspondingly with the second optical waveguide layer.

[0017] Optionally, the first laser method comprises a laser ablation method or a laser-induced denaturation etching method; the second laser method comprises a laser ablation method or a laser-induced denaturation etching method; and the third laser method comprises a laser ablation method or a laser-induced denaturation etching method.

[0018] Optionally, the first TGV metal column and the second TGV metal column are formed synchronously, and the method for forming the first TGV metal column and the second TGV metal column comprises chemical plating or electroplating.

[0019] Optionally, the method for forming the first re-wiring layer on the first surface of the glass substrate comprises a semiconductor process method or a substrate bonding method; and the method for forming the second re-wiring layer on the second surface of the glass substrate comprises a semiconductor process method or a substrate bonding method.

[0020] Optionally, the distance between the adjacent first via and the second via ranges from 80 to 100 μm.

[0021] Optionally, the thickness of the glass substrate ranges from 100 to 300 μm.

[0022] Optionally, the method further comprises the step of forming a metal mirror on the sidewall of the first groove; the step of forming a convex lens on the second optical waveguide layer; and the step of forming a metal bump on the second re-wiring layer.

[0023] The present application also provides an optoelectronic interconnection packaging structure, which comprises:

[0024] a glass substrate, wherein the glass substrate comprises a first surface and a second surface arranged oppositely;

[0025] a first via, wherein the first via is prepared by a first laser method, and the first via penetrates the glass substrate from top to bottom at the first surface of the glass substrate;

[0026] a second via, wherein the second via is prepared by a second laser method, and the second via penetrates the glass substrate from bottom to top at the second surface of the glass substrate, and the second via is arranged alternately with the first via;

[0027] a first TGV metal column, wherein the first TGV metal column fills the first via;

[0028] a second TGV metal column, wherein the second TGV metal column fills the second via;

[0029] a first groove, wherein the first groove is prepared by a third laser method, and the first groove extends into the glass substrate from the first surface of the glass substrate;

[0030] a first optical waveguide layer, wherein the first optical waveguide layer is located in the first groove;

[0031] a first re-wiring layer, wherein the first re-wiring layer is located on the first surface of the glass substrate, and the first re-wiring layer is electrically connected with the first TGV metal column and the second TGV metal column;

[0032] A second re-wiring layer is located on the second surface of the glass substrate, and the second re-wiring layer is electrically connected with the first TGV metal column and the second TGV metal column;

[0033] A second groove is located in the first re-wiring layer, and the second groove exposes the first optical waveguide layer;

[0034] A second optical waveguide layer is located in the second groove, and the second optical waveguide layer is connected with the first optical waveguide layer;

[0035] An electric chip and an optical chip with a photosensitive area are bonded on the first re-wiring layer, the electric chip and the optical chip are electrically connected with the first re-wiring layer, and the photosensitive area of the optical chip is arranged correspondingly with the second optical waveguide layer.

[0036] Optionally, the distance between the adjacent first TGV metal column and the second TGV metal column ranges from 80 to 100 μm; the first TGV metal column and the second TGV metal column have the same topography.

[0037] Optionally, a metal mirror is located on the sidewall of the first groove; a convex lens is located on the second optical waveguide layer; and a metal convex block is located on the second re-wiring layer.

[0038] As described above, the photoelectric interconnection packaging structure and the preparation method thereof adopt the first laser method to form the first through hole penetrating through the glass substrate from top to bottom, and the second laser method to form the second through hole penetrating through the glass substrate from bottom to top, and the second through hole is staggered with the first through hole, so that the application can prepare the high-performance TGV adapter with smaller distance and suitable for high-density arrangement based on the laser method on the glass substrate; further, the optical waveguide layer is arranged in the glass substrate and the re-wiring layer, and the electric chip and the optical chip are connected in combination with the TGV adapter, so that the metal wiring is more flexible, the photoelectric interconnection integration is realized, the packaging size is reduced, the power consumption is reduced, the reliability is improved, and the application is suitable for high-density integrated packaging, and good photoelectric signal transmission can be realized. BRIEF DESCRIPTION OF DRAWINGS

[0039] Figure 1 A flowchart for preparing the photoelectric interconnection packaging structure in the embodiment of the application is shown.

[0040] Figure 2 A structure diagram after forming the first through hole and the second through hole in the embodiment of the application is shown.

[0041] Figure 3 A structure diagram after forming the first through hole and the second through hole in the embodiment of the application is shown.Figure 2 A magnified view of a portion of region A in the middle.

[0042] Figure 4 The diagram shown is a structural schematic of the first TGV metal column and the second TGV metal column after they are formed in an embodiment of the present invention.

[0043] Figure 5 The diagram shown is a schematic representation of the structure after the first groove is formed in an embodiment of the present invention.

[0044] Figure 6 The diagram shown is a schematic representation of the structure after the metal reflector is formed in an embodiment of the present invention.

[0045] Figure 7 The diagram shown is a schematic representation of the structure after the formation of the first optical waveguide layer in an embodiment of the present invention.

[0046] Figure 8 The diagram shown is a structural schematic of the first and second redistribution layers after they have been formed in an embodiment of the present invention.

[0047] Figure 9 The diagram shown is a schematic representation of the structure after the second groove is formed in an embodiment of the present invention.

[0048] Figure 10 The diagram shown is a schematic representation of the structure after the formation of the second optical waveguide layer in an embodiment of the present invention.

[0049] Figure 11 The diagram shown is a schematic representation of the structure after the convex lens is formed in an embodiment of the present invention.

[0050] Figure 12 The diagram shows the structure of the bonding electrical chip, optical chip, and metal bumps in an embodiment of the present invention.

[0051] Explanation of reference numerals in the attached figures

[0052] 100 glass substrate

[0053] 101 First Through Hole

[0054] 102 Second Through Hole

[0055] 103 First Groove

[0056] 104 Second Groove

[0057] 201 First TGV Metal Column

[0058] 202 Second TGV Metal Column

[0059] 300 Metal Reflector

[0060] 401 First optical waveguide layer

[0061] 402 Second optical waveguide layer

[0062] 501 First Rerouting Layer

[0063] 502 Second Rerouting Layer

[0064] 600 convex lens

[0065] 701 electrical chip

[0066] 702 Optical Chip

[0067] 712 Photosensitive Area

[0068] 800 metal bumps Detailed Implementation

[0069] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0070] In the detailed description of embodiments of the present invention, for ease of explanation, the cross-sectional views illustrating the device structure may be partially enlarged and not to scale. Furthermore, the schematic diagrams are merely examples and should not limit the scope of protection of the present invention. In actual fabrication, the three-dimensional spatial dimensions of length, width, and depth should be included.

[0071] For ease of description, spatial relation terms such as “below,” “under,” “lower than,” “below,” “above,” and “upper” may be used herein to describe the relationship between one element or feature shown in the accompanying drawings and other elements or features. It will be understood that these spatial relation terms are intended to include orientations of the device in use or operation other than those depicted in the drawings, and may include embodiments in which the first and second features are formed in direct contact, or embodiments in which additional features are formed between the first and second features, such that the first and second features may not be in direct contact. Furthermore, when a layer is referred to as “between” two layers, it may be the only layer between the two layers, or there may be one or more layers in between.

[0072] It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the illustrations only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0073] See Figure 1 This embodiment provides a method for fabricating an optoelectronic interconnect packaging structure. It can fabricate a high-performance TGV adapter board with a small spacing on a glass substrate using a laser method, which is suitable for high-density setup and can effectively avoid the overlapping of metal pillars. Furthermore, by setting an optical waveguide layer in the glass substrate and the redistribution layer, and combining it with the TGV adapter board to connect the electrical chip and the optical chip, the metal wiring can be made more flexible, realizing optoelectronic interconnect integration, reducing package size, reducing power consumption, improving reliability, and is suitable for high-density integrated packaging, which can achieve good optoelectronic signal transmission.

[0074] The following is in conjunction with the appendix Figures 2-12 The fabrication of the aforementioned optoelectronic interconnect packaging structure is further described, specifically including:

[0075] First, refer to Figure 1 and Figure 2 Step S1 is executed, providing a glass substrate 100, the glass substrate 100 including a first surface and a second surface disposed opposite to each other.

[0076] Specifically, the glass substrate 100 may include a wafer-level glass substrate, such as 4-inch, 6-inch, 8-inch, 12-inch, etc. The thickness of the glass substrate 100 may be 100-300μm, such as 100μm, 200μm, 300μm, etc. However, the size of the glass substrate 100 is not limited to this and can be set as needed. No excessive restrictions are imposed here.

[0077] Next, refer to Figure 1 and Figure 2 In step S2, a first through hole 101 is formed from top to bottom through the first surface of the glass substrate 100 using a first laser method, and a second through hole 102 is formed from bottom to bottom through the second surface of the glass substrate 100 using a second laser method, wherein the second through hole 102 and the first through hole 101 are alternately arranged.

[0078] Specifically, most existing methods for fabricating TGV adapter plates employ laser methods to create TGV holes in a glass substrate. However, the TGV holes formed by laser methods are tapered. (See [link to relevant documentation]). Figure 2 The morphology of the first through-hole 101 and the second through-hole 102 is shown. Therefore, to avoid the over-layer phenomenon between TGV holes, the distance between TGV holes is usually increased during the manufacturing process, such as setting the pitch of adjacent TGV holes to 120-150 μm. This method of avoiding over-layer TGV adapter boards by increasing the pitch is difficult to apply to high-density products. Therefore, refer to... Figure 2In this embodiment, laser methods are cleverly applied to the first and second surfaces of the glass substrate 100 respectively, thereby forming staggered first through holes 101 and second through holes 102 in the glass substrate 100. This effectively avoids over-layering and also reduces the pitch between adjacent first through holes 101 and second through holes 102, making the final TGV adapter board suitable for high-density, high-performance products.

[0079] The first laser method may include laser ablation or laser-induced denaturation etching; similarly, the second laser method may include laser ablation or laser-induced denaturation etching. Preferably, the first and second laser methods employ the same preparation method to reduce process complexity and facilitate process management and operation. However, this is not a limitation; different preparation methods may be used for the first and second laser methods as needed. Specific operations of laser ablation and laser-induced denaturation etching are not detailed here; please refer to existing preparation methods.

[0080] See Figure 3 It indicated Figure 2 The enlarged view of region A shows that the first through-hole 101, formed by laser technology, has an opening width greater than its bottom width. Similarly, the second through-hole 102, also formed by laser technology, has an opening width greater than its bottom width. The first and second through-holes 101 overlap, allowing them to fully utilize the effective space of the glass substrate 100 and reduce the distance D between adjacent TGV holes. This allows the distance D between adjacent first and second through-holes 101 to be in the range of 80–100 μm, such as 80 μm, 90 μm, or 100 μm. Furthermore, the overlapping arrangement of the first and second through-holes 101 creates an effective gap between them, effectively preventing over-layering, increasing the density of the TGV hole distribution, and enabling the fabrication of high-quality products.

[0081] Next, refer to Figure 1 and Figure 4 Step S3 is executed, in which a first TGV metal pillar 201 is formed in the first through hole 101 to fill the first through hole 101, and a second TGV metal pillar 202 is formed in the second through hole 102 to fill the second through hole 102.

[0082] Specifically, it is preferable that the first TGV metal column 201 and the second TGV metal column 202 are formed simultaneously to reduce the number of preparation steps. Of course, if necessary, the first TGV metal column 201 and the second TGV metal column 202 can also be prepared in steps, which is not limited here.

[0083] The method for forming the first TGV metal column 201 may include electroless plating or electroplating; the method for forming the second TGV metal column 202 may include electroless plating or electroplating. Specific preparation methods for the first TGV metal column 201 and the second TGV metal column 202 are not limited here. Specific operations for electroless plating or electroplating are not detailed here; please refer to existing preparation methods.

[0084] In this embodiment, the first TGV metal pillar 201 and the second TGV metal pillar 202 are made of copper, but the material of the TGV metal pillar is not limited to this, and other conductive metal materials can also be used.

[0085] Furthermore, after the first through hole 101 and the second through hole 102 are prepared by laser method, in order to facilitate the formation of the first TGV metal pillar 201 and the second TGV metal pillar 202 that fill the through holes, the first through hole 101 and the second through hole 102 can be surface treated, such as by wet etching, so that the first through hole 101 and the second through hole 102 have smooth inner surfaces. The method of surface treatment is not limited here.

[0086] Furthermore, after forming the first TGV metal pillar 201 and the second TGV metal pillar 202, in order to facilitate the subsequent preparation of the redistribution layer, the glass substrate 100 can be surface treated, such as polishing or wet etching, to avoid electrical connections between the TGV metal pillars and obtain a flat surface.

[0087] Next, refer to Figure 1 and Figure 5 In step S4, a third laser method is used to form a first groove 103 with its bottom located in the glass substrate 100 from the first surface of the glass substrate 100.

[0088] The third laser method may include laser ablation or laser-induced denaturation etching. Preferably, the first laser method, the second laser method and the third laser method use the same preparation method to reduce process complexity and facilitate process management and operation. However, it is not limited to this. As needed, the first laser method, the second laser method and the third laser method may also use different preparation methods.

[0089] Since the first groove 103 is prepared by laser method, the opening width of the first groove 103 is greater than the bottom width, that is, the side wall of the first groove 103 has an inclined surface. The inclined surface is beneficial to the subsequent transmission of optical signals. The inclination angle of the inclined surface can be set according to specific needs and is not limited here.

[0090] Next, refer to Figure 1 , Figure 6 and Figure 7 Step S5 is executed to form a first optical waveguide layer 401 in the first groove 103.

[0091] Among them, see Figure 6 To reduce light loss and improve light transmission efficiency, in this embodiment, it is preferable to form a metal reflector 300 on the sidewall of the first groove 103, such as a titanium metal reflector prepared by sputtering and etching. The metal reflector 300 formed can also cover the bottom of the first groove 103, which is not limited here.

[0092] When fabricating the first optical waveguide layer 401, a semiconductor process can be used, which involves steps such as coating, exposure, development, and etching. The first optical waveguide layer 401 formed may include an organic polymer optical waveguide wiring layer, a silicon-based optical waveguide wiring layer, a lithium niobate optical waveguide wiring layer, or a lithium borate optical waveguide wiring layer, etc.

[0093] Next, refer to Figure 1 and Figure 8 In step S6, a first redistribution layer 501 is formed on the first surface of the glass substrate 100, and a second redistribution layer 502 is formed on the second surface of the glass substrate 100, wherein the first redistribution layer 501 and the second redistribution layer 502 are respectively electrically connected to the first TGV metal pillar 201 and the second TGV metal pillar 202.

[0094] Specifically, the method for forming the first redistribution layer 501 on the first surface of the glass substrate 100 may include a semiconductor process method or a substrate bonding method. Similarly, the method for forming the second redistribution layer 502 on the second surface of the glass substrate 100 may include a semiconductor process method or a substrate bonding method.

[0095] The semiconductor manufacturing process is a method of preparing the first redistribution layer 501 and the second redistribution layer 502 on the glass substrate 100 through steps such as coating, exposure, development, deposition, and etching. The substrate bonding method is a method of preparing the required first redistribution layer 501 and the second redistribution layer 502 in advance, and then directly bonding the first redistribution layer 501 and the second redistribution layer 502 to the glass substrate 100.

[0096] The specific fabrication methods for the first redistribution layer 501 and the second redistribution layer 502 are not excessively limited here; they can be fabricated using the same method, or different methods can be used. The specific materials and structures of the first redistribution layer 501 and the second redistribution layer 502 are also not excessively limited here and can be selected as needed.

[0097] Next, refer to Figure 1 and Figure 9 In step S7, the first redistribution layer 501 is graphically visualized, and a second groove 104 is formed in the first redistribution layer 501, with the second groove 104 exposing the first optical waveguide layer 401.

[0098] Specifically, the etching method for the first redistribution layer 501 can be selected as needed, and the morphology of the second groove 104 is not limited here.

[0099] Next, refer to Figure 1 and Figure 10 Step S8 is executed, in which a second optical waveguide layer 402 is formed in the second groove 104, and the second optical waveguide layer 402 is connected to the first optical waveguide layer 401.

[0100] Specifically, the second optical waveguide layer 402 can be fabricated using semiconductor processing methods, i.e., through steps such as coating, exposure, development, and etching. The resulting second optical waveguide layer 402 may include an organic polymer optical waveguide wiring layer, a silicon-based optical waveguide wiring layer, a lithium niobate optical waveguide wiring layer, or a lithium borate optical waveguide wiring layer, etc. Preferably, the fabrication and material of the second optical waveguide layer 402 are the same as those of the first optical waveguide layer 401 to reduce process complexity.

[0101] See Figure 11 Furthermore, it is preferable to form a convex lens 600 on the second optical waveguide layer 402, so as to concentrate light and further reduce light loss. The method of fabricating the convex lens 600 is not limited here; bonding method can be used, but it is not limited to this.

[0102] Next, refer to Figure 1 and Figure 12 In step S9, an electrical chip 701 and an optical chip 702 with a photosensitive area 712 are provided. The electrical chip 701 and the optical chip 702 are bonded to the first redistribution layer 501. Both the electrical chip 701 and the optical chip 702 are electrically connected to the first redistribution layer 501, and the photosensitive area 712 of the optical chip 702 is correspondingly disposed with the second optical waveguide layer 402.

[0103] For details, please refer to Figure 12 The electrical leads of the electrical chip 701 and the optical chip 702 are electrically connected to the first redistribution layer 501 via metal bumps. The photosensitive area 712 of the optical chip 702 is correspondingly disposed with the second optical waveguide layer 402, so as to form an optical transmission path in conjunction with the first optical waveguide layer 401. Figure 12 The dashed line with an arrow is shown in the image.

[0104] For further details, please refer to [link / reference]. Figure 12 Metal bumps 800 and the like can also be formed on the surface of the second redistribution layer 502 to facilitate subsequent electrical connections.

[0105] Understandably, in order to increase production capacity, Figure 12 The optoelectronic interconnect packaging structure described herein can be considered as a single-unit structure formed after a cutting process. Of course, depending on the needs, Figure 12 The optoelectronic interconnect packaging structure described herein can also be a monolithic structure directly prepared without a cutting process; no excessive restrictions are imposed here.

[0106] See Figures 2-12 This embodiment also provides an optoelectronic interconnect packaging structure, wherein the optoelectronic interconnect packaging structure can be directly prepared using the above-described preparation process. Therefore, the materials, structure, etc. of the optoelectronic interconnect packaging structure can be referred to the above content. Of course, the optoelectronic interconnect packaging structure can also be prepared using other preparation processes as needed.

[0107] In this embodiment, the optoelectronic interconnect packaging structure includes:

[0108] A glass substrate 100, the glass substrate 100 including a first surface and a second surface disposed opposite to each other;

[0109] The first through hole 101 is prepared by a first laser method and penetrates the glass substrate 100 from top to bottom through the first surface of the glass substrate 100.

[0110] The second through hole 102 is prepared by the second laser method and penetrates the glass substrate 100 from bottom to bottom from the second surface of the glass substrate 100. The second through hole 102 and the first through hole 101 are arranged alternately.

[0111] The first TGV metal pillar 201 fills the first through hole 101;

[0112] The second TGV metal pillar 202 fills the second through hole 102;

[0113] The first groove 103 is prepared by a third laser method and extends from the first surface of the glass substrate 100 into the glass substrate 100.

[0114] The first optical waveguide layer 401 is located in the first groove 103;

[0115] A first redistribution layer 501 is located on a first surface of the glass substrate 100, and the first redistribution layer 501 is electrically connected to both the first TGV metal pillar 201 and the second TGV metal pillar 202.

[0116] The second redistribution layer 502 is located on the second surface of the glass substrate 100, and the second redistribution layer 502 is electrically connected to both the first TGV metal pillar 201 and the second TGV metal pillar 202.

[0117] The second groove 104 is located in the first rewiring layer 501 and exposes the first optical waveguide layer 401.

[0118] The second optical waveguide layer 402 is located in the second groove 104 and is connected to the first optical waveguide layer 401.

[0119] An electrical chip 701 and an optical chip 702 having a photosensitive area 712 are bonded to the first redistribution layer 501. Both the electrical chip 701 and the optical chip 702 are electrically connected to the first redistribution layer 501, and the photosensitive area 712 of the optical chip 702 is correspondingly disposed with the second optical waveguide layer 402.

[0120] The distance D between adjacent first TGV metal pillars 201 and second TGV metal pillars 202 can be 80-100 μm, such as 80 μm, 90 μm, 100 μm, etc. Since the first through hole 101 and the second through hole 102 are overlapped, the first TGV metal pillars 201 and the second TGV metal pillars 202 are overlapped, and an effective gap area can be formed between them to effectively avoid the phenomenon of over-layer, improve the density of TGV metal pillar distribution, and prepare high-quality products.

[0121] The glass substrate 100 may include a wafer-level glass substrate, such as 4-inch, 6-inch, 8-inch, 12-inch, etc. The thickness of the glass substrate 100 may be 100-300μm, such as 100μm, 200μm, 300μm, etc. However, the size of the glass substrate 100 is not limited to this and can be set as needed. No excessive restrictions are imposed here.

[0122] The first TGV metal pillar 201 and the second TGV metal pillar 202 may have the same morphology, see reference. Figure 12 The illustration shows the first TGV metal pillar 201 and the second TGV metal pillar 202, which are conical and have the same shape. However, it is not limited to this. For example, the first TGV metal pillar 201 and the second TGV metal pillar 202 can also be conical with different sizes. This can be achieved by adjusting the laser process to meet specific product requirements. No limitation is made here.

[0123] See Figure 6 and Figure 12 In order to reduce light loss and improve light transmission efficiency, in this embodiment, a metal reflector 300 is preferably provided on the side wall of the first groove 103. Of course, the metal reflector 300 may also cover the bottom of the first groove 103 as needed, which is not limited here.

[0124] For further details, please refer to [link / reference]. Figure 12 Preferably, a convex lens 600 is provided on the second optical waveguide layer 402 to concentrate light and further reduce light loss.

[0125] For further details, please refer to [link / reference]. Figure 12 Metal bumps 800 or similar features can also be provided on the surface of the second redistribution layer 502 to facilitate subsequent electrical connections.

[0126] In summary, the optoelectronic interconnect packaging structure and its fabrication method of the present invention employ a first laser method to form a first through-hole penetrating the glass substrate from top to bottom, and a second laser method to form a second through-hole penetrating the glass substrate from bottom to bottom. The formed second through-holes are staggered with the first through-holes. Thus, this application can fabricate a high-performance TGV adapter board with a small spacing on the glass substrate based on the laser method, which is suitable for high-density installation and can effectively avoid the overlapping of metal pillars. Furthermore, by setting an optical waveguide layer in the glass substrate and the redistribution layer, and combining it with the TGV adapter board to connect the electrical chip and the optical chip, the metal wiring can be made more flexible, realizing optoelectronic interconnect integration, reducing package size, reducing power consumption, improving reliability, and is suitable for high-density integrated packaging, enabling good optoelectronic signal transmission.

[0127] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A method for fabricating an optoelectronic interconnect packaging structure, characterized in that, Includes the following steps: A glass substrate is provided, the glass substrate including a first surface and a second surface disposed opposite to each other; A first through hole is formed from top to bottom through the first surface of the glass substrate using a first laser method, and a second through hole is formed from bottom to bottom through the second surface of the glass substrate using a second laser method, wherein the second through hole and the first through hole are staggered. A first TGV metal pillar is formed in the first through hole to fill the first through hole, and a second TGV metal pillar is formed in the second through hole to fill the second through hole; A third laser method is used to form a first groove with its bottom located in the glass substrate from the first surface of the glass substrate; A first optical waveguide layer is formed in the first groove; A first redistribution layer is formed on a first surface of the glass substrate, and a second redistribution layer is formed on a second surface of the glass substrate, wherein the first redistribution layer and the second redistribution layer are respectively electrically connected to the first TGV metal pillar and the second TGV metal pillar. The first redistribution layer is graphically represented, and a second groove is formed in the first redistribution layer, wherein the second groove exposes the first optical waveguide layer; A second optical waveguide layer is formed in the second groove, and the second optical waveguide layer is connected to the first optical waveguide layer; An electrical chip and an optical chip with a photosensitive area are provided. The electrical chip and the optical chip are bonded to a first redistribution layer. Both the electrical chip and the optical chip are electrically connected to the first redistribution layer, and the photosensitive area of ​​the optical chip is correspondingly disposed with respect to the second optical waveguide layer.

2. The method for fabricating the optoelectronic interconnect packaging structure according to claim 1, characterized in that: The first laser method includes laser ablation or laser-induced denaturation etching; the second laser method includes laser ablation or laser-induced denaturation etching; and the third laser method includes laser ablation or laser-induced denaturation etching.

3. The method for fabricating the optoelectronic interconnect packaging structure according to claim 1, characterized in that: The first TGV metal pillar and the second TGV metal pillar are formed simultaneously, wherein the method for forming the first TGV metal pillar and the second TGV metal pillar includes chemical plating or electroplating.

4. The method for fabricating the optoelectronic interconnect packaging structure according to claim 1, characterized in that: The method for forming the first redistribution layer on the first surface of the glass substrate includes a semiconductor process or a substrate bonding method; the method for forming the second redistribution layer on the second surface of the glass substrate includes a semiconductor process or a substrate bonding method.

5. The method for fabricating the optoelectronic interconnect packaging structure according to claim 1, characterized in that: The distance between adjacent first and second through holes ranges from 80 to 100 μm.

6. The method for fabricating the optoelectronic interconnect packaging structure according to claim 1, characterized in that: The thickness of the glass substrate is 100–300 μm.

7. The method for fabricating the optoelectronic interconnect packaging structure according to claim 1, characterized in that: It also includes the step of forming a metal reflector on the sidewall of the first groove; the step of forming a convex lens on the second optical waveguide layer; and the step of forming a metal bump on the second redistribution layer.

8. A photoelectric interconnect packaging structure, characterized in that, The optoelectronic interconnect packaging structure includes: A glass substrate, the glass substrate comprising a first surface and a second surface disposed opposite to each other; The first through hole is prepared by a first laser method and extends from the first surface of the glass substrate through the glass substrate from top to bottom. The second through hole is prepared by a second laser method and extends from the second surface of the glass substrate downwards through the glass substrate. The second through hole is staggered with the first through hole. The first TGV metal pillar fills the first through hole; The second TGV metal pillar fills the second through hole; The first groove is prepared by a third laser method and extends from the first surface of the glass substrate into the glass substrate. A first optical waveguide layer is located in the first groove; A first redistribution layer is located on a first surface of the glass substrate, and the first redistribution layer is electrically connected to both the first TGV metal pillar and the second TGV metal pillar. The second redistribution layer is located on the second surface of the glass substrate and is electrically connected to both the first TGV metal pillar and the second TGV metal pillar. The second groove is located in the first rewiring layer and exposes the first optical waveguide layer; The second optical waveguide layer is located in the second groove and is connected to the first optical waveguide layer. An electrical chip and an optical chip with a photosensitive area are provided. The electrical chip and the optical chip are bonded to the first redistribution layer. Both the electrical chip and the optical chip are electrically connected to the first redistribution layer, and the photosensitive area of ​​the optical chip is correspondingly disposed with the second optical waveguide layer.

9. The optoelectronic interconnect packaging structure according to claim 8, characterized in that: The distance between adjacent first TGV metal pillars and second TGV metal pillars ranges from 80 to 100 μm; the first TGV metal pillars and the second TGV metal pillars have the same morphology.

10. The optoelectronic interconnect packaging structure according to claim 8, characterized in that: It also includes a metal reflector located on the sidewall of the first groove; a convex lens located on the second optical waveguide layer; and a metal bump located on the second redistribution layer.

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