Sapphire-based gallium nitride PHEMT design method, system and medium

Abstract

The invention discloses a sapphire-based gallium nitride PHEMT design method and system and a medium, and relates to the technical field of semiconductor devices. The method comprises the following steps: acquiring relevant parameters of the sapphire-based gallium nitride PHEMT; determining the drift current density according to the related parameters; determining the temperature dependence of the sapphire-based gallium nitride PHEMT; fusing the drift current density with the temperature dependency to determine a leakage current; determining parasitic capacitance; constructing a comprehensive objective function fusing transconductance, on-resistance, stray capacitance and temperature stability by taking improvement of the performance ratio of the sapphire-based gallium nitride PHEMT as a target according to the stray capacitance, the leakage current and the drift current density; and performing maximum solution on the objective function through an optimization algorithm, determining optimal design parameters, and completing sapphire-based gallium nitride PHEMT design. According to the method, through multi-physics field coupling modeling and intelligent optimization, the problems that the temperature effect is neglected, the model is isolated and the optimization target is single in a traditional method are solved, and the high-temperature stability, the comprehensive performance and the design efficiency of the device are remarkably improved.

Description

Technical Field

[0001] This invention relates to the field of semiconductor device technology, and more specifically, to a sapphire-based gallium nitride (GaN) PHEMT design method, system, and dielectric. Background Technology

[0002] Gallium nitride (GaN) high electron mobility transistors (PHEMTs), representing third-generation semiconductor devices, have become core components of high-frequency, high-power electronic devices due to their excellent characteristics such as wide bandgap, high electron saturation drift velocity, and high critical breakdown electric field. Sapphire substrates are widely used for the epitaxial growth of GaN-based PHEMTs because of their excellent electrical insulation, good thermal stability, and suitable lattice matching with GaN materials. By fabricating gallium nitride (GaN) / aluminum gallium nitride (AlGaN) heterojunctions on sapphire substrates, a high-density two-dimensional electron gas (2DEG) can be induced at the interface using a strong polarization effect, thereby endowing the device with excellent conductivity.

[0003] With the increasing demands on device performance in fields such as 5G communication, radar, and new energy technologies, achieving high-precision design of PHEMT devices has become increasingly important. Currently, design methods in this field mostly rely on simplified physical models established under room temperature conditions and estimate the current-voltage and capacitance characteristics of the devices using empirical formulas. These traditional methods typically employ local optimization or trial-and-error strategies to determine key design parameters.

[0004] However, existing design methods have significant limitations. First, they fail to adequately incorporate a quantitative description of the impact of temperature on device performance. In practical high-frequency, high-power applications, the self-heating effect of devices is significant. Increased junction temperature leads to a series of problems, including carrier mobility degradation, threshold voltage drift, and reduced transconductance. Existing models struggle to accurately predict such thermally induced performance degradation. Second, traditional design methods often lack a comprehensive description of the device's operating state, typically lacking a continuous current model that seamlessly bridges the linear and saturation regions. Furthermore, the nonlinear characteristics of parasitic capacitances, such as gate-source and drain-source capacitances, which severely affect the device's high-frequency response, are often not adequately considered. These model incompletenesses cause devices designed using traditional methods to deviate from design expectations, experience efficiency degradation, and suffer from insufficient reliability under actual operating conditions, especially under extreme conditions such as high temperature and high pressure. Therefore, there is an urgent need in the field for a design method that can more comprehensively and accurately reflect the physical characteristics of devices, especially their temperature and nonlinear characteristics, to improve the design success rate and final performance of gallium nitride PHEMT devices. Summary of the Invention

[0005] To address the issues of inaccurate device performance prediction and insufficient optimization in the existing technologies at high temperatures, this invention provides a sapphire-based gallium nitride PHEMT design method, system, and dielectric. By introducing a temperature-dependent model, multi-physics coupling optimization, and intelligent algorithms, the stability, reliability, and high-frequency performance of the device are improved.

[0006] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0007] In a first aspect, a sapphire-based gallium nitride PHEMT design method includes the following steps:

[0008] S1. Obtain the relevant parameters of sapphire-based gallium nitride PHEMT;

[0009] S2. Determine the drift current density based on the relevant parameters;

[0010] S3. Determine the temperature dependence of the sapphire-based gallium nitride PHEMT;

[0011] S4. Determine the leakage current based on the drift current density and the temperature dependence;

[0012] S5. Determine the parasitic capacitance;

[0013] S6. Based on the parasitic capacitance, the leakage current, and the drift current density, optimization analysis is performed with the goal of improving the performance ratio of the sapphire-based gallium nitride PHEMT.

[0014] S7. Based on the optimization analysis, determine the optimal design parameters for the sapphire-based gallium nitride PHEMT;

[0015] S8. Design the sapphire-based gallium nitride PHEMT according to the optimal design parameters.

[0016] Specifically, the relevant parameters include at least the polarization parameters, physical parameters, and dielectric constants of the GaN and AlGaN layers.

[0017] Specifically, the process of determining the drift current density includes:

[0018] The 2DEG carrier density of the sapphire-based gallium nitride PHEMT was determined based on the relevant parameters.

[0019] Based on the principle of energy conservation, the 2DEG carrier density is converted into carrier depletion density;

[0020] The drift current density is determined based on the converted carrier depletion density.

[0021] Specifically, the process of determining the temperature dependence of the sapphire-based gallium nitride PHEMT includes:

[0022] The relationship between device parameters and temperature is determined based on a temperature dependence model that includes first-order and second-order temperature coefficients.

[0023] Specifically, the process of determining the leakage current based on the drift current density and the temperature dependence includes:

[0024] Based on the drift current density and the temperature dependence, the leakage current in the linear region and the leakage current in the saturation region are determined respectively.

[0025] By combining the leakage current in the linear region and the leakage current in the saturation region, a complete output current model is constructed to determine the leakage current.

[0026] Specifically, the parasitic capacitance includes: drain-source capacitance and gate-source capacitance.

[0027] Specifically, the optimization analysis process includes:

[0028] The transconductance of the sapphire-based gallium nitride PHEMT is determined based on the leakage current.

[0029] The on-resistance is determined based on the 2DEG carrier density and carrier mobility upon which the drift current density depends.

[0030] An objective function is constructed that integrates transconductance, on-resistance, parasitic capacitance, and temperature stability indices.

[0031] The optimal design parameters are determined by maximizing the objective function using an optimization algorithm.

[0032] Specifically, the optimization algorithm is the crow search algorithm.

[0033] In a second aspect, the present invention provides a sapphire-based gallium nitride PHEMT design system, comprising: a processor and a memory;

[0034] The memory stores programs or instructions that can run on the processor, which, when executed by the processor, implement the steps of the sapphire-based gallium nitride PHEMT design method as described in the first aspect.

[0035] Thirdly, the present invention also provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the sapphire-based gallium nitride PHEMT design method as described in the first aspect.

[0036] Compared with the prior art, the present invention has the following beneficial effects:

[0037] (1) By establishing a carrier transport model and introducing carrier depletion density calculation based on energy conservation, this invention achieves high-precision prediction of two-dimensional electron gas (2DEG) density and drift current density, thereby significantly improving the accuracy of the current model and providing a reliable theoretical basis for subsequent performance optimization, overcoming the shortcomings of traditional simplified models with large errors.

[0038] (2) By constructing a temperature dependence model containing first-order and second-order temperature coefficients and deeply integrating it into the electrical characteristic modeling process, this invention achieves an accurate description of the behavior of key parameters of the device in a wide temperature range, thereby effectively solving the problem of high-temperature performance prediction distortion caused by neglecting temperature effects in existing design methods, and greatly enhancing the reliability design and stability of the device under high temperature and high power operating conditions.

[0039] (3) By establishing leakage current models in the linear region and saturation region respectively and constructing complete output characteristic curves, this invention achieves continuous and accurate characterization of the current-voltage characteristics of the device in the entire operating region, thereby providing a comprehensive analysis framework that helps to achieve more accurate leakage current control and circuit optimization in actual design.

[0040] (4) By establishing a parasitic capacitance model that includes drain-source capacitance and gate-source capacitance, this invention achieves a more accurate description of the high-frequency response characteristics of the device, thereby effectively optimizing the switching speed and dynamic performance of the device and improving its performance in high-frequency applications.

[0041] (5) By constructing a comprehensive objective function that integrates transconductance, on-resistance, parasitic capacitance and temperature stability, this invention achieves coordinated optimization and balanced design of multiple key performance parameters, thereby fundamentally overcoming the performance imbalance problem caused by traditional single-objective optimization strategies and significantly improving the overall performance of the device.

[0042] (6) This invention uses intelligent optimization algorithms such as the crow algorithm to automatically and globally optimize the comprehensive objective function, thereby achieving rapid and accurate location of the optimal solution in a complex multi-parameter design space, which greatly improves design efficiency and accuracy, shortens the R&D cycle, reduces the dependence on the experience of designers, and ensures the consistency and optimality of design results.

[0043] (7) Through the above-mentioned systematic and multi-physics coupling design method, the present invention realizes the full-process controllable optimization from material parameters to final device performance, thereby providing an efficient and reliable sapphire-based gallium nitride PHEMT design solution and promoting its application in high-end fields such as 5G communication and satellite communication. Attached Figure Description

[0044] Figure 1 This is a flowchart illustrating an embodiment of the present invention.

[0045] Figure 2 This is a schematic diagram of the system structure of an embodiment of the present invention. Detailed Implementation

[0046] The present invention will be further described below with reference to the accompanying drawings and embodiments. The embodiments of the present invention include, but are not limited to, the following embodiments.

[0047] like Figure 1 As shown, the sapphire-based gallium nitride (GaN) PHEMT design method in this embodiment significantly improves the accuracy and efficiency of device design through systematic multiphysics modeling and intelligent optimization. The following description uses a sapphire-based GaN PHEMT design suitable for high-frequency power amplifiers as an example, whose typical structure includes:

[0048] Substrate material: Sapphire (Al2O3) substrate, used to provide electrical insulation.

[0049] GaN buffer layer: A 1-3 μm thick GaN buffer layer is used to alleviate lattice mismatch.

[0050] GaN channel layer: A 10nm thick GaN channel layer provides high electron mobility (2DEG channels).

[0051] AlGaN barrier layer: 15-25nm thick AlGaN layer, used to induce 2DEG.

[0052] Gate material: GaN or p-GaN, used for gate contacts.

[0053] The design method includes the following steps:

[0054] S1. Obtain the relevant parameters of sapphire-based gallium nitride PHEMT.

[0055] Gallium nitride (GaN) is a wide-bandgap semiconductor material with excellent thermal stability and high electron mobility, and is often used in high-power, high-frequency electronic devices. PHEMT (High Electron Mobility Transistor) is a field-effect transistor based on gallium nitride, used in high-frequency and high-power applications, and features high efficiency and low power loss.

[0056] In one possible implementation, the relevant parameters include GaN layer relevant parameters and AlGaN layer relevant parameters.

[0057] In one possible implementation, the GaN layer-related parameters include: GaN layer polarization parameters, GaN layer physical parameters, and GaN layer dielectric constant.

[0058] The relevant parameters of the AlGaN layer include: AlGaN layer polarization parameters, AlGaN layer physical parameters, and AlGaN layer dielectric constant.

[0059] Specifically, gallium nitride (GaN) materials exhibit spontaneous and piezoelectric polarization effects due to the asymmetry of their crystal structure. These polarization effects influence carrier density and mobility. The physical parameters of the GaN layer include its lattice constant, band gap, and band width, which determine its electronic and optical properties. The dielectric constant of GaN describes its response to an electric field, affecting electron transport characteristics and the electrical performance of devices. The polarization effect of the AlGaN layer significantly impacts the formation of 2DEG (two-dimensional electron gas), and its polarization effect is influenced by the Al content, typically including spontaneous and piezoelectric polarization. The physical parameters of the AlGaN layer refer to its lattice constant, band gap, and other physical properties, determining the electronic characteristics of the layer, especially its performance in AlGaN / GaN heterojunctions. The dielectric constant of AlGaN affects the electric field distribution of the layer and its electrical coupling with the GaN layer.

[0060] In a specific example, the relevant parameters can be determined using the material characterization handbook and process design handbook:

[0061] GaN layer parameters: Spontaneous polarization intensity is taken as -0.034 C / m 2 The piezoelectric polarization coefficient was obtained by calculating the lattice mismatch, with a dielectric constant of 8.9, an electron affinity of 4.1 eV, and a band gap of 3.4 eV. AlGaN layer parameters included an aluminum composition of 0.25 and a spontaneous polarization intensity of approximately -0.052 C / m calculated via linear interpolation. 2 The piezoelectric polarization coefficient was obtained by calculating the lattice mismatch, with a dielectric constant of 8.5, an electron affinity of 3.6 eV, and a band gap of 4.0 eV. Determining these specific parameters provides a reliable foundation for subsequent modeling.

[0062] S2. Determine the drift current density based on the relevant parameters.

[0063] Specifically, a carrier transport model is established based on the relevant parameters of the GaN and AlGaN layers, and the drift current density is then accurately calculated, providing a theoretical basis for subsequent current simulation. By considering the influence of the electric field on carrier movement, the current-voltage characteristics of the device can be predicted more accurately, thereby improving the design accuracy and optimization effect.

[0064] The carrier transport model is a mathematical model that describes how carriers move in a semiconductor material under the influence of factors such as electric field and concentration gradient. In this embodiment, the carrier transport model is specifically a drift-diffusion model. The drift part describes the movement of carriers under an electric field, while the diffusion part considers the random movement of carriers due to concentration differences.

[0065] In this step, similar methods such as Monte Carlo simulation and energy balance models can also be used to determine the drift current density based on relevant parameters.

[0066] In one possible implementation, the process of determining the drift current density includes:

[0067] S201. Determine the 2DEG carrier density of the sapphire-based gallium nitride PHEMT based on the relevant parameters.

[0068] Based on the solution of the Poisson equation and the quantum binding effect, the following formula is used for calculation:

[0069]

[0070] In the formula, Denotes 2DEG carrier density, D represents two-dimensional conduction band state density, k represents Boltzmann constant, T represents absolute temperature, and E represents the absolute temperature. F Let E0 denote the Fermi level, exp denote the exponential function, E0 and E1 both represent the lowest energy level in the quantum well, and ln denote the natural logarithm function.

[0071] The Fermi level represents the highest energy level of an electron in a system. Under normal thermal equilibrium, the energy of an electron does not exceed this value.

[0072] Two-dimensional electron gas (2DEG) refers to the free electron layer formed at the interface of AlGaN / GaN heterostructures due to spontaneous polarization and piezoelectric polarization effects. Electrons in this layer mainly move freely in the horizontal direction (i.e., a two-dimensional plane), hence the name two-dimensional electron gas. 2DEG carrier density refers to the number of these free electrons per unit area, which is usually controlled by the interface electric field and is closely related to the gate-source voltage and material properties.

[0073] Specifically, 2DEG carrier density is one of the key factors determining the performance of gallium nitride PHEMTs, directly affecting important parameters such as transconductance and current density. By accurately calculating the 2DEG carrier density, device design can be optimized to ensure its performance in high-power and high-frequency applications.

[0074] S202. Based on the principle of energy conservation, the 2DEG carrier density is converted into carrier depletion density to more accurately simulate the gate voltage regulation effect.

[0075] The law of conservation of energy, one of the fundamental laws of physics, states that the total energy in a closed system is constant. In gallium nitride (GaN) PHEMTs, the law of conservation of energy describes how the carrier density of the 2DEG layer transforms into carrier depletion density under the influence of an external electric field and gate-source voltage. That is, under certain conditions, electrons are repelled or depleted due to the electric field, thus affecting the carrier distribution in the 2DEG layer. Carrier depletion density refers to the phenomenon where, under certain conditions, some carriers are depleted from the 2DEG layer due to the electric field or insufficient gate-source voltage. Typically, at lower gate-source voltages, electrons are "depleted," reducing the carrier density in the channels and consequently affecting the device's current characteristics.

[0076] It should be noted that by applying the law of conservation of energy to convert the 2DEG carrier density into carrier depletion density, the influence of changes in gate-source voltage or electric field on carrier distribution can be accurately simulated. This allows for a more precise description of the current characteristics of the device under different operating conditions, thereby improving the accuracy of the design and ensuring the reliability and performance of the device in practical applications.

[0077] Carrier depletion density Specifically, it is expressed as follows:

[0078]

[0079]

[0080] In the formula, d represents the dielectric constant of AlGaN, q represents the electron charge, and d represents the dielectric constant of AlGaN. AlGaN V represents the thickness of the AlGaN layer. gs V represents the gate-source voltage. th This represents the threshold voltage.

[0081] S203. Based on the converted carrier depletion density, establish a carrier transport model and determine the drift current density.

[0082] It should be noted that by accurately describing the motion of charge carriers under the action of an electric field, the current characteristics of the device can be predicted more accurately. This can not only improve the performance of the device under high frequency and high power conditions, but also optimize the design and improve the stability and efficiency of the final device.

[0083] The carrier transport model is expressed as:

[0084]

[0085] In the formula, J ds Z represents the drift current density. g Indicates the gate width, v d (x) represents the carrier drift velocity, μn (x) represents the carrier mobility, μ min μ represents the mobility of a lightly doped material. L The value represents the mobility of the highly doped material, and N represents the actual carrier concentration. ref V represents the reference carrier concentration, α represents the fitting parameter, and V c (x) represents the channel potential, E c (x) represents the critical electric field, and d represents the differential operator.

[0086] In a specific instance, the fitting parameter α = 2.0.

[0087] S3. Determine the temperature dependence of the sapphire-based gallium nitride PHEMT.

[0088] Temperature dependence refers to the characteristic of sapphire-based gallium nitride PHEMT devices as the performance changes with temperature. Temperature changes affect parameters such as carrier mobility, threshold voltage, and transconductance of the device, thereby affecting its overall performance.

[0089] It should be noted that by determining the temperature dependence of sapphire-based gallium nitride (PHEMT), the performance changes of the device under different temperature conditions can be accurately described, especially the temperature effects of key parameters such as mobility, transconductance, and threshold voltage. This provides a quantitative analysis of the effect of temperature on device behavior, making the design more precise and ensuring that the device can operate stably in extreme temperature environments, thereby improving its reliability and efficiency in practical applications.

[0090] In one possible implementation, the relationship between device parameters and temperature is determined based on a temperature dependence model that includes first-order and second-order temperature coefficients.

[0091] Specifically, to accurately describe the change in device performance with temperature, a temperature-dependent model incorporating second-order effects is introduced, expressed as:

[0092]

[0093] In the formula, K p K represents the device constant at temperature T. p0 This represents the device constant at a reference temperature T0, where T0 represents the reference temperature and T represents the current temperature. c1 and T c2 The symbol represents the temperature coefficient.

[0094] In a specific example, based on the material properties, the range of the temperature coefficient is configured to be T. c1 ∈[10 -3 10 -2 ], T c2 ∈[10 -610 -4 ].

[0095] S4. Determine the leakage current based on the drift current density and the temperature dependence.

[0096] Specifically, by combining drift current density and temperature dependence, an output current model is established to accurately calculate the leakage current of the device. This model can systematically consider the effects of current density, temperature, and voltage changes on the leakage current, ensuring that the model can truly reflect the operating characteristics of the device. It can optimize parameters such as gate-source voltage, improve the device's operating efficiency, reduce power loss, and ensure the stability and reliability of the device under high-temperature conditions.

[0097] Drift current density describes the current density of charge carriers under the influence of an electric field, and is typically determined by factors such as carrier mobility, electric field strength, and carrier density. The output current model describes the output current (including leakage current) of the device at a specific input voltage, taking into account factors such as current density, temperature effects, and gate-source voltage. Leakage current refers to the drain-source current controlled by the gate-source voltage in a sapphire-based gallium nitride (GaN) PHEMT. Leakage current is an important indicator for evaluating device performance and efficiency; higher leakage current usually means higher power loss.

[0098] In this embodiment, the leakage current can be obtained by integrating the current density over the channel length. Similarly, the leakage current can also be obtained by sampling the finite element method, establishing a lookup table of temperature and current, etc.

[0099] In one possible implementation, the process of determining the leakage current includes:

[0100] S401. Based on the drift current density and the temperature dependence, determine the leakage current in the linear region and the leakage current in the saturation region, respectively.

[0101] Leakage current I in the saturation region ds Represented as:

[0102]

[0103] In the formula, μ n V represents electron mobility. ti Represents the threshold voltage, V ds Let represent the drain-source voltage, and lg represent the logarithmic function.

[0104] Linear region leakage current Represented as:

[0105]

[0106]

[0107] In the formula, E c Represents the critical electric field, l g V represents the channel length. dsat This represents the saturation voltage.

[0108] S402. By combining the leakage current in the linear region and the leakage current in the saturation region, a complete and smoothly transitioning output current model is constructed, which can accurately calculate the leakage current under any bias.

[0109] It should be noted that by combining the leakage current in the linear region and the leakage current in the saturation region to construct an output current model to accurately determine the leakage current, the current characteristics of different operating regions (linear region and saturation region) can be fully considered, ensuring that the leakage current calculation is more accurate and comprehensive. By combining the leakage current information of two different operating modes, the behavior of PHEMT in actual operation can be better simulated, improving the design accuracy and the reliability of device performance.

[0110] S5. Establish a capacitance model and determine parasitic capacitance.

[0111] In gallium nitride PHEMT, the capacitance model describes the capacitance effect generated within the device due to the presence of an electric field. Parasitic capacitance refers to the additional capacitance effect caused by the internal structure of the device (such as the electric field between the gate, source, and drain), which has an adverse effect on the device's performance.

[0112] It should be noted that establishing a capacitance model and determining parasitic capacitance can accurately quantify the capacitance effect inside the device, optimize the device's response speed and reduce power loss, thereby improving the operating efficiency and stability of sapphire-based gallium nitride PHEMTs. By accurately calculating parasitic capacitance, more reliable performance predictions can be provided for circuit design.

[0113] In this step, parasitic capacitance can also be determined by other related techniques such as TCAD simulation software extraction and measured S-parameter fitting.

[0114] In one possible implementation, the parasitic capacitance includes: drain-source capacitance and gate-source capacitance.

[0115] Drain-source capacitance refers to the capacitance generated between the drain and source electrodes in a gallium nitride (GaN) PHEMT due to the electric field. During device operation, drain-source capacitance affects the switching speed and current transfer efficiency. Gate-source capacitance refers to the capacitance generated between the gate and source electrodes in a GaN PHEMT. Gate-source capacitance is a crucial factor affecting the device's switching speed, determining the charging and discharging speed of the gate. A smaller gate-source capacitance results in a faster device response and improved switching efficiency.

[0116] Drain-source capacitance C ds Represented as:

[0117]

[0118] In the formula, C ds0 P represents the drain-source capacitance at zero bias. ds m1 represents the built-in potential, and m1 represents the junction gradient coefficient.

[0119] Gate-source capacitance C gd Represented as:

[0120]

[0121] In the formula, C gd0 V represents the gate-source capacitance at zero bias. gd This indicates the built-in potential.

[0122] In a specific example, the junction gradient coefficient m1 = 0.5 can be used to control the nonlinear relationship between the capacitor and the voltage.

[0123] S6. Based on the parasitic capacitance, the leakage current, and the drift current density, optimization analysis is performed with the goal of improving the performance ratio of the sapphire-based gallium nitride PHEMT.

[0124] In this embodiment, the optimization analysis is mainly achieved by establishing a FOM objective function and using the Raven optimization algorithm. The objective function comprehensively considers factors such as parasitic capacitance, leakage current, and drift current density, which can accurately optimize the design of sapphire-based gallium nitride PHEMTs, ensuring their optimal performance under different operating conditions. This not only helps reduce power loss and improve response speed, but also effectively improves the overall efficiency and reliability of the device, thereby maximizing performance.

[0125] In this step, the optimization analysis can also be implemented by establishing other objective functions (such as multi-objective optimization) or using other optimization algorithms (such as genetic algorithms, particle swarm optimization, etc.).

[0126] In one possible implementation, the optimization analysis process includes:

[0127] S601. Determine the transconductance of the sapphire-based gallium nitride (PHEMT) based on the leakage current. Transconductance refers to the proportion of the leakage current change caused by a change in gate voltage in a field-effect transistor. It reflects the device's sensitivity and response to changes in gate voltage and is typically used to measure the device's gain and switching efficiency. Calculate the transconductance g based on the derivative of the leakage current with respect to the gate-source voltage. m , is represented as:

[0128] .

[0129] S602. Determine the on-resistance based on the 2DEG carrier density and carrier mobility upon which the drift current density depends. On-resistance refers to the resistance between the source and drain of a sapphire-based gallium nitride (PHEMT) in the on-state, and is related to factors such as carrier mobility and carrier density. The smaller the on-resistance, the higher the device's conduction efficiency. On-resistance R on The calculation formula is:

[0130]

[0131] In the formula, L represents the channel length and W represents the channel width.

[0132] S603. Construct an objective function that integrates transconductance, on-resistance, parasitic capacitance, and temperature stability indices. The objective function is expressed as:

[0133]

[0134] In the formula, FOM represents the objective function, and w1, w2, w3, and w4 all represent weight coefficients. g m R represents transconductance. on T represents the on-resistance. max T represents the maximum operating temperature. avg This indicates the average operating temperature.

[0135] In a specific instance, the weight coefficients satisfy the normalization condition: w1=0.35, w2=0.25, w3=0.25, w4=0.15.

[0136] S604. Maximize the objective function using the crow search algorithm to determine the optimal design parameters.

[0137] Specifically, the Raven Search algorithm is used to maximize the global optimization of the objective function FOM, which can efficiently search for the optimal solution in a complex design space. This algorithm has strong global search capabilities and high convergence speed, avoiding local optima and ensuring that the design parameters of the sapphire-based gallium nitride PHEMT achieve optimal performance. This method can improve the device's efficiency, stability, and reliability during multi-dimensional, multi-parameter optimization processes.

[0138] In one possible implementation, the specific process of employing the crow search algorithm includes:

[0139] S604a. Set the initial parameters of the crow search algorithm, including: population size, maximum number of iterations, and parameter search range.

[0140] S604b: Initialize the position and velocity of all crows, where the crow's position represents the design parameter.

[0141] S604c. Using the objective function as the fitness function, calculate the fitness value of each crow, and update the position of each crow based on the fitness value:

[0142]

[0143]

[0144] Where, x i,iter+1 Let x represent the position of the i-th crow in the (iter+1)-th iteration. i,iter Let ω represent the position of the i-th crow in the iter-th iteration, and r represent the inertia weight. i fl represents a random number in the interval [0,1]. i,iter Let m represent the distance the i-th crow flies in the iter-th iteration. j,iter Iter represents the optimal position of the j-th crow in the iter-th iteration. max ω represents the maximum number of iterations. max This represents the maximum inertia weight value, and t represents the current iteration number.

[0145] S604d Calculate the fitness value of each crow after the update.

[0146] S604e: When the fitness value of the updated crow is greater than or equal to the fitness value of the current crow, update the position of the current crow. When the fitness value of the updated crow is less than the fitness value of the current crow, keep the position of the current crow unchanged.

[0147] S604f, Repeat steps S604b to S604e until the maximum number of iterations is reached to determine the optimal design parameters for the sapphire-based gallium nitride PHEMT.

[0148] S7. Based on the optimization analysis, determine the optimal design parameters for the sapphire-based gallium nitride PHEMT.

[0149] S8. Design the sapphire-based gallium nitride PHEMT according to the optimal design parameters.

[0150] In a specific example, a set of optimal design parameters includes: gate length L g =0.25μm, gate width Z g = 2×50μm, AlGaN layer thickness d AlGaN =22nm, etc. Input these values ​​into device simulation software (such as Silvaco Atlas or SentaurusTCAD) for final performance verification, and use this information to complete the device layout design and fabrication process planning.

[0151] The beneficial effects of the technical solutions provided in the embodiments of the present invention include at least the following:

[0152] In this embodiment of the invention, by establishing a carrier transport model, the movement of carriers in an electric field can be effectively described, and the current density can be accurately predicted, making the calculation of current density more precise and thus providing more accurate leakage current prediction. By accurately calculating the impact of temperature on device performance, the operating state of the device at extreme temperatures can be predicted, thereby improving the stability and reliability of the device. Especially in high-temperature applications, by establishing an output current model based on drift current density and temperature dependence, leakage current in both the linear and saturation regions can be considered simultaneously, providing a comprehensive current density-voltage characteristic analysis framework, which helps to achieve precise leakage current control and optimization in practical design. By establishing a parasitic capacitance model, the changes in gate-source capacitance and drain-source capacitance can be described more accurately, improving the high-frequency performance of the device. By establishing a comprehensive objective function, multiple performance indicators such as transconductance, on-resistance, and drain-source capacitance can be considered simultaneously, ensuring that various performances can be balanced during the design process, thereby improving the overall device performance.

[0153] like Figure 2 As shown, this embodiment also provides a sapphire-based gallium nitride PHEMT design system 20, including: a processor 201 and a memory 202;

[0154] The memory 202 stores programs or instructions that can run on the processor 201. When the program or instructions are executed by the processor 201, they implement the steps of the above-described sapphire-based gallium nitride PHEMT design method and achieve the same technical effect. To avoid repetition, the present invention will not elaborate further.

[0155] It should be understood that the processor 201 in this embodiment of the invention may be a central processing unit (CPU), or it may be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor.

[0156] It should also be understood that the memory 202 in the embodiments of the present invention can be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. The non-volatile memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. The volatile memory can be random access memory (RAM), which is used as an external cache. By way of example, but not limitation, many forms of random access memory (RAM) are available, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate synchronous DRAM (DDR SDRAM), enhanced synchronous DRAM (ESDRAM), synchronous linked DRAM (SLDRAM), and direct rambus RAM (DR RAM).

[0157] The above embodiments can be implemented, in whole or in part, by software, hardware (such as circuits), firmware, or any other combination thereof. When implemented using software, the above embodiments can be implemented, in whole or in part, as a computer program product. The computer program product includes one or more computer instructions or computer programs. When the computer instructions or computer programs are loaded or executed on a computer, all or part of the processes or functions described in the embodiments of the present invention are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that includes one or more sets of available media. The available medium can be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium. A semiconductor medium can be a solid-state drive.

[0158] It should be understood that, in various embodiments of the present invention, the order of the above-mentioned process numbers does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.

[0159] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.

[0160] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the devices, apparatuses, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0161] In the several embodiments provided by this invention, it should be understood that the disclosed devices, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another device, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.

[0162] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0163] In addition, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0164] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this invention, essentially, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0165] This invention also provides a readable storage medium comprising: storing a program or instructions on the readable storage medium, wherein when the program or instructions are executed by a processor, the program or instructions implement the steps of the above-described sapphire-based gallium nitride PHEMT design method and achieve the same technical effect. To avoid repetition, this invention will not elaborate further.

[0166] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the embodiments of the present invention, and are not intended to limit them. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in the present invention should be included within the protection scope of the present invention.

Claims

1. A sapphire-based gallium nitride PHEMT design method, characterized in that, Includes the following steps: S1. Obtain the relevant parameters of sapphire-based gallium nitride PHEMT; S2. Determine the drift current density based on the relevant parameters; S3. Determine the temperature dependence of the sapphire-based gallium nitride PHEMT; S4. Determine the leakage current based on the drift current density and the temperature dependence; S5. Determine the parasitic capacitance; S6. Based on the parasitic capacitance, the leakage current, and the drift current density, optimization analysis is performed with the goal of improving the performance ratio of the sapphire-based gallium nitride PHEMT. S7. Based on the optimization analysis, determine the optimal design parameters for the sapphire-based gallium nitride PHEMT; S8. Design the sapphire-based gallium nitride PHEMT according to the optimal design parameters.

2. The sapphire-based gallium nitride PHEMT design method according to claim 1, characterized in that, The relevant parameters include at least the polarization parameters, physical parameters, and dielectric constants of the GaN and AlGaN layers.

3. The sapphire-based gallium nitride PHEMT design method according to claim 1, characterized in that, The process of determining the drift current density includes: The 2DEG carrier density of the sapphire-based gallium nitride PHEMT was determined based on the relevant parameters. Based on the principle of energy conservation, the 2DEG carrier density is converted into carrier depletion density; The drift current density is determined based on the converted carrier depletion density.

4. The sapphire-based gallium nitride PHEMT design method according to claim 1, characterized in that, The process of determining the temperature dependence of the sapphire-based gallium nitride PHEMT includes: The relationship between device parameters and temperature is determined based on a temperature dependence model that includes first-order and second-order temperature coefficients.

5. The sapphire-based gallium nitride PHEMT design method according to claim 1, characterized in that, The process of determining the leakage current based on the drift current density and the temperature dependence includes: Based on the drift current density and the temperature dependence, the leakage current in the linear region and the leakage current in the saturation region are determined respectively. By combining the leakage current in the linear region and the leakage current in the saturation region, a complete output current model is constructed to determine the leakage current.

6. The sapphire-based gallium nitride PHEMT design method according to claim 1, characterized in that, The parasitic capacitance includes: drain-source capacitance and gate-source capacitance.

7. The sapphire-based gallium nitride PHEMT design method according to claim 1, characterized in that, The optimization analysis process includes: The transconductance of the sapphire-based gallium nitride PHEMT is determined based on the leakage current. The on-resistance is determined based on the 2DEG carrier density and carrier mobility upon which the drift current density depends. An objective function is constructed that integrates transconductance, on-resistance, parasitic capacitance, and temperature stability indices. The optimal design parameters are determined by maximizing the objective function using an optimization algorithm.

8. The sapphire-based gallium nitride PHEMT design method according to claim 7, characterized in that, The optimization algorithm is the crow search algorithm.

9. A sapphire-based gallium nitride PHEMT design system, characterized in that, include: Processor and memory; The memory stores programs or instructions that can run on the processor, which, when executed by the processor, implement the steps of the sapphire-based gallium nitride PHEMT design method as described in any one of claims 1 to 8.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the program is executed by the processor, it implements the sapphire-based gallium nitride PHEMT design method as described in any one of claims 1 to 8.

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