CHI slave node read command transmission method and device, system on chip and storage medium

Abstract

The invention provides a CHI slave node read command transmission method and device, a system on chip and a storage medium, and the method comprises the steps: creating a prefetch state table which records the information of a tag, a read address A and a read address B corresponding to each cache line data; after a CHI read command is received, an operation code and a read address of a read request are obtained, and the read address is compared with a read address A in the prefetch state table; if the read address does not hit the read address A in the prefetch state table, judging whether the request type of the corresponding read command is a readclean type or not, and when the judgment result is negative, starting a sequential prefetch mode; if the read addresses hit the read address A in the prefetch state table, three read addresses hitting the prefetch state table are continuously fetched each time, the second read address verifies whether the sequence of the read addresses is sequential prefetch or not, the third read address verifies whether the sequence of the read addresses is fixed step length local access or not, and the prefetch mode is adjusted.

Description

Technical Field

[0001] This invention belongs to the field of communication technology, and particularly relates to a method, apparatus, system-on-a-chip, and storage medium for transmitting read commands to a CHI slave node. Background Technology

[0002] AMBA (Advanced Microcontroller Bus Architecture) is ARM's bus architecture standard, widely used for communication between ARM processors and other chips. In this architecture, AMBA CHI (Coherent Hub Interface) is a key component, designed specifically for multi-core processor environments to maintain cache coherency across multiple processor cores and support efficient data sharing and transmission. As multi-core processor integration increases and system architecture becomes more complex, ensuring cache coherency, especially when multiple cores concurrently access shared data, has become a critical challenge in chip design. The CHI protocol was proposed to address this challenge, providing an efficient and scalable coherency solution in multi-core systems.

[0003] The CHI protocol integrates cache coherency mechanisms (such as the MESI protocol) to ensure that cached data across different processor cores remains synchronized, thereby avoiding data conflicts and consistency issues. This protocol supports point-to-point and broadcast communication modes and can coordinate access to memory and cache resources in complex multi-core topologies. Based on a message-passing mechanism, CHI achieves low-latency, high-bandwidth data transmission, possesses good scalability, and is suitable for multi-processor collaboration scenarios such as high-performance computing, servers, and embedded systems.

[0004] In the CHI protocol, slave nodes can receive five types of read request commands: `readnosnp` (a simple read request that requests data directly from main memory or a specified destination without listening to other caches), `readonce` (temporary use, not long-term caching), `readclean` (read-only, requesting clean data), `readshared` (read-only, allowing sharing), and `readunique` (ready to write). The data unit for each command is a cache line (typically 64 bytes). When a slave node receives a CHI read command, it needs to convert it to the AXI protocol format to access main memory or the cache. However, the maximum transfer size for a single read operation supported by the AXI protocol is 4KB, resulting in a difference in data transfer speed. To improve read operation efficiency and reduce access latency, it is necessary to introduce a dynamic prefetch mechanism between the CHI slave node and the AXI protocol conversion module. This mechanism can adaptively adjust the prefetch strategy based on the actual CHI request characteristics, thereby optimizing the read path and improving overall data transfer efficiency. Summary of the Invention

[0005] This invention provides a method for transmitting read commands to a CHI slave node. The prefetch mode can be flexibly adjusted according to the actual situation of CHI requests, reducing the cache pressure caused by unnecessary prefetching and ensuring the efficient operation of the system.

[0006] The present invention also provides a CHI slave node read command transmission device and a storage medium, which can execute the steps of a CHI slave node read command transmission method.

[0007] The present invention also provides a system-on-a-chip having a CHI slave node read command transmission device.

[0008] Other objects and advantages of the present invention can be further understood from the technical features disclosed herein.

[0009] To achieve one, some, or all of the above objectives or other objectives, this invention provides a CHI slave node read command transmission method. The method involves creating a prefetch state table, which records the tag, read address A, prefetch mode, and read address B corresponding to each cached line of data. Read address A is the recorded read address corresponding to the received CHI read command, and read address B is the next read address received after read address A in the prefetch state table. After receiving a CHI read command, the CHI slave node parses the CHI read request packet, obtains the read request opcode and read address, and compares the read address of the read request with the read address A in the prefetch state table. If the read address of the read request does not match the read address in the prefetch state table... Read address A, determine whether the request type of the read command corresponding to the read address of the read request is of type readclean, and if the result is no, enable sequential prefetch mode; when sequential prefetch mode is enabled, read the read address of the next cache line data in advance; if the read address of the read request hits read address A in the prefetch state table, take three read addresses of read requests that hit the prefetch state table in succession. The read address of the second read request verifies whether the prefetch order of the read address of the read request is sequential prefetch, and the read address of the third read request verifies whether the prefetch order of the read address of the read request is a fixed step local access, and adjust the prefetch mode accordingly; according to the selected prefetch mode, generate an AXI read command, read data from the AXI slave device and return it to the CHI slave node.

[0010] If the read address of the read request does not match the read address A in the prefetch status table, and the read command request type is readclean, the read address of the read request is directly converted into an AXI read address, data is read from the AXI slave device and returned to the CHI slave node.

[0011] If the read address of the read request does not match read address A in the prefetch state table, and the read command request type is not readclean, update the prefetch state table, create a new row and set the label value to the label value of the previous row plus 1, write the read address of the read request into the read address A corresponding to the new row, increment the access count by 1, update the prefetch mode to sequential prefetch, and update read address B to read address A plus the read address of one cache line.

[0012] The read command request type is readclean, and the amount of data read is one cache line size. The data read by AXI from the device is directly returned to the CHI slave node. The read command request type is not readclean, and the amount of data read is two cache lines size. The data read by AXI from the device is cached, and the first cache line data is returned to the CHI slave node.

[0013] The method for verifying whether the read address prefetch order of the second read request is sequential prefetch is as follows: compare the difference between the read address of the second read request and the read address B of the row where the read address A of the prefetch state table is hit by the read address of the first read request. If the difference is equal to the size of a cache line, the prefetch mode is sequential prefetch; if the difference is not equal to the size of a cache line, update the read address B of the row where the read address A of the prefetch state table is hit by the read address of the first read request to the read address of the second read request, and at the same time change the prefetch mode to triggered prefetch; in triggered prefetch mode, the cache line data where the read address B corresponding to each read address A in the prefetch state table is read in advance.

[0014] The method for verifying whether the read address prefetch order of the third read request is a fixed-step partial access is as follows: Compare the difference between the read address of the third read request and the read address B of the row containing read address A in the prefetch state table that the read address of the second read request hits. If the read address of the third read request is greater than read address B and the difference is an integer multiple of a cache line, then it is a fixed-step partial access. Update the read address B of the row containing read address A in the prefetch state table that the read address of the second read request hits to the read address of the third read request. The prefetch mode is modified to partial prefetch, and n cache lines of data are read in advance, where n is the read address of the third read request. The difference between the address and the read address B of the row containing read address A of the prefetch state table that the read address of the second read request matches is divided by the data size of one cache line. If the read address of the third read request is less than read address B and the difference is an integer multiple of one cache line, then the read address A of the prefetch state table that the read address of the second read request matches is updated to the read address of the third read request. If the difference is not an integer multiple of one cache line, a new row is created in the prefetch state table and the label value is set to the label value of the previous row plus 1. The read address of the third read request is written into the read address A corresponding to the new row, and the access count is incremented by 1. The prefetch mode is updated to sequential prefetch.

[0015] If the read address of the read request matches the read address A of the prefetch state table, the cache line data corresponding to the read address A matched by the first read request is read and returned to the CHI slave node.

[0016] It also includes using a counter set to the number of entries in the prefetch state table. When the prefetch state table is updated, the counter is incremented by 1. When the counter value equals the number of entries in the prefetch state table, the access count corresponding to all rows with non-zero tag values ​​in the prefetch state table is decremented by 1, the counter is reset to 0, and the entire prefetch state table is updated. The prefetch mode corresponding to the row with the highest access count in the prefetch state table is updated to time prefetch. When the CHI slave node has not received a read command for a long time, the read address A corresponding to the time prefetch mode in the address list is extracted and an AXI read command is generated.

[0017] Within a set time period, rows that have not been accessed in the prefetch status table are deleted, and the label values ​​of the corresponding rows with a label value greater than that of the deleted row are decremented by 1. When the CHI slave node does not receive a read command, it reorganizes the prefetch status table, sorts it according to the number of accesses, updates the label of the row with the highest number of accesses to 0, and sorts it in order.

[0018] Another technical solution of the present invention provides a CHI slave node read command transmission device, wherein the transmission device is disposed in a bridging device between a CHI slave node and an AXI slave device, and includes a prefetch controller, wherein a prefetch status table is created in the prefetch controller, and the prefetch controller is used in the steps of the CHI slave node read command transmission method described above.

[0019] Another technical solution of the present invention provides a system-on-a-chip, including a CHI master device and an AXI slave device; a bridging device is provided between the CHI master device and the AXI slave device, and the bridging device is provided with a CHI slave node read command transmission device as described above.

[0020] Another technical solution of the present invention provides a storage medium on which a computer program is stored, and the computer program is executed by a processor to perform the steps in the CHI slave node read command transmission method described above.

[0021] Compared with the prior art, the beneficial effects of the present invention mainly include: 1. The CHI slave node read command transmission method of this application flexibly adjusts the prefetch mode according to the actual situation of CHI read requests, reducing the cache pressure caused by unnecessary prefetching, while increasing active data prefetching in the case of long-term no requests, ensuring that the system can run efficiently at any time. At the same time, by dynamically adjusting the prefetch strategy, the hit rate can be improved and the read latency reduced. 2. The CHI slave node read command transmission device of the present invention can be set in the existing bridging device without adding an additional interface, and can be adapted to both CHI and AXI interfaces, thus having the advantage of good compatibility.

[0022] To make the above and other objects, features and advantages of the present invention more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description

[0023] To more clearly illustrate the technical solutions in the specific embodiments of the present invention, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0024] Figure 1 This is a schematic diagram of the CHI bus system architecture of the present invention.

[0025] Figure 2 This is a schematic representation of the prefetch state in this invention.

[0026] Figure 3 This is a flowchart illustrating the conversion of a CHI read request into an AXI read command according to the present invention. Detailed Implementation

[0027] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings, which illustrate preferred embodiments of the application. However, this application may be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this application will be thorough and complete.

[0028] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0029] It should be understood that when an element or layer is referred to as being "on," "adjacent to," or "connected to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, components, regions, layers, doping types, and / or portions, these elements, components, regions, layers, doping types, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, doping type, or portion from another element, component, region, layer, doping type, or portion. Therefore, without departing from the teachings of this application, the first element, component, region, layer, doping type, or portion discussed below may be referred to as a second element, component, region, layer, or portion.

[0030] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that when the terms “comprise” and / or “comprising” are used in this specification, the presence of the stated feature, integer, step, operation, element, and / or part is established, but the presence or addition of one or more other features, integers, steps, operations, elements, parts, and / or groups is not excluded. Meanwhile, when used herein, the term “and / or” includes any and all combinations of the associated listed items.

[0031] Embodiments of the invention are described herein with reference to cross-sectional views illustrating preferred embodiments (and intermediate structures) of this application, thus allowing for the anticipation of variations in the illustrated shapes due to, for example, manufacturing techniques and / or tolerances. Embodiments of this application should not be limited to the specific shapes of the regions shown herein, but rather include shape deviations due to, for example, manufacturing techniques. Therefore, the regions shown in the figures are substantially schematic, and their shapes do not represent the actual shapes of regions of the device, nor do they limit the scope of this application.

[0032] Example 1 Example 1 provides a CHI slave node read command transmission method, including creating a prefetch state table. The prefetch state table records the tag (the tag value is the sequence number of each row, and the sequence number is sequentially increasing), read address A, prefetch mode, access count, and read address B information corresponding to each cached line of data (usually 64 bytes). The read address A is the read address recorded in the prefetch state table that is received in the CHI read command (that is, the information of read address A written in the prefetch state table). The read address B is the next read address received by read address A for each tag (read address B is the next read address received by the CHI slave node after the data corresponding to read address A is read by the system, and it is recorded in the prefetch state table). After receiving the CHI read command, the CHI slave node parses the CHI read request packet, obtains the read request opcode and read address, and compares the read address of the read request with the read address A in the prefetch state table; If the read address of the read request does not match read address A in the prefetch status table, determine whether the request type of the read command corresponding to the read address of the read request is of type readclean. If the result is no, enable sequential prefetch mode. When enabling sequential prefetch mode, add the read address corresponding to the next cache line to the prefetch queue in advance.

[0033] If the read address of the read request hits read address A in the prefetch state table, three read addresses of read requests that hit the prefetch state table are taken consecutively. The read address of the second read request is used to verify whether the prefetch order of the read address of the read request is sequential prefetch, and the read address of the third read request is used to verify whether the prefetch order of the read address of the read request is local access with a fixed step size, and the prefetch mode is adjusted. By verifying whether consecutively prefetched read addresses are sequential prefetched or accessed with a fixed step size, the corresponding prefetch mode can be adjusted. The prefetch mode can be flexibly adjusted according to the actual situation of CHI read requests, reducing the cache pressure caused by unnecessary prefetching, thereby improving system stability and efficiency.

[0034] Based on the selected prefetch mode, the read address of the read request is converted into an AXI read address to generate an AXI read command. The read command is then sent to read data from the AXI slave device and returned to the CHI slave node.

[0035] The following section, in conjunction with the accompanying drawings, provides a detailed explanation of a CHI slave node read command transmission method of this application. Figure 3 As shown, a CHI slave node read command transmission method in Embodiment 1 includes the following steps: Step 1: Create a prefetch state table.

[0036] The prefetch status table contains multiple rows of data, with entries including: label, read address A, prefetch mode, access count, and read address B. The label represents the sequence number of each row of data, and each row represents the relevant information for a cached row of data (64 bytes).

[0037] Read address A is the read address in the received CHI read request command, which is iteratively updated in real time during the prefetch adjustment process.

[0038] There are four prefetch modes: sequential prefetch, partial prefetch, time-based prefetch, and triggered prefetch. Sequential prefetch means prefetching the cache line data following the cache line data corresponding to the current read address A. Time-based prefetch means prefetching the data corresponding to a read address that is accessed the most times within a unit of time. Triggered prefetch means prefetching the cache line data corresponding to read address B for each read address A in the prefetch state table.

[0039] The access count represents the number of times the cache line data corresponding to read address A in the prefetch state table is read.

[0040] Read address B represents the read address information of the next cache line data received and recorded after each read address A in the prefetch state table is received.

[0041] In the initial stage, the prefetch state table contains all 0s. When the CHI slave node starts receiving read commands, it parses the read commands to obtain each read address and writes each parsed read address into the prefetch state table to complete the prefetch state table. The prefetch state table is used and updated in the subsequent prefetch dynamic adjustment process.

[0042] A schematic diagram of the prefetch state table is shown below. Figure 2 As shown.

[0043] Step 2: Parse the CHI read request packet to obtain the read request opcode and read address.

[0044] Step 3: Compare the parsed CHI read address with the read address A in the prefetch state table. If the parsed read address matches the read address A in the prefetch state table, proceed to step 4; otherwise, proceed to step 5.

[0045] Step 4: Parse the read opcode and analyze whether the read command type is readclean.

[0046] Step 4-1: If the read operation type is readclean (read-only, wanting to obtain clean data), directly convert the read address to an AXI read address, read the data size of one cache line, read the data from the AXI slave device and return it to the CHI slave node.

[0047] The readclean operation is a read-only operation, and its subsequent access patterns are usually unpredictable. Therefore, the probability of prefetching errors is high. So, after a readclean operation occurs, the system reads the data directly without performing a prefetch operation to reduce the probability of subsequent operations hitting errors.

[0048] Step 4-2: If the read operation type is not readclean, update the prefetch status table, create a new row and set the label value to the label value of the previous row plus 1, write the read address of the read request into the corresponding read address A in the new row, and increment the access count by 1, update the prefetch mode to sequential prefetch, update read address B to read address A plus the read address of one cache line, the read data volume is the size of two cache lines, AXI caches the data read from the device, and the first cache line data is returned to the CHI slave node (one cache line is the read data and the other line is the prefetched data).

[0049] For read operations that are not of the readclean type, the requester may use the data again later, and the probability of being hit later is higher than that of readclean type. Therefore, the data is recorded in the prefetch status table for subsequent prefetch scheduling.

[0050] Step 5: Perform dynamic prefetching.

[0051] Step 5-1: Read address hits read address A in the prefetch state table, and then continuously read three read addresses RA1, RA2, and RA3 that hit the prefetch state table.

[0052] Check the information of read address A in the prefetch status table that the first read address RA1 hits, read the cache line data corresponding to read address A, and AXI slave device extracts the cache line data from the cache and returns it to the CHI slave node.

[0053] Step 5-2: Verify whether the read address prefetch order is sequential prefetch by using the second read address RA2.

[0054] Step 5-2-1: Compare the difference between the second read address RA2 and the read address B of the row containing read address A of the prefetch state table hit by RA1. If the difference is equal to the size of a cache line (the size of a cache line in the CHI protocol is 64 bytes, that is, the difference between the second read address RA2 and the read address B of the row hit by RA1 is 64 bytes), verify that RA2 is sequential prefetching and the read address B of the row containing read address A of the prefetch state table hit by RA1 is correct (that is, the prefetch strategy is correct). At this time, execute sequential prefetching and change the prefetch mode of the row containing read address A of the prefetch state table hit by RA1 to sequential prefetching.

[0055] Step 5-2-2: If the difference is not equal to the size of a cache line, update the read address B of the row where the read address A of the prefetch state table hit by the first read address RA1 is located to the second read address RA2, change the prefetch mode to triggered prefetch, and the prefetched data is the cache line data corresponding to the second read address RA2 (read address B of the row hit by RA1).

[0056] Step 5-3: Verify whether the read address prefetch order is a fixed-step local access using the third read address RA3.

[0057] Step 5-3-1: Compare the difference between the third read address RA3 and the read address B of the row containing read address A of the prefetch state table that the second read address RA2 hits. If the third read address RA3 is greater than the read address B and the difference is an integer multiple of a cache line, then it is a fixed-step local access. Update the read address B of the row containing read address A of the prefetch state table that the second read address RA2 hits to the third read address, and change the prefetch mode to local prefetch. Read the data of n cache lines in advance, where n is the difference between the read address B of the row containing read address A of the prefetch state table that RA3 and RA2 hits divided by the size of the cache line.

[0058] Step 5-3-2: If the third read address RA3 is less than the read address B and the difference is an integer multiple of a cache line, then update the read address A of the prefetch state table hit by the second read address RA2 to the third read address (at this time, the third read address RA3 should be read first). Step 5-3-3: If the difference is not an integer multiple of a cache line, create a new row in the prefetch state table and set the label value to the label value of the previous row plus 1. Write the third read address RA3 into the read address A of the new row, and increment the access count by 1. Update the prefetch mode to sequential prefetch. Step 5-3-3 indicates that the prefetch is irregular. At this time, update the prefetch state table.

[0059] Step 5 selects three consecutively hit read addresses each time, compares and analyzes whether the prefetch strategy in the prefetch state table is correct, and modifies and updates it accordingly. That is, the prefetch state table is dynamically adjusted during use.

[0060] Step 6: Based on the selected prefetch mode, convert the read address of the read request to the AXI read address to generate the AXI read command, send the read command and read data from the AXI slave device and return it to the CHI slave node.

[0061] As an optional approach, the CHI slave node read command transmission method in Embodiment 1 also includes optimizing the prefetch strategy from a time dimension and maintaining the prefetch state table.

[0062] Optimizing the prefetch strategy from a time perspective includes using a counter set to the prefetch status table entry. Each time the prefetch status table is updated, the counter increments by 1. When the counter value equals the prefetch status table entry, the access count for all rows with non-zero tag values ​​in the prefetch status table is decremented by 1, and the counter is reset to 0, thus completing the update of the entire prefetch status table. The prefetch mode corresponding to the row with the highest access count in the prefetch status table is updated to time prefetch. When a CHI slave node has not received a read command for an extended period, the read address A corresponding to the time prefetch mode in the address list is extracted and an AXI read command is generated.

[0063] The maintenance of the prefetch status table includes deleting rows that have not been accessed in the prefetch status table within a set time, and decrementing the label value of the corresponding row that is greater than the label value of the deleted row by 1; when the CHI slave node does not receive a read command, it reorganizes the prefetch status table, sorts it according to the number of accesses, updates the label of the row with the highest number of accesses to 0, and sorts it in order.

[0064] Example 2 10. Embodiment 2 provides a CHI slave node read command transmission device, wherein the transmission device is disposed within a bridging device between the CHI slave node and the AXI slave device, see [link to embodiment]. Figure 1 The bridging device converts the read address of the CHI slave node into the AXI read address of the external device, and also includes a prefetch controller. The prefetch controller creates a prefetch status table and is used to execute the steps in the CHI slave node read command transmission method in Embodiment 1.

[0065] Example 3 Embodiment 3 provides a system-on-a-chip, including a CHI master device and an AXI slave device; a bridging device is provided between the CHI master device and the AXI slave device, and the bridging device is provided with a CHI slave node read command transmission device as described in Embodiment 2.

[0066] Example 4 Example 4 provides a storage medium on which a computer program is stored. When the computer program is executed by a processor, it implements the steps in the CHI slave node read command transmission method in Example 1.

[0067] The foregoing has provided a detailed description of the CHI slave node read command transmission method, apparatus, on-chip system, and storage medium provided by the present invention. Specific examples have been used to illustrate the structure and working principle of the invention. The descriptions of the embodiments above are merely for the purpose of helping to understand the method and core ideas of the present invention. It should be noted that those skilled in the art can make various improvements and modifications to the present invention without departing from its principles, and these improvements and modifications also fall within the scope of protection of the claims of the present invention.

Claims

1. A CHI slave node read command transmission method, characterized by, The prefetch state table records the information of each cache line data corresponding to a tag, a read address A, a prefetch mode, a number of accesses, and a read address B; The read address A is a recorded read address corresponding to a received CHI read command, and the read address B is a read address of a cache line data received after the read address A in the prefetch state table; After the CHI slave node receives the CHI read command, the CHI read request packet is parsed to obtain an operation code and a read address of the read request, and the read address of the read request is compared with the read address A in the prefetch state table; If the read address of the read request does not hit the read address A in the prefetch state table, it is determined whether the request type of the read command corresponding to the read address of the read request is a readclean type, and when the determination result is no, a sequential prefetch mode is enabled; When the sequential prefetch mode is enabled, the read address of the next cache line data is read in advance; If the read address of the read request hits the read address A in the prefetch state table, three read addresses of read requests that hit the prefetch state table are taken continuously each time, the read address of the second read request verifies whether the read address prefetch order of the read request is a sequential prefetch, the read address of the third read request verifies whether the read address prefetch order of the read request is a fixed-step local access, and the prefetch mode is adjusted; According to the selected prefetch mode, an AXI read command is generated, data is read from an AXI slave device, and the data is returned to the CHI slave node.

2. The CHI slave node read command transmission method according to claim 1, characterized in that, If the read address of the read request does not hit the read address A in the prefetch state table, and the read command request type is a readclean type, the read address of the read request is directly converted into an AXI read address, data is read from an AXI slave device, and the data is returned to the CHI slave node.

3. The method of claim 2, wherein the CHI slave node read command is transmitted by the master node to the CHI slave node by a command bus. If the read address of the read request does not hit the read address A in the prefetch state table, and the read command request type is not a readclean type, the prefetch state table is updated, a new row is created, the value of the tag is set to be one more than the value of the tag of the previous row, the read address of the read request is written into the read address A of the new row, the number of accesses is increased by one, the prefetch mode is updated to be a sequential prefetch, and the read address B is updated to be one cache line read address more than the read address A.

4. The CHI slave node read command transmission method according to claim 3, characterized in that, The read command request type is a readclean type, the read data amount is one cache line size, and the data read by the AXI slave device is directly returned to the CHI slave node. The read command request type is not a readclean type, the read data amount is two cache line sizes, and the data read by the AXI slave device is cached, and the first cache line data is returned to the CHI slave node.

5. The method of claim 1, wherein the CHI slave node read command is transmitted by the master node to the CHI slave node in a command frame. The method for verifying whether the read address prefetch order of the read request is a sequential prefetch by the read address of the second read request is that the read address of the second read request is compared with the read address B of the row in which the read address A of the first read request hits the prefetch state table, if the difference is equal to the size of one cache line, the prefetch mode is a sequential prefetch. If the difference is not equal to the size of a cache line, the read address B of the row in which the read address A of the prefetch status table hit by the read address of the first read request is updated to the read address of the second read request, and the prefetch mode is modified to trigger prefetching; In the trigger prefetching mode, the data in the cache line in which the read address B corresponding to the read address A is read in advance.

6. The method of claim 1, wherein the CHI slave node read command is transmitted in a command packet. The third read request verifies whether the read address of the read request is a fixed step local access method by comparing the difference between the read address of the third read request and the read address B of the row in which the read address A of the prefetch status table hit by the read address of the second read request is located. If the read address of the third read request is greater than the read address B and the difference is an integer multiple of the size of a cache line, it is a fixed step local access, the read address B of the row in which the read address A of the prefetch status table hit by the read address of the second read request is located is updated to the read address of the third read request, and the prefetch mode is modified to local prefetching, and the data in n rows of cache lines is read in advance, n being the difference between the read address of the third read request and the read address B of the row in which the read address A of the prefetch status table hit by the read address of the second read request is located divided by the data amount of a cache line; If the read address of the third read request is less than the read address B and the difference is an integer multiple of the size of a cache line, the read address A of the prefetch status table hit by the read address of the second read request is updated to the read address of the third read request; If the difference is not an integer multiple of the size of a cache line, a new row is created in the prefetch status table and the value of the tag is set to the value of the tag of the previous row plus 1, the read address of the third read request is written into the read address A of the new row, the access times is added by 1, and the prefetch mode is updated to sequential prefetching.

7. The method of claim 1, wherein the CHI slave node read command is transmitted in a command packet. If the read address of the read request hits the read address A of the prefetch status table, the data in the cache line corresponding to the read address A hit by the read address of the first read request is read and returned to the CHI slave node.

8. The method of claim 1, wherein the CHI slave node read command is transmitted in a command packet. A counter is also included, which is set to the number of entries of the prefetch status table. When the prefetch status table is updated once, the counter is incremented by 1. When the value of the counter is equal to the number of entries of the prefetch status table, the access times of the rows in which the tag values are not 0 in the prefetch status table are reduced by 1, the counter is reset to 0, and the update of the entire prefetch status table is completed. The prefetch mode corresponding to the row with the maximum access times in the prefetch status table is updated to time prefetching. When the CHI slave node does not receive a read command for a long time, the read address A corresponding to the time prefetching mode in the address list is extracted and an AXI read command is generated.

9. The method of claim 1, wherein the CHI slave node read command is transmitted in a command packet. Within a set time, the rows in the prefetch status table that are not accessed are deleted, and the tag values of the corresponding rows greater than the tag value of the deleted row are reduced by 1. When the CHI slave node does not receive a read command, the prefetch status table is sorted according to the access times, the tag of the row with high access times is updated to 0, and the rows are sequentially sorted.

10. A CHI slave node read command transfer device, the transfer device being provided within a bridge device between a CHI slave node and an AXI slave device, characterized in that, A prefetch controller is included, in which a prefetch status table is created, and the prefetch controller is used to perform the steps in the CHI slave node read command transmission method of any one of claims 1-9.

11. A system on chip, characterized by The CHI master device and the AXI slave device are connected through a bridge device, and the bridge device is provided with a CHI slave node read command transmission device as claimed in claim 10. The computer program is executed by a processor to implement the steps in the CHI slave node read command transmission method as claimed in any one of claims 1 to 9.

12. A storage medium having stored thereon a computer program, characterized in that The computer program is executed by a processor to implement the steps in the CHI slave node read command transmission method as claimed in any one of claims 1 to 9.

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