Battery pack passive equalization circuit and battery pack management device

Abstract

The application relates to the battery technical field and discloses a battery pack passive equalization circuit and a battery pack management device. The battery pack passive equalization circuit comprises an equalization module, a first end of the equalization module is used for being connected with negative poles of a plurality of battery cells in one-to-one correspondence through a plurality of first switches, and a second end of the equalization module is used for being connected with positive poles of the plurality of battery cells in one-to-one correspondence through a plurality of second switches; and a first control module is connected with the plurality of first switches and the plurality of second switches. After the first control module determines a battery cell with a voltage greater than or equal to a first preset voltage threshold in the plurality of battery cells as a to-be-equalized battery cell, the first control module sends a driving signal to the first switch and the second switch connected with the to-be-equalized battery cell, so that the first switch and the second switch connected with the to-be-equalized battery cell are closed, the equalization module is connected with the to-be-equalized battery cell in parallel, and voltage equalization is performed on the to-be-equalized battery cell. In the above manner, the application improves the equalization speed of a single battery cell, and further improves the equalization efficiency of the battery pack.

Description

Technical Field

[0001] This application relates to the field of battery technology, specifically to a passive balancing circuit for a battery pack and a battery pack management device. Background Technology

[0002] In the new energy industry, power batteries or energy storage battery packs are composed of multiple cells connected in series or parallel. In series-connected battery packs, in order to extend the battery pack's lifespan, it is necessary to maintain the consistency of the voltage of each cell as much as possible to prevent the overall capacity from being suppressed due to the voltage of a single cell being too high.

[0003] Current BMS (Battery Management System) typically uses a balancing module composed of a MOS switch connected in series with a resistor. Multiple balancing modules are then connected in parallel across each battery cell. The system controls the MOS switch of each balancing module to determine whether to allow energy to be dissipated through the resistor in the corresponding cell, thus achieving voltage balancing for each cell. However, since each cell has a balancing module connected in parallel, simultaneously balancing multiple cells generates significant heat. To avoid the heat affecting the safety of the entire circuit, the resistance of the resistor connected in series with each MOS switch is usually set very small. This results in a slow balancing speed for each cell, reducing the overall balancing efficiency of the battery pack. Summary of the Invention

[0004] In view of the above problems, this application provides a battery pack passive balancing circuit and battery pack management device, which improves the balancing efficiency of the battery pack by increasing the balancing speed of individual cells.

[0005] According to one aspect of the embodiments of this application, a passive balancing circuit for a battery pack is provided. The battery pack includes multiple cells connected in series. The passive balancing circuit includes: a balancing module, with a first end configured to be connected to the negative terminals of the multiple cells one-to-one via multiple first switches, and a second end configured to be connected to the positive terminals of the multiple cells one-to-one via multiple second switches; and a first control module connected to the multiple first switches and second switches. The first control module is configured to, after identifying cells with voltages greater than or equal to a first preset voltage threshold as cells to be balanced, send drive signals to the first and second switches connected to the cells to be balanced to close the first and second switches connected to the cells to be balanced, thereby connecting the balancing module in parallel with the cells to be balanced to perform voltage balancing on the cells to be balanced.

[0006] In one alternative approach, the first control module is further configured to stop sending drive signals to the first and second switches connected to the battery cell to be balanced when it is determined that the voltage of the battery cell to be balanced has been balanced to be less than a second preset voltage threshold; wherein the second preset voltage threshold is less than the first preset voltage threshold.

[0007] In one alternative approach, the first control module is further configured to, after determining that there are multiple battery cells with voltages greater than the first preset voltage threshold, sequentially identify the battery cells among the multiple battery cells with voltages greater than the first preset voltage threshold that have not undergone voltage equalization as battery cells to be equalized, and send drive signals to the first switch and the second switch connected to the battery cells to be equalized, until all battery cells among the multiple battery cells with voltages greater than the first preset voltage threshold are voltage equalized.

[0008] In one optional embodiment, the first switch is a first MOSFET, and the second switch is a second MOSFET. Among the first and second MOSFETs connected to the same battery cell, the drain and source of the first MOSFET are connected to the negative terminal of the battery cell and the first terminal of the equalization module, respectively, while the drain and source of the second MOSFET are connected to the positive terminal of the battery cell and the second terminal of the equalization module, respectively. The first control module includes multiple output pins, each corresponding to one of the battery cells. Each output pin is connected to the gate of the first MOSFET and the gate of the second MOSFET connected to its corresponding battery cell. The first control module, after determining the battery cell to be equalized, controls the output pin corresponding to the battery cell to send drive signals to the gates of the first and second MOSFETs connected to the battery cell. The first control module is also used to, when determining that the voltage of the battery cell to be equalized is equalized to less than a second preset voltage threshold, control the output pin corresponding to the battery cell to stop sending drive signals to the gates of the first and second MOSFETs connected to the battery cell.

[0009] In one alternative embodiment, the first control module further includes a control pin, and the battery pack passive balancing circuit further includes a drive signal switch module. The drive signal switch module is connected to the control pin and multiple output pins respectively. The drive signal switch module is used to output a control signal to the first control module through the control pin when at least two output pins are detected to output drive signals, so as to stop the first control module from outputting drive signals.

[0010] In one alternative embodiment, the battery pack comprises X cells connected in series, where X ≥ 2; the first control module includes an analog front-end chip, wherein the C of the analog front-end chip... i pins and C i-1 The pins are connected to the positive and negative terminals of the i-th cell, respectively, where i ≥ 1; the multiple output pins are the S pins of the analog front-end chip. i pin, S i+2The pins are respectively connected to the gates of the first MOSFET and the second MOSFET connected to the i-th cell; the battery pack passive balancing circuit also includes a second control module, which is respectively connected to the gates of the first MOSFET and the second MOSFET connected to the X-1 cell and the X-th cell; the second control module is respectively connected to the S1 pin and the S2 pin of the analog front-end chip, and the second control module is used to send a drive signal to the gates of the first MOSFET and the second MOSFET connected to the X-1 cell after the analog front-end chip determines the X-1 cell or the X-th cell as the cell to be balanced and receives the drive signal sent by the S1 pin or the S2 pin of the analog front-end chip, or to send a drive signal to the gates of the first MOSFET and the second MOSFET connected to the X-th cell.

[0011] In one alternative embodiment, the second control module further includes a third MOSFET and a fourth MOSFET. The drains of both the third and fourth MOSFETs are connected to the voltage output terminal of the second control module. The source of the third MOSFET is connected to the gates of the first and second MOSFETs connected to the (X-1)th battery cell, respectively. The source of the fourth MOSFET is connected to the gates of the first and second MOSFETs connected to the Xth battery cell, respectively. The gates of the third and fourth MOSFETs are connected to the S1 and S2 pins of the analog front-end chip, respectively.

[0012] In one alternative approach, there are multiple equalization modules, each equalization module performs voltage equalization on at least two cells in the battery pack; the first end of each equalization module is used to connect one-to-one with the negative terminals of the multiple cells to be equalized through multiple first switches, and the second end of each equalization module is used to connect one-to-one with the positive terminals of the multiple cells to be equalized through multiple second switches; the first control module is further used to, after determining that the multiple cells to be equalized belong to cells equalized by different equalization modules, simultaneously send drive signals to the first and second switches connected to one of the cells to be equalized by each equalization module.

[0013] In one alternative approach, the load balancer module is the load balancing module.

[0014] According to another aspect of the embodiments of this application, a battery pack management device is provided, including a battery pack and the battery pack passive balancing circuit provided in any of the above embodiments.

[0015] In the passive balancing circuit of the battery pack provided in this application embodiment, the first terminal of the balancing module is connected to the negative terminals of multiple battery cells one by one through a first switch, and the second terminal of the balancing module is connected to the positive terminals of multiple battery cells one by one through a second switch. By connecting a first control module to multiple first and second switches, the first control module, after identifying a battery cell with a voltage greater than or equal to a first preset voltage threshold as the cell to be balanced, can send a drive signal to the first and second switches connected to the cell to be balanced. This closes the first and second switches connected to the cell to be balanced, allowing the balancing module to connect in parallel with the cell to be balanced, consuming the energy of the cell to be balanced, and achieving voltage balancing of the cell to be balanced. Through this method, the first control module can control the same balancing module to perform voltage balancing on cells with abnormally high voltages among multiple battery cells. Since only one balancing module generates heat when balancing a cell, the balancing current of the balancing module can be set relatively large. Without affecting the safety of the entire circuit, the balancing speed of the balancing module on a single cell is increased, thereby improving the balancing efficiency of the battery pack.

[0016] The above description is only an overview of the technical solution of this application. In order to better understand the technical means of this application and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of this application more obvious and understandable, the following are specific embodiments of this application. Attached Figure Description

[0017] Various other advantages and benefits will become apparent to those skilled in the art upon reading the following detailed description of preferred embodiments. The accompanying drawings are for illustrative purposes only and are not intended to limit the scope of this application. Furthermore, the same reference numerals denote the same parts throughout the drawings. In the drawings:

[0018] Figure 1 This is an existing passive equalization circuit;

[0019] Figure 2 This is a schematic diagram of the passive balancing circuit for a battery pack provided in an embodiment of this application;

[0020] Figure 3 This is a schematic diagram of the passive balancing circuit for a battery pack provided in an embodiment of this application;

[0021] Figure 4 A circuit diagram of the battery pack passive balancing circuit provided in an embodiment of this application;

[0022] Figure 5 This is a schematic diagram of the structure of a battery pack passive balancing circuit provided in another embodiment of this application;

[0023] Figure 6 This is a schematic diagram of the structure of the battery pack management device provided in an embodiment of this application.

[0024] The reference numerals in the detailed embodiments are as follows:

[0025] 1. Battery pack management equipment; 10. Battery pack; 11. Battery cell; 12. Battery cell to be balanced; 20. Passive balancing circuit of battery pack; 100. Balancing module; 110. First switch; 120. Second switch; 200. First control module; 210. Output pin; 220. Control pin; 300. Drive signal switch module. Detailed Implementation

[0026] The embodiments of the technical solution of this application will now be described in detail with reference to the accompanying drawings. These embodiments are only used to more clearly illustrate the technical solution of this application and are therefore merely examples, and should not be used to limit the scope of protection of this application.

[0027] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains; the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the application; the terms “comprising” and “having”, and any variations thereof, in the specification, claims, and foregoing description of the drawings are intended to cover non-exclusive inclusion.

[0028] In the description of the embodiments of this application, technical terms such as "first" and "second" are used only to distinguish different objects and should not be construed as indicating or implying relative importance or implicitly specifying the number, specific order, or primary and secondary relationship of the indicated technical features. In the description of the embodiments of this application, "multiple" means two or more, unless otherwise explicitly defined.

[0029] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0030] In the description of the embodiments in this application, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent three cases: A exists, A and B exist simultaneously, and B exists. In addition, the character " / " in this document generally indicates that the related objects before and after it have an "or" relationship.

[0031] In the description of the embodiments of this application, the term "multiple" refers to two or more (including two), similarly, "multiple sets" refers to two or more (including two sets), and "multiple pieces" refers to two or more (including two pieces).

[0032] In the description of the embodiments of this application, the technical terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," and "circumferential" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing the embodiments of this application and simplifying the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the embodiments of this application.

[0033] In the description of the embodiments of this application, unless otherwise expressly specified and limited, technical terms such as "installation," "connection," "joining," and "fixing" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. For those skilled in the art, the specific meaning of the above terms in the embodiments of this application can be understood according to the specific circumstances.

[0034] In the new energy industry, power batteries or energy storage battery packs are composed of multiple cells connected in series or parallel. In a series battery pack, the positive and negative terminals of multiple cells are connected sequentially, and the current flowing through each cell is exactly the same. In a parallel battery pack, the positive terminals of multiple cells are connected together, and the negative terminals are connected together, and the voltage across each cell is forced to be equal.

[0035] In a series-connected battery pack, even using cells from the same batch and of the same specifications, slight differences in manufacturing processes and subtle variations in the environment (temperature, heat dissipation) during use can gradually lead to variations in parameters such as capacity, internal resistance, and self-discharge rate. This can result in voltage inconsistencies among the cells within the pack. To extend the battery pack's lifespan, it's crucial to maintain the consistency of cell voltages as much as possible. Current battery management systems (BMS) typically employ passive balancing technology to dissipate the energy from cells with abnormally high voltages, thereby maintaining voltage consistency across all cells and preventing overall capacity suppression due to excessively high voltage in a single cell.

[0036] like Figure 1The existing passive balancing circuit shown primarily uses a MOS switch connected in series with a resistor to form multiple balancing modules. Each balancing module is then connected in parallel across each battery cell. The MOS switch of each balancing module can be controlled to determine whether the resistor consumes the energy of the corresponding cell, thus achieving voltage balancing for each cell. For example, when the voltage of cell C8 is detected to be higher than that of other cells by a certain range, the MOS switch Q31 of the balancing module corresponding to cell C8 will be turned on, causing the resistor R9 connected in series with MOS switch Q31 to consume the energy of cell C8. In this existing passive balancing circuit, the MOS switch of the balancing module corresponding to cells with essentially the same voltage will not be turned on; that is, cells with essentially the same voltage will not initiate passive balancing.

[0037] Although the existing passive balancing circuit can equalize the voltage of each cell to be basically consistent with the voltage of the other cells, each cell is connected in parallel with a balancing module. In order to avoid the large amount of heat generated by balancing multiple cells at the same time, which would affect the safety of the entire circuit, the resistance value of the resistor connected in series with each MOS switch is usually set very small. This makes the balancing current of each balancing module generally not exceed 200mA, resulting in a slow balancing speed for each cell and reducing the balancing efficiency of the battery pack.

[0038] Through research, the inventors discovered that in a battery pack containing a dozen or so cells, usually only one or a few cells have abnormally high voltage. Therefore, a battery pack may only have one or a few cells that require passive balancing.

[0039] In this context, the passive balancing circuit for a battery pack provided in this application embodiment uses only one balancing module to balance multiple battery cells. This allows for voltage balancing of one or more cells when their voltage exceeds the others by a certain range. Since the entire passive balancing circuit uses only one balancing module, the balancing current of the module can be set to be relatively large, enabling the module to quickly dissipate the energy of a single cell, thus increasing the balancing speed of each cell and ultimately improving the balancing efficiency of the battery pack.

[0040] Figure 2 A schematic diagram of the passive balancing circuit for a battery pack provided in an embodiment of this application is shown, as follows: Figure 2As shown, the battery pack 10 includes multiple cells 11 connected in series. The passive balancing circuit 20 of the battery pack includes a balancing module 100 and a first control module 200. The first terminal A of the balancing module 100 is connected to the negative terminal a of the multiple cells 11 one by one through multiple first switches 110. The second terminal B of the balancing module 100 is connected to the positive terminal b of the multiple cells 11 one by one through multiple second switches 120. The first control module 200 is connected to the multiple first switches 110 and second switches 120. After identifying the cells 11 with a voltage greater than or equal to a first preset voltage threshold as cells to be balanced 12, the first control module 200 sends a drive signal to the first switches 110 and second switches 120 connected to the cells to be balanced 12, so as to close the first switches 110 and second switches 120 connected to the cells to be balanced 12, thereby connecting the balancing module 100 in parallel with the cells to be balanced 12 to perform voltage balancing on the cells to be balanced 12.

[0041] In the initial state, or in the state where no drive signal is received, the first switch 110 and the second switch 120 connected to all cells 11 are in the open state.

[0042] The drive signal can be a high level, such as 1. The equalization module 100 can be a load that consumes electrical energy, such as a resistor.

[0043] The first control module 200 can determine a first preset voltage threshold based on the collected voltages of the multiple battery cells 11. Specifically, the first control module 200 can sample the voltages of the multiple battery cells 11 in real time to obtain their voltages. Since the voltages of most of the battery cells 11 are basically the same, the first control module 200 can first determine the median voltage of the multiple battery cells 11, and then add the median to a first offset to obtain the first preset voltage threshold. For example, when the median voltage of the multiple battery cells 11 is 3.2V, it means that the voltage of most of the battery cells 11 is 3.2V. In this case, if the first offset is set to 0.3V, the first preset voltage threshold is 3.5V.

[0044] After determining the first preset voltage threshold, the first control module 200 can sequentially determine whether the voltage of each cell 11 is greater than or equal to the first preset voltage threshold. When the voltage of one cell 11 is greater than or equal to the first preset voltage threshold, the first control module 200 determines that cell 11 as the cell to be balanced 12. For example... Figure 2 and Figure 3 As shown, cell 11, indicated by the straight arrow, is identified as cell 12 to be balanced.

[0045] After identifying the cell 12 to be balanced, the first control module 200 first sends drive signals to the first switch 110 and the second switch 120 connected to the cell 12 to close the first switch 110 and the second switch 120, so that the balancing module 100 is connected in parallel to the cell 12. At this time, the cell 12 to be balanced, the first switch 110, the balancing module 100, and the second switch 120 form a closed loop. The current output by the cell 12 to be balanced passes through the balancing module 100, so that the balancing module 100 can consume the electrical energy of the cell 12 to be balanced, and balance the voltage of the cell 12 to be balanced with the voltage of most of the cells 11, thereby achieving voltage balancing of the cell 12 to be balanced.

[0046] When the voltage of any cell 11 is greater than or equal to a first preset voltage threshold, the first control module 200 can identify that cell 11 as the cell 12 to be balanced, and can control the balancing module 100 to be connected in parallel with that cell 11 to consume the energy of that cell 11, thereby reducing the voltage of that cell 11. In this way, since the voltage balancing of multiple cells 11 is achieved through one balancing module 100, and the balancing module 100 only balances the voltage of one cell 11 at a time, a resistor with a smaller resistance value can be selected to increase the balancing current of the balancing module 100, for example, increasing the balancing current to 1-3A. This allows the balancing module 100 to quickly balance the voltage of a single cell 11, improving the balancing speed of the balancing module 100 for a single cell 11, and thus improving the balancing efficiency of the battery pack 10.

[0047] Since the first control module 200 can acquire the voltage of the battery cell 11 in real time, when it determines that the voltage of the battery cell 12 to be balanced has been balanced to a level lower than the second preset voltage threshold, the first control module 200 stops sending drive signals to the first switch 110 and the second switch 120 connected to the battery cell 12 to be balanced, so that the first switch 110 and the second switch 120 are disconnected, thereby disconnecting the parallel connection between the balancing module 100 and the battery cell 12 to be balanced, and stopping the balancing module 100 from balancing the voltage of the battery cell 12 to be balanced. In this way, the balancing module 100 can be controlled to stop balancing when the voltage of the battery cell 12 to be balanced is close to the voltage of most of the battery cells 11, ensuring that the voltage of the battery cell 12 to be balanced will not be lower than the voltage of most of the battery cells 11. The second preset voltage threshold is less than the first preset voltage threshold and greater than the median voltage of the multiple battery cells 11. Specifically, after determining the median voltage of the multiple battery cells 11, the first control module 200 adds the median to the second offset to obtain the second preset voltage threshold. For example, when the median voltage of the multiple battery cells 11 is 3.2V and the second offset is set to 0.1V, the first preset voltage threshold is 3.3V.

[0048] In the passive balancing circuit of the battery pack provided in this application embodiment, the first terminal of the balancing module 100 is connected to the negative terminal a of multiple battery cells 11 one by one through the first switch 110, and the second terminal of the balancing module 100 is connected to the positive terminal b of multiple battery cells 11 one by one through the second switch 120. By connecting the first control module 200 to multiple first switches 110 and second switches 120, the first control module 200 can send a drive signal to the first switch 110 and second switch 120 connected to the battery cell 12 to be balanced after determining that the battery cell 11 with a voltage greater than or equal to a first preset voltage threshold is the battery cell 12 to be balanced. This closes the first switch 110 and second switch 120 connected to the battery cell 12 to be balanced, so that the balancing module 100 is connected in parallel with the battery cell 12 to consume the power of the battery cell 12 to be balanced, thereby achieving voltage balancing of the battery cell 12 to be balanced. In the above manner, the first control module 200 can control the same equalization module 100 to perform voltage equalization on the cells 11 with abnormally high voltage among multiple cells 11. Since only one equalization module 100 generates heat when equalizing the cells 11, the equalization current of the equalization module 100 can be set to be relatively large. Under the condition that the heat generated by the equalization module 100 does not affect the safety of the entire circuit, the equalization speed of the equalization module 100 on a single cell 11 is increased, thereby improving the equalization efficiency of the battery pack 10.

[0049] Please continue reading. Figure 2 When the first control module 200 simultaneously sends drive signals to the first switch 110 and the second switch 120 connected to any two battery cells 11, both the first switch 110 and the second switch 120 connected to the two battery cells 11 will be closed. This results in the two battery cells 11 being connected in parallel. If the voltage difference between the two battery cells 11 is large, the battery cells 11 are easily damaged.

[0050] Therefore, to avoid this situation, after determining that there are multiple battery cells 11 with voltages greater than the first preset voltage threshold, the first control module 200 can sequentially identify the battery cells 11 that have not been voltage balanced among the multiple battery cells 11 with voltages greater than the first preset voltage threshold as battery cells 12 to be balanced, and send drive signals to the first switch 110 and the second switch 120 connected to the battery cells 12 to be balanced, until all battery cells 11 with voltages greater than the first preset voltage threshold are voltage balanced.

[0051] Taking three battery cells 11 with a voltage greater than or equal to a first preset voltage threshold as an example, the first control module 200 can first identify one of the three battery cells 11 as the battery cell 12 to be balanced, and then control the balancing module 100 to perform voltage balancing on the battery cell 12 to be balanced. Then, the first control module 200 identifies one of the remaining two battery cells 11 as the battery cell 12 to be balanced, and then controls the balancing module 100 to perform voltage balancing on the battery cell 12 to be balanced. Finally, the first control module 200 identifies the remaining battery cell 11 as the battery cell 12 to be balanced, and controls the balancing module 100 to perform voltage balancing on the battery cell 12 to be balanced.

[0052] Of course, after determining that there are multiple battery cells 11 with voltages greater than the first preset voltage threshold, the first control module 200 can also identify all three battery cells 11 as cells 12 to be balanced. Then, the first control module 200 can randomly sort the three cells 12 to be balanced, or it can first calculate the difference between these three cells 12 and the first preset voltage threshold, and then sort the three cells 12 to be balanced from largest to smallest difference. Finally, the first control module 200 performs voltage balancing on the three cells 12 to be balanced sequentially according to the sorted order.

[0053] In this way, when the voltage of multiple cells 11 is greater than or equal to the first preset voltage threshold, the first control module 200 can sequentially perform voltage balancing on the multiple cells 11, ensuring that the balancing module 100 only balances the voltage of one cell 11 at a time, avoiding the situation where two or more cells 11 are connected in parallel due to balancing two or more cells 11 at the same time, ensuring the safety of each cell 11 and improving the safety of the battery pack 10.

[0054] To improve the response speed of the first switch 110 and the second switch 120, this application further proposes an implementation method. Optionally, please continue to refer to... Figure 2 and combined Figure 3 , Figure 3 A schematic diagram of the passive balancing circuit for a battery pack provided in an embodiment of this application is shown, as follows: Figure 2 and Figure 3 As shown, the first switch 110 is the first MOSFET Q1, and the second switch 120 is the second MOSFET Q2. Among the first MOSFET Q1 and the second MOSFET Q2 connected to the same cell 11, the source S and drain D of the first MOSFET Q1 are connected to the negative terminal a of the cell 11 and the first terminal A of the equalization module 100, respectively, and the source S and drain D of the second MOSFET Q2 are connected to the positive terminal b of the cell 11 and the second terminal B of the equalization module 100, respectively.

[0055] The first control module 200 includes multiple output pins 210, each corresponding to one of multiple battery cells 11. Each output pin 210 is connected to the gate G of the first MOSFET Q1 and the gate G of the second MOSFET Q2 connected to its corresponding battery cell 11. After determining the battery cell 12 to be balanced, the first control module 200 controls the output pins 210 corresponding to the battery cell 12 to send drive signals to the gates G of the first MOSFET Q1 and the second MOSFET Q2 connected to the battery cell 12. Furthermore, when the first control module 200 determines that the voltage of the battery cell 12 has been balanced to below a second preset voltage threshold, it controls the output pins 210 corresponding to the battery cell 12 to stop sending drive signals to the gates G of the first MOSFET Q1 and the second MOSFET Q2 connected to the battery cell 12.

[0056] Specifically, when the first control module 200 sends a drive signal to the gates G of the first MOSFET Q1 and the second MOSFET Q2 connected to the battery cell 12 to be balanced, the voltage difference between the gate G and the source S of the first MOSFET Q1 is greater than the threshold voltage Vgs(th) of the first MOSFET Q1, and the voltage difference between the gate G and the source S of the second MOSFET Q2 is greater than the threshold voltage Vgs(th) of the second MOSFET Q2. This allows the source S and drain D of the first MOSFET Q1 and the source S and drain D of the second MOSFET Q2 to be quickly turned on. In this way, the first control module 200 can quickly control the battery cell 12 to be balanced, the first MOSFET Q1, the balancing module 100, and the second MOSFET Q2 to form a closed loop, so that the balancing module 100 can consume the power of the battery cell 12 to be balanced in a timely manner and quickly reduce the voltage of the battery cell 12 to be balanced.

[0057] When the first control module 200 stops sending drive signals to the gates G of the first MOSFET Q1 and the second MOSFET Q2, both the first MOSFET Q1 and the second MOSFET Q2 are turned off, disconnecting the parallel connection between the equalization module 100 and the battery cell 12 to be equalized, thereby preventing the equalization module 100 from continuing to consume the power of the battery cell 12 to be equalized.

[0058] The first control module 200 controls the conduction and cutoff of the first MOSFET Q1 and the second MOSFET Q2 through the drive signal. It can quickly control the parallel connection between the equalization module 100 and the cell 12 to be equalized, or quickly disconnect the parallel connection between the equalization module 100 and the cell 12 to be equalized. This can not only realize the automation of voltage equalization of the cell 12 to be equalized, but also improve the equalization efficiency of the equalization module 100 for a single cell 11.

[0059] To improve the safety of the battery pack passive balancing circuit 20, this application further proposes an implementation method. Optionally, please refer to [further details]. Figure 3 ,like Figure 3As shown, the first control module 200 also includes a control pin 220, and the battery pack passive balancing circuit 20 also includes a drive signal switch module 300. The drive signal switch module 300 is connected to the control pin 220 and multiple output pins 210 respectively. When the drive signal switch module 300 detects that at least two output pins 210 are outputting drive signals, it outputs a control signal to the first control module 200 through the control pin 220 so that the first control module 200 stops outputting drive signals.

[0060] The first level signal can be a high level, for example, the first level signal can be 1.

[0061] Since the drive signal switch module 300 is connected to multiple output pins 210, the drive signal switch module can detect the drive signal when the first control module 200 controls any one of the output pins 210 to output a drive signal.

[0062] When the drive signal switching module 300 detects drive signals output from any two or more output pins 210, it can be determined that the first control module 200 has controlled two or more output pins 210 to output drive signals. This would cause the equalization module 100 to be connected in parallel with two or more battery cells 11 simultaneously, potentially damaging these cells 11. Therefore, to avoid this situation, after detecting drive signals output from any two or more output pins 210, the drive signal switching module 300 immediately outputs a control signal to the control pin 220 of the first control module 200, causing the first control module 200 to cut off the output of drive signals, stop all output pins 210 from outputting drive signals, and prevent any two or more battery cells 11 from being connected in parallel.

[0063] In some embodiments, after receiving the control signal, the first control module 200 will re-determine the cell 12 to be balanced, and after determining the cell 12 to be balanced, control an output pin 210 to output a drive signal to start voltage balancing of the cell 12 to be balanced. Furthermore, after balancing the voltage of the cell 12 to be balanced to a level lower than a second preset voltage threshold, voltage balancing of the next cell 12 to be balanced will be started.

[0064] This prevents the first MOSFET Q1 and the second MOSFET Q2 connected to any two or more battery cells 11 from conducting, thus avoiding the equalization module 100 from simultaneously balancing the voltage of two or more battery cells 11 and improving the safety of the battery pack passive equalization circuit 20.

[0065] To reduce the heat generated by the passive balancing circuit 20 of the battery pack, this application further proposes an implementation method. Optionally, please refer to [link to implementation details]. Figure 3 and Figure 4 , Figure 4The circuit diagram of the battery pack passive balancing circuit provided in the embodiment of this application is shown, as follows: Figure 3 and Figure 4 As shown, the battery pack 10 includes X cells 11 connected in series ( Figure 4 (B7-B11 in the diagram), where X≥2. Only five battery cells are shown in the diagram and this is not a limitation. The first control module 200 includes an analog front-end chip U2, and the C of the analog front-end chip U2... i pins and C i-1 pins ( Figure 4 Pins C0-C18 in the circuit are connected to the positive and negative terminals of the i-th cell 11, respectively, where i ≥ 1. Multiple output pins 210 are respectively the S-type outputs of the analog front-end chip. i pins ( Figure 4 Pins S1-S18 in the middle), S i+2 The pins are respectively connected to the first MOS transistor Q1 of the i-th cell. Figure 4 S1, S3, S5, S7, S9) and the second MOSFET Q2 ( Figure 4 The gates G of S2, S4, S6, S8, and S10 in the diagram are connected.

[0066] C of analog front-end chip U2 i and C i-1 The pins are connected to the positive and negative terminals of the i-th cell 11, respectively, allowing the analog front-end chip U2 to acquire the voltage of each cell 11. In this case, each S i Pins and C i The voltage difference between the pins is equal to the voltage of one cell 11. In this embodiment, the voltage of one cell 11 is 3V-4.2V, and the threshold voltage Vgs(th) of the first MOSFET Q1 and the second MOSFET Q2 is 3V. The voltage of one cell 11 can turn on the first MOSFET Q1 and the second MOSFET Q2, but because the voltage is relatively small, it may not be able to fully turn on the first MOSFET Q1 and the second MOSFET Q2. This results in a large on-resistance Rds(on) of the first MOSFET Q1 and the second MOSFET Q2, causing the first MOSFET Q1 and the second MOSFET Q2 to generate a lot of heat. This not only reduces the service life of the first MOSFET Q1 and the second MOSFET Q2, but also increases the heat generation of the battery pack passive balancing circuit 20.

[0067] Therefore, in order to extend the service life of the first MOSFET Q1 and the second MOSFET Q2 and reduce the heat generation of the battery pack passive balancing circuit 20, the first MOSFET Q1 and the second MOSFET Q2 need to be fully turned on to reduce the on-resistance Rds(on) of the first MOSFET Q1 and the second MOSFET Q2, thereby reducing the heat generation of the first MOSFET Q1 and the second MOSFET Q2.

[0068] Specifically, assuming the battery pack 10 includes eighteen cells 11, pin S3 is connected to the gate G of the first MOSFET Q1 and the gate G of the second MOSFET Q2 connected to the first cell 11, pin S4 is connected to the gate G of the first MOSFET Q1 and the gate G of the second MOSFET Q2 connected to the second cell 11, and so on. 18 The pins are respectively connected to the gate G of the first MOS transistor Q1 and the gate G of the second MOS transistor Q2 connected to the sixteenth cell 11.

[0069] In this case, the gate voltage G of both the first MOSFET Q1 and the second MOSFET Q2 is equal to S. i+2 The voltage at the pin, and the voltage at the source (S) of both the first MOSFET Q1 and the second MOSFET Q2 are equal to C. i-1 The voltage at the pin. Due to S i+2 Pins and C i-1 The voltage difference between the pins is equal to the total voltage of the three cells 11. For example, the voltage difference between the S3 pin and the C0 pin is 9V-12.6V. Therefore, the voltage difference between the gate G and the source S of the first MOSFET Q1 and the second MOSFET Q2 is much greater than their own threshold voltage Vgs(th), which greatly reduces the on-resistance Rds(on) of the first MOSFET Q1 and the second MOSFET Q2, reduces the heat generation of the first MOSFET Q1 and the second MOSFET Q2, and thus reduces the heat generation of the battery pack passive balancing circuit 20.

[0070] Furthermore, to reduce the heat generated by the first MOSFET Q1 and the second MOSFET Q2 connected to the (X-1)th cell 11 or the Xth cell 11, the battery pack passive balancing circuit 20 is also provided with a second control module U3, which drives the first MOSFET Q1 and the second MOSFET Q2 connected to the (X-1)th cell 11 or the Xth cell 11, respectively. The second control module U3 is connected to the gate G of the first MOSFET Q1 and the second MOSFET Q2 connected to the (X-1)th cell 11 and the Xth cell 11, respectively. The second control module U3 is connected to the S1 and S2 pins of the analog front-end chip U2. After the analog front-end chip U2 determines the X-1 cell 11 or the X cell 11 as the cell to be balanced 12 and receives the drive signal (S1 or S2) sent by the S1 or S2 pin of the analog front-end chip U2, the second control module U3 sends the drive signal S1' to the gate G of the first MOS transistor Q1 and the second MOS transistor Q2 connected to the X-1 cell 11, or sends the drive signal S2' to the gate G of the first MOS transistor Q1 and the second MOS transistor Q2 connected to the X cell 11.

[0071] Specifically, after the analog front-end chip U2 determines that the (X-1)th cell 11 is the cell 12 to be balanced, it sends a drive signal S1 to the second control module U3 through the S1 pin. This controls the second control module U3 to send a drive signal S1' to the gates G of the first MOSFET Q1 and the second MOSFET Q2 connected to the (X-1)th cell 11, thereby turning on the first MOSFET Q1 and the second MOSFET Q2 connected to the (X-1)th cell 11. This allows the equalization module 100 to be connected in parallel with the (X-1)th cell 11, performing voltage equalization on the (X-1)th cell 11. The analog front-end chip U2 controls the equalization module 100 to perform voltage equalization on the (X-1)th cell 11 in a similar manner, which will not be described in detail here.

[0072] The second control module U3 can be a BOOST boost circuit, which can output a voltage equal to +10V of the total battery pack voltage. For example, when the total battery pack voltage is 59.4V, the second control module U3 can output a voltage of 69.4V.

[0073] In this situation, when the second control module U3 sends a drive signal (S1 or S2) to the gate G of the first MOSFET Q1 and the second MOSFET Q2 connected to the X-1 cell 11, the voltage difference between the gate G and the source S of the first MOSFET Q1 and the second MOSFET Q2 connected to the X-1 cell 11 is much greater than its own threshold voltage Vgs(th), which greatly reduces the on-resistance Rds(on) of the first MOSFET Q1 and the second MOSFET Q2, reduces the heat generation of the first MOSFET Q1 and the second MOSFET Q2, thereby extending the service life of the first MOSFET Q1 and the second MOSFET Q2, and reducing the heat generation of the battery pack passive balancing circuit 20.

[0074] To achieve automated control for voltage balancing of cell X-1 or cell X, this application further proposes an implementation method. Optionally, please refer to [further details needed]. Figure 4 ,like Figure 4 As shown, the second control module U3 also includes a third MOSFET Q3 and a fourth MOSFET Q4. The drains of both the third MOSFET Q3 and the fourth MOSFET Q4 are connected to the voltage output terminal (Vout_VBAT+10V) of the second control module U3. The source of the third MOSFET Q3 is connected to the gates of the first MOSFET Q1 and the second MOSFET Q2 connected to the X-1th cell, respectively. The source of the fourth MOSFET Q4 is connected to the gates of the first MOSFET Q1 and the second MOSFET Q2 connected to the Xth cell 11, respectively. The gates of the third MOSFET Q3 and the fourth MOSFET Q4 are connected to the S1 and S2 pins of the analog front-end chip, respectively.

[0075] Specifically, when the analog front-end chip U2 determines that the (X-1)th cell 11 is the cell 12 to be balanced, the analog front-end chip U2 controls the S1 pin to output a drive signal, so that the voltage difference between the gate and source of the third MOSFET Q3 is greater than the threshold voltage Vgs(th) of the third MOSFET Q3, causing the source and drain of the third MOSFET Q3 to conduct. Thus, the voltage output terminal (Vout_VBAT+10V) of the second control module U3 can send a drive signal to the gate G of the first MOSFET Q1 and the second MOSFET Q2 connected to the (X-1)th cell 11, turning on the first MOSFET Q1 and the second MOSFET Q2 connected to the (X-1)th cell 11. This allows the balancing module 100 to be connected in parallel with the (X-1)th cell 11, consuming the energy of the (X-1)th cell 11 and reducing its voltage.

[0076] When the analog front-end chip U2 determines that the Xth cell 11 is the cell 12 to be balanced, the analog front-end chip U2 controls the S2 pin to output a drive signal to turn on the fourth MOSFET Q4. Thus, the voltage output terminal (Vout_VBAT+10V) of the second control module U3 can send a drive signal to the gate G of the first MOSFET Q1 and the second MOSFET Q2 connected to the Xth cell 11, turning on the first MOSFET Q1 and the second MOSFET Q2 connected to the Xth cell 11. This allows the balancing module 100 to be connected in parallel with the Xth cell 11, consuming the energy of the Xth cell 11 and reducing its voltage.

[0077] By controlling the fourth MOSFET Q4 to be in the off state when the third MOSFET Q3 is turned on, and controlling the third MOSFET Q3 to be turned off when the fourth MOSFET Q4 is turned on, not only can the automatic control of voltage balancing of the (X-1)th cell 11 or the Xth cell 11 be realized, but also the second control module U3 can be prevented from simultaneously sending drive signals to the gates G of the first MOSFET Q1 and the second MOSFET Q2 connected to the (X-1)th cell 11 and the Xth cell 11. This avoids the parallel connection of the (X-1)th cell 11 and the Xth cell 11, prevents the simultaneous activation of balancing of the (X-1)th cell 11 and the Xth cell 11, and improves the safety of the battery pack passive balancing circuit 20.

[0078] When the number of cells 11 in the battery pack 10 is large, many cells 11 may have abnormally high voltages. In this case, using only one balancing module 100 to sequentially balance the voltage of all cells 11 with abnormally high voltages will reduce the balancing efficiency of the battery pack 10. Therefore, in order to improve the efficiency of passive balancing of the battery pack, this application further proposes an implementation method. Optionally, please refer to... Figure 5 , Figure 5 A schematic diagram of the structure of a battery pack passive balancing circuit according to another embodiment of this application is shown, as follows: Figure 5 As shown, there are multiple equalization modules 100, and each equalization module 100 performs voltage equalization on at least two cells 11 in the battery pack 10. Figure 5 This description only uses the voltage balancing of two battery cells 11 by each balancing module 100 as an example and does not constitute a limitation. The first terminal A of each balancing module 100 is connected one-to-one with the negative terminal a of the multiple battery cells 11 it is balancing via multiple first switches 110. The second terminal B of each balancing module 100 is connected one-to-one with the positive terminal of the multiple battery cells 11 it is balancing via multiple second switches 120. After determining that the multiple battery cells 12 to be balanced belong to different battery cells 11 balanced by different balancing modules 100, the first control module 200 simultaneously sends drive signals to the first switch 110 and the second switch 120 connected to one of the battery cells 12 to be balanced by each balancing module 100.

[0079] Assuming the battery pack 10 includes eighteen cells 11, six equalization modules 100 can be set up so that one equalization module 100 can perform voltage equalization on three cells 11; or three equalization modules 100 can be set up so that one equalization module 100 can perform voltage equalization on six cells 11.

[0080] When the first control module 200 determines that the voltage of the six battery cells 11 is abnormally high, and the six battery cells 12 to be balanced belong to the battery cells 11 balanced by different equalization modules 100, the first control module 200 can simultaneously send drive signals to the first switch 110 and the second switch 120 connected to the battery cells 12 to be balanced by each equalization module 100, so as to control the six equalization modules 100 to perform voltage equalization on the six battery cells 12 to be balanced respectively.

[0081] In this way, when the voltage of multiple cells 11 belonging to different equalization modules 100 is abnormally high, the different equalization modules 100 can simultaneously equalize the voltage of one of their cells 11, quickly equalizing the voltage of multiple cells 11 with abnormally high voltage to below the second preset voltage threshold, thereby improving the equalization efficiency of the battery pack passive equalization circuit 20 for the battery pack 10.

[0082] To improve the safety of the battery pack 10, when the first control module 200 determines that two cells 12 to be balanced belong to the same cell 11 balanced by the same balancing module 100, the first control module 200 first controls only the balancing module 100 to perform voltage balancing on the first cell 12. When the voltage of the first cell 12 is balanced to be lower than a second preset voltage threshold, the first control module 200 then controls the balancing module 100 to perform voltage balancing on the second cell 12. This ensures that the same balancing module 100 only balances one of the multiple cells 11 it is balancing, preventing any two cells 11 from being connected in parallel, thus ensuring the safety of the battery pack 10.

[0083] According to another aspect of the embodiments of this application, a battery pack management device is proposed. Figure 6 A schematic diagram of the structure of the battery pack management device provided in an embodiment of this application is shown, such as... Figure 6 As shown, the battery pack management device 1 includes a battery pack 10 and a battery pack passive balancing circuit 20 provided in any of the above embodiments.

Claims

1. A passive balancing circuit for a battery pack, characterized in that, The battery pack includes multiple cells connected in series, and the passive balancing circuit of the battery pack includes: The equalization module has a first end for connecting to the negative terminals of multiple battery cells one by one through multiple first switches, and a second end for connecting to the positive terminals of multiple battery cells one by one through multiple second switches. A first control module is connected to multiple first switches and second switches. The first control module is used to send drive signals to the first and second switches connected to the battery cells to be balanced after determining that the battery cells with voltages greater than or equal to a first preset voltage threshold are the battery cells to be balanced. This causes the first and second switches connected to the battery cells to be balanced to close, so that the balancing module is connected in parallel with the battery cells to be balanced to perform voltage balancing on the battery cells to be balanced. The first switch is a first MOSFET, and the second switch is a second MOSFET. In the first MOSFET and the second MOSFET connected to the same cell, the source and drain of the first MOSFET are respectively connected to the negative terminal of the cell and the first terminal of the equalization module, and the source and drain of the second MOSFET are respectively connected to the positive terminal of the cell and the second terminal of the equalization module. The first control module includes multiple output pins, each of which corresponds to one of the multiple battery cells. Each output pin is connected to the gate of the first MOS transistor and the gate of the second MOS transistor to which its corresponding battery cell is connected. The first control module is used to control the output pin corresponding to the battery cell to be balanced to send drive signals to the gates of the first MOS transistor and the second MOS transistor connected to the battery cell to be balanced after determining the battery cell to be balanced. The battery pack comprises X cells connected in series, where X ≥ 2; The first control module includes an analog front-end chip, wherein the Ci pin and Ci-1 pin of the analog front-end chip are respectively connected to the positive and negative terminals of the i-th cell, where i ≥ 1; The multiple output pins are respectively the Si pins of the analog front-end chip, and the Si+2 pins are respectively connected to the gates of the first MOS transistor and the second MOS transistor connected to the cell in the i-th section.

2. The battery pack passive balancing circuit according to claim 1, characterized in that, The first control module is further configured to stop sending drive signals to the first switch and the second switch connected to the battery cell when it is determined that the voltage of the battery cell to be balanced has been balanced to a level lower than the second preset voltage threshold; wherein the second preset voltage threshold is lower than the first preset voltage threshold.

3. The battery pack passive balancing circuit according to claim 1, characterized in that, The first control module is further configured to, after determining that there are multiple battery cells with voltages greater than the first preset voltage threshold, sequentially identify the battery cells among the multiple battery cells with voltages greater than the first preset voltage threshold that have not undergone voltage equalization as battery cells to be equalized, and send drive signals to the first switch and the second switch connected to the battery cells to be equalized, until all battery cells among the multiple battery cells with voltages greater than the first preset voltage threshold are voltage equalized.

4. The battery pack passive balancing circuit according to claim 1, characterized in that, The first control module is further configured to, when it is determined that the voltage of the battery cell to be balanced is equalized to be less than a second preset voltage threshold, control the output pin corresponding to the battery cell to stop sending drive signals to the gates of the first MOS transistor and the second MOS transistor connected to the battery cell.

5. The battery pack passive balancing circuit according to claim 1, characterized in that, The first control module further includes a control pin, and the battery pack passive balancing circuit further includes a drive signal switch module. The drive signal switch module is connected to the control pin and the plurality of output pins respectively. The drive signal switch module is used to output a control signal to the first control module through the control pin when at least two of the output pins are detected to output drive signals, so as to stop the first control module from outputting the drive signals.

6. The battery pack passive balancing circuit according to claim 1, characterized in that, The battery pack passive balancing circuit also includes a second control module, which is connected to the gates of the first MOS transistor and the second MOS transistor connected to the X-1 cell and the X cell, respectively. The second control module is connected to the S1 and S2 pins of the analog front-end chip, respectively. The second control module is used to send a drive signal to the gate of the first MOS transistor and the second MOS transistor connected to the X-1 cell after the analog front-end chip determines the X-1 cell or the X cell as the cell to be balanced and receives the drive signal sent by the S1 or S2 pin of the analog front-end chip, or to send a drive signal to the gate of the first MOS transistor and the second MOS transistor connected to the X cell.

7. The battery pack passive balancing circuit according to claim 6, characterized in that, The second control module further includes a third MOSFET and a fourth MOSFET. The drains of the third MOSFET and the fourth MOSFET are both connected to the voltage output terminal of the second control module. The source of the third MOSFET is connected to the gate of the first MOSFET and the second MOSFET connected to the X-1th battery cell, respectively. The source of the fourth MOSFET is connected to the gate of the first MOSFET and the second MOSFET connected to the Xth battery cell, respectively. The gates of the third MOSFET and the fourth MOSFET are connected to the S1 pin and the S2 pin of the analog front-end chip, respectively.

8. The battery pack passive balancing circuit according to claim 1, characterized in that, The number of equalization modules is multiple, and each equalization module performs voltage equalization on at least two cells in the battery pack. The first end of each equalization module is used to connect one-to-one with the negative terminal of the multiple battery cells it is equalizing through multiple first switches, and the second end of each equalization module is used to connect one-to-one with the positive terminal of the multiple battery cells it is equalizing through multiple second switches. The first control module is further configured to, after determining that multiple cells to be balanced, and that the multiple cells to be balanced belong to cells balanced by different balancing modules, simultaneously send a drive signal to the first switch and the second switch connected to one of the cells to be balanced by each balancing module.

9. The battery pack passive balancing circuit according to claim 1, characterized in that, The load balancing module is the load.

10. A battery pack management device, characterized in that, The battery pack management device includes: a battery pack and a battery pack passive balancing circuit as described in any one of claims 1-9.

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