Data encoding and decoding method and related device

Abstract

A data encoding and decoding method is applied to the field of data encoding and decoding and comprises the following steps: acquiring a target symbol; obtaining first information and second information corresponding to the target symbol through the first mapping relation; the first information and the second information are obtained according to probability information corresponding to the target symbol; obtaining first coded data through first operation according to the first information and the state information of the encoder; according to the second information, updating the state information through second operation to obtain second coded data; wherein the first coded data and the second coded data are used for obtaining a coding result of the target symbol, and the first operation and the second operation do not comprise division operation. In the application, the index information in the coding table only comprises the symbol, and the mapped object only comprises the first information and the second information, which is equivalent to reducing the memory occupation in the coding table, avoiding the operation with large consumption, and realizing the balance between the memory and the time delay.

Description

[0001] This application is a divisional application of the original application with the application number 202310295323.7 and the original filing date of March 22, 2023, and the entire contents of the original application are incorporated herein by reference. The original application claims priority to the Chinese patent application with the application number 202310028884.0 and the filing date of January 9, 2023, and the title of “A data encoding and decoding method and related device”. TECHNICAL FIELD

[0002] The present application relates to the field of data encoding and decoding, and in particular to a data encoding and decoding method and related device. BACKGROUND

[0003] Artificial intelligence (AI) is the use of digital computers or digital computer-controlled machines to simulate, extend and expand human intelligence, perceive the environment, acquire knowledge and use knowledge to obtain the best results. In other words, artificial intelligence is a branch of computer science that attempts to understand the essence of intelligence and produce a new intelligent machine that can react in a similar way to human intelligence. Artificial intelligence is the design principle and implementation method of various intelligent machines, so that machines have the functions of perception, reasoning and decision-making.

[0004] Media compression typically includes one or more stages of prediction, frequency transform and quantization, followed by entropy encoding. Corresponding media decompression typically includes one or more stages of entropy decoding, followed by inverse quantization, inverse frequency transform and prediction. Typically, entropy encoding converts input symbols into encoded data with a lower bit rate by exploiting the redundancy in the input symbols (e.g., exploiting patterns of many input symbols with common values and multiple input symbols with rare values). Entropy decoding converts encoded data into output symbols corresponding to the input symbols. There are many variants of entropy encoding / decoding that provide different trade-offs in compression efficiency and computational complexity. For example, Huffman encoding / decoding is computationally simple, but has poor compression efficiency for certain distributions of values of input symbols. On the other hand, arithmetic encoding / decoding typically has much better compression efficiency at the cost of much higher computational complexity.

[0005] Asymmetric numeral systems (ANS) encoding / decoding potentially provides high compression efficiency and low computational complexity. However, existing ANS-based encoding has division, remainder operation, judgment, and decoding has binary search operation, which takes a long time. And the items used in the encoding table and the decoding table in the encoding and decoding process are too many, in the AI compression and other distribution scenarios, the memory consumption used for the encoding table and the decoding table is very large. SUMMARY

[0006] The application provides a data encoding method and a data decoding method, and balance between memory and latency can be achieved.

[0007] In a first aspect, the application provides a data encoding method, which comprises: obtaining a target symbol; obtaining first information and second information corresponding to the target symbol through a first mapping relationship; the first information and the second information are obtained according to probability information corresponding to the target symbol; obtaining first encoding data through a first operation according to the first information and state information of the encoder; updating the state information through a second operation according to the second information to obtain second encoding data; wherein the first encoding data and the second encoding data are used to obtain an encoding result of the target symbol, and the first operation and the second operation do not include division operation.

[0008] In the application, the index information in the encoding table only includes symbols, and the mapping object only includes the first information and the second information, which is equivalent to reducing the memory occupation in the encoding table and avoiding consuming large operations, thereby achieving balance between memory and latency.

[0009] In a possible implementation, the first information or the second information represents an integer value.

[0010] In a possible implementation, the first operation and the second operation do not include judgment operation.

[0011] In a possible implementation, the first operation includes: addition operation on the first information and the state information, and bit shift operation on an addition result of the addition operation; and part of bits in the state information is selected as the first encoding data, and a position of the part of bits in the state information is determined according to a shift result of the bit shift operation.

[0012] In a possible implementation, the second operation includes: addition operation on the state information and a value M, and bit shift operation on an addition result of the addition operation; wherein the probability information includes quantized probability, and the M is a denominator of the quantized probability; and addition operation is performed on a shift result of the bit shift operation and the second information.

[0013] In a possible implementation, the probability information includes a value of probability mass function PMF; and the value of the PMF is constructed by: sequentially determining a value of PMF of each symbol in a plurality of symbols, the plurality of symbols including the target symbol; wherein,

[0014] In determining the numerical value of the PMF of the target symbol, the total value of the remaining PMF except the PMF of the determined symbol is multiplied by the probability of the target symbol, and the ratio between the product result of the multiplication and the remaining probability except the determined symbol is calculated, and according to the relationship between the ratio and a preset fifth numerical value, the PMF of the target symbol is determined.

[0015] In a possible implementation, the fifth numerical value is 1, and the relationship is to take the larger value.

[0016] In a possible implementation, the probability information includes a numerical value of a cumulative distribution function (CDF), and the numerical value of the CDF is constructed by sequentially determining the numerical value of the CDF of each symbol based on a preset order, wherein the preset order is determined according to the relationship between the numerical values of the PMFs of a plurality of symbols, and the plurality of symbols include the target symbol; wherein when the probability distribution corresponding to the probability information of the target symbol is a symmetric distribution, the preset order is an order staggered along both sides of the peak point in the symmetric distribution; or when the probability distribution corresponding to the probability information of the target symbol is a discrete distribution, the preset order is specifically an order from large to small; or when the probability distribution corresponding to the probability information of the target symbol is a discrete distribution, the preset order is specifically an order from small to large.

[0017] In a possible implementation, the target symbol is obtained by transforming pixel data of an image, the data obtained by transforming the pixel data of the image satisfies a preset distribution, the transformation is also used to obtain a distribution feature of the pixel data, the distribution feature includes a mean value or a variance, and the method further includes: determining, according to the distribution feature, the first mapping relationship corresponding to the distribution feature from a plurality of mapping relationships.

[0018] In a possible implementation, the plurality of distribution features include a first distribution feature and a second distribution feature, the entropy of the first distribution feature is greater than the entropy of the second distribution feature, and the numerical value of the denominator of the quantization probability in the mapping relationship corresponding to the second distribution feature is greater than the denominator of the quantization probability in the mapping relationship corresponding to the first distribution feature.

[0019] In a multi-distribution scenario, different quantization probability denominators can be used to reduce the coding length. When encoding data, a prediction model and an entropy encoding can be included. The prediction model can input original data, output a distribution index and to-be-encoded data (for example, the target symbol in the present application). According to the distribution index, the entropy can be calculated. For a smaller entropy distribution, a larger quantization probability denominator can be used.

[0020] In a possible implementation, the first information in the first mapping relationship is constructed by: performing addition operation on the number of bits with consecutive 0s in the highest bits of the PMF of the target symbol and a preset sixth number; performing bit shift operation on the addition result of the addition operation, and performing subtraction operation on the shift result of the bit shift operation and the shift result of the bit shift operation on the value of the PMF of the target symbol, to obtain the first information; or performing bit shift operation on the addition result of the addition operation, and performing subtraction operation on the shift result of the bit shift operation and the shift result of the bit shift operation on the value of the PMF of the target symbol, performing addition operation on the operation result of the subtraction operation and a number M, to obtain the first information, where the probability information includes quantized probability, and the M is a denominator of the quantized probability.

[0021] The calculation method of the PMF and the CDF in the embodiments of the present application can ensure that the code word length is reduced under the premise that the memory and the time delay are unchanged.

[0022] In a possible implementation, the second information in the first mapping relationship is constructed by: performing subtraction operation on the value of the CDF of the target symbol and the value of the PMF of the target symbol, to obtain the second information; or performing subtraction operation on the value of the CDF of the target symbol and the value of the PMF of the target symbol, and performing addition operation on the operation result of the subtraction operation and a number M, to obtain the second information, where the probability information includes quantized probability, and the M is a denominator of the quantized probability.

[0023] In a possible implementation, the second information in the first mapping relationship is constructed by: when the result of the subtraction operation on the value of the CDF of the target symbol and the value of the PMF of the target symbol is greater than or equal to 0, taking the result of the subtraction operation as the second information; or when the result of the subtraction operation on the value of the CDF of the target symbol and the value of the PMF of the target symbol is less than 0, performing addition operation on the operation result of the subtraction operation and a number M, to obtain the second information, where the probability information includes quantized probability, and the M is a denominator of the quantized probability.

[0024] In a possible implementation, to further reduce the memory occupation, the first information and the second information can be stored after being combined, and the encoder can restore the first information and the second information based on a certain operation rule after obtaining the combined data.

[0025] In a possible implementation, an integer value corresponding to the target symbol can be obtained through the first mapping relationship; and the integer value is restored into the first information and the second information based on a third operation, the first information and the second information being integer values. In this way, memory consumption can be reduced, and memory reading time can be reduced, thereby further improving throughput on some hardware devices (such as servers).

[0026] For example, multiple integer parameters (of which at most one is a signed integer) can be combined into a single parameter. The method is as follows: the signed integer is placed on the leftmost side, and then stored in bits according to the bit number of each parameter through shifting and bit or operation; when reading the symbol, the respective parameters are restored through shifting and bit or operation.

[0027] In a possible implementation, the probability information includes PMF information corresponding to each symbol, and the PMF information includes a first value and a second value; the sum of the first value and the second value is a value of the PMF; the probability information further includes CDF information corresponding to each symbol, and the CDF information includes a third value and a fourth value; the third value and the fourth value are constructed in the following manner:

[0028] According to the first value of each symbol, the third value corresponding to each symbol is determined through accumulation according to a preset order;

[0029] According to the second value and the third value of each symbol, the fourth value corresponding to each symbol is determined through accumulation according to the preset order.

[0030] In a possible implementation, the second information includes a first sub-information (which can also be referred to as state addend 1), a second sub-information (which can also be referred to as state threshold), and a third sub-information (which can also be referred to as state addend 2);

[0031] The first sub-information in the first mapping relationship is constructed in the following manner: the third value of the target symbol is subtracted from the value of the PMF of the target symbol to obtain the first sub-information;

[0032] The second sub-information in the first mapping relationship is constructed in the following manner: the third value of the target symbol is added to the first value of the target symbol, and the operation result is subtracted from 1 to obtain the second sub-information;

[0033] The third sub-information in the first mapping relationship is constructed by performing subtraction operation on the fourth value of the target symbol and the third value of the target symbol, and performing subtraction operation on the operation result of the subtraction operation and the first value of the target symbol to obtain the third sub-information.

[0034] In a possible implementation, the second operation includes:

[0035] The addition operation on the state information and the value M, and the bit shift operation on the addition result of the addition operation; wherein the probability information includes a quantized probability, and the M is a denominator of the quantized probability; the addition operation on the shift result of the bit shift operation and the first sub-information;

[0036] When the operation result of the addition operation is greater than the second sub-information, the operation result of the addition operation and the addition result of the third sub-information are taken as the second encoding data;

[0037] When the operation result of the addition operation is less than the second sub-information, the operation result of the addition operation is taken as the second encoding data.

[0038] The above manner can be but is not limited to applied to unimodal symmetric distribution (such as Gaussian distribution, logistic distribution, Laplace distribution, etc.), for reducing the encoding length, but the encoding calculation amount is increased.

[0039] In a possible implementation, when the value M is 256, the first information is stored by 10 bits, the first sub-information is stored by 8 bits, the second sub-information is stored by 7 bits, the third sub-information is stored by 7 bits, the addition of the first values of a plurality of symbols is 128, and the third sub-information is less than 128.

[0040] The application further provides a data encoding method applied to an encoder based on an asymmetric numerical system (ANS), the method comprising: obtaining a first symbol, wherein a sum of a quantized probability corresponding to the first symbol and a quantized probability corresponding to a second symbol is 1, a difference between the quantized probability corresponding to the first symbol and 1 is less than a threshold, and a difference between the quantized probability corresponding to the second symbol and 0 is less than a threshold; performing a first operation between state information of the encoder and a value M according to a first condition that a value size relationship between the state information and the value M satisfies, to obtain first encoding data, and updating the state information to 0; and adding 1 to the state information according to a second condition that the value size relationship between the state information of the encoder and the value M does not satisfy the first condition.

[0041] In a possible implementation, the method further includes: obtaining the second symbol; taking state information of the encoder as first encoding data, and updating the state information as a difference between the value M and 1.

[0042] The above embodiment can be directed to encoding and decoding schemes for two symbols and a single symbol probability close to 1. This embodiment does not need to construct an encoding and decoding table, and thus does not need to store the table in additional memory.

[0043] In a second aspect, the present application provides a data decoding method, which includes: obtaining state information of a decoder and storage bits, the state information corresponding to a first bit, the first bit being a bit currently to be decoded; determining, according to a first mapping relationship, first information, second information and third information corresponding to the state information; the first information being a target symbol corresponding to the first bit, the target symbol being a decoding result of the first bit, the second information indicating a number of bits selected from the storage bits, and the third information being used for addition operation with bits selected from the storage bits according to the third information, an addition operation result being used for updating the state information, and updated state information corresponding to a second bit, the second bit being a bit to be decoded after the first bit.

[0044] In a possible implementation, the method further includes: removing, from the storage bits, the bits selected according to the third information to obtain updated storage bits.

[0045] In a possible implementation, the first information, the second information or the third information indicates an integer value.

[0046] In a possible implementation, the first information in the first mapping relationship is constructed by: taking x satisfying C(x)≤s<(C(x)+P(x)) as the first information; wherein C represents a value of CDF, P represents a value of PMF, and s represents the state information.

[0047] In a possible implementation, the first information in the first mapping relationship is constructed by:

[0048] taking x satisfying C1(x)≤s<C1(x)+P1(x) or C2(x)≤s<C2(x)+P2(x) as the first information; wherein C1 represents a third value corresponding to CDF, P1 represents a first value corresponding to PMF, C2 represents a fourth value corresponding to CDF, P2 represents a second value corresponding to PMF, and s represents the state information; and a sum of the first value and the second value being a value of the PMF.

[0049] In a possible implementation, the second information in the first mapping relationship is constructed in the following manner:

[0050] a value of clz(s'-C(x)+P(x))+X is taken as the second information, where clz represents a number of bits with the highest bit being 0 consecutively in a value, X is a preset fifth value, and s' is obtained in the following manner:

[0051] s' = P1(x)+s-C2(x)+P(x) if C2(x)≤s, otherwise s' = s-C1(x)+P(x).

[0052] In a possible implementation, the third information in the first mapping relationship is constructed in the following manner: a value of s'-C(x)+P(x) is subjected to a bit shift operation to obtain the third information, and a number of shifts of the bit shift operation is obtained according to the second information.

[0053] In a possible implementation, the second information in the first mapping relationship is constructed in the following manner: a value of clz(s-C(x)+P(x))+X is taken as the second information, where clz represents a number of bits with the highest bit being 0 consecutively in a value, and X is a preset fifth value.

[0054] In a possible implementation, the third information in the first mapping relationship is constructed in the following manner:

[0055] a value of s-C(x)+P(x) is subjected to a bit shift operation to obtain the third information, and a number of shifts of the bit shift operation is obtained according to the second information; or

[0056] a value of s-C(x)+P(x) is subjected to a bit shift operation, and a result of the bit shift operation is subtracted by a value M to obtain the third information, where M is a denominator of the quantization probability, and a number of shifts of the bit shift operation is obtained according to the second information.

[0057] In a possible implementation, the first information, the second information, or the third information is obtained according to probability information; the probability information includes a value of a probability mass function (PMF); and the value of the PMF is constructed by sequentially determining a value of a PMF of each symbol in a plurality of symbols, the plurality of symbols including the target symbol; wherein when determining the value of the PMF of the target symbol, a total value of remaining PMFs except for the PMF of the determined symbol is multiplied by a probability of the target symbol, and a ratio between a product result of the multiplication and a remaining probability except for the determined symbol is calculated, and a value of the PMF of the target symbol is determined according to a relationship between the ratio and a preset value.

[0058] In a possible implementation, the preset value is 1, and the relationship is to take a larger value.

[0059] In a possible implementation, the first information, the second information, or the third information is obtained according to probability information; the probability information includes a value of a cumulative distribution function (CDF); and the value of the CDF is constructed by:

[0060] sequentially determining a value of a CDF of each symbol based on a preset order, wherein the preset order is determined according to a relationship between values of PMFs corresponding to a plurality of symbols, the plurality of symbols including the target symbol; and wherein,

[0061] when the probability distribution corresponding to the probability information of the target symbol is a symmetric distribution, the preset order is an order staggered along both sides of a peak point in the symmetric distribution; or,

[0062] when the probability distribution corresponding to the probability information of the target symbol is a discrete distribution, the preset order is specifically an order from large to small; or,

[0063] when the probability distribution corresponding to the probability information of the target symbol is a discrete distribution, the preset order is specifically an order from small to large.

[0064] In a possible implementation, the method further includes:

[0065] obtaining an encoding result, the encoding result being obtained by encoding pixel data of an image, the state information and the storage bit being obtained according to the encoding result;

[0066] processing the encoding result, the distribution feature of the pixel data including a mean value or a variance;

[0067] determining, according to the distribution feature, the first mapping relationship corresponding to the distribution feature from a plurality of mapping relationships.

[0068] The application further provides a data decoding method applied to an asymmetric digital system (ANS) based decoder, the method comprising:

[0069] obtaining state information of the decoder, the state information corresponding to a first bit, the first bit being a bit to be decoded currently;

[0070] if the state information is a difference between a numerical value M and 1, determining a decoding result of the first bit as a second symbol, and updating the state information as a result of reading the numerical value M bits from storage;

[0071] if the state information is not the difference between the numerical value M and 1, determining the decoding result of the first bit as a first symbol, if the state information is 0, updating the state information as a sum result of the difference between the numerical value M and 2 and a value read from storage; if the state information is not 0, updating the state information as a difference between the state information and 1; the updated state information corresponding to a second bit, the second bit being a bit to be decoded after the first bit.

[0072] In a third aspect, the application provides a data encoding device, the device comprising:

[0073] an obtaining module, configured to obtain a target symbol;

[0074] an encoding module, configured to obtain first information and second information corresponding to the target symbol through a first mapping relationship; the first information and the second information being obtained according to probability information corresponding to the target symbol;

[0075] obtain first encoding data through a first operation according to the first information and state information of the encoder;

[0076] update the state information through a second operation according to the second information, and obtain second encoding data; wherein,

[0077] the first encoding data and the second encoding data are used to obtain an encoding result of the target symbol, and the first operation and the second operation do not include division operation.

[0078] In a possible implementation, the first information or the second information represents an integer value.

[0079] In a possible implementation, the first operation and the second operation do not include judgment operation.

[0080] In a possible implementation, the first operation comprises:

[0081] a sum operation on the first information and the state information, and a bit shift operation on a sum result of the sum operation;

[0082] selecting part of bits in the state information as first encoding data, a position of the part of bits in the state information being determined according to a shift result of the bit shift operation.

[0083] In a possible implementation, the second operation includes:

[0084] a sum operation on the state information and a value M, and a bit shift operation on a sum result of the sum operation; wherein the probability information includes a quantized probability, and the M is a denominator of the quantized probability;

[0085] a sum operation on a shift result of the bit shift operation and the second information.

[0086] In a possible implementation, the probability information includes a value of a probability mass function (PMF); the value of the PMF is constructed in the following manner:

[0087] determining values of PMFs of symbols in sequence, the symbols including the target symbol; wherein,

[0088] when determining the value of the PMF of the target symbol, multiplying a total value of remaining PMFs except for the PMF of the determined symbol with the probability of the target symbol, and calculating a ratio between a product result of the multiplication and a remaining probability except for the determined symbol, and determining the PMF of the target symbol according to a relationship between the ratio and a preset fifth value.

[0089] In a possible implementation, the fifth value is 1, and the relationship is to take a larger value.

[0090] In a possible implementation, the probability information includes a value of a cumulative distribution function (CDF); the value of the CDF is constructed in the following manner:

[0091] determining values of CDFs of symbols in sequence based on a preset order, wherein the preset order is determined according to a relationship between values of PMFs of the symbols, the symbols including the target symbol; wherein,

[0092] when the probability distribution corresponding to the probability information of the target symbol is a symmetric distribution, the preset order is an order of interlacing along two sides of a peak point in the symmetric distribution; or,

[0093] The preset order is a descending order when the probability distribution corresponding to the probability information of the target symbol is a discrete distribution.

[0094] The preset order is an ascending order when the probability distribution corresponding to the probability information of the target symbol is a discrete distribution.

[0095] In a possible implementation, the target symbol is obtained by transforming pixel data of an image, the data obtained by transforming the pixel data of the image satisfies a preset distribution, the transformation is also used to obtain a distribution feature of the pixel data, the distribution feature includes a mean value or a variance, and the obtaining module is further configured to:

[0096] According to the distribution feature, the first mapping relationship corresponding to the distribution feature is determined from a plurality of mapping relationships.

[0097] In a possible implementation, the plurality of distribution features include a first distribution feature and a second distribution feature, and an entropy of the first distribution feature is greater than an entropy of the second distribution feature.

[0098] A denominator of a quantization probability in the mapping relationship corresponding to the second distribution feature is greater than a denominator of a quantization probability in the mapping relationship corresponding to the first distribution feature.

[0099] In a possible implementation, the first information in the first mapping relationship is constructed in the following manner:

[0100] bit shifting operation is performed on the sum result of the addition operation, and a subtraction operation is performed on a shift result of the bit shifting operation and a shift result of a bit shifting operation performed on the value of the PMF of the target symbol, to obtain the first information; or

[0101] bit shifting operation is performed on the sum result of the addition operation, and a subtraction operation is performed on a shift result of the bit shifting operation and a shift result of a bit shifting operation performed on the value of the PMF of the target symbol, to obtain the first information; or

[0102] bit shifting operation is performed on the sum result of the addition operation, and a subtraction operation is performed on a shift result of the bit shifting operation and a shift result of a bit shifting operation performed on the value of the PMF of the target symbol, to obtain the first information; or

[0103] In a possible implementation, the second information in the first mapping relationship is constructed in the following manner:

[0104] subtracting the value of the CDF of the target symbol from the value of the PMF of the target symbol, to obtain the second information; or

[0105] subtracting the value of the CDF of the target symbol from the value of the PMF of the target symbol, and performing sum operation on the operation result of the subtraction operation and a value M, to obtain the second information, the probability information comprising a quantized probability, and the M being a denominator of the quantized probability.

[0106] In a possible implementation, the second information in the first mapping relationship is constructed in the following manner:

[0107] when the result of the subtraction operation of the value of the CDF of the target symbol from the value of the PMF of the target symbol is greater than or equal to 0, taking the result of the subtraction operation as the second information; or

[0108] when the result of the subtraction operation of the value of the CDF of the target symbol from the value of the PMF of the target symbol is less than 0, performing sum operation on the operation result of the subtraction operation and a value M, to obtain the second information, the probability information comprising a quantized probability, and the M being a denominator of the quantized probability.

[0109] In a possible implementation, the encoding module is specifically configured to:

[0110] obtain, through the first mapping relationship, an integer value corresponding to the target symbol;

[0111] restore, based on a third operation, the integer value to the first information and the second information, the first information and the second information each being an integer value.

[0112] In a possible implementation, the probability information comprises PMF information corresponding to each symbol, the PMF information comprising a first value and a second value; a sum of the first value and the second value being the value of the PMF; the probability information further comprising CDF information corresponding to each symbol, the CDF information comprising a third value and a fourth value; the third value and the fourth value being constructed in the following manner:

[0113] based on a preset order, sequentially determining the third value corresponding to each symbol through accumulation according to the first values of the plurality of symbols;

[0114] based on the preset order, sequentially determining the fourth value corresponding to each symbol through accumulation according to the second values and the third values of the plurality of symbols.

[0115] In a possible implementation, the second information comprises a first sub-information, a second sub-information and a third sub-information.

[0116] The first sub-information in the first mapping relationship is constructed by subtracting the third value of the target symbol from the value of the PMF of the target symbol.

[0117] The second sub-information in the first mapping relationship is constructed by adding the third value of the target symbol to the first value of the target symbol, and subtracting the operation result from 1.

[0118] The third sub-information in the first mapping relationship is constructed by subtracting the third value of the target symbol from the fourth value of the target symbol, and subtracting the operation result from the first value of the target symbol.

[0119] In a possible implementation, the second operation includes:

[0120] adding the state information and the value M, and performing a bit shift operation on the addition result; wherein the probability information includes a quantized probability, and the M is a denominator of the quantized probability; adding the shift result of the bit shift operation and the first sub-information;

[0121] When the operation result of the addition operation is greater than the second sub-information, the addition result of the addition operation and the third sub-information are taken as the second encoding data.

[0122] When the operation result of the addition operation is less than the second sub-information, the operation result of the addition operation is taken as the second encoding data.

[0123] In a possible implementation, when the value M is 256, the first information is stored by 10 bits, the first sub-information is stored by 8 bits, the second sub-information is stored by 7 bits, the third sub-information is stored by 7 bits, the sum of the first values of a plurality of symbols is 128, and the third sub-information is less than 128.

[0124] The application further provides a data encoding apparatus applied to an encoder based on an asymmetric digital system (ANS), and the apparatus includes:

[0125] An obtaining module is configured to obtain a first symbol, wherein a sum of a quantized probability corresponding to the first symbol and a quantized probability corresponding to a second symbol is 1, a difference between the quantized probability corresponding to the first symbol and 1 is less than a threshold, and a difference between the quantized probability corresponding to the second symbol and 0 is less than a threshold.

[0126] The encoding module is configured to perform a first operation between the state information of the encoder and the numerical value M to obtain first encoding data, and update the state information to 0, according to a first condition being met between a numerical value size relationship between the state information and the numerical value M.

[0127] The state information of the encoder is added by 1, according to the first condition not being met between the numerical value size relationship between the state information and the numerical value M.

[0128] In a possible implementation, the obtaining module is further configured to:

[0129] The second symbol is obtained.

[0130] The encoding module is further configured to take the state information of the encoder as the first encoding data, and update the state information to a difference between the numerical value M and 1.

[0131] In a fourth aspect, the present application provides a data decoding apparatus, which comprises:

[0132] An obtaining module is configured to obtain state information of the decoder and storage bits, the state information corresponding to a first bit, the first bit being a bit to be currently decoded.

[0133] A decoding module is configured to determine, according to a first mapping relationship, first information, second information and third information corresponding to the state information, the first information being a target symbol corresponding to the first bit, the target symbol being a decoding result of the first bit, the second information indicating a bit number selected from the storage bits, and the third information being used for addition operation with bits selected from the storage bits according to the third information, an addition operation result being used for updating the state information, and updated state information corresponding to a second bit, the second bit being a bit to be decoded after the first bit.

[0134] In a possible implementation, the decoding module is further configured to:

[0135] The selected bits are removed from the storage bits to obtain updated storage bits.

[0136] In a possible implementation, the first information, the second information or the third information indicates an integer value.

[0137] In a possible implementation, the first information in the first mapping relationship is constructed by the following way:

[0138] x satisfying C(x)≤s<(C(x)+P(x)) is taken as the first information; wherein, the C represents a value of CDF, the P represents a value of PMF, and the s represents the state information; or,

[0139] x satisfying C1(x)≤s<C1(x)+P1(x) or C2(x)≤s<C2(x)+P2(x) is taken as the first information; wherein, the C1 represents a third value corresponding to CDF, the P1 represents a first value corresponding to PMF, the C2 represents a fourth value corresponding to CDF, the P2 represents a second value corresponding to PMF, and the s represents the state information; and the sum of the first value and the second value is a value of PMF.

[0140] In a possible implementation, the second information in the first mapping relationship is constructed in the following manner:

[0141] a value of clz(s-C(x)+P(x))+X is taken as the second information; wherein, the clz represents a number of bits with the highest bit being continuous 0 in a value, and X is a preset fifth value; or,

[0142] a value of s-C(x)+P(x) is subjected to a bit shift operation, and the third information is obtained, and a shift number of the bit shift operation is obtained according to the second information; or,

[0143] a value of s-C(x)+P(x) is subjected to a bit shift operation, and a result of the bit shift operation is subtracted by a value M, and the third information is obtained, the M is a denominator of the quantized probability, and a shift number of the bit shift operation is obtained according to the second information; or,

[0144] a value of clz(s'-C(x)+P(x))+X is taken as the second information; wherein, the clz represents a number of bits with the highest bit being continuous 0 in a value, X is a preset fifth value, and s' is obtained in the following manner:

[0145] s' = P1(x)+s-C2(x)+P(x) if C2(x)≤s, otherwise s' = s-C1(x)+P(x).

[0146] In a possible implementation, the third information in the first mapping relationship is constructed in the following manner:

[0147] a value of s-C(x)+P(x) is subjected to a bit shift operation, and the third information is obtained, and a shift number of the bit shift operation is obtained according to the second information; or,

[0148] performing a bit shift operation on a value of s-C(x)+P(x), and subtracting a value M from a result of the bit shift operation to obtain the third information, the M being a denominator of the quantized probability, a shift number of the bit shift operation being obtained according to the second information; or

[0149] performing a bit shift operation on a value of s-C(x)+P(x), and subtracting a value M from a result of the bit shift operation to obtain the third information, the M being a denominator of the quantized probability, a shift number of the bit shift operation being obtained according to the second information; or

[0150] In a possible implementation, the first information, the second information, or the third information is obtained according to probability information; the probability information includes a value of a probability mass function PMF; and the value of the PMF is constructed in the following manner:

[0151] values of PMFs of the plurality of symbols are sequentially determined, the plurality of symbols including the target symbol; wherein,

[0152] In the determination of the value of the PMF of the target symbol, a total value of the remaining PMFs excluding the PMFs of the determined symbols is multiplied by the probability of the target symbol, and a ratio between a product result of the multiplication and a remaining probability excluding the determined symbols is calculated, and the PMF of the target symbol is determined according to a relationship between the ratio and a preset value.

[0153] In a possible implementation, the preset value is 1, and the relationship is to take a larger value.

[0154] In a possible implementation, the first information, the second information, or the third information is obtained according to probability information; the probability information includes a value of a cumulative distribution function CDF; and the value of the CDF is constructed in the following manner:

[0155] values of CDFs of each symbol are sequentially determined based on a preset order, wherein the preset order is determined according to a relationship between values of PMFs of a plurality of symbols, the plurality of symbols including the target symbol; wherein,

[0156] When the probability distribution corresponding to the probability information of the target symbol is a symmetric distribution, the preset order is an order staggered along two sides of a peak point in the symmetric distribution; or,

[0157] When the probability distribution corresponding to the probability information of the target symbol is a discrete distribution, the preset order is specifically an order from large to small; or,

[0158] When the probability distribution corresponding to the probability information of the target symbol is a discrete distribution, the preset order is specifically an order from small to large.

[0159] In a possible implementation, the obtaining module is further configured to:

[0160] obtain an encoding result, wherein the encoding result is obtained by encoding pixel data of the image, the state information and the stored bits are obtained according to the encoding result;

[0161] process the encoding result, wherein the distribution feature of the pixel data includes a mean value or a variance;

[0162] determine the first mapping relationship corresponding to the distribution feature from a plurality of mapping relationships according to the distribution feature.

[0163] The application further provides a data decoding apparatus applied to an asymmetric digital system (ANS) based decoder, and the apparatus comprises:

[0164] an obtaining module configured to obtain state information of the decoder, wherein the state information corresponds to a first bit, and the first bit is a bit to be currently decoded;

[0165] a decoding module configured to determine a decoding result of the first bit as a second symbol if the state information is a difference between a value M and 1, and update the state information as a result of reading the value M bits from a storage;

[0166] determine the decoding result of the first bit as a first symbol if the state information is not the difference between the value M and 1, and update the state information as a sum of a difference between the value M and 2 and a value of 1 bit read from the storage if the state information is 0, or update the state information as a difference between the state information and 1 if the state information is not 0, wherein the second bit corresponds to the updated state information, and the second bit is a bit to be decoded after the first bit.

[0167] In a fifth aspect, an embodiment of the application provides a data encoding apparatus, which can comprise a memory, a processor and a bus system, wherein the memory is configured to store a program, and the processor is configured to execute the program in the memory to perform any of the methods in the first aspect.

[0168] In a sixth aspect, an embodiment of the application provides a data decoding apparatus, which can comprise a memory, a processor and a bus system, wherein the memory is configured to store a program, and the processor is configured to execute the program in the memory to perform any of the methods in the second aspect.

[0169] In a seventh aspect, an embodiment of the present application provides a computer readable storage medium, having stored therein a computer program, which, when executed on a computer, causes the computer to perform the method of the first aspect and any possible implementation of the method, and the method of the second aspect and any possible implementation of the method.

[0170] In an eighth aspect, an embodiment of the present application provides a computer program product, comprising code, which, when executed on a computer, is configured to implement the method of the first aspect and any possible implementation of the method, and the method of the second aspect and any possible implementation of the method.

[0171] In a ninth aspect, the present application provides a chip system, which comprises a processor configured to support the execution device or the training device to implement the functions involved in the above aspects, for example, to send or process the data involved in the above method; or, information. In a possible design, the chip system further comprises a memory, and the memory is configured to store the necessary program instructions and data for the execution device or the training device. The chip system can be composed of a chip, or can comprise a chip and other discrete devices. BRIEF DESCRIPTION OF DRAWINGS

[0172] Figure 1A A block diagram of a video coding system for implementing an embodiment of the present application is shown;

[0173] Figure 1A A block diagram of another video coding system for implementing an embodiment of the present application is shown;

[0174] Figure 2 A block diagram of an encoder structure for implementing an embodiment of the present application is shown;

[0175] Figure 3 A block diagram of a decoder structure for implementing an embodiment of the present application is shown;

[0176] Figure 4 A block diagram of a video coding device for implementing an embodiment of the present application is shown;

[0177] Figure 5 A flowchart of a data encoding method provided by an embodiment of the present application is shown;

[0178] Figure 6 A flowchart of a data encoding method provided by an embodiment of the present application is shown;

[0179] Figure 7 A flowchart of a data encoding method provided by an embodiment of the present application is shown;

[0180] Figure 8 A flowchart of a data encoding method provided by an embodiment of the present application is shown;

[0181] Figure 9 A flowchart of a data decoding method provided by an embodiment of the present application is shown in FIG. 1.

[0182] Figure 10A A flowchart of a data decoding method provided by an embodiment of the present application is shown in FIG. 1.

[0183] Figure 10B A flowchart of a data decoding method provided by an embodiment of the present application is shown in FIG. 1.

[0184] Figure 11 A structural diagram of a data encoding device provided by an embodiment of the present application is shown in FIG. 2.

[0185] Figure 12 A structural diagram of a data decoding device provided by an embodiment of the present application is shown in FIG. 3.

[0186] Figure 13 A schematic diagram of an execution device provided by an embodiment of the present application is shown in FIG. 4.

[0187] Figure 14 A schematic diagram of a server provided by an embodiment of the present application is shown in FIG. 5.

[0188] Figure 15 A schematic diagram of a chip provided by an embodiment of the present application is shown in FIG. 6. DETAILED DESCRIPTION

[0189] The embodiments of the present application will be described below in conjunction with the accompanying drawings. The terms used in the embodiments section of the present application are only used to explain the specific embodiments of the present application, and are not intended to limit the present application.

[0190] The embodiments of the present application will be described below in conjunction with the accompanying drawings. The terms used in the embodiments section of the present application are only used to explain the specific embodiments of the present application, and are not intended to limit the present application.

[0191] The terms "first", "second", and the like in the specification and claims of the present application and the above-described drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the terms used in this way can be interchanged, and this is only a distinguishing way used in the description of the embodiments of the present application to describe the objects with the same attributes. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion, so that the processes, methods, systems, products or devices containing a series of units are not necessarily limited to those units, but can include other units not clearly listed or inherent to these processes, methods, products or devices.

[0192] In the embodiments of the present application, "at least one" means one or more, and "multiple" means two or more. The "and / or" describes the association relationship of the associated objects, which means that there can be three kinds of relationships, for example, A and / or B can represent the following three cases: A exists alone, A and B exist together, and B exists alone, where A and B can be singular or plural. The character " / " generally represents an "or" relationship between the front and rear associated objects. "At least one of the following" or similar expressions means any combination of these items, including any combination of single item or multiple items. For example, at least one of a, b, or c can represent a, b, c, a-b, a-c, b-c, or a-b-c, where a, b, and c can be single or multiple.

[0193] Many of the techniques and tools described in the embodiments of the present application are explained with reference to media encoder / decoder systems, such as video encoder / decoder systems, audio encoder / decoder systems, or texture encoder / decoder systems. Alternatively, the techniques and tools described in the embodiments of the present application can generally be implemented in data encoder / decoder systems for encoding / decoding text data or other types of data.

[0194] The terms used in the embodiments of the present application are only used to explain the specific embodiments of the present application, and are not intended to limit the present application. The following will first briefly introduce some concepts that may be involved in the embodiments of the present application.

[0195] It should be understood that the present application is not limited to video coding, but can also be audio, texture or image coding. As an example, the following will be described taking video coding as an example.

[0196] Video coding generally refers to processing a sequence of pictures forming a video or video sequence. In the field of video coding, the terms "picture", "frame" or "image" can be used as synonyms. Video coding used herein means video encoding or video decoding. Video coding is performed at the source side, usually including processing (e.g., by compression) of original video pictures to reduce the amount of data required to represent the video pictures, thereby more efficiently storing and / or transmitting. Video decoding is performed at the destination side, usually including inverse processing relative to the encoder, to reconstruct the video pictures. The video pictures "coding" involved in the embodiments should be understood as involving "encoding" or "decoding" of the video sequence. The combination of the encoding part and the decoding part is also called coding (encoding and decoding).

[0197] A video sequence includes a series of pictures, which are further divided into slices, and the slices are further divided into blocks. Video coding is performed in block units, and in some new video coding standards, the concept of block is further extended. For example, in H.264 standard, there is a macroblock (MB), which can be further divided into multiple prediction blocks (PBs) for prediction coding. In the high efficiency video coding (HEVC) standard, the basic concepts of coding unit (CU), prediction unit (PU) and transform unit (TU) are used, and multiple block units are divided in function, and a new tree structure is used for description. For example, a CU can be divided into smaller CUs according to a quad-tree, and the smaller CUs can be further divided, thereby forming a quad-tree structure. The CU is a basic unit for dividing and coding a coded picture. For the PU and the TU, there are also similar tree structures. The PU can correspond to a prediction block, and is a basic unit for prediction coding. The CU can be further divided into multiple PUs according to a division mode. The TU can correspond to a transform block, and is a basic unit for transforming a prediction residual. However, whether it is a CU, a PU or a TU, it essentially belongs to the concept of a block (or an image block). The concept of an image block (for example, a first image block and a second image block) is involved in the embodiments of the present application, and can be specifically referred to herein.

[0198] For example, in HEVC, a CTU is split into CUs by using a quad-tree structure denoted as coding tree. At the CU level, a decision is made whether to use inter-picture (temporal) or intra-picture (spatial) prediction to code the picture area. Each CU can be further split into one, two or four PUs according to the PU split type. The same prediction process is applied within one PU, and the relevant information is transmitted to the decoder on the PU basis. After obtaining a residual block by applying the prediction process based on the PU split type, the CU can be partitioned into transform units (TUs) according to another quad-tree structure similar to the coding tree used for the CU. In the latest development of video compression technology, a quad-tree and binary tree (QTBT) partitioning is used to partition coding blocks by partitioning frames. In the QTBT block structure, the CU can be square or rectangular in shape.

[0199] In this document, for the sake of description and understanding, the image block to be processed in the current coded image (referred to as the to-be-processed image block) can be referred to as the current block, for example, in encoding, the to-be-processed image block refers to the block that is currently being encoded; in decoding, the to-be-processed image block refers to the block that is currently being decoded. The decoded image block in the reference image used for predicting the current block is referred to as the reference block, that is, the reference block is the block that provides the reference signal for the current block, wherein the reference signal indicates the pixel value in the image block. The block in the reference image that provides the prediction signal for the current block is referred to as the prediction block, wherein the prediction signal indicates the pixel value or the sample value or the sample signal in the prediction block. For example, after traversing a plurality of reference blocks, the best reference block is found, and this best reference block will provide the prediction for the current block, and this block can be referred to as the prediction block.

[0200] In the case of lossless video coding, the original video picture can be reconstructed, i.e. the reconstructed video picture has the same quality as the original video picture (assuming no transmission losses or other data loss during storage or transmission). In the case of lossy video coding, further compression is performed by e.g. quantization to reduce the amount of data required to represent the video picture, and the video picture cannot be fully reconstructed at the decoder side, i.e. the reconstructed video picture has a lower or worse quality than the original video picture.

[0201] Several video coding standards of H.261 belong to the category of "lossy hybrid video coding" (i.e. combining spatial and temporal prediction in the sample domain with 2D transform coding in the transform domain for applying quantization). Each picture of a video sequence is typically partitioned into a set of non-overlapping blocks, which are usually encoded at block level. In other words, the encoder side usually processes, i.e. encodes, video at block (video block) level, e.g. by generating a prediction block by spatial (intra-picture) and temporal (inter-picture) prediction, subtracting the prediction block from the current block (block currently processed or to be processed) to obtain a residual block, transforming the residual block in the transform domain and quantizing the residual block to reduce the amount of data to be transmitted (compressed), while the decoder side applies an inverse processing part with respect to the encoder to the encoded or compressed block to reconstruct the current block for representation. In addition, the encoder replicates the decoder processing loop such that the encoder and the decoder generate the same predictions (e.g. intra- and inter-predictions) and / or reconstructions for processing, i.e. encoding, subsequent blocks.

[0202] The system architecture to which embodiments of the present application are applied is described below. Referring to Figure 1A Figure 1A An exemplary block diagram of a video encoding and decoding system 10 to which embodiments of the present application are applied is shown. As Figure 1A ​​As shown, video encoding and decoding system 10 can include a source device 12 that generates encoded video data and, therefore, can be referred to as a video encoding apparatus. A destination device 14 can decode the encoded video data generated by the source device 12 and, therefore, can be referred to as a video decoding apparatus. Various embodiments of the source device 12, the destination device 14, or both can include one or more processors and a memory coupled to the one or more processors. The memory can include, but is not limited to, RAM, ROM, EEPROM, flash memory or any other medium that can be used to store desired program code in the form of instructions or data structures and that can be accessed by a computer. Source device 12 and destination device 14 can comprise various devices, including desktop computers, mobile computing devices, notebook (e.g., laptop) computers, tablet computers, set-top boxes, telephone handsets such as so-called “smart” telephones, televisions, cameras, display devices, digital media players, video gaming consoles, car computers, wireless communication devices, or the like.

[0203] Although Figure 1A While source device 12 and destination device 14 are illustrated as separate devices, a device embodiment can also include both source device 12 and destination device 14 or functionality of both, i.e., source device 12 or corresponding functionality and destination device 14 or corresponding functionality. In such embodiment, the source device 12 or corresponding functionality and the destination device 14 or corresponding functionality can be implemented using the same hardware and / or software, or separate hardware and / or software, or any combination thereof.

[0204] Source device 12 and destination device 14 can communicate via a link 13 over which source device 12 can transmit encoded video data to destination device 14. Link 13 can include one or more media or devices capable of carrying encoded video data from source device 12 to destination device 14. In one example, link 13 can include one or more communication media to enable source device 12 to transmit encoded video data directly to destination device 14 in real-time. In this example, source device 12 can modulate encoded video data according to a communication standard, such as a wireless communication protocol, and can transmit the modulated video data to destination device 14. The one or more communication media can include wireless and / or wired communication media, such as a radio frequency (RF) spectrum or one or more physical transmission lines. The one or more communication media can form part of a packet-based network, such as a local area network, a wide-area network, or a global network such as the Internet. The one or more communication media can include routers, switches, base stations, or other equipment that facilitates communication from source device 12 to destination device 14.

[0205] Source device 12 includes an encoder 20, and optionally, source device 12 can also include a picture source 16, a picture pre-processor 18, and a communication interface 22. In implementations, the encoder 20, picture source 16, picture pre-processor 18, and communication interface 22 can be hardware components in source device 12, or software programs in source device 12.

[0206] The following are described separately:

[0207] Picture source 16 can include or be any kind of picture capturing device for capturing, for example, real-world pictures, and / or any kind of picture or comment (for screen content coding, some text on a screen is also considered as part of the picture or image to be coded) generating device, for example, a computer graphics processor for generating computer-animated pictures, or any kind of device for acquiring and / or providing real-world pictures, computer-animated pictures (e.g., screen content, virtual reality (VR) pictures), and / or any combination thereof (e.g., augmented reality (AR) pictures). Picture source 16 can be a camera for capturing pictures or a memory for storing pictures, and picture source 16 can also include any kind of (internal or external) interface for storing previously captured or generated pictures and / or for acquiring or receiving pictures. When picture source 16 is a camera, picture source 16 can be, for example, a local or integrated camera integrated in source device; when picture source 16 is a memory, picture source 16 can be a local or integrated memory, for example, integrated in source device. When picture source 16 includes an interface, the interface can be, for example, an external interface for receiving pictures from an external video source, for example, an external picture capturing device such as a camera, an external memory, or an external picture generating device, for example, an external computer graphics processor, a computer, or a server. The interface can be any kind of interface according to any proprietary or standardized interface protocol, for example, a wired or wireless interface, an optical interface.

[0208] In some embodiments, the picture can be considered as a two-dimensional array or matrix of picture elements. The picture elements in the array can also be referred to as samples. The number of picture elements in the array or picture in the horizontal and vertical directions (or axes) defines the size and / or resolution of the picture. For representing colors, typically three color components are used, i.e. the picture can be represented or contain three sample arrays. For example, in an RBG format or color space, the picture comprises corresponding red, green and blue sample arrays. However, in video coding, typically each pixel is represented in a luma / chroma format or color space, e.g. for a picture in YUV format, comprising a luma component Y (sometimes also indicated by L) and two chroma components U and V. The luma component Y represents the luminance or gray level intensity (e.g. both in a gray scale picture), while the two chroma components U and V represent the chrominance or color information components. Accordingly, a picture in YUV format comprises a luma sample array of luma sample values (Y) and two chroma sample arrays of chroma values (U and V). A picture in RGB format can be converted or transformed into YUV format and vice versa, which process is also referred to as color conversion or transformation. If the picture is black and white, the picture can comprise only a luma sample array. In embodiments of the present application, the picture transmitted by the picture source 16 to the picture processor can also be referred to as raw picture data 17.

[0209] The picture pre-processor 18 is configured to receive the raw picture data 17 and perform pre-processing on the raw picture data 17 to obtain a pre-processed picture 19 or pre-processed picture data 19. For example, the pre-processing performed by the picture pre-processor 18 can include trimming, color format conversion (e.g. from RGB format to YUV format), toning or de-noising.

[0210] The encoder 20 (or encoder 20) is configured to receive the pre-processed picture data 19 and process the pre-processed picture data 19 using a relevant prediction mode to provide encoded picture data 21 (further details of which will be described below based on Figure 2 or Figure 4 or Figure 5 The structure details of the encoder 20 will be described. In some embodiments, the encoder 20 can be configured to perform various embodiments described below to implement the video encoding method described in the present application.

[0211] The communication interface 22 can be configured to receive the encoded picture data 21 and transmit the encoded picture data 21 to the destination device 14 or any other device (e.g. a storage) via the link 13 for storage or direct reconstruction, which other device can be any device for decoding or storage. The communication interface 22 can be configured to, for example, encapsulate the encoded picture data 21 into a suitable format, e.g. a packet, for transmission over the link 13.

[0212] Destination device 14 includes a decoder 30, and optionally, destination device 14 can also include a communication interface 28, a picture post-processor 32, and a display device 34, which are described as follows, respectively.

[0213] Communication interface 28 can be configured to receive encoded picture data 21 from source device 12 or any other source, such as a storage device, e.g., an encoded picture data storage device. Communication interface 28 can be configured to transmit or receive encoded picture data 21 via a link 13 between source device 12 and destination device 14, such as a direct wired or wireless connection, or via any type of network, such as a wired or wireless network or any combination thereof, or any type of private or public network, or any combination thereof. Communication interface 28 can be configured to, for example, de-encapsulate data packets transmitted by communication interface 22 to obtain encoded picture data 21.

[0214] Both communication interface 28 and communication interface 22 can be configured as unidirectional or bidirectional communication interfaces, and can be configured to, for example, send and receive messages to establish a connection, confirm, and exchange any other information related to the communication link and / or data transmission, such as encoded picture data transmission.

[0215] Decoder 30 (or referred to as decoder 30) is configured to receive encoded picture data 21 and provide decoded picture data 31 or decoded picture 31 (further described below based on Figure 3 or Figure 4 or Figure 5 The structure details of decoder 30 are described. In some embodiments, decoder 30 can be configured to perform various embodiments described below to implement the video decoding method described in the present disclosure.

[0216] Picture post-processor 32 is configured to perform post-processing on decoded picture data 31 (also referred to as reconstructed picture data) to obtain post-processed picture data 33. The post-processing performed by picture post-processor 32 can include color format conversion (e.g., from YUV format to RGB format), toning, retouching, or resampling, or any other processing, and can also be configured to transmit post-processed picture data 33 to display device 34.

[0217] A display device 34 for receiving the post-processed picture data 33 to display the picture to, for example, a user or viewer. The display device 34 can be or can comprise any kind of display for presenting a reconstructed picture, for example, an integrated or external display or monitor. For example, the display can comprise a liquid crystal display (LCD), an organic light emitting diode (OLED) display, a plasma display, a projector, a micro LED display, a liquid crystal on silicon (LCoS), a digital light processor (DLP), or any kind of other display.

[0218] While, Figure 1A While the source device 12 and the destination device 14 are illustrated as separate devices, a device embodiment can also comprise both the source device 12 and the destination device 14 or the functionality of both, i.e., the source device 12 or the corresponding functionality and the destination device 14 or the corresponding functionality. In such embodiments, the source device 12 or the corresponding functionality and the destination device 14 or the corresponding functionality can be implemented using the same hardware and / or software or using separate hardware and / or software or any combination thereof.

[0219] It will be apparent to those skilled in the art based on the description that the functionality of different units or Figure 1A The presence and (precise) division of the functionality of the illustrated source device 12 and / or destination device 14 can differ depending on the actual device and application. The source device 12 and the destination device 14 can comprise any of a variety of devices, including any kind of handheld or stationary device, for example, a notebook or laptop computer, a mobile phone, a smartphone, a tablet or tablet computer, a camcorder, a desktop computer, a set-top box, a television, a camera, a car device, a display device, a digital media player, a video game console, a video streaming device, for example, a content service server or a content distribution server, a broadcast receiver device, a broadcast transmitter device, etc., and can not use or use any kind of operating system.

[0220] The encoder 20 and the decoder 30 can each be implemented as any of a variety of suitable circuitry, such as one or more microprocessors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), discrete logic, hardware, or any combinations thereof. If the techniques are implemented partially in software, a device can store instructions for the software in any suitable non-transitory computer-readable storage medium, and execute the instructions using one or more processors to perform the techniques of this disclosure. Any of the foregoing (alone or in combination), including hardware, software, a combination of hardware and software, etc., can be considered one or more processors.

[0221] In some cases, Figure 1A The video encoding and decoding system 10 shown in FIG. 1 is merely an example, and the techniques of this disclosure can be applied to a video encoding setup (e.g., video encoding or video decoding) that does not necessarily include any data communication between the encoding and decoding devices. In other examples, data can be retrieved from local memory, streamed over a network, etc. A video encoding device can encode data and store the data to memory, and / or a video decoding device can retrieve data from memory and decode the data. In some examples, encoding and decoding are performed by devices that do not communicate with each other, but rather only encode data to memory and / or retrieve data from memory and decode the data.

[0222] It should be understood that the encoder 20 can be deployed on a terminal device or a server at a cloud side, the decoder 30 can be deployed on a terminal device or a server at a cloud side, and the encoder 20 and the decoder 30 can also be jointly deployed on a terminal device or a server at a cloud side.

[0223] In one scenario, the encoder 20 and the decoder 30 can be deployed on a terminal device, the encoder 20 can perform encoding compression on a video on the terminal device, and perform secondary compression (or referred to as incremental storage compression) based on the video encoding method provided in the embodiments of the present disclosure, and store the compressed data, and when the video needs to be played, the stored compressed data can be decoded.

[0224] In one scenario, the encoder 20 and the decoder 30 can be deployed on a plurality of terminal devices, the encoder 20 can perform encoding compression on a video on the terminal device, and perform secondary compression (or referred to as incremental storage compression) based on the video encoding method provided in the embodiments of the present disclosure, and transmit the compressed data to other terminal devices, and other devices can decode the stored compressed data when the video needs to be played.

[0225] In one scenario, the encoder 20 and the decoder 30 can be deployed on a terminal device and a server at a cloud side, the encoder 20 can perform encoding compression on a video on the terminal device, and perform secondary compression (or referred to as incremental storage compression) based on the video encoding method provided in the embodiments of the present application, and transmit the compressed data to the server.

[0226] Referring to Figure 1B , Figure 1B is a schematic diagram of an example of a video coding system 40 including an encoder 20 and / or a decoder 30 according to an example embodiment. The video coding system 40 can implement a combination of various techniques of the embodiments of the present application. In the illustrated implementation, the video coding system 40 can include an imaging device 41, the encoder 20, the decoder 30 (and / or a video encoder / decoder implemented by a logic circuit of the processing unit 46), an antenna 42, one or more processors 43, one or more memories 44, and / or a display device 45. Figure 2 Figure 3 As shown in , the imaging device 41, the antenna 42, the processing unit 46, the logic circuit, the encoder 20, the decoder 30, the processor 43, the memory 44, and / or the display device 45 can be in communication with each other. As discussed, although the video coding system 40 is illustrated with the encoder 20 and the decoder 30, in different examples, the video coding system 40 can include only the encoder 20 or only the decoder 30.

[0227] Figure 1B

[0228] ​​In some examples, the antenna 42 can be used to transmit or receive encoded data of video data. Additionally, in some examples, the display device 45 can be used to present video data. In some examples, the logic circuit can be implemented by a processing unit 46. The processing unit 46 can include application-specific integrated circuit (ASIC) logic, a graphics processor, a general purpose processor, etc. The video coding system 40 can also include an optional processor 43, which similarly can include application-specific integrated circuit (ASIC) logic, a graphics processor, a general purpose processor, etc. In some examples, the logic circuit can be implemented by hardware, such as video encoding specific hardware, etc., and the processor 43 can be implemented by general software, an operating system, etc. Additionally, the memory 44 can be any type of memory, such as volatile memory (e.g., Static Random Access Memory (SRAM), Dynamic Random Access Memory (DRAM), etc.) or non-volatile memory (e.g., flash memory, etc.), etc. In non-limiting examples, the memory 44 can be implemented by cache memory. In some examples, the logic circuit can access the memory 44 (e.g., for implementing an image buffer). In other examples, the logic circuit and / or the processing unit 46 can include memory (e.g., cache, etc.) for implementing an image buffer, etc.

[0229] In some examples, the encoder 20 implemented by the logic circuit can include an image buffer (e.g., implemented by the processing unit 46 or the memory 44) and a graphics processing unit (e.g., implemented by the processing unit 46). The graphics processing unit can be communicatively coupled to the image buffer. The graphics processing unit can include the encoder 20 implemented by the logic circuit to implement the various modules discussed with respect to Figure 2 and / or any other encoder system or subsystem described herein. The logic circuit can be used to perform the various operations discussed herein.

[0230] In some examples, the decoder 30 can be implemented by the logic circuit in a similar manner to implement the various modules discussed with respect to Figure 3the various modules discussed with respect to the decoder 30 and / or any other decoder system or subsystem described herein. In some examples, the logic circuitry-implemented decoder 30 can include an image buffer (implemented by the processing unit 2820 or the memory 44) and a graphics processing unit (e.g., implemented by the processing unit 46). The graphics processing unit can be communicatively coupled to the image buffer. The graphics processing unit can include the logic circuitry-implemented decoder 30 to implement the various modules discussed with respect to the decoder 30 and / or any other decoder system or subsystem described herein. Figure 3 and / or any other decoder system or subsystem described herein.

[0231] In some examples, the antenna 42 can be used to receive encoded coding data for video data. As discussed, the encoded coding data can include data, indicators, index values, mode selection data, etc. discussed herein related to encoding video frames, e.g., data related to encoding partitions (e.g., transform coefficients or quantized transform coefficients, optional indicators (as discussed), and / or data defining encoding partitions). The video coding system 40 can also include a decoder 30 coupled to the antenna 42 and used to decode the encoded coding data. The display device 45 is used to present video frames.

[0232] It should be understood that the decoder 30 can be used to perform the inverse process with respect to the examples described with respect to the reference encoder 20 in embodiments of the present application. With respect to signaling syntax elements, the decoder 30 can be used to receive and parse such syntax elements and decode the related video data accordingly. In some examples, the encoder 20 can entropy encode the syntax elements into encoded video coding data. In such examples, the decoder 30 can parse such syntax elements and decode the related video data accordingly.

[0233] Referring to Figure 2 , Figure 2 An illustrative / conceptual block diagram showing an example of an encoder 20 for implementing embodiments of the present application is shown. In Figure 2 In the example shown, the encoder 20 includes a residual calculation unit 204, a transform processing unit 206, a quantization unit 208, an inverse quantization unit 210, an inverse transform processing unit 212, a reconstruction unit 214, a buffer 216, an in-loop filter unit 220, a decoded picture buffer (DPB) 230, a prediction processing unit 260, and an entropy encoding unit 270. The prediction processing unit 260 can include an inter-prediction unit 244, an intra-prediction unit 254, and a mode selection unit 262. The inter-prediction unit 244 can include a motion estimation unit and a motion compensation unit (not shown). Figure 2 The encoder 20 shown can also be referred to as a hybrid video encoder or a video encoder according to a hybrid video codec.

[0234] For example, the residual calculation unit 204, the transform processing unit 206, the quantization unit 208, the prediction processing unit 260 and the entropy encoding unit 270 form a forward signal path of the encoder 20, while the inverse quantization unit 210, the inverse transform processing unit 212, the reconstruction unit 214, the buffer 216, the loop filter 220, the decoded picture buffer (DPB) 230, the prediction processing unit 260 form a backward signal path of the encoder, which corresponds to the signal path of the decoder (see Figure 3

[0235] The encoder 20 receives a picture 201 or an image block 203 of the picture 201, e.g. a picture of a sequence of pictures forming a video or a video sequence, by way of an input 202, for example. The image block 203 can also be referred to as a current coding block or a to-be-processed image block, and the picture 201 can be referred to as a current picture or a to-be-encoded picture, especially when the current picture is distinguished from other pictures in a video coding, e.g. a previously encoded and / or decoded picture in the same video sequence, i.e. a video sequence also comprising the current picture.

[0236] Embodiments of the encoder 20 can comprise a partitioning unit (not depicted in Figure 2 ) for partitioning the picture 201 into a plurality of blocks, e.g. image blocks 203, typically into a plurality of non-overlapping blocks. The partitioning unit can be configured to use the same block size and a corresponding grid defining the block size for all pictures in a video sequence, or to change the block size between pictures or subsets or groups of pictures and to partition each picture into corresponding blocks.

[0237] In one example, the prediction processing unit 260 of the encoder 20 can be configured to perform any combination of the above-described partitioning techniques.

[0238] The image block 203 is also or can be regarded as a two-dimensional array or matrix of sample points having sample values, like the picture 201, although its size is smaller than the size of the picture 201. In other words, the image block 203 can comprise, for example, one array of samples (e.g. a luminance array in case of a black-and-white picture 201) or three arrays of samples (e.g. one luminance array and two chrominance arrays in case of a color picture) or any other number and / or kind of arrays depending on the applied color format. The number of sample points in the horizontal and vertical direction (or axis) of the image block 203 defines the size of the image block 203.

[0239] The encoder 20 as shown in Figure 2 is configured to encode the picture 201 on a block-by-block basis, e.g. to perform encoding and prediction for each image block 203.

[0240] ​The residual calculation unit 204 is configured to calculate the residual block 205 on the basis of the picture image block 203 and a prediction block 265 (further details of the prediction block 265 are provided below), e.g. by subtracting sample values of the prediction block 265 from sample values of the picture image block 203 on a sample-by-sample (pixel-by-pixel) basis to obtain the residual block 205 in the sample domain.

[0241] The transform processing unit 206 is configured to apply a transform, such as a discrete cosine transform (DCT) or a discrete sine transform (DST), on the sample values of the residual block 205 to obtain transform coefficients 207 in the transform domain. The transform coefficients 207 can also be referred to as transform residual coefficients and represent the residual block 205 in the transform domain.

[0242] The transform processing unit 206 can be configured to apply an integer approximation of the DCT / DST, such as the transform specified for HEVC / H.265. In contrast to an orthogonal DCT transform, such an integer approximation is typically scaled by a certain factor. In order to maintain the norm of the residual block being processed by the forward and inverse transform, an additional scaling factor is applied as part of the transform process. The scaling factor is typically chosen based on certain constraints, e.g. the scaling factor is a power of two for shift operations, the bit depth of the transform coefficients, a balance between accuracy and implementation cost, etc. The specific scaling factor is specified, e.g. for the inverse transform at the decoder 30 side by the inverse transform processing unit 212 (and for the corresponding inverse transform at the encoder 20 side by the inverse transform processing unit 212), and, accordingly, a corresponding scaling factor can be specified for the forward transform at the encoder 20 side by the transform processing unit 206.

[0243] Quantization unit 208 is configured to quantize transform coefficients 207, e.g., by applying scalar quantization or vector quantization, to obtain quantized transform coefficients 209. Quantized transform coefficients 209 can also be referred to as quantized residual coefficients 209. The quantization process can reduce the bit depth associated with some or all of transform coefficients 207. For example, n-bit transform coefficients can be rounded down to m-bit transform coefficients during quantization, where n is greater than m. The degree of quantization can be modified by adjusting a quantization parameter (QP). For example, for scalar quantization, different scales can be applied to achieve finer or coarser quantization. A smaller quantization step size corresponds to finer quantization, while a larger quantization step size corresponds to coarser quantization. A suitable quantization step size can be indicated by a quantization parameter (QP). For example, the quantization parameter can be an index to a predefined set of quantization step sizes. For example, a smaller quantization parameter can correspond to fine quantization (smaller quantization step size), a larger quantization parameter can correspond to coarse quantization (larger quantization step size), and vice versa. Quantization can involve division by the quantization step size and a corresponding dequantization or inverse quantization, e.g., by inverse quantization 210, or can involve multiplication by the quantization step size. Embodiments according to some standards, e.g., HEVC, can use a quantization parameter to determine the quantization step size. In general, the quantization step size can be calculated based on the quantization parameter using a fixed-point approximation of the equation involving division. An additional scaling factor can be introduced for quantization and dequantization to recover the norm of the residual block that can have been modified due to the scale used in the fixed-point approximation of the equation for the quantization step size and the quantization parameter. In one example implementation, the scale of the inverse transform and the dequantization can be combined. Alternatively, a custom quantization table can be used and signaled from the encoder to the decoder, e.g., in encoded data. Quantization is a lossy operation, where the larger the quantization step size, the greater the loss.

[0244] Inverse quantization unit 210 is configured to apply an inverse quantization of quantization unit 208 on the quantized coefficients to obtain inverse quantized coefficients 211, e.g., based on or using the same quantization step size as quantization unit 208, applying an inverse quantization scheme of the quantization scheme applied by quantization unit 208. Inverse quantized coefficients 211 can also be referred to as inverse quantized residual coefficients 211, corresponding to transform coefficients 207, although the loss due to quantization is generally not the same as the transform coefficients.

[0245] Inverse transform processing unit 212 is configured to apply an inverse transform of the transform applied by transform processing unit 206, e.g., an inverse discrete cosine transform (DCT) or an inverse discrete sine transform (DST), to obtain an inverse transformed block 213 in the sample domain. Inverse transformed block 213 can also be referred to as inverse transformed inverse quantized block 213 or inverse transformed residual block 213.

[0246] The reconstruction unit 214 (e.g., a summer 214) is configured to add the inverse transform block 213 (i.e., the reconstructed residual block 213) to the prediction block 265 to obtain a reconstructed block 215 in the sample domain, e.g., by adding the sample values of the reconstructed residual block 213 to the sample values of the prediction block 265.

[0247] Optionally, a buffer unit 216 (or simply "buffer" 216), e.g., a line buffer 216, is configured to buffer or store the reconstructed block 215 and corresponding sample values, e.g., for intra prediction. In other embodiments, the encoder can be configured to use the unfiltered reconstructed block and / or corresponding sample values stored in the buffer unit 216 for any kind of estimation and / or prediction, e.g., intra prediction.

[0248] For example, an embodiment of the encoder 20 can be configured such that the buffer unit 216 is used not only for storing the reconstructed block 215 for intra prediction 254, but also for a loop filter unit 220 (not shown in FIG. 2B) and / or such that the buffer unit 216 and the decoded picture buffer unit 230 form one buffer, for example. Other embodiments can be configured to use the filtered block 221 and / or a block or sample from the decoded picture buffer 230 (none of which is shown in FIG. 2B) as an input or basis for intra prediction 254. Figure 2 Figure 2 For example, an embodiment of the encoder 20 can be configured such that the buffer unit 216 is used not only for storing the reconstructed block 215 for intra prediction 254, but also for a loop filter unit 220 (not shown in FIG. 2B) and / or such that the buffer unit 216 and the decoded picture buffer unit 230 form one buffer, for example. Other embodiments can be configured to use the filtered block 221 and / or a block or sample from the decoded picture buffer 230 (none of which is shown in FIG. 2B) as an input or basis for intra prediction 254.

[0249] The loop filter unit 220 (or simply "loop filter" 220) is configured to filter the reconstructed block 215 to obtain a filtered block 221 for a smooth pixel transition or for improving the video quality. The loop filter unit 220 is intended to represent one or more loop filters, such as a deblocking filter, a sample adaptive offset (SAO) filter, or other filters, such as a bilateral filter, an adaptive loop filter (ALF), or a sharpening or smoothing filter, or a collaborative filter. Although the loop filter unit 220 is shown as an in-loop filter in FIG. 2B, in other configurations, the loop filter unit 220 can be implemented as a post-loop filter. The filtered block 221 can also be referred to as a filtered reconstructed block 221. The decoded picture buffer 230 can store the reconstructed coded block after the loop filter unit 220 performs a filtering operation on the reconstructed coded block. Figure 2

[0250] ​​Embodiments of the encoder 20 (correspondingly, the loop filter unit 220) can be configured to output loop filter parameters (e.g., sample adaptive offset information), e.g., directly or after entropy encoding by the entropy encoding unit 270 or any other entropy encoding unit, e.g., such that the decoder 30 can receive and apply the same loop filter parameters for decoding.

[0251] The entropy encoding unit 270 is configured to entropy encode according to output from the quantization unit 208 (e.g., quantized transform coefficients) and side information. The entropy encoding unit 270 can be configured to determine parameters representing quantized transform coefficients, side information, etc. The entropy encoding unit 270 can be configured to predict values of the parameters based on context information and then encode differences between actual values and predicted values. For a target symbol representing a value to be encoded, the entropy encoding unit 270 can be configured to perform entropy encoding in various ways. Typical entropy encoding techniques include Exponential-Golomb encoding, Golomb-Rice encoding, context adaptive binary arithmetic coding (“CABAC”), differential encoding,

[0252] Huffman encoding, run length encoding, Lempel-Ziv (“LZ”) encoding, dictionary encoding, RANS encoding, ANS encoding, TANS encoding, or other variations of ANS encoding, and combinations of the above. In embodiments of the present application, the entropy encoding unit 270 can perform one or more variations of ANS encoding.

[0253] The decoded picture buffer (DPB) 230 can be a reference picture memory that stores reference picture data for use in encoding video data by the encoder 20. The DPB 230 can be formed from any of a variety of memory devices, such as dynamic random access memory (DRAM), including synchronous DRAM (SDRAM), including graphics random access memory (GRAM), a slip RAM, a video RAM, a SRAM, or any other

[0254] The DPB 230 and the buffer 216 can be provided by the same memory device or separate memory devices. In a certain example, a decoded picture buffer (DPB) 230 is used to store the filtered block 221. The decoded picture buffer 230 can further be used to store other previous filtered blocks of the same current picture or different pictures, e.g. a previous reconstructed picture, e.g. the previous reconstructed and filtered block 221, and can provide a complete previous reconstructed, i.e. decoded, picture (and corresponding reference blocks and samples) and / or a partial reconstructed current picture (and corresponding reference blocks and samples), e.g. for inter prediction. In a certain example, the decoded picture buffer (DPB) 230 is used to store the reconstructed block 215 if the reconstructed block 215 is reconstructed without in-loop filtering.

[0255] The prediction processing unit 260, also referred to as block prediction processing unit 260, is configured to receive or obtain the image block 203 (current image block 203 of the current picture 201) and reconstructed picture data, e.g. reference samples of the same (current) picture from the buffer 216 and / or reference picture data 231 of one or more previously decoded pictures from the decoded picture buffer 230, and to process such data for prediction, i.e. to provide a prediction block 265 which can be an inter predicted block 245 or an intra predicted block 255.

[0256] The mode selection unit 262 can be configured to select a prediction mode (e.g. an intra or inter prediction mode) and / or a corresponding prediction block 245 or 255 used as prediction block 265 to calculate the residual block 205 and the reconstructed block 215.

[0257] Embodiments of the mode selection unit 262 can be configured to select a prediction mode (e.g. from those prediction modes supported by the prediction processing unit 260) which provides the best match or, in other words, the smallest residual (meaning better compression in transmission or storage), or which provides the smallest signaling overhead (meaning better compression in transmission or storage), or which takes both into account or balances both. The mode selection unit 262 can be configured to determine the prediction mode based on a rate distortion optimization (RDO), i.e. to select the prediction mode which provides the smallest rate distortion optimization, or to select the prediction mode for which the related rate distortion at least meets a prediction mode selection criterion.

[0258] The prediction process performed by the encoder 20 (e.g., by the prediction processing unit 260) and the mode selection performed by the encoder 20 (e.g., by the mode selection unit 262) will be explained in detail below.

[0259] As mentioned above, the encoder 20 is configured to determine or select a best or optimal prediction mode from a (predetermined) set of prediction modes. The set of prediction modes can include, for example, intra prediction modes and / or inter prediction modes.

[0260] In a possible implementation, the set of intra prediction modes can include a plurality of different intra prediction modes, e.g., non-directional modes like the DC (or mean) mode and the planar mode, or directional modes as defined in H.265, or can include 67 different intra prediction modes, e.g., non-directional modes like the DC (or mean) mode and the planar mode, or directional modes as defined in the ongoing H.266.

[0261] In a possible implementation, the set of inter prediction modes depends on the available reference pictures (i.e. at least some of the decoded pictures stored in the DBP 230 as described above) and other inter prediction parameters, e.g. whether the entire reference picture or only a search window region of the reference picture, e.g. a region surrounding the current block, is used to search for the best matching reference block, and / or whether pixel interpolation, e.g. half-pel and / or quarter-pel interpolation, is applied, the set of inter prediction modes may, for example, include an advanced motion vector prediction (AMVP) mode and a merge mode. In a specific implementation, the set of inter prediction modes can include the affine motion model based prediction modes described in the embodiments of the present application, e.g. an affine AMVP mode or an affine merge mode, in particular, a control point based AMVP mode (inherited control point motion vector prediction method or constructed control point motion vector prediction method), a control point based merge mode (inherited control point motion vector prediction method or constructed control point motion vector prediction method), an advanced temporal motion vector prediction (ATMVP) method, a PLANAER method, etc., or a sub-block based merging mode formed by a combination of the above-mentioned affine merge mode, ATMVP and / or PLANAER method, etc. In the embodiments of the present application, the inter prediction of the picture block to be processed can be applied in a single-direction prediction (forward or backward), a bi-directional prediction (forward and backward) or a multi-frame prediction, when applied in the bi-directional prediction, a generalized bi-prediction (GBi) or a weighted prediction method can be used, in one example, the intra prediction unit 254 can be configured to perform any combination of the inter prediction techniques described below.

[0262] In addition to the above prediction modes, the embodiments of the present application can also apply a skip mode and / or a direct mode.

[0263] The prediction processing unit 260 can be further used to segment the image block 203 into smaller block partitions or sub-blocks, for example, by iteratively using quad-tree (QT) segmentation, binary-tree (BT) segmentation, or triple-tree (TT) segmentation, or any combination thereof, and to perform prediction for each of the block partitions or sub-blocks, for example, wherein mode selection includes selecting the tree structure of the segmented image block 203 and selecting a prediction mode to be applied to each of the block partitions or sub-blocks.

[0264] Inter-frame prediction unit 244 may include motion estimation (ME) units. Figure 2 (not shown in the image) and motion compensation (MC) unit ( Figure 2 (Not shown in the image). The motion estimation unit is used to receive or acquire image block 203 (current image block 203 of current image 201) and decoded image 231, or at least one or more previously reconstructed blocks, such as reconstructed blocks of one or more other / different previously decoded images 231, and to perform motion estimation based on the determined inter-frame prediction mode. For example, the video sequence may include the current image and the previously decoded image 31, or in other words, the current image and the previously decoded image 31 may be part of a picture sequence forming the video sequence, or may form the picture sequence.

[0265] For example, encoder 20 can be used to select a reference block from multiple reference blocks of the same or different images in multiple other images (reference images) and send it to the motion estimation unit (…). Figure 2 (Not shown in the image) Provides a reference image and / or provides the offset (spatial offset) between the position (X, Y coordinates) of the reference block and the position of the current block as an inter-frame prediction parameter. This offset is also called a motion vector (MV).

[0266] The motion compensation unit is used to acquire inter-frame prediction parameters and perform inter-frame prediction based on or using these parameters to obtain inter-frame prediction block 245. (The motion compensation unit...) Figure 3The motion compensation performed by the motion compensation unit 244 (not shown) can include fetching or generating a prediction block (prediction values) based on a motion / block vector determined by motion estimation (possibly performing interpolation to sub-pixel accuracy). Interpolation filtering can produce additional pixel samples from known pixel samples, potentially increasing the number of candidate prediction blocks available for encoding a picture block. Once the motion vector for a PU of a current picture block is received, the motion compensation unit 246 can locate the prediction block pointed to by the motion vector in one of the reference picture lists. The motion compensation unit 246 can also generate syntax elements associated with the block and the video slice for use by the decoder 30 when decoding the picture blocks of the video slice.

[0267] In particular, the inter prediction unit 244 can transmit syntax elements to the entropy encoding unit 270, which can include, for example, inter prediction parameters (such as indication information of a selected inter prediction mode for prediction of the current block after trying a plurality of inter prediction modes), an index number of a candidate motion vector list, optionally a GBi index number, a reference frame index, and the like. In a possible application scenario, if there is only one inter prediction mode, the inter prediction parameters can not be carried in the syntax elements, in which case the decoder 30 can directly use a default prediction mode for decoding. It can be understood that the inter prediction unit 244 can be configured to perform any combination of inter prediction techniques.

[0268] The intra prediction unit 254 is configured to obtain, for example, receive, a picture block 203 (current picture block) of a picture and one or more previously reconstructed blocks, for example, reconstructed neighboring blocks, of the picture for intra estimation. For example, the encoder 20 can be configured to select an intra prediction mode from a plurality of (predetermined) intra prediction modes.

[0269] Embodiments of the encoder 20 can be configured to select an intra prediction mode based on an optimization criterion, for example, based on a minimum residual (e.g., an intra prediction mode providing a prediction block 255 most similar to the current picture block 203) or a minimum rate-distortion.

[0270] The intra prediction unit 254 is further configured to determine the intra prediction block 255 based on intra prediction parameters of the selected intra prediction mode. In any case, after selecting an intra prediction mode for a block, the intra prediction unit 254 is further configured to provide the intra prediction parameters to the entropy encoding unit 270, i.e., to provide information indicating the selected intra prediction mode for the block. In one example, the intra prediction unit 254 can be configured to perform any combination of intra prediction techniques.

[0271] In particular, the intra prediction unit 254 can transmit syntax elements including intra prediction parameters (such as an indication of the intra prediction mode selected for prediction of the current block after trying a plurality of intra prediction modes) to the entropy encoding unit 270. In some possible scenarios, if there is only one intra prediction mode, the intra prediction parameters can not be carried in the syntax elements, and the decoder 30 can directly use a default prediction mode for decoding.

[0272] The entropy encoding unit 270 is configured to apply an entropy encoding algorithm or scheme (e.g., a variable length coding (VLC) scheme, a context adaptive VLC (CAVLC) scheme, an arithmetic coding scheme, a context adaptive binary arithmetic coding (CABAC), a syntax-based context-adaptive binary arithmetic coding (SBAC), a probability interval partitioning entropy (PIPE) coding, or other entropy encoding methods or techniques) to the quantized residual coefficients 209, the inter prediction parameters, the intra prediction parameters, and / or the loop filter parameters, individually or all together (or not to apply), to obtain encoded picture data 21 that can be output via the output 272, e.g., in the form of encoded video data 21. The encoded video data can be transmitted to the decoder 30, or archived for later transmission or retrieval by the decoder 30. The entropy encoding unit 270 can also be configured to entropy encode other syntax elements of the current video slice being encoded.

[0273] Other structural variations of the encoder 20 can be used to encode the video stream. For example, a non-transform-based encoder 20 can directly quantize the residual signal without the transform processing unit 206 for some blocks or frames. In another implementation, the encoder 20 can have the quantization unit 208 and the inverse quantization unit 210 combined into a single unit.

[0274] It should be understood that other structural variations of encoder 20 can be used to encode video streams. For example, for certain image blocks or frames, encoder 20 can directly quantize the residual signal without processing by transform processing unit 206, and correspondingly, without processing by inverse transform processing unit 212; or, for certain image blocks or frames, encoder 20 does not generate residual data, and correspondingly, without processing by transform processing unit 206, quantization unit 208, inverse quantization unit 210, and inverse transform processing unit 212; or, encoder 20 can directly store the reconstructed image block as a reference block without processing by filter 220; or, quantization unit 208 and inverse quantization unit 210 in encoder 20 can be combined. Loop filter 220 is optional, and for lossless compression coding, transform processing unit 206, quantization unit 208, inverse quantization unit 210, and inverse transform processing unit 212 are optional. It should be understood that, depending on different application scenarios, inter-frame prediction unit 244 and intra-frame prediction unit 254 can be selectively enabled.

[0275] See Figure 3 , Figure 3 A schematic / conceptual block diagram illustrating an example of a decoder 30 for implementing embodiments of the present invention is shown. The decoder 30 is configured to receive, for example, encoded image data (e.g., encoded encoded data) 21 encoded by the encoder 20, to obtain a decoded image 231. During the decoding process, the decoder 30 receives video data from the encoder 20, such as encoded video encoded data representing image blocks of encoded video stripes and associated syntax elements.

[0276] exist Figure 2 In one example, decoder 30 includes an entropy decoding unit 304, an inverse quantization unit 310, an inverse transform processing unit 312, a reconstruction unit 314 (e.g., a summer 314), a buffer 316, a loop filter 320, a decoded image buffer 330, and a prediction processing unit 360. Prediction processing unit 360 may include an inter-frame prediction unit 344, an intra-frame prediction unit 354, and a mode selection unit 362. In some instances, decoder 30 can perform substantially the same functions as the reference unit. Figure 3 The encoder 20 describes the encoding passes as the inverse of the decoding passes.

[0277] Entropy decoding unit 304 is used to perform entropy decoding on encoded image data 21 to obtain, for example, quantization coefficients 309 and / or decoded encoded parameters. Figure 3(Not shown in the image), for example, any one or all of the (decoded) inter-frame prediction, intra-frame prediction parameters, loop filter parameters, and / or other syntax elements. The entropy decoding unit 304 is further configured to forward the inter-frame prediction parameters, intra-frame prediction parameters, and / or other syntax elements to the prediction processing unit 360. The decoder 30 may receive syntax elements at the video strip level and / or video block level.

[0278] Entropy decoding unit 304 is configured to perform entropy decoding on encoded data to produce output symbols for the parameters. Entropy decoding unit 304 can be configured to reconstruct parameters representing the quantized transform coefficients and side information. Entropy decoding unit 304 can be configured to perform entropy decoding in various ways. Typical entropy decoding techniques include exponential Golomb decoding, Columbus decoding, context-adaptive binary arithmetic decoding, Huffman decoding, run-length decoding, Lempel-Ziv (“LZ”) decoding, dictionary decoding, RANS decoding and ANS decoding, TANS decoding or other variations of ANS decoding, and combinations thereof. In embodiments of this application, entropy decoding unit 304 can perform one or more variations of ANS decoding.

[0279] The inverse quantization unit 310 can function the same as the inverse quantization unit 110, the inverse transform processing unit 312 can function the same as the inverse transform processing unit 212, the reconstruction unit 314 can function the same as the reconstruction unit 214, the buffer 316 can function the same as the buffer 216, the loop filter 320 can function the same as the loop filter 220, and the decoded image buffer 330 can function the same as the decoded image buffer 230.

[0280] The prediction processing unit 360 may include an inter-frame prediction unit 344 and an intra-frame prediction unit 354, wherein the inter-frame prediction unit 344 may be functionally similar to the inter-frame prediction unit 244, and the intra-frame prediction unit 354 may be functionally similar to the intra-frame prediction unit 254. The prediction processing unit 360 is typically used to perform block prediction and / or obtain prediction blocks 365 from encoded data 21, and to receive or obtain prediction-related parameters and / or information about the selected prediction mode from, for example, an entropy decoding unit 304 (explicitly or implicitly).

[0281] When the video slice is encoded as an intra coded (I) slice, intra-prediction unit 354 of prediction processing unit 360 determines a prediction block 365 for a block of pixels of the current video slice based on an intra-prediction mode signaled and data from previously decoded blocks of the current frame or picture. When the video slice is encoded as an inter-coded (i.e., B or P) slice, inter-prediction unit 344 (e.g., a motion compensation unit) of prediction processing unit 360 determines a prediction block 365 for a block of video of the current video slice based on motion vectors and other syntax elements received from entropy decoding unit 304. For inter prediction, the prediction block can be generated from one of a plurality of reference pictures within one of two reference picture lists. Decoder 30 can construct the reference picture lists using default construction techniques based on reference pictures stored in DPB 330: List 0 and List 1.

[0282] Prediction processing unit 360 is configured to determine the prediction information for the blocks of video of the current video slice by parsing the motion vectors and other syntax elements, and use the prediction information to generate the prediction block for the current video block being decoded. In one example of the disclosure, prediction processing unit 360 uses some of the syntax elements received to determine the prediction mode (e.g., intra or inter prediction) for the blocks of video of the encoded video slice, the inter prediction slice type (e.g., B slice, P slice, or GPB slice), the construction information for one or more of the reference picture lists for the slice, the motion vectors for each inter coded block of video of the slice, the inter prediction status for each inter coded block of video of the slice, and other information to decode the blocks of video of the current video slice. In another example of the disclosure, the syntax elements received by decoder 30 from the encoded data include syntax elements received in one or more of an adaptive parameter set (APS), a sequence parameter set (SPS), a picture parameter set (PPS), or a slice header.

[0283] Inverse quantization unit 310 can be configured to inverse quantize (i.e., de-quantize) the quantized transform coefficients provided in the encoded data and decoded by entropy decoding unit 304. The inverse quantization process can include determining a degree of quantization and, likewise, a degree of inverse quantization that should be applied using a quantization parameter calculated by encoder 20 for each video block in the video slice.

[0284] Inverse transform processing unit 312 applies an inverse transform (e.g., an inverse DCT, an inverse integer transform or a conceptually similar inverse transform process) to the transform coefficients in order to produce residual blocks in the pixel domain.

[0285] The reconstruction unit 314 (e.g., a summer 314) is configured to add the inverse transform block 313 (i.e., the reconstructed residual block 313) to the prediction block 365 to obtain a reconstructed block 315 in the sample domain, e.g., by adding the sample values of the reconstructed residual block 313 to the sample values of the prediction block 365.

[0286] The in-loop filter unit 320 (during the encoding loop or after the encoding loop) is configured to filter the reconstructed block 315 to obtain a filtered block 321 to facilitate smooth pixel transitions or to improve video quality. In one example, the in-loop filter unit 320 can be configured to perform any combination of the filtering techniques described below. The in-loop filter unit 320 is intended to represent one or more in-loop filters, such as a deblocking filter, a sample adaptive offset (SAO) filter, or other filters, such as a bilateral filter, an adaptive loop filter (ALF), or a sharpening or smoothing filter, or a collaborative filter. Although the in-loop filter unit 320 is shown as an in-loop filter in Figure 9

[0287] The decoded video blocks 321 in a given frame or picture are then stored in the decoded picture buffer 330 that stores reference pictures for subsequent motion compensation.

[0288] The decoder 30 is configured to output the decoded pictures 31, e.g., via an output 332, for presentation to or viewing by a user.

[0289] Other variations of the decoder 30 can be used to decode the compressed encoded data. For example, the decoder 30 can generate an output video stream without the in-loop filter unit 320. For example, a non-transform-based decoder 30 can directly inverse quantize the residual signal without the inverse transform processing unit 312 for certain blocks or frames. In another implementation, the decoder 30 can have the inverse quantization unit 310 and the inverse transform processing unit 312 combined into a single unit.

[0290] In particular embodiments, the decoder 30 can be configured to implement the data decoding methods described in corresponding embodiments below. Figure 4

[0291] It should be understood that in the encoder 20 and the decoder 30 of the present application, the processing result for a certain stage can be further processed before being output to the next stage, for example, after the stage of interpolation filtering, motion vector derivation or in-loop filtering, the processing result for the corresponding stage can be further subjected to operations such as clipping or shifting.

[0292] ​​Referring to Figure 4 , Figure 1A is a structural diagram of a video coding device 400 (e.g., a video encoding device 400 or a video decoding device 400) provided by an embodiment of the present application. The video coding device 400 is suitable for implementing the embodiments described herein. In one embodiment, the video coding device 400 can be a video decoder (e.g., the decoder 30 of Figure 1A ) or a video encoder (e.g., the encoder 20 of Figure 1A ). In another embodiment, the video coding device 400 can be one or more components of the decoder 30 or the encoder 20 described above. Figure 1A Figure 5

[0293] The video coding device 400 includes an ingress port 410 and a receiver unit (Rx) 420 for receiving data, a processor, logic unit or central processing unit (CPU) 430 for processing the data, a transmitter unit (Tx) 440 and an egress port 450 for transmitting the data, and a memory 460 for storing the data. The video coding device 400 can further include an electro-optical (EO) component and an optical-electrical (OE) component coupled with the ingress port 410, the receiver unit 420, the transmitter unit 440 and the egress port 450 for egress or ingress of optical signals or electrical signals.

[0294] The processor 430 is implemented by hardware and software. The processor 430 can be implemented as one or more CPU chips, cores (e.g., a multi-core processor), FPGAs, ASICs and DSPs. The processor 430 communicates with the ingress port 410, the receiver unit 420, the transmitter unit 440, the egress port 450 and the memory 460. The processor 430 includes a coding module 470 (e.g., an encoding module 470 or a decoding module 470). The encoding / decoding module 470 implements the embodiments disclosed herein to implement the chroma block prediction method provided by the embodiments of the present application. For example, the encoding / decoding module 470 implements, processes or provides various encoding operations. Therefore, the encoding / decoding module 470 substantially improves the functions of the video coding device 400 and affects the transition of the video coding device 400 to different states. Alternatively, the encoding / decoding module 470 is implemented by instructions stored in the memory 460 and executed by the processor 430.

[0295] ​​Memory 460 includes one or more of a disk, a tape, a cassette, and a solid-state memory, and can be used as an over-flow data storage device, to store programs when such programs are selected for execution, and to store instructions and data read during program execution. Memory 460 can be volatile and / or non-volatile, and can be read-only memory (ROM), random access memory (RAM), ternary content-addressable memory (TCAM), and / or static random access memory (SRAM).

[0296] Referring to Figure 5 , Figure 1A is a simplified block diagram of an apparatus that can be used as either or both of the source device 12 and the destination device 14 in Figure 5 , according to an example embodiment. The apparatus can implement the techniques of the present disclosure. In other words, Figure 5 is a schematic block diagram of an implementation of an encoding device or a decoding device (referred to as a "coding device") of an embodiment of the present disclosure. The coding device can include a processor 510, a memory 530, and a bus system 550. The processor and the memory are connected via the bus system, the memory is configured to store instructions, and the processor is configured to execute the instructions stored in the memory. The memory of the coding device stores program codes, and the processor can invoke the program codes stored in the memory to execute various video encoding or decoding methods described in the present disclosure. To avoid repetition, no further details are provided herein.

[0297] In an embodiment of the present disclosure, the processor 510 can be a central processing unit (CPU), and the processor 510 can also be other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), programmable logic devices (PLD), or other programmable logic devices, discrete gates or transistor logic, discrete hardware components, etc. The general-purpose processor can be a microprocessor, or the processor can also be any conventional processor.

[0298] The memory 530 can include read-only memory (ROM) devices or random access memory (RAM) devices. Any other suitable type of memory devices can also be used as the memory 530. The memory 530 can include code and data 531 that are accessed by the processor 510 using the bus 550. The memory 530 can further include an operating system 533 and an application program 535, which includes at least one program allowing the processor 510 to execute the video encoding or decoding methods described in the present disclosure. For example, the application program 535 can include applications 1 to N, which further include a video encoding or decoding application (referred to as a video coding application) that performs the video encoding or decoding methods described in the present disclosure.

[0299] The bus system 550 can include a data bus, a power bus, a control bus, and a state signal bus, etc. in addition to the data bus. However, for the sake of clarity, all the buses are marked as the bus system 550 in the figure.

[0300] Optionally, the decoding device can further include one or more output devices, such as a display 570. In one example, the display 570 can be a touch-sensitive display that combines a display with a touch-sensitive unit that is operable to sense touch inputs. The display 570 can be connected to the processor 510 via the bus 550.

[0301] Although Figure 6 The processor 510 and the memory 530 of the apparatus are illustrated in the figure as integrated in a single unit, but other configurations can be used. The operations of the processor 510 can be distributed across multiple machines (each machine having one or more processors) that are coupled directly or indirectly, or across multiple devices in a distributed geography or other network. The memory 530 can be distributed across multiple machines in a storage area network, or in a cloud-based storage network, or in multiple machines of a multiple-machine apparatus. Although a single bus is shown in the figure, the bus 550 of the apparatus can be formed from multiple buses, and the bus 550 of the apparatus can be formed by multiple busses. Further, the memory 530 can be directly coupled to the other components of the apparatus, or can be accessed via a network, and can comprise a single integrated unit, such as a memory card, or multiple units, such as multiple memory cards. Thus, the apparatus can be implemented in a variety of configurations.

[0302] Referring to Figure 6 , Figure 6 An embodiment of a data encoding method provided by the embodiment of the present application is shown as follows. Figure 6 As shown in the figure, the data encoding method provided by the embodiment of the present application includes the following steps.

[0303] 601, obtaining a target symbol;

[0304] In the embodiment, the target symbol can be obtained by the following steps. Symbol The corresponding data encoding method can be applied to an asymmetric numeral system (ANS) based encoder. Specifically, the ANS based encoder can be used as an entropy encoding unit in a data encoding process. For the sake of convenience, the ANS based encoder is referred to as an ANS encoder hereinafter.

[0305] In a possible implementation, the ANS encoder can receive an input symbol stream (including the target symbol), encode the input symbol stream, and output encoded data (or can be referred to as an encoding result) as part of a bit stream. Generally, the total number of output bits is less than the total number of input bits, thereby providing a compression effect.

[0306] In a possible implementation, the ANS encoder can include an input symbol buffer for storing input symbols to be encoded. For example, the target symbols can be parameters of quantized transform coefficients from media (e.g., video, image, audio, graphics texture), parameters of other residual data from media, or other data.

[0307] In a possible implementation, the bits (or can be referred to as codewords) obtained by encoding the input symbol stream can include state information and memory bits, where the state information s is an integer, supporting addition, subtraction, multiplication, division, shift, AND, OR, NOT, and other operations, and the memory bits are a first-in-first-out bit stream, supporting write and read operations of a specified number of bits. It is necessary to ensure that after writing any legal number into a specified number of bits, reading the same number of bits can recover the number. In some cases, the encoding order is opposite to the decoding order, for example, reverse encoding and forward decoding.

[0308] In the ANS, probability information needs to be calculated, which can include quantization probabilities corresponding to each of the input symbols, a probability mass function (PMF), and a cumulative distribution function (CDF). Specifically, the PMF and the CDF can be calculated based on the quantization probabilities.

[0309] In a possible implementation, the probability of each symbol can be quantized into a fraction, for example, the denominators (denoted as a value M) of all quantization probabilities are equal, and are an integer power of 2 (denoted as M = 2 m ). The probability mass function PMF (denoted as P(x)) and the cumulative distribution function CDF (denoted as C(x)) of each symbol x are calculated according to the quantized probabilities. P(x) is the numerator of the quantization probability, and in a possible implementation, C(x) is the sum of P(x) of symbols less than x.

[0310] In a possible implementation, the plurality of distribution characteristics include a first distribution characteristic and a second distribution characteristic, and an entropy of the first distribution characteristic is greater than an entropy of the second distribution characteristic. A value of a denominator of a quantization probability in a mapping relationship corresponding to the second distribution characteristic is greater than a value of a denominator of a quantization probability in a mapping relationship corresponding to the first distribution characteristic.

[0311] In a multi-distribution scenario, different quantization probability denominators can be used to reduce the encoding length. In data encoding, a prediction model and an entropy encoding can be used. The prediction model can input original data and output a distribution index and data to be encoded (e.g., a target symbol in the present application). According to the distribution index, an entropy can be calculated. For a distribution with a smaller entropy, a larger quantization probability denominator can be used.

[0312] In encoding or decoding, different distributions can use different quantization probability denominators. Specifically, a more concentrated distribution uses a larger quantization probability denominator. For example:

[0313] 1. In a Gaussian distribution type, a distribution with a smaller variance uses a larger quantization probability denominator, and a distribution with a larger variance uses a smaller quantization probability denominator.

[0314] 2. In a logistic distribution type, a distribution with a smaller dispersion uses a larger quantization probability denominator, and a distribution with a larger dispersion uses a smaller quantization probability denominator.

[0315] 3. In a Laplace distribution type, a distribution with a smaller scale parameter uses a larger quantization probability denominator, and a distribution with a larger scale parameter uses a smaller quantization probability denominator.

[0316] In a possible implementation, the probability information includes a value of a probability mass function (PMF). The value of the PMF is constructed by sequentially determining a value of a PMF of each symbol in a plurality of symbols, the plurality of symbols including the target symbol. When determining the value of the PMF of the target symbol, a total value of remaining PMFs except for the PMF of the determined symbol is multiplied by a probability of the target symbol, and a ratio between a product result of the multiplication and a remaining probability except for the determined symbol is calculated. According to a relationship between the ratio and a fifth value, the PMF of the target symbol is determined.

[0317] In a possible implementation, the fifth value is 1, and the relationship is to take a larger value.

[0318] For example, a total remaining PMF value can be initialized as M, and a total remaining probability can be initialized as 1. All symbols in a value range can be sorted in ascending order of probability. For each symbol after sorting, a PMF value of the symbol is: the total remaining PMF value multiplied by a probability of the symbol, divided by the total remaining probability, and then rounded to the larger value with 1. The total remaining PMF value is reduced by the PMF of the symbol, and the total remaining probability is reduced by the probability of the symbol.

[0319] In a possible implementation, the probability information includes a value of a cumulative distribution function (CDF). The value of the CDF is constructed by:

[0320] The values of the CDF of each symbol are determined in sequence based on a preset sequence, wherein the preset sequence is determined according to the relationship between the values of the PMF corresponding to the plurality of symbols, and the plurality of symbols include the target symbol; wherein, when the probability distribution corresponding to the probability information of the target symbol is a symmetric distribution, the preset sequence is an order staggered along both sides of the peak point in the symmetric distribution; or, when the probability distribution corresponding to the probability information of the target symbol is a discrete distribution, the preset sequence is specifically an order from large to small; or, when the probability distribution corresponding to the probability information of the target symbol is a discrete distribution, the preset sequence is specifically an order from small to large.

[0321] For example, for a single-peak symmetric distribution (for example, Gaussian distribution, Laplace distribution, logistic distribution, etc.), C(x) = 0 at the peak point x, and the values of the PMF are accumulated in the order of x, x-1, x+1, x-2, x+2,..., that is, from both sides of the peak point, to obtain the CDF value corresponding to each symbol.

[0322] For example, for a discrete distribution, all symbols in the value range are sorted in descending order of PMF values, denoted as x(0), x(1), x(2),..., wherein C(x(0)) = 0 at x(0), and the values of the PMF are accumulated in the order of x(1), x(2),..., to obtain the CDF value corresponding to each symbol.

[0323] Optionally, when calculating the CDF, the order from the middle to both sides can also be x, x+1, x-1, x+2, x-2,...; when the PMF values are equal, a plurality of possible ways can be selected to break the tie, such as index from small to large (from large to small), random seed, etc.

[0324] Referring to Table 1, Table 1 is an example of probability information.

[0325] Table 1

[0326] Probability Quantized Probability PMF(P(x)) CDF(C(x)) Bit Addend A 0.7 5 / 8 5 0 B 0.1 1 / 8 1 5 C 0.1 1 / 8 1 6 D 0.1 1 / 8 1 7

[0327] The calculation method of the PMF and the CDF in the embodiments of the present application can ensure that the code word length is reduced under the premise that the memory and the latency remain unchanged.

[0328] In a possible implementation, an encoding table (that is, the mapping relationship in the embodiments of the present application, for example, the first mapping relationship) also needs to be obtained, and then the first mapping relationship is taken as an example to introduce how to construct the encoding table.

[0329] In a possible implementation, the first mapping relationship can include symbols and corresponding bit adders (which can be referred to as first information) and state adders (which can be referred to as second information).

[0330] In a possible implementation, the first information in the first mapping relationship is constructed by: performing bit shift operation on a sum result of the sum operation, and performing subtraction operation on a shift result of the bit shift operation and a shift result of bit shift operation on the numerical value of the PMF of the target symbol, to obtain the first information.

[0331] In a possible implementation, the sixth numerical value can be m-31, where m is an integer power of 2 on a denominator of a quantized probability.

[0332] In a possible implementation, the bit shift operation on the sum result of the sum operation can be left bit shift operation on the sum result of the sum operation by m bits, and the bit shift operation on the numerical value of the PMF of the target symbol can be left bit shift operation on the numerical value of the PMF of the target symbol by b(x) bits, where b(x) can be the sum result of the sum operation on the number of bits with consecutive 0 in the highest bit of the numerical value of the PMF of the target symbol and the preset sixth numerical value.

[0333] For example, when constructing the encoding table, for each symbol x, the construction method is as follows (way 1):

[0334] The number of basic bits b(x) written in the storage is calculated as b(x) = clz(P(x))+m-31 for each encoding x. The clz function calculates the number of bits with consecutive 0 in the highest bit of a 32-bit integer.

[0335] The result of the bit adder is (b(x) << m)-(P(x) << b(x))+M, ranging from 0 to m×M, which is represented by The bit is represented by an unsigned integer.

[0336] In a possible implementation, the first information in the first mapping relationship is constructed by: performing bit shift operation on a sum result of the sum operation, and performing subtraction operation on a shift result of the bit shift operation and a shift result of bit shift operation on the numerical value of the PMF of the target symbol, to obtain the first information, the probability information includes a quantized probability, and the M is a denominator of the quantized probability.

[0337] For example, when constructing the encoding table, for each symbol x, the construction method of the first information is as follows (way 2):

[0338] The result of the "bit adder" is changed from (b(x) << m) - (P(x) << b(x)) + M to (b(x) << m) - (P(x) << b(x)) in mode 1, the range is changed to [-M, (m-1) * M], and it is represented by The signed integer representation of the bits is reduced, the operation overhead and complexity are reduced, the encoding efficiency is further improved with a small amount of memory, and the method is suitable for scenarios with higher encoding efficiency requirements.

[0339] In a possible implementation, the second information in the first mapping relationship is constructed (mode 1) by performing subtraction operation on the value of the CDF of the target symbol and the value of the PMF of the target symbol.

[0340] For example, when constructing the encoding table, for each symbol x, the second information is constructed as follows:

[0341] The result of the "state adder" is changed from C(x) - P(x) to C(x) - P(x) + M, the range is changed to [1, M * 2 - 2], and it is represented by an unsigned integer of m+1 bits.

[0342] In a possible implementation, the second information in the first mapping relationship is constructed (mode 2) by performing subtraction operation on the value of the CDF of the target symbol and the value of the PMF of the target symbol, and performing addition operation on the operation result of the subtraction operation and the value M to obtain the second information, the probability information includes a quantized probability, and the M is a denominator of the quantized probability.

[0343] For example, when constructing the encoding table, for each symbol x, the first information is constructed as follows (mode 2):

[0344] The calculation result of the "state adder" is changed from C(x) - P(x) to "if C(x) - P(x) >= 0, the "state adder" is C(x) - P(x), otherwise, the "state adder" is C(x) - P(x) + M". At this time, the value range of the "state adder" is [0, M-1], which can be represented by an unsigned integer of m bits, one more bit or operation, the calculation overhead is improved, the encoding efficiency is further improved with a small amount of memory, and the method is suitable for scenarios with higher encoding efficiency requirements.

[0345] In a possible implementation, the second information in the first mapping relationship is constructed in the following manner (manner 3): when a result of a subtraction operation of a value of a CDF of the target symbol and a value of a PMF of the target symbol is greater than or equal to 0, the result of the subtraction operation is taken as the second information. In this way, memory consumption can be further reduced with a small amount of coding efficiency loss. This manner is suitable for an extreme memory saving scenario.

[0346] In a possible implementation, the second information in the first mapping relationship is constructed in the following manner: when a result of a subtraction operation of a value of a CDF of the target symbol and a value of a PMF of the target symbol is less than 0, a result of the subtraction operation is added to a value M to obtain the second information, the probability information includes a quantized probability, and the M is a denominator of the quantized probability.

[0347] For example, when constructing the encoding table, for each symbol x, the first information is constructed in the following manner (manner 2):

[0348] The calculation result of the "state adder" is changed from C(x)-P(x) to "if C(x)-P(x)≥0, the "state adder" is C(x)-P(x), otherwise, the "state adder" is C(x)-P(x)+M". At this time, the value range of the "state adder" is [0, M-1], which can be represented by an m-bit unsigned integer.

[0349] Referring to Table 2, Table 2 is a schematic of the first mapping relationship constructed based on the above-described manner 1:

[0350] Table 2

[0351] x State Addend Bit Addend A -2 3 B 16 12 C 16 13 D 16 14

[0352] Referring to Table 3, Table 3 is a schematic of the first mapping relationship constructed based on the above-described manner 2:

[0353] Table 3

[0354] x State Addend Bit Addend A -2 3 B 16 12 C 16 13 D 16 14

[0355] Referring to Table 4, Table 4 is a schematic of the first mapping relationship constructed based on the above-described manner 3:

[0356] Table 4

[0357] x State Addend Figure 8 A 6 3 B 24 4 C 24 5 D 24 6

[0358] In a possible implementation, the first information or the second information can represent an integer value, that is, a single integer, for example, the first information can represent an integer value, and the second information can represent an integer value. In an embodiment of the present application, the index information in the coding table only includes a symbol, and the mapping object only includes the first information and the second information, thereby reducing the memory occupation in the coding table.

[0359] It should be understood that different mapping relationships (including the first mapping relationship) can also be configured for different probability distributions.

[0360] In a possible implementation, the target symbol is obtained by transforming pixel data of an image, the data obtained by transforming the pixel data of the image satisfies a preset distribution, the transformation is also used to obtain a distribution feature of the pixel data, the distribution feature includes a mean value or a variance, and the first mapping relationship corresponding to the distribution feature can be determined from a plurality of mapping relationships according to the distribution feature. That is, the distribution feature can be used as an index to determine the first mapping relationship corresponding to the distribution feature from the plurality of mapping relationships.

[0361] Reference Figure 8 , Bit Addend An example of an encoding process.

[0362] The model can include two parts. One is an image data processing module. The model transforms image data, and the distribution of the transformed data is simpler, which is beneficial to the entropy encoding process. The model can be a neural network, which processes image data into transformed data and obtains a distribution index of transformed data in each dimension. The model can also be a pre-processing and quantization process of image color transformation, such as YUV, discrete Fourier transform, etc. on an RGB image, to obtain transformed data and establish a specific distribution index for the transformed data.

[0363] The other is to predefine a plurality of probability distributions (such as Gaussian distributions with different variances, logistic distributions, etc.), and to establish corresponding distribution indexes and coding tables, wherein the coding tables are established according to the calculated discrete PMF and CDF.

[0364] In the encoding process, for transformed data in each dimension, a corresponding distribution index can be found, and a corresponding coding table can be found accordingly. Entropy encoding is used to form a coded codeword and store it. The codeword can also store basic header files, such as the length and width of the image, some necessary parameters, etc.

[0365] In a possible implementation, in order to further reduce the memory occupation, the first information and the second information can be stored after being combined, and the encoder can restore the first information and the second information based on a certain operation rule after obtaining the combined data.

[0366] In a possible implementation, the target symbol corresponds to an integer value through the first mapping relationship; and the integer value is restored into the first information and the second information through the third operation, and the first information and the second information are both integer values. In this way, the memory consumption can be reduced, the memory reading time can be reduced, and the throughput of a hardware device (for example, a server) can be further improved.

[0367] For example, multiple integer parameters (of which at most one is a signed integer) can be combined into a single parameter. The method is as follows: the signed integer is placed on the leftmost side, and then the bit numbers of the respective parameters are stored in sequence through shifting and bit or operations; when reading the symbol, the respective parameters are restored through shifting and bit or operations.

[0368] Referring to Table 7, which is an example of an encoding table before information combination, Table 8, which is an example of an encoding table after information combination, and Table 9, which is a summary of the lengths of the encoding table parameters.

[0369] Table 7

[0370] x State Addend Encoding Parameter A 6 -5 B 24 4 C 24 5 D 24 6

[0371] Table 8

[0372] x Memory A -154 B 152 C 184 D 216

[0373] Table 9

[0374]

[0375] 603. The first encoding data is obtained through a first operation according to the first information and state information of the encoder.

[0376] 604. The state information is updated through a second operation according to the second information, and second encoding data is obtained; the first encoding data and the second encoding data are used to obtain an encoding result of the target symbol, and the first operation and the second operation do not include division operations.

[0377] The first encoding data can be a storage bit, and the second encoding data can be a state s.

[0378] In a possible implementation, at least one of the first operation and the second operation can not include a division operation, thereby reducing the calculation delay.

[0379] In a possible implementation, at least one of the first operation and the second operation can not include a judgment operation, thereby reducing the calculation delay.

[0380] In a possible implementation, at least one of the first operation and the second operation can not include a binary search operation, thereby reducing the calculation delay.

[0381] In a possible implementation, the first operation includes: an addition operation performed on the first information and the state information, and a bit shift operation performed on an addition result of the addition operation; and the first encoded data is selected from the state information, and the position of the first encoded data in the state information is determined according to a shift result of the bit shift operation.

[0382] In a possible implementation, the second operation includes: an addition operation performed on the state information and a value M, and a bit shift operation performed on an addition result of the addition operation; the probability information includes a quantized probability, and the M is a denominator of the quantized probability; and an addition operation performed on a shift result of the bit shift operation and the second information.

[0383] For example, during encoding, 0≤s<M. s is initialized as 0.

[0384] For an encoded symbol x: obtain a "bit addend" and a "state addend" from the x; calculate the number of bits b written into the storage: a sum of the current state s and the "bit addend" right-shifted by m bits; write the b least significant bits of the current state s into the storage; update the state s as: a sum of the current state s plus M, right-shifted by b bits, and the "state addend".

[0385] s can be combined with the stored bits in a binary representation of an m-bit unsigned integer to obtain an encoding result, that is, a code word.

[0386] Referring to Table 5, Table 5 is an encoding of AAABA as 00101110 by using the above-described manner (wherein the first three bits 001 represent a state of 1, and 01110 are storage bits).

[0387] Table 5

[0388] s Number of Bits Written to Memory x Figure 7 0 A 0 3 B 3 5 011 A 1 1 0111 A 0 4 0111 A 1 1 01110

[0389] Referring to Figure 7 , Bit Addend A flowchart of the encoding table construction by using the above-described manner 1 and the encoding process by using the above-described first operation and the second operation is shown in FIG. 1.

[0390] In a possible implementation, when the encoding table is constructed in the above-described manner 2, the second operation can include: a bit shift operation on the state information in the case that the state information is initialized as the M; an addition operation on a shift result of the bit shift operation and the second information; and a subtraction operation on an addition result of the addition operation and the M.

[0391] For example, during the whole encoding, M≤s<M×2; and s is initialized as M during the encoding.

[0392] The "current state s plus M, right shifted by b bits, and the sum of the state addend" can be changed to "the current state s right shifted by b bits, and the sum of the state addend"; and s-M can be combined with the stored bits in the binary representation of the m-bit unsigned integer.

[0393] Referring to Table 6, Table 6 is an example of encoding AAABA into 00101110 (wherein the first three bits 001 represent a state of 1, and 01110 is the stored bits) by using the above-described manner.

[0394] Table 6

[0395]

[0396] Embodiments of the present application provide a data encoding method, applied to an encoder based on an asymmetric digital system (ANS), the method comprising: obtaining a target symbol; obtaining first information and second information corresponding to the target symbol through a first mapping relationship; the first information and the second information are obtained according to probability information corresponding to the target symbol; obtaining first encoding data through a first operation according to the first information and state information of the encoder; updating the state information through a second operation according to the second information to obtain second encoding data; wherein the first encoding data and the second encoding data are used to obtain an encoding result of the target symbol, and the first operation and the second operation do not include division operation. In the present application, the index information in the encoding table only includes symbols, and the mapping object only includes the first information and the second information, which is equivalent to reducing the memory occupation in the encoding table, and avoiding consuming large operations, achieving the balance between memory and time delay.

[0397] In a possible implementation, the second information includes first sub-information (also referred to as state addend 1), second sub-information (also referred to as state threshold), and third sub-information (also referred to as state addend 2);

[0398] The first sub-information in the first mapping relationship is constructed by: performing a subtraction operation on a third value of the target symbol and a value of the PMF of the target symbol to obtain the first sub-information;

[0399] The second sub-information in the first mapping relationship is constructed by performing addition operation on the third value of the target symbol and the first value of the target symbol, and performing subtraction operation on the operation result of the addition operation and 1, to obtain the second sub-information.

[0400] The third sub-information in the first mapping relationship is constructed by performing subtraction operation on the fourth value of the target symbol and the third value of the target symbol, and performing subtraction operation on the operation result of the subtraction operation and the first value of the target symbol, to obtain the third sub-information.

[0401] In a possible implementation, the second operation includes:

[0402] The addition operation on the state information and the value M, and the bit shift operation on the addition result of the addition operation; wherein the probability information includes a quantized probability, and the M is a denominator of the quantized probability; the addition operation on the shift result of the bit shift operation and the first sub-information;

[0403] When the operation result of the addition operation is greater than the second sub-information, the addition result of the operation result of the addition operation and the third sub-information is taken as the second encoding data.

[0404] When the operation result of the addition operation is less than the second sub-information, the operation result of the addition operation is taken as the second encoding data.

[0405] The above method can be but is not limited to applied to unimodal symmetric distribution (such as Gaussian distribution, logistic distribution, Laplace distribution, etc.), for reducing the encoding length, but the encoding calculation amount is increased.

[0406] 1. Divide the PMF value of each symbol into two parts P(x) = P1(x) + P2(x)

[0407] 2. Calculate C1(x) as the addition of P1(x) of symbols less than x; C2(x) as the addition of P2(x) of symbols less than x, plus the value of all P1(x).

[0408] The following table shows a specific example:

[0409]

[0410] When constructing the encoding table, for each symbol x, an example of the construction method is as follows:

[0411] 1) Calculate the number of base bits b(x) = clz(P(x)) + m - 31 to write in the memory for each encoding x. Where the clz function calculates the number of consecutive zero bits of the highest bit of a 32-bit integer.

[0412] 2) Calculate the result of the bit adder: (b(x) « m) - (P(x) « b(x)) + M, range [2, m x M], in unsigned integer representation of bits; z

[0413] 3) Calculate the result of the state adder 1: C1(x) - P(x)

[0414] 4) Calculate the result of the state threshold: C1(x) + P1(x) - 1

[0415] 5) Calculate the result of the state adder 2: C2(x) - C1(x) - P1(x)

[0416] The following table shows an example of an encoding table:

[0417] x State Addend 1 State Threshold State Addend 2 Figure 9 A 6 -5 2 1 B 24 2 2 3 C 24 2 3 3 D 24 3 3 3

[0418] At encoding, the codeword can be composed of the state s and the memory memory.

[0419] Exemplarily, 0 < s < M during the entire encoding. s is initialized to 0.

[0420] Encode the symbol x:

[0421] 1) Look up the "bit adder", "state adder 1", "state threshold" and "state adder 2" from the table by x;

[0422] 2) Calculate the number of bits b to write in the memory: the sum of the current state s and the "bit adder", right-shifted by m bits;

[0423] 3) Write the lowest b bits of the current state s in the memory;

[0424] 4) Update the state s as: the sum of the current state s and M, right-shifted by b bits, and the "state adder 1";

[0425] 5) If the state s is greater than the "state threshold", update s as the sum of s and the "state adder 2".

[0426] Codeword: merge the binary representation of s in m-bit unsigned integer with the bits in the memory.

[0427]

[0428] In a possible implementation, when the value M is 256, the first information is stored by 10 bits, the first sub-information is stored by 8 bits, the second sub-information is stored by 7 bits, the third sub-information is stored by 7 bits, the sum of the first values of the plurality of symbols is 128, and the third sub-information is less than 128.

[0429] When M = 256 (m = 8), the following conditions are met:

[0430] The "bit adder", "state adder 1", "state threshold", and "state adder 2" of each symbol respectively need 10 bits, 8 bits, 7 bits, and 7 bits, and a total of 32 bits. The sum of all P1(x) is exactly 128, and the value of "state adder 2" is always less than 128.

[0431] When M = 256 (m = 8), the "bit adder", "state adder 1", "state threshold", and "state adder 2" respectively need 12 bits, 8 bits, 8 bits, and 8 bits. A total of 36 bits cannot be represented by 4 bytes. The following method can be used to represent the 4 parts by a total of 32 bits:

[0432] 1. The bit adder B originally is an even number between [2, 2048], and needs 12 bits. B / 2-1 can be represented by 10 bits.

[0433] 2. Adjust the values of P1(x) and P2(x) so that the sum of all P1(x) is exactly 128, and the value of "state adder 2" is always less than 128. Then the range of "state threshold" and "state adder 2" is [0, 127], which can be represented by 7 bits.

[0434] By using this scheme, the "bit adder", "state adder 1", "state threshold", and "state adder 2" of each symbol respectively need 10 bits, 8 bits, 7 bits, and 7 bits, and a total of 32 bits.

[0435] The application further provides a data encoding method applied to an encoder based on an asymmetric digital system (ANS), the method comprising: obtaining a first symbol, wherein a quantization probability corresponding to the first symbol and a quantization probability corresponding to a second symbol are 1, a difference between the quantization probability corresponding to the first symbol and 1 is less than a threshold, and a difference between the quantization probability corresponding to the second symbol and 0 is less than the threshold; performing a first operation between state information of the encoder and a value M according to a first condition met between a value size relationship between the state information and the value M, to obtain first encoding data, and updating the state information to 0; and adding 1 to the state information according to that the value size relationship between the state information of the encoder and the value M does not meet the first condition.

[0436] In a possible implementation, the method further includes: obtaining the second symbol; taking state information of the encoder as first encoding data, and updating the state information to a difference between the value M and 1.

[0437] The above embodiment can be directed to encoding and decoding schemes for two symbols in total, and a single symbol probability close to 1. This embodiment does not need to construct an encoding and decoding table, and thus does not need to store the table in additional memory. Assuming that there are two symbols a and b in total, and the probability of symbol a is close to 1, the encoding algorithm is as follows:

[0438] Compressed symbol a: if the state s is greater than or equal to M-2, s-M+2 (0 or 1) is written to the storage in 1 bit, and then s is updated to 0; otherwise, s is updated to s+1;

[0439] Compressed symbol b: all m bits of s are written to the storage, and s is updated to M-1.

[0440] Reference Figure 9 , Figure 9 An embodiment of a data decoding method provided by the embodiment of the application is shown in the following. Figure 10A As shown in the following, the data decoding method provided by the embodiment of the application includes:

[0441] 901, obtaining state information of the decoder and storage bits, the state information corresponding to a first bit, the first bit being a current bit to be decoded;

[0442] For example, refer to Figure 10A , Figure 6 A specific embodiment of the data decoding method provided by the embodiment of the application is shown in the following.

[0443] The state information (decoding state) can be obtained from the encoding side, or can be a state information obtained by updating the state information in the decoding process. The storage bits can be obtained from the encoding side, or can be a storage bit obtained by updating the storage bits in the decoding process.

[0444] 902, determining first information, second information and third information corresponding to the state information according to a first mapping relationship; the first information being a target symbol corresponding to the first bit, the target symbol being a decoding result of the first bit, the second information indicating a number of bit positions selected from the storage bits, and the third information being used for summing operation with bits selected from the storage bits according to the third information, a result of the summing operation being used for updating the state information, and an updated state information corresponding to a second bit, the second bit being a bit to be decoded after the first bit.

[0445] It should be understood that,Figure 9 The first mapping relationship described in the above embodiment and Figure 9 The first mapping relationship described in the above embodiment is a different mapping relationship. Figure 10B The first mapping relationship described in the above embodiment is a decoding table.

[0446] The first information can be referred to as a decoding symbol, the second information can be referred to as a number of reading bits, and the third information can be referred to as a state base.

[0447] In a possible implementation, the first information, the second information, or the third information is obtained according to probability information; the probability information includes a value of a probability mass function (PMF); and the value of the PMF is constructed by sequentially determining a value of a PMF of each symbol in a plurality of symbols, the plurality of symbols including the target symbol; wherein when determining the value of the PMF of the target symbol, a total value of remaining PMFs except for the PMF of the determined symbol is multiplied by a probability of the target symbol, and a ratio between a product result of the multiplication and a remaining probability except for the determined symbol is calculated, and the value of the PMF of the target symbol is determined according to a relationship between the ratio and a preset value.

[0448] In a possible implementation, the first information, the second information, or the third information is obtained according to probability information; the probability information includes a value of a cumulative distribution function (CDF); and the value of the CDF is constructed by sequentially determining a value of a CDF of each symbol based on a preset order, wherein the preset order is determined according to a relationship between values of PMFs of a plurality of symbols, the plurality of symbols including the target symbol; wherein when a probability distribution corresponding to the probability information of the target symbol is a symmetric distribution, the preset order is an order staggered along both sides of a peak point in the symmetric distribution; or when the probability distribution corresponding to the probability information of the target symbol is a discrete distribution, the preset order is specifically an order from large to small; or when the probability distribution corresponding to the probability information of the target symbol is a discrete distribution, the preset order is specifically an order from small to large.

[0449] In a possible implementation, the first information in the first mapping relationship is constructed by: taking x satisfying C(x)≤s<(C(x)+P(x)) as the first information; wherein C represents a value of a CDF, P represents a value of a PMF, and s represents the state information.

[0450] In a possible implementation, the second information in the first mapping relationship is constructed by taking the value of clz(s-C(x)+P(x))+X as the second information, where clz represents the number of bits with the highest bit being 0 in a value, and X is a preset fifth value.

[0451] In a possible implementation, the third information in the first mapping relationship is constructed by performing a bit shift operation on the value of s-C(x)+P(x) to obtain the third information, where the number of bit shifts in the bit shift operation is obtained according to the second information, or performing a bit shift operation on the value of s-C(x)+P(x) and subtracting a value M from the operation result of the bit shift operation to obtain the third information, where M is the denominator of the quantization probability, and the number of bit shifts in the bit shift operation is obtained according to the second information.

[0452] For example, when constructing the decoding table, for each state s, the construction method is as follows:

[0453] The value of the "decoded symbol" is the value of x satisfying C(x)≤s<C(x)+P(x), the value of the "number of read bits" is clz(s-C(x)+P(x))+m-31, and the value of the "state base" is the result of left shifting s-C(x)+P(x) by the number of bits of the "number of read bits", and the difference between the result and M.

[0454] Referring to Table 10, Table 10 is a decoding table obtained by using the above method:

[0455] Table 10

[0456]

[0457] In a possible implementation, the first information, the second information or the third information represents an integer value, that is, a single integer, for example, the first information can represent an integer value, the second information can represent an integer value, and the third information can represent an integer value. In the embodiment of the application, the index information in the decoding table only includes a symbol, and the mapping object only includes the first information, the second information and the third information, thereby reducing the memory occupation in the encoding table.

[0458] It should be understood that different mapping relationships (including the first mapping relationship) can also be configured for different probability distributions.

[0459] In a possible implementation, the encoding result can be acquired; the encoding result is obtained by encoding pixel data of an image, and the state information and the storage bits are obtained according to the encoding result; the encoding result is processed, and the distribution feature of the pixel data includes a mean value or a variance; and the first mapping relationship corresponding to the distribution feature is determined from a plurality of mapping relationships according to the distribution feature.

[0460] With reference to Figure 10B , Figure 6 An example of a decoding process is shown.

[0461] The model includes three parts.

[0462] First, the header file in the code word is decoded, such as the length and width of an image, some necessary parameters, etc. These parameters can establish a distribution index corresponding to the decoded data (transformed data) for the information in the code word.

[0463] Second, a plurality of probability distributions (such as Gaussian distributions with different variances, logistic distributions, etc.) are predefined, and corresponding distribution indexes and decoding tables are established, wherein the encoding table is established according to the calculated discrete PMF and CDF.

[0464] Third, the image decoder decodes the transformed data to restore the image. The decoder can be a neural network, or a post-processing process of image color transformation, such as inverse Fourier transform, YUV to RGB, etc.

[0465] In the decoding process, for the code word to be decoded, the model first reads the basic configuration in the header file, and establishes the necessary distribution index of the decoded data according to the code word. For each dimension of the decoded data (transformed data), the corresponding decoding table is found through the distribution index, and the decoded transformed data is obtained by using entropy decoding. Finally, the model is used to restore the transformed data into the original image.

[0466] In a possible implementation, the state information can correspond to an integer value through the first mapping relationship; and the integer value is restored to the first information, the second information and the third information, which are integer values respectively.

[0467] For example, the "decoded symbol", "read bit number" and "state base" can be combined according to the above rules. The length of a single parameter and the number of states M = 2 m It is generally set to 24 bits or 32 bits for the convenience of computer reading.

[0468] Referring to Table 11, Table 11 is a schematic diagram of a summary of the length of the code table parameters:

[0469] Table 11

[0470]

[0471] In a possible implementation, the first information is a target symbol corresponding to the first bit, the target symbol is a decoding result of the first bit, the second information indicates a number of bits selected from the stored bits, and the third information is used for summing with the bits selected from the stored bits according to the third information, and a result of the summing is used for updating the state information, and the updated state information corresponds to a second bit, which is a to-be-decoded bit after the first bit. In addition, the stored bits can also be obtained by excluding the selected bits from the stored bits.

[0472] For example, according to the current state value, a "decoded symbol", a "number of read bits", and a "state base" can be obtained by table lookup; and s is updated to a sum of a number obtained by reading "number of read bits" bits from the storage and the "state base".

[0473] Referring to Table 12, Table 12 is a decoding example: decoding 00101110 (state 001 indicates 1, and 01110 is a stored bit), and a decoding result is AAABA.

[0474] Table 12

[0475]

[0476] It should be understood that, Figure 9 corresponding embodiments and Figure 9 The technical solutions in the embodiments can be combined with each other. For example, three sub-tables can be constructed:

[0477] Sub-table 1: for each state s, a "decoded symbol" is obtained, and the method and result are the same as those of the above decoding process;

[0478] Sub-table 2: for each symbol x, a "state adder" is obtained, and the method and result are the same as those of the "state adder" of mode 1 described in the above encoding process;

[0479] Sub-table 3 (all distributions share one table): for each integer i∈[1,M×2-1], a "state bit number" is obtained as clz(i)+m-31.

[0480] Decoding a single symbol process:

[0481] Substitute the current state s into sub-table 1 to obtain a decoded x "decoded symbol";

[0482] Substitute the decoded x into sub-table 2 to obtain a "state adder";

[0483] Calculate the number of bits to be read from the memory: put the value of s minus the "state addend" into sub-table 3 to obtain the "state bit number";

[0484] Update the state s as follows: the value of the current s minus the "state addend", left shift the "state bit number" of bits, plus the value of the memory read "state bit number" of bits, and take the modulus of M.

[0485] Using the above method, the intermediate result of each step of decoding is the same as Memory The decoding process introduced is the same.

[0486] Referring to Table 13, Table 13 is a schematic of a decoding table obtained using the above method:

[0487] Table 13

[0488]

[0489] The embodiment of the application can achieve shorter compression time. Relative to rANS, the encoding and decoding time is 3-4 times higher than rANS.

[0490] Referring to Table 14, Table 14 is a schematic of an advantageous effect:

[0491] Table 14

[0492]

[0493] The table memory of the embodiment of the application is smaller. For the total number of symbols X, the number of states M, if each element of the table is stored using 32 bits, the size of the encoding table is 4X, and the size of the decoding table is 3M; if compressed to 24 bits for storage, the size of the encoding table is 3X, and the size of the decoding table is 3M.

[0494] For a specific distribution, the table memory occupies less than 100KB (MASS = 8, M = 256). Corresponding to the table size of 10MB-20MB of tANS, the table memory occupancy is greatly reduced.

[0495] Referring to Table 15, Table 15 is a schematic of an advantageous effect:

[0496] Table 15

[0497]

[0498] In a possible implementation, the first information in the first mapping relationship is constructed by the following method:

[0499] x satisfying C1(x)≤s<C1(x)+P1(x) or C2(x)≤s<C2(x)+P2(x) is taken as the first information; wherein, the C1 represents a third value corresponding to a CDF, the P1 represents a first value corresponding to a PMF, the C2 represents a fourth value corresponding to a CDF, the P2 represents a second value corresponding to a PMF, and the s represents the state information; and the sum of the first value and the second value is a value of the PMF.

[0500] In a possible implementation, the second information in the first mapping relationship is constructed in the following manner:

[0501] A value of clz(s'-C(x)+P(x))+X is taken as the second information; wherein, the clz represents a number of bits with the highest bit being 0 in a value, X is a preset fifth value, and s' is obtained in the following manner:

[0502] If C2(x)≤s, s' = P1(x)+s-C2(x)+P(x), otherwise s' = s-C1(x)+P(x).

[0503] In a possible implementation, the third information in the first mapping relationship is constructed in the following manner: a bit shift operation is performed on a value of s'-C(x)+P(x) to obtain the third information, and a shift number of the bit shift operation is obtained according to the second information.

[0504] For each state s, the construction method is as follows:

[0505] 1. "Decoding symbol" is a value of x satisfying C1(x)≤s<C1(x)+P1(x) or C2(x)≤s<C2(x)+P2(x);

[0506] 2. s' corresponding to s is obtained:

[0507] a) If C2(x)≤s, s' = P1(x)+s-C2(x)+P(x);

[0508] b) Otherwise s' = s-C1(x)+P(x)

[0509] 3. s' is used to construct a decoding table in the same manner as in Embodiment Two;

[0510] 1) A value of "read bit number" is clz(s'-C(x)+P(x))+m-31;

[0511] 2) A value of "state base" is a result of s'-C(x)+P(x) left shifted by a number of bits of "read bit number", and a difference between the result and M.

[0512]

[0513] In addition, each decoded symbol can correspond to 1-2 continuous states s. As in the above table, A corresponds to 0-2, and 4-5.

[0514] When decoding a single symbol, the "decoded symbol", "number of bits to read", and "state base" can be obtained according to the current state value s by looking up a table; s is updated to the sum of the number obtained by reading "number of bits to read" bits from storage and "state base";

[0515] s Number of Bits Read from Memory x Figure 11 4 10000 A 0 0 10000 A 1 2 1000 A 1 6 100 B 3 4 A 0

[0516] The application further provides a data decoding method applied to an asymmetric digital system (ANS) based decoder, which comprises the following steps:

[0517] obtaining state information of the decoder, wherein the state information corresponds to a first bit, and the first bit is a bit to be decoded currently;

[0518] if the state information is a difference value between a number M and 1, determining that a decoding result of the first bit is a second symbol, and updating the state information to a result of reading the number M from storage;

[0519] if the state information is not the difference value between the number M and 1, determining that the decoding result of the first bit is a first symbol, if the state information is 0, updating the state information to a sum result of the difference value between the number M and 2 and a value read from storage, if the state information is not 0, updating the state information to a difference value between the state information and 1; the updated state information corresponds to a second bit, and the second bit is a bit to be decoded after the first bit.

[0520] The above embodiment is a coding and decoding scheme for two symbols, and a single symbol probability close to 1.

[0521] Two symbols a and b, this embodiment does not need to construct a coding and decoding table, and therefore does not need to store the table in additional memory. Assuming that there are two symbols a and b, and the probability of symbol a is close to 1, the coding algorithm is as follows:

[0522] -compressing symbol a: if s≥M-2, s-M+2 (0 or 1) is written into 1 bit to storage, and then s is updated to 0; otherwise, s is updated to s+1;

[0523] -compressing symbol b: all m bits of s are written into storage, and s is updated to M-1.

[0524] The decoding algorithm is: if the current state s is M-1, the symbol b is decoded, and s is updated to the result of reading m bits from the storage; otherwise, a is decoded, and then s is updated: 1) if s=0, s is updated to M-2 and the sum of a bit read from the storage; 2) otherwise, s is updated to s-1.

[0525] Next, a data encoding device provided by the embodiment of the application is introduced from the perspective of the device, referring to Figure 11 , Figure 11 The structure of a data encoding device provided by the embodiment of the application is shown in FIG. 11, which includes a data encoding device 1100 provided by the embodiment of the application. Figure 12

[0526] The obtaining module 1101 is configured to obtain a target symbol.

[0527] The specific description of the obtaining module 1101 can refer to the description of step 601 in the above embodiment, which is not described here again.

[0528] The encoding module 1102 is configured to obtain first information and second information corresponding to the target symbol through a first mapping relationship; the first information and the second information are obtained according to probability information corresponding to the target symbol.

[0529] According to the first information and state information of the encoder, first encoding data is obtained through a first operation.

[0530] According to the second information, the state information is updated through a second operation to obtain second encoding data; wherein

[0531] The first encoding data and the second encoding data are used to obtain the encoding result of the target symbol, and the first operation and the second operation do not include division operation.

[0532] The specific description of the encoding module 1102 can refer to the description of step 602 in the above embodiment, which is not described here again.

[0533] In a possible implementation, the first information or the second information represents an integer value.

[0534] In a possible implementation, the first operation and the second operation do not include judgment operation.

[0535] In a possible implementation, the first operation includes:

[0536] The sum operation on the first information and the state information, and the bit shift operation on the sum result of the sum operation.

[0537] ​Selecting part of bits in the state information as the first encoding data, a position of the part of bits in the state information being determined according to a shift result of the bit shift operation.

[0538] In a possible implementation, the second operation includes:

[0539] An addition operation performed on the state information and a value M, and a bit shift operation performed on an addition result of the addition operation; wherein the probability information includes a quantized probability, and the M is a denominator of the quantized probability;

[0540] An addition operation performed on a shift result of the bit shift operation and the second information.

[0541] In a possible implementation, the probability information includes a value of a probability mass function PMF; the value of the PMF is constructed in the following manner:

[0542] Determine values of PMFs of symbols in sequence, the symbols including the target symbol; wherein,

[0543] When determining the value of the PMF of the target symbol, multiply a total value of remaining PMFs except for the PMF of the determined symbol with the probability of the target symbol, and calculate a ratio between a product result of the multiplication and a remaining probability except for the determined symbol, and determine the PMF of the target symbol according to a relationship between the ratio and a preset fifth value.

[0544] In a possible implementation, the fifth value is 1, and the relationship is to take a larger value.

[0545] In a possible implementation, the probability information includes a value of a cumulative distribution function CDF; the value of the CDF is constructed in the following manner:

[0546] Determine values of CDFs of symbols in sequence based on a preset order, wherein the preset order is determined according to relationships between values of PMFs of a plurality of symbols, the plurality of symbols including the target symbol; wherein,

[0547] When the probability distribution corresponding to the probability information of the target symbol is a symmetric distribution, the preset order is an order of interlacing along two sides of a peak point in the symmetric distribution; or,

[0548] When the probability distribution corresponding to the probability information of the target symbol is a discrete distribution, the preset order is specifically an order from large to small; or,

[0549] When the probability distribution corresponding to the probability information of the target symbol is a discrete distribution, the preset order is specifically an order from smallest to largest.

[0550] In one possible implementation, the target symbol is obtained by transforming the pixel data of an image, wherein the transformed pixel data satisfies a preset distribution. The transformation is further used to obtain the distribution characteristics of the pixel data, wherein the distribution characteristics include the mean or variance. The acquisition module is further used to:

[0551] Based on the distribution characteristics, the first mapping relationship corresponding to the distribution characteristics is determined from multiple mapping relationships.

[0552] In one possible implementation, the plurality of distribution features include a first distribution feature and a second distribution feature, wherein the entropy of the first distribution feature is greater than the entropy of the second distribution feature;

[0553] The denominator of the quantized probability in the mapping relationship corresponding to the second distribution feature is greater than the denominator of the quantized probability in the mapping relationship corresponding to the first distribution feature.

[0554] In one possible implementation, the first information in the first mapping relationship is constructed in the following way:

[0555] The number of consecutive 0 bits in the highest-order bit of the PMF value of the target symbol is added to a preset sixth value.

[0556] The summation result is bit-shifted, and the shifted result is subtracted from the bit-shifted result of the PMF operation on the target symbol to obtain the first information; or,

[0557] The summation result of the summation operation is subjected to a bit shift operation, and the shift result of the bit shift operation is subtracted from the shift result of the bit shift operation on the PMF value of the target symbol. The result of the subtraction operation is summed with the value M to obtain the first information. The probability information includes the quantization probability, and M is the denominator of the quantization probability.

[0558] In one possible implementation, the second information in the first mapping relationship is constructed in the following way:

[0559] The second information is obtained by subtracting the CDF value and the PMF value of the target symbol; or,

[0560] The second information is obtained by subtracting the value of the CDF of the target symbol from the value of the PMF of the target symbol, and adding the result of the subtraction operation to a value M, the probability information includes quantized probabilities, and the M is a denominator of the quantized probabilities.

[0561] In a possible implementation, the second information in the first mapping relationship is constructed by:

[0562] When the result of the subtraction operation of the value of the CDF of the target symbol from the value of the PMF of the target symbol is greater than or equal to 0, the result of the subtraction operation is taken as the second information; or,

[0563] When the result of the subtraction operation of the value of the CDF of the target symbol from the value of the PMF of the target symbol is less than 0, the result of the subtraction operation is added to a value M to obtain the second information, the probability information includes quantized probabilities, and the M is a denominator of the quantized probabilities.

[0564] In a possible implementation, the encoding module is specifically configured to:

[0565] The target symbol corresponds to an integer value through the first mapping relationship;

[0566] The integer value is restored to the first information and the second information based on a third operation, and the first information and the second information are each an integer value.

[0567] In a possible implementation, the probability information includes PMF information corresponding to each symbol, the PMF information includes a first value and a second value, the sum of the first value and the second value is the value of the PMF, the probability information further includes CDF information corresponding to each symbol, the CDF information includes a third value and a fourth value, and the third value and the fourth value are constructed by:

[0568] According to the first values of the plurality of symbols, the third value corresponding to each symbol is sequentially determined by accumulation based on a preset order;

[0569] According to the second values and the third values of the plurality of symbols, the fourth value corresponding to each symbol is sequentially determined by accumulation based on the preset order.

[0570] In a possible implementation, the second information includes a first sub-information, a second sub-information, and a third sub-information.

[0571] The first sub-information in the first mapping relationship is constructed by subtracting the third value of the target symbol from a value of the PMF of the target symbol.

[0572] The second sub-information in the first mapping relationship is constructed by adding the third value of the target symbol to the first value of the target symbol, and subtracting the operation result from 1.

[0573] The third sub-information in the first mapping relationship is constructed by subtracting the third value of the target symbol from the fourth value of the target symbol, and subtracting the operation result from the first value of the target symbol.

[0574] In a possible implementation, the second operation includes:

[0575] adding the state information and a value M, and performing a bit shift operation on the addition result; wherein the probability information includes a quantized probability, and the M is a denominator of the quantized probability; adding the shift result of the bit shift operation and the first sub-information;

[0576] when the operation result of the addition operation is greater than the second sub-information, adding the operation result of the addition operation and the third sub-information as the second encoding data;

[0577] when the operation result of the addition operation is less than the second sub-information, taking the operation result of the addition operation as the second encoding data.

[0578] In a possible implementation, when the value M is 256, the first information is stored by 10 bits, the first sub-information is stored by 8 bits, the second sub-information is stored by 7 bits, the third sub-information is stored by 7 bits, the sum of the first values of a plurality of symbols is 128, and the third sub-information is less than 128.

[0579] The application further provides a data encoding apparatus applied to an encoder based on an asymmetric digital system (ANS), and the apparatus includes:

[0580] an obtaining module configured to obtain a first symbol, wherein a sum of a quantized probability corresponding to the first symbol and a quantized probability corresponding to a second symbol is 1, a difference between the quantized probability corresponding to the first symbol and 1 is less than a threshold, and a difference between the quantized probability corresponding to the second symbol and 0 is less than a threshold.

[0581] The encoding module is configured to perform a first operation between the state information of the encoder and the numerical value M according to a first condition satisfied by a numerical value size relationship between the state information and the numerical value M, to obtain first encoding data, and to update the state information to 0.

[0582] The state information of the encoder is added by 1 according to that the numerical value size relationship between the state information and the numerical value M does not satisfy the first condition.

[0583] In a possible implementation, the obtaining module is further configured to:

[0584] The second symbol is obtained.

[0585] The encoding module is further configured to take the state information of the encoder as the first encoding data, and to update the state information to a difference value between the numerical value M and 1.

[0586] Next, a data decoding apparatus provided by the embodiments of the present application is introduced from the perspective of the apparatus. Referring to Figure 12 , Figure 12 The structure of the data decoding apparatus provided by the embodiments of the present application is shown in FIG. 12. The data decoding apparatus 1200 provided by the embodiments of the present application includes: Figure 13

[0587] The obtaining module 1201 is configured to obtain the state information of the decoder and the storage bits. The state information corresponds to a first bit, and the first bit is a bit to be currently decoded.

[0588] The specific description of the obtaining module 1201 can refer to the description of step 901 in the above embodiments, which is not repeated here.

[0589] The decoding module 1202 is configured to determine, according to a first mapping relationship, a first information, a second information and a third information corresponding to the state information. The first information is a target symbol corresponding to the first bit, the target symbol is a decoding result of the first bit, the second information indicates a bit number selected from the storage bits, and the third information is used for addition operation with bits selected from the storage bits according to the third information. The addition operation result is used for updating the state information, and the updated state information corresponds to a second bit, which is a bit to be decoded after the first bit.

[0590] The specific description of the decoding module 1202 can refer to the description of step 902 in the above embodiments, which is not repeated here.

[0591] In a possible implementation, the decoding module is further configured to:

[0592] ​Prune the storage bits according to the selected bits to obtain updated storage bits.

[0593] In a possible implementation, the first information, the second information, or the third information represents an integer value.

[0594] In a possible implementation, the first information in the first mapping relationship is constructed in the following manner:

[0595] x satisfying C(x)≤s<(C(x)+P(x)) is taken as the first information; wherein the C represents a value of a CDF, the P represents a value of a PMF, and the s represents the state information; or,

[0596] x satisfying C1(x)≤s<C1(x)+P1(x) or C2(x)≤s<C2(x)+P2(x) is taken as the first information; wherein the C1 represents a third value corresponding to a CDF, the P1 represents a first value corresponding to a PMF, the C2 represents a fourth value corresponding to a CDF, the P2 represents a second value corresponding to a PMF, and the s represents the state information; and a sum of the first value and the second value is a value of the PMF.

[0597] In a possible implementation, the second information in the first mapping relationship is constructed in the following manner:

[0598] a value of clz(s-C(x)+P(x))+X is taken as the second information; wherein the clz represents a number of bits with the highest bit being 0 in a value, and X is a preset fifth value; or,

[0599] a value of s-C(x)+P(x) is subjected to a bit shift operation to obtain the third information, and a shift number of the bit shift operation is obtained according to the second information; or,

[0600] a value of s-C(x)+P(x) is subjected to a bit shift operation, and a result of the bit shift operation is subtracted by a value M to obtain the third information, the M is a denominator of the quantized probability, and a shift number of the bit shift operation is obtained according to the second information; or,

[0601] a value of clz(s′-C(x)+P(x))+X is taken as the second information; wherein the clz represents a number of bits with the highest bit being 0 in a value, X is a preset fifth value, and s′ is obtained in the following manner:

[0602] If C2(x)≤s, then s' = P1(x) + s - C2(x) + P(x), otherwise s' = s - C1(x) + P(x).

[0603] In a possible implementation, the third information in the first mapping relationship is constructed in the following manner:

[0604] performing a bit shift operation on a value of s-C(x)+P(x) to obtain the third information, a shift number of the bit shift operation being obtained according to the second information; or

[0605] performing a bit shift operation on a value of s-C(x)+P(x), and subtracting a value M from a result of the bit shift operation to obtain the third information, the M being a denominator of the quantization probability, a shift number of the bit shift operation being obtained according to the second information; or

[0606] performing a bit shift operation on a value of s-C(x)+P(x) to obtain the third information, a shift number of the bit shift operation being obtained according to the second information.

[0607] In a possible implementation, the first information, the second information, or the third information is obtained according to probability information; the probability information includes a value of a probability mass function (PMF); and the value of the PMF is constructed in the following manner:

[0608] values of PMFs of the plurality of symbols are sequentially determined, the plurality of symbols including the target symbol; and

[0609] In the determination of the value of the PMF of the target symbol, a total value of remaining PMFs excluding the PMFs of the determined symbols is multiplied by a probability of the target symbol, and a ratio between a product result of the multiplication and a remaining probability excluding the determined symbols is calculated, and the PMF of the target symbol is determined according to a relationship between the ratio and a preset value.

[0610] In a possible implementation, the preset value is 1, and the relationship is to take a larger value.

[0611] In a possible implementation, the first information, the second information, or the third information is obtained according to probability information; the probability information includes a value of a cumulative distribution function (CDF); and the value of the CDF is constructed in the following manner:

[0612] values of CDFs of the plurality of symbols are sequentially determined according to a preset order, the preset order being determined according to a relationship between values of PMFs of the plurality of symbols, the plurality of symbols including the target symbol; and

[0613] In a possible implementation, the preset order is an order of being staggered along two sides of a peak point of the symmetric distribution; or,

[0614] In a possible implementation, the preset order is a descending order; or,

[0615] In a possible implementation, the preset order is an ascending order.

[0616] In a possible implementation, the obtaining module is further configured to:

[0617] obtain an encoding result, the encoding result being obtained by encoding pixel data of an image, and the state information and the stored bit being obtained according to the encoding result;

[0618] process the encoding result, the distribution feature of the pixel data including a mean value or a variance;

[0619] determine, according to the distribution feature, the first mapping relationship corresponding to the distribution feature from a plurality of mapping relationships.

[0620] The application further provides a data decoding apparatus, which is applied to an asymmetric numerical system (ANS) based decoder, and the apparatus comprises:

[0621] an obtaining module, configured to obtain state information of the decoder, the state information corresponding to a first bit, the first bit being a bit to be currently decoded;

[0622] a decoding module, configured to: if the state information is a difference between a numerical value M and 1, determine a decoding result of the first bit as a second symbol, and update the state information as a result of reading the numerical value M bits from storage;

[0623] if the state information is not the difference between the numerical value M and 1, determine the decoding result of the first bit as a first symbol, if the state information is 0, update the state information as a sum of a difference between the numerical value M and 2 and a value of 1 bit read from storage, and if the state information is not 0, update the state information as a difference between the state information and 1; the updated state information corresponding to a second bit, the second bit being a bit to be decoded after the first bit.

[0624] Next, an execution device provided by an embodiment of the application is introduced, please refer to Figure 13 , Figure 6A structural schematic diagram of an execution device provided in the embodiments of the present application is shown in FIG. 13. The execution device 1300 can be a mobile phone, a tablet, a notebook computer, a smart wearable device, a server, etc., and is not limited herein. The execution device 1300 implements the functions of the data encoding and decoding method in the corresponding embodiments. Specifically, the execution device 1300 includes a receiver 1301, a transmitter 1302, a processor 1303 and a memory 1304 (wherein the number of processors 1303 in the execution device 1300 can be one or more), wherein the processor 1303 can include an application processor 13031 and a communication processor 13032. In some embodiments of the present application, the receiver 1301, the transmitter 1302, the processor 1303 and the memory 1304 can be connected through a bus or other means. Figure 9 and Figure 6 the functions of the data encoding and decoding method in the corresponding embodiments. Specifically, the execution device 1300 includes a receiver 1301, a transmitter 1302, a processor 1303 and a memory 1304 (wherein the number of processors 1303 in the execution device 1300 can be one or more), wherein the processor 1303 can include an application processor 13031 and a communication processor 13032. In some embodiments of the present application, the receiver 1301, the transmitter 1302, the processor 1303 and the memory 1304 can be connected through a bus or other means.

[0625] The memory 1304 can include a read-only memory and a random access memory, and provide the processor 1303 with instructions and data. A part of the memory 1304 can also include a non-volatile random access memory (NVRAM). The memory 1304 stores processor and operation instructions, executable modules or data structures, or subsets thereof, or expanded sets thereof, wherein the operation instructions can include various operation instructions for implementing various operations.

[0626] The processor 1303 controls the operation of the execution device. In a specific application, various components of the execution device are coupled together through a bus system, wherein the bus system can include a data bus, a power supply bus, a control bus and a state signal bus, etc. in addition to the data bus. However, for the sake of clarity, all kinds of buses are referred to as a bus system in the figure.

[0627] The method disclosed in the embodiments of the present application can be applied to the processor 1303 or implemented by the processor 1303. The processor 1303 can be an integrated circuit chip having a signal processing capability. In the implementation process, each step of the above method can be completed by the integrated logic circuit or the instruction in the form of software in the processor 1303. The processor 1303 described above can be a general processor, a digital signal processor (DSP), a microprocessor or a microcontroller, a vision processing unit (VPU), a tensor processing unit (TPU) and other processors suitable for AI operation, and can further include an application specific integrated circuit (ASIC), a field-programmable gate array (FPGA) or other programmable logic device, a discrete gate or transistor logic device, a discrete hardware component. The processor 1303 can implement or execute the disclosed methods, steps and logic block diagrams in the embodiments of the present application. The general processor can be a microprocessor or the processor can also be any conventional processor. The steps of the method disclosed in combination with the embodiments of the present application can be directly embodied as a hardware decoding processor for execution, or a combination of hardware and software modules in the decoding processor for execution. The software module can be located in a random access memory, a flash memory, a read-only memory, a programmable read-only memory or an electrically erasable programmable memory, a register or other mature storage medium in the art. The storage medium is located in the storage 1304, and the processor 1303 reads the information in the storage 1304, and combines the hardware to complete the steps of the above embodiments. Figure 9 and Figure 14 The data coding and decoding method in the corresponding embodiments.

[0628] The receiver 1301 can be used to receive input digital or character information, and generate signal input related to the relevant settings and function control of the execution device. The transmitter 1302 can be used to output digital or character information through the first interface; the transmitter 1302 can also be used to send instructions to the disk group through the first interface to modify the data in the disk group; the transmitter 1302 can also include a display device such as a display screen.

[0629] The embodiments of the present application also provide a training device, please refer to Figure 14 , Figure 6This is a schematic diagram of a server structure provided in an embodiment of this application. Specifically, server 1400 is implemented by one or more servers. Server 1400 can vary significantly due to different configurations or performance. It may include one or more central processing units (CPUs) 1414 (e.g., one or more processors) and memory 1432, and one or more storage media 1430 (e.g., one or more mass storage devices) for storing application programs 1442 or data 1444. The memory 1432 and storage media 1430 can be temporary or persistent storage. The program stored in storage media 1430 may include one or more modules (not shown in the diagram), each module may include a series of instruction operations on the server. Furthermore, the CPU 1414 may be configured to communicate with storage media 1430 and execute the series of instruction operations in storage media 1430 on server 1400.

[0630] Server 1400 may also include one or more power supplies 1426, one or more wired or wireless network interfaces 1450, one or more input / output interfaces 1458; or, one or more operating systems 1441, such as Windows Server™, Mac OS X™, Unix™, Linux™, FreeBSD™, etc.

[0631] Specifically, the server can perform the steps related to model training described in the above embodiments.

[0632] This application also provides a computer program product that, when run on a computer, causes the computer to perform... Figure 9 as well as Figure 6 Data encoding / decoding method in the corresponding embodiment.

[0633] This application also provides a computer-readable storage medium storing a program for signal processing, which, when run on a computer, causes the computer to perform... Figure 9 as well as Figure 15 Data encoding / decoding method in the corresponding embodiment.

[0634] The execution device, the training device or the terminal device provided in the embodiments of the present application can specifically be a chip, which comprises a processing unit, for example, a processor, and a communication unit, for example, an input / output interface, a pin or a circuit, etc. The processing unit can execute computer execution instructions stored in a storage unit, so that the chip in the execution device executes the data processing method described in the above embodiments, or so that the chip in the training device executes the data processing method described in the above embodiments. Alternatively, the storage unit is a storage unit in the chip, such as a register, a cache, etc., and the storage unit can also be a storage unit outside the chip in the wireless access device, such as a read-only memory (ROM) or other types of static storage devices that can store static information and instructions, a random access memory (RAM), etc.

[0635] Specifically, refer to Figure 15 , Figure 6 A structural schematic diagram of the chip provided in the embodiments of the present application is shown in FIG. 1. The chip can be a neural network processor NPU 1500, which is mounted on a host CPU (Host CPU) as a coprocessor and is assigned tasks by the Host CPU. The core part of the NPU is an operation circuit 1503, which extracts matrix data in a memory and performs multiplication operation under the control of a controller 1504.

[0636] The NPU 1500 can realize the data encoding and decoding method in the corresponding embodiments through cooperation between various devices inside the NPU 1500. Figure 9 and ​ the data encoding and decoding method in the corresponding embodiments.

[0637] More specifically, in some implementations, the operation circuit 1503 in the NPU 1500 internally includes a plurality of processing units (PEs). In some implementations, the operation circuit 1503 is a two-dimensional systolic array. The operation circuit 1503 can also be a one-dimensional systolic array or other electronic circuits capable of performing mathematical operations such as multiplication and addition. In some implementations, the operation circuit 1503 is a general-purpose matrix processor.

[0638] For example, it is assumed that there are an input matrix A, a weight matrix B and an output matrix C. The operation circuit takes corresponding data of the matrix B from a weight memory 1502 and buffers the data on each PE in the operation circuit. The operation circuit takes the matrix A data from an input memory 1501 and performs matrix operation with the matrix B, and the partial result or final result of the obtained matrix is saved in an accumulator 1508.

[0639] The unified memory 1506 is used to store input data and output data. The weight data is transferred to the weight memory 1502 through a direct memory access controller (DMAC) 1505. The input data is also transferred to the unified memory 1506 through the DMAC.

[0640] The BIU is a bus interface unit 1510 for interaction between the AXI bus and the DMAC and the instruction fetch buffer (IFB) 1509.

[0641] The bus interface unit 1510 (BIU) is used for the instruction fetch buffer 1509 to obtain instructions from an external memory, and is also used for the memory access controller 1505 to obtain original data of the input matrix A or the weight matrix B from the external memory.

[0642] The DMAC is mainly used to transfer input data in the external memory DDR to the unified memory 1506, or to transfer weight data to the weight memory 1502, or to transfer input data to the input memory 1501.

[0643] The vector calculation unit 1507 includes a plurality of operation processing units, which further process the output of the operation circuit 1503 as needed, such as vector multiplication, vector addition, exponential operation, logarithmic operation, size comparison, etc. It is mainly used for non-convolutional / full connection layer network calculation in neural networks, such as batch normalization, pixel-level summation, upsampling of feature planes, etc.

[0644] In some implementations, the vector calculation unit 1507 can store the processed output vector to the unified memory 1506. For example, the vector calculation unit 1507 can apply a linear function; or, a nonlinear function to the output of the operation circuit 1503, such as linear interpolation on the feature planes extracted by the convolutional layer, and further, a vector of accumulated values to generate activation values. In some implementations, the vector calculation unit 1507 generates normalized values, pixel-level summation values, or both. In some implementations, the processed output vector can be used as an activation input to the operation circuit 1503, such as for use in a subsequent layer in a neural network.

[0645] The controller 1504 is connected to the instruction fetch buffer 1509, which is used to store instructions used by the controller 1504;

[0646] The unified memory 1506, the input memory 1501, the weight memory 1502, and the instruction memory 1509 are on-chip memories. The external memory is private to the NPU hardware architecture.

[0647] Any processor mentioned in the above can be a general central processing unit, a microprocessor, an ASIC, or one or more integrated circuits used to control the execution of the above programs.

[0648] It should be noted that the apparatus embodiments described above are merely illustrative, and the units described as separate components can or can not be physically separated, and the components shown as units can or can not be physical units, i.e., they can be located in one place or distributed on multiple network units. Some or all of the modules can be selected to achieve the purpose of the embodiment according to actual needs. In addition, the connection relationship between the modules in the apparatus embodiment provided in the present application indicates that there is a communication connection between them, which can be implemented as one or more communication buses or signal lines.

[0649] Through the description of the above embodiments, those skilled in the art can clearly understand that the present application can be implemented by means of software and the necessary general hardware, and of course it can also be implemented by special hardware including special integrated circuits, special CPUs, special memories, special components, etc. Generally, functions completed by computer programs can be easily implemented by corresponding hardware, and the specific hardware structure for implementing the same function can also be various, such as analog circuits, digital circuits or special circuits. However, for the present application, software program implementation is a better embodiment. Based on this understanding, the technical solutions of the present application can be embodied in the form of a software product, which is stored in a readable storage medium, such as a computer's floppy disk, U disk, mobile hard disk, ROM, RAM, magnetic disk or optical disk, etc., including a plurality of instructions for making a computer device (which can be a personal computer, a training device, or a network device, etc.) execute the methods described in various embodiments of the present application.

[0650] In the above embodiments, all or part can be implemented by software, hardware, firmware or any combination thereof. When implemented by software, it can be implemented in the form of a computer program product in whole or in part.

[0651] The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the processes or functions described in the embodiments of the present application are generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions can be transmitted from one website, computer, training device or data center to another website, computer, training device or data center through wired (such as coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (such as infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that can be stored by the computer or a data storage device such as a training device, a data center, etc. integrated with one or more available media sets. The available media can be a magnetic medium (for example, a floppy disk, a hard disk, a magnetic tape), an optical medium (for example, a DVD), or a semiconductor medium (for example, a solid state disk (SSD)), etc.

Claims

1. A decoding method, comprising: The method comprises: obtaining state information of the decoder and a bit stream; determining first information, second information and third information corresponding to the state information according to a first mapping relationship; the first information is a target symbol corresponding to a first bit, the target symbol is a decoding result of the first bit, and the first bit is a current bit to be decoded in the bit stream; the second information indicates a number of bits selected from the bit stream, and corresponding bits are selected from the bit stream according to the second information; the third information and the corresponding bits selected from the bit stream according to the second information are added, and the addition result is used to update the state information to obtain updated state information.

2. The method of claim 1, wherein, The method further comprises: eliminating the corresponding bits selected according to the second information from the bit stream to obtain an updated bit stream.

3. The method according to claim 1 or 2, characterized in that, The first information is a decoding symbol obtained by table lookup, and the decoding symbol is a decoding result of the first bit.

4. The method according to any one of claims 1 to 3, characterized in that, The third information is a state base obtained by table lookup.

5. The method according to any one of claims 1 to 4, characterized in that, The first information in the first mapping relationship is constructed by: x satisfying C1(x)≤s<C1(x)+P1(x) or C2(x)≤s<C2(x)+P2(x) is taken as the first information; wherein C1 represents a third value corresponding to a cumulative distribution function CDF, P1 represents a first value corresponding to a probability mass function PMF, C2 represents a fourth value corresponding to the CDF, P2 represents a second value corresponding to the PMF, and s represents the state information; and the sum of the first value and the second value is the value of the PMF.

6. The method according to any one of claims 1 to 5, characterized in that, The second information in the first mapping relationship is constructed by: the value of clz(s'-C(x)+P(x))+X is taken as the second information; wherein clz represents the number of bits with the highest bit being 0 in the value, X is a preset fifth value, and s' is obtained by: if C2(x)≤s, then s'=P1(x)+s-C2(x)+P(x), otherwise s'=s-C1(x)+P(x).

7. The method according to any one of claims 1 to 6, characterized in that, The third information in the first mapping relationship is constructed by: the value of s-C(x)+P(x) is subjected to a bit shift operation to obtain the third information, and the number of bit shifts of the bit shift operation is obtained according to the second information; or the value of s-C(x)+P(x) is subjected to a bit shift operation, and the operation result of the bit shift operation is subtracted by a value M to obtain the third information, and the number of bit shifts of the bit shift operation is obtained according to the second information; or the value of s'-C(x)+P(x) is subjected to a bit shift operation to obtain the third information, and the number of bit shifts of the bit shift operation is obtained according to the second information.

8. The method according to any one of claims 1 to 7, characterized in that, The first information, the second information or the third information is obtained according to probability information; the probability information includes a value of a cumulative distribution function CDF; and the value of the CDF is constructed by: The value of the probability mass function (PMF) of each symbol is accumulated based on a preset order to determine the value of the CDF corresponding to each symbol in sequence.

9. The method of any of claim 8, wherein, The preset order is x, x-1, x+1, x-2, x+2, …, and x is a peak point.

10. The method according to any one of claims 1 to 9, characterized in that, The method further comprises: obtaining an encoding result, wherein the encoding result is obtained by encoding pixel data of an image, and the state information and the bit stream are obtained according to the encoding result; processing the encoding result, wherein the distribution characteristics of the pixel data include a mean value or a variance; determining the first mapping relationship corresponding to the distribution characteristics from a plurality of mapping relationships according to the distribution characteristics.

11. A data encoding method characterized by, The method comprises: obtaining a target symbol; obtaining first information and second information corresponding to the target symbol through a first mapping relationship, wherein the first information and the second information are obtained according to probability information corresponding to the target symbol; obtaining first encoding data through a first operation according to the first information and state information of the encoder; updating the state information through a second operation according to the second information to obtain second encoding data; and obtaining a bit stream corresponding to the target symbol according to the first encoding data and the second encoding data.

12. The method of claim 11, wherein, The first operation and the second operation do not include division operations.

13. The method according to claim 11 or 12, characterized in that, The first operation and the second operation do not include judgment operations.

14. The method according to any one of claims 11 to 13, characterized in that, The first operation comprises: adding the first information and the state information, and performing a bit shift operation on the addition result; selecting part of bits in the state information as first encoding data, and the position of the part of bits in the state information is determined according to the shift result of the bit shift operation.

15. The method according to any one of claims 11 to 14, characterized in that, The second operation comprises: adding the state information and a value M, and performing a bit shift operation on the addition result, wherein the probability information includes quantized probabilities; adding the shift result of the bit shift operation and the second information; or in the case where the state information is initialized as the M, performing a bit shift operation on the state information; adding the shift result of the bit shift operation and the second information; and performing a subtraction operation on the addition result and the M.

16. The method according to any one of claims 11 to 15, characterized in that, The probability information includes a value of a cumulative distribution function (CDF), and the value of the CDF is constructed by: accumulating the value of a probability mass function (PMF) of each symbol based on a preset order to determine the value of the CDF corresponding to each symbol in sequence.

17. The method of claim 16, wherein, The preset order is x, x-1, x+1, x-2, x+2, …, and x is a peak point.

18. The method of any one of claims 11 to 17, wherein, The first information in the first mapping relationship is constructed by: x satisfying C1(x)≤s<C1(x)+P1(x) or C2(x)≤s<C2(x)+P2(x) is taken as the first information; wherein the C1 represents a third value corresponding to a cumulative distribution function (CDF), the P1 represents a first value corresponding to a probability mass function (PMF), the C2 represents a fourth value corresponding to the CDF, the P2 represents a second value corresponding to the PMF, and the s represents the state information; and the sum of the first value and the second value is a value of the PMF.

19. The method of any one of claims 11 to 18, wherein, The second information in the first mapping relationship is constructed by: a value of clz(s'-C(x)+P(x))+X is taken as the second information; wherein the clz represents a number of bits with the highest bits being 0 in a value, X is a preset fifth value, and s' is obtained by: If C2(x)≤s, s' = P1(x)+s-C2(x)+P(x), otherwise s' = s-C1(x)+P(x).

20. A decoding device, comprising: The decoding device includes a memory and a processor; the memory stores code, and the processor is configured to execute the code to implement the method in any one of claims 1 to 10.

21. An encoding device, comprising: The encoding device includes a memory and a processor; the memory stores code, and the processor is configured to execute the code to implement the method in any one of claims 11 to 19.

22. A computer storage medium, comprising, The computer storage medium stores one or more instructions, which, when executed by one or more computers, cause the one or more computers to implement the method in any one of claims 1 to 10, or 11 to 19.

23. A computer program product comprising code, characterized in that, The code is used to implement the method in any one of claims 1 to 10, or 11 to 19 when the code is executed by a computer or a processor.

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