Dual-homing PON protection heartbeat monitoring system based on FPGA

Abstract

The invention discloses a dual-homing PON (Passive Optical Network) heartbeat protection monitoring system based on an FPGA (Field Programmable Gate Array), which is characterized in that FPGA chips are respectively configured on two OLT (Optical Line Terminal) equipment forming a dual-homing pair, the FPGA chips are arranged to be connected with PON MAC (Media Access Control) chips, exchange chips and CPUs (Central Processing Units) of the OLT equipment, and the OLT equipment forming the dual-homing pair is configured to form heartbeat monitoring and switching interactive monitoring and processing. According to the scheme, heartbeat and switching interaction messages between double homing pairs are maintained and monitored through the FPGA chip, the heartbeat state is timely and accurately sensed through rapid parallel operation, switching can be rapidly initiated after a switching request is received, intervention of a CPU is not needed, the timeliness and accuracy of heartbeat sensing and PON switching are improved, and the switching efficiency is improved. And the convergence speed and efficiency of the dual-homing PON protection function are improved.

Description

TECHNICAL FIELD

[0001] The present application relates to software system technology, in particular to a dual-homing cross-device redundancy protection switching technology based on PON protection and FPGA heartbeat and interactive monitoring technology in a software system. BACKGROUND

[0002] Noun explanation: PON: passive optical network; ONU: passive optical network terminal; OLT: passive optical network terminal; FPGA: field programmable gate array.

[0003] In a passive optical network PON system, in order to improve network reliability and security, an optical link protection switching mechanism can be used. The optical link protection switching of a GPON system can use the following two ways: automatic switching, triggered by fault detection, such as signal loss, frame loss or signal degradation (BER degradation to a predefined threshold) and the like; forced switching, triggered by management events, such as fiber rerouting, fiber replacement, manual command switching and the like.

[0004] The current PON protection function has been extended to dual-homing PON protection between OLT devices, links are established between two OLT uplink ports, and a PON protection port is set on each OLT, which can increase the protection of the OLT device itself and the protection of the uplink link on the basis of the basic PON protection function protecting the optical link of the PON port.

[0005] Ordinary dual-homing protection needs to process heartbeat and switching interactive message information between two devices through the CPU of the OLT, and also needs to process synchronization and management information of the PON protection group and other services. In the case of a large number of ONUs and complex service flows, the OLT processing heartbeat messages will be affected by the number of messages and the processing capacity of the CPU, and cannot respond in time, resulting in problems such as false switching of the PON protection group, slow switching, ONU terminal disconnection and the like. SUMMARY

[0006] In view of the limitations of the existing PON protection function of the OLT device, the purpose of the present application is to provide a dual-homing PON protection heartbeat monitoring system based on FPGA, which can quickly and accurately monitor the heartbeat between dual-homing pairs, quickly converge and respond to the heartbeat stop caused by OLT faults, uplink link faults and the like, and also can quickly respond to active switching interaction requirements.

[0007] In order to achieve the above object, the application provides a dual-homing PON protection heartbeat monitoring system based on FPGA, wherein the monitoring system is configured with FPGA chips on two OLT devices constituting a dual-homing pair, the FPGA chips are connected with PON MAC chips, switching chips and CPUs of the OLT devices, and are configured to form heartbeat monitoring and switching interaction monitoring and processing for the OLT devices constituting the dual-homing pair.

[0008] Further, the FPGA chips are connected with PON MAC chips in the local OLT device through GPIO pins and are connected with CPUs of the local OLT device through buses.

[0009] Further, the FPGA chips are configured to control the on-off state of PON port light emitters through GPIO pins, control the switching of PON port working modes through GPIO pins, and confirm PON port light receiving states through GPIO pins.

[0010] Further, the switching chips are configured to directly transmit the captured heartbeat and switching interaction messages in the dual-homing protocol to the FPGA chips for processing; the FPGA chips are configured to automatically send heartbeat and switching interaction messages with the switching chips in the local OLT device, and monitor the heartbeat states and switching interaction requests between the OLT devices constituting the dual-homing pair according to the heartbeat and switching interaction messages.

[0011] Further, the FPGA chips are configured to monitor the changes in the heartbeat states between the OLT devices constituting the dual-homing pair, and notify the CPUs in the local OLT devices through buses, and the CPUs perform PON protection group synchronization management actions related to the dual-homing pair according to the states and configurations of the local OLT devices.

[0012] Further, the CPUs receive the heartbeat state change information notified by the FPGA chips through buses, record the heartbeat link establishment and disconnection states of the dual-homing pair, and when the heartbeat is established, the CPUs determine whether there is a PON protection group configuration in the dual-homing pair, and if there is, perform initial working state negotiation, PON protection group configuration and state initialization synchronization.

[0013] Further, the FPGA chips are configured to monitor the disconnection of the heartbeat between the two OLT devices constituting the dual-homing pair; The FPGA chips in the two OLT devices will first check whether there is light receiving in the protection group port in the dual-homing pair to determine the working state of the ONU: If there is no light collection, it is determined that the opposite PON port is in standby state, the FPGA chip in the local OLT device controls the GPIO pin to open the local corresponding PON port to emit light, and the FPGA chip switches the local corresponding PON port to the main working mode; If there is light collection, the current PON port light emission and working state are kept unchanged, and both sides of the OLT use this working mechanism at the same time.

[0014] Further, the FPGA chip is configured to check whether the main / standby state of the corresponding PON protection group recorded in the local chip is different from the main / standby state after the switching request of the opposite OLT device is monitored, if the main / standby state is different, the FPGA chip changes the light emission state of the corresponding PON port to the state requested by the opposite OLT through the GPIO pin, so as to change the working state of the PON port, and re-record the main / standby state of the local PON protection group in the FPGA.

[0015] Further, for the case of active switching initiated by the command line configuration or the MIB configuration mode, the CPU in the local device issues a switching configuration request to the local FPGA chip, the FPGA chip adjusts the light emission and working state of the local PON port according to the state of the local PON protection group, and sends a switching request to the opposite OLT device.

[0016] The FPGA-based dual-homing PON protection heartbeat monitoring system provided by the application keeps and monitors the heartbeat and switching interaction between the dual-homing pairs through the FPGA chip, perceives the heartbeat state in time and accurately through fast parallel operation, and can initiate switching quickly after receiving the switching request without the intervention of the CPU, thereby increasing the timeliness and accuracy of heartbeat perception and PON switching, and improving the convergence speed and efficiency of the dual-homing PON protection function.

[0017] Further, in the scheme provided by the application, the heartbeat monitoring and switching interaction between the dual-homing pairs are completed by the FPGA hardware between the OLT devices, so that the heartbeat state change and switching interaction can be perceived quickly even if the OLT CPU is busy, thereby responding quickly, improving the convergence speed and service response speed of the PON protection group, and enhancing the security and stability of the network. BRIEF DESCRIPTION OF DRAWINGS

[0018] The application will be further described below in combination with the drawings and specific embodiments.

[0019] Figure 1 The physical topology diagram of the dual-homing PON protection group in the implementation of the application is shown in the figure; Figure 2 The FPGA logic diagram in the OLT in the example of the application is shown in the figure; Figure 3 Flow chart of the dual-homing PON protection method in the implementation of the present application; Figure 4 Flow chart of the heartbeat change processing of the FPGA chip in the implementation of the present application; Figure 5 Flow chart of the switching interaction processing of the FPGA chip in the implementation of the present application. DETAILED DESCRIPTION

[0020] In order to make the technical means, creative features, purposes and effects of the present application easy to understand, the present application is further described below in combination with specific diagrams.

[0021] In view of the problems and limitations of the dual-homing PON protection function, the present application provides a dual-homing PON protection heartbeat monitoring system scheme based on FPGA. The scheme realizes heartbeat and switching interaction monitoring between dual-homing OLT devices through FPGA chip hardware, effectively enhances the security and reliability of the optical network, and thus improves the stability and convergence speed of the PON protection group, facilitating the implementation of the dual-homing PON protection function.

[0022] Specifically, the dual-homing PON protection heartbeat monitoring system of the present application is configured with FPGA chips on two OLT devices constituting a dual-homing pair. The FPGA chips are set to be connected to the PON MAC chip, the switching chip and the CPU of the OLT devices, and are configured to perform internal heartbeat and switching monitoring, so as to form heartbeat monitoring and switching interaction monitoring and processing for the two OLT devices constituting the dual-homing pair.

[0023] The implementation process of the dual-homing PON protection system scheme based on FPGA provided by the present application is described below.

[0024] The dual-homing PON protection system scheme based on FPGA provided by the present application is specifically implemented on two OLT devices configured as a dual-homing pair.

[0025] Referring to Figure 1 , which is the physical topology diagram of the dual-homing PON protection group in the present example.

[0026] Based on the diagram, when the two OLT devices constitute a dual-homing pair, a dual-homing group of one OLT device and other OLT devices is created through the inter-OLT network.

[0027] In the present example, the OLT devices that need to constitute a dual-homing pair (such as OLT device A and OLT device B in the diagram) are respectively equipped with corresponding FPGA chips, and the OLT devices can communicate through the uplink port, and the devices are not affected by the actual distance. Meanwhile, the passive optical network terminal (ONU) of the lower link is connected to a PON MAC port of each of the dual-homing group OLT devices (such as OLT device A and OLT device B) through a 2:N optical splitter.

[0028] As a further illustration, in actual application, according to the demand, one OLT device can form multiple dual-homing pairs with other multiple OLT devices, and on each dual-homing pair, multiple dual-homing PON protection switching groups can be created, and a FPGA chip carried in each OLT device can monitor the heartbeat and switching interaction information of multiple dual-homing pairs in parallel.

[0029] On this basis, referring to Figure 2 The FPGA chip 10 carried in each OLT device is connected to the PON MAC chip 20, the switching chip 30 and the CPU 40 in the OLT device, and is configured to perform internal heartbeat and switching monitoring to form heartbeat monitoring and switching interaction monitoring and processing for the OLT devices forming the dual-homing pair.

[0030] Specifically, the FPGA chip 10 is connected to the CPU 40 of the local OLT device through a local bus, connected to the switching chip of the local OLT device through an Ethernet link, and connected to the PON MAC chip 20 of the local OLT device through a GPIO pin.

[0031] The PON MAC chip 20 is connected to the CPU 40 through a PCIE bus, is responsible for the normal work of the PON port and the ONU user interaction, and reports the relevant working state and optical link state change notification to the CPU 40 after the port master-slave working state of the PON protection group changes and the PON port discovers that the optical link port with the ONU is closed, and the CPU 40 completes the protection group other related management.

[0032] As an example, after the PON MAC chip 20 reports the ONU online state change notification to the CPU 40, the CPU 40 changes the local online state of the ONU, synchronizes the new adjusted online state of the ONU to the opposite OLT of the dual-homing group, reports the PON port master-slave working state change notification, adjusts the PON port master-slave working state and the ONU online state under the PON port, and synchronizes the PON port master-slave working state and the new ONU online state to the opposite OLT of the dual-homing pair, etc.

[0033] In cooperation therewith, the CPU 40 is configured to issue the dual-homing pair, PON protection group configuration, and PON protection group switching request to the FPGA chip 10 through the bus.

[0034] Further, the CPU 40 is also used to be responsible for the management of the PON protection group, including the PON port, the ONU terminal configuration synchronization, the state synchronization, the working state negotiation of the master and standby ports and the like.

[0035] As a further supplement, the CPU 40 can perform the configuration and state synchronization in real time, and can also perform the initialization synchronization after receiving the notification of the FPGA chip after the heartbeat of the dual-homing pair is established.

[0036] The switching chip 30 is arranged to communicate with the peer OLT of the dual-homing pair, specifically by establishing a corresponding physical communication link with the peer OLT, and then completing the communication with the peer OLT based on the physical communication link.

[0037] On this basis, the FPGA chip 10 will be arranged to be able to forward and receive the heartbeat and switching interaction messages through the switching chip 30, and to monitor the heartbeat state and switching interaction state between the dual-homing pair of OLT devices according to the received heartbeat and switching interaction messages. The FPGA chip 10 further notifies the CPU 40 of the change of the state of the dual-homing pair of OLT devices through the bus.

[0038] The FPGA chip 10 can control the switching state of the PON port light emitter of the PON MAC chip through the GPIO pin, and control the switching of the working state (i.e. the working mode) of the PON port of the PON MAC chip through the GPIO pin.

[0039] The FPGA chip 10 is further arranged to connect the Signal Detect pin of the PON port optical module through the GPIO pin, wherein the Signal Detect signal is arranged to prompt the PON MAC chip that there is a light receiving, and the high level is effective. When the ONU is normally online, there will be a high level signal at the beginning of each uplink burst time slot, and it will be reduced to a low level at the end. The FPGA simultaneously captures the signal, and when there is a continuous and stable level change in the GPIO pin, it indicates that the optical module has received a signal from the ONU, indicating that the PON port of the PON MAC chip has received light. In this way, the current PON port light receiving condition of the PON MAC chip is obtained.

[0040] Based on the FPGA-based dual-homing PON protection system formed by the above configuration scheme, when the dual-homing pair and the dual-homing PON protection group are created and actively initiated switching, the OLT device CPU 40 that has changed will issue a configuration to the FPGA chip.

[0041] Specifically, when the dual-homing pair and the dual-homing PON protection group are created on the OLT device, the configuration issued by the CPU 40 to the FPGA chip 10 includes the peer address, port number and key of the dual-homing pair, the PON port information corresponding to the PON protection group and the like.

[0042] After the completion of the configuration, the FPGA chip 10 will be configured to be able to automatically interact with the exchange chip 30 in the local OLT device to send heartbeats and switchover interaction messages; at the same time, when the exchange chip 30 captures the heartbeats and switchover messages in the dual-homing protocol from the Ethernet port connected to the dual-homing peer, it will be directly transmitted to the FPGA chip 10 configured in the local OLT device for processing.

[0043] Further, the FPGA chip 10 will monitor the heartbeat state changes between the OLT devices of the dual-homing pair according to the heartbeat messages transmitted by the exchange chip 30, and will simultaneously notify the CPU 40 in the local OLT device through the bus. The CPU 40 will perform synchronization management actions related to the PON protection group of the dual-homing pair according to the state and configuration of the local OLT device; at the same time, the FPGA chip will continue to monitor the dual-homing pair until the related configuration of the dual-homing pair is deleted. In the case of heartbeat disconnection, the FPGA chip will continue to maintain the listening state, so that when the physical link of the two OLT devices is restored or the peer is configured with the dual-homing pair, the communication and state monitoring of the dual-homing pair can be restored in time, thereby ensuring the rapid establishment or restoration of the protection group.

[0044] As a further illustration, when the CPU 40 receives the heartbeat state change information notified by the FPGA chip 10 through the bus, the CPU will record the heartbeat establishment or disconnection state of the dual-homing pair. When the heartbeat is established, the CPU will determine whether there is already a PON protection group configuration within the dual-homing pair. If there is, it will perform initial working state negotiation, as well as PON protection group configuration and state initialization synchronization, to prevent the PON protection group from being configured earlier than the link establishment, resulting in asynchronous protection group states.

[0045] Furthermore, after the FPGA chip 10 monitors the heartbeat disconnection between the OLT devices of the dual-homing pair according to the heartbeat messages transmitted by the exchange chip 30, the FPGA chips 10 in the two OLT devices will first check whether there is light reception in the protection group port within the dual-homing pair: if there is no light reception, it is determined that the peer PON port is in standby working state, and the FPGA chip in the local OLT device controls the GPIO pin to turn on the local corresponding PON port light emission, and the FPGA chip switches the local corresponding PON port to the main working mode; otherwise (i.e. there is light reception), the current PON port light emission and working state remain unchanged. Both sides of the OLT use this working mechanism to ensure that the PON protection group within the configured dual-homing pair can have only one end in normal main working state after the heartbeat disconnection, thereby protecting the normal service of users.

[0046] Meanwhile, the FPGA chip 10 is further configured to continue to monitor the heartbeat of the peer OLT device in the case of heartbeat disconnection until the configuration related to dual-homing is deleted, so that the communication and state monitoring of the dual-homing pair can be restored in time when the physical link of the two OLT devices is recovered or the peer is configured with dual-homing, thereby ensuring the rapid establishment or recovery of the protection group.

[0047] Further, after the FPGA chip 10 monitors the switchover request of the peer OLT device in the dual-homing pair according to the switchover interaction message transmitted by the switching chip 30, the FPGA chip 10 will check whether the master-slave state of the corresponding PON protection group recorded in the local chip is different from the master-slave state after the local switchover requested by the peer, if the master-slave state is different, the FPGA chip will change the light state of the corresponding PON port to the state requested by the peer OLT through the GPIO pin, so as to change the working state of the PON port and record the master-slave state of the local PON protection group in the FPGA chip again.

[0048] As a further supplement, when the local user initiates active switchover of the PON protection group by means of command line configuration, MIB configuration and the like, the CPU in the local device issues a switchover configuration request to the local FPGA chip, and the local FPGA chip will adjust the light and working state of the local PON port according to the state of the local PON protection group and issue a switchover request to the peer OLT device to request the peer to adjust the state of the PON protection group to a different working state from the local one, and the peer will adjust the state according to the master-slave working state to be adjusted in the request information.

[0049] The following is an example of the specific operation process of the FPGA-based dual-homing PON protection system scheme formed by the application.

[0050] When the FPGA-based dual-homing PON protection system scheme is deployed and operated, the FPGA chip capable of providing heartbeat function is configured in the OLT device involved, and the specific configuration scheme is as described above, which will not be repeated here.

[0051] On this basis, referring to Figure 3 On the OLT device that needs to create a dual-homing pair, the dual-homing pair and PON protection group configuration are configured according to the device information, and the configured information includes the communication address of the peer, the communication port of the peer, and the dual-homing pair key of the peer. Among them, the related configuration is issued by the CPU to the PON MAC address chip and the FPGA chip at the same time.

[0052] Further referring to Figure 4After the completion of the dual-homing pair and PON protection group configuration, the FPGA chip in the OLT device sends messages through the switching chip to attempt to establish a connection with the address configured by the dual-homing group, and to listen to the heartbeat and switching information of the opposite end of the dual-homing pair. When the heartbeat with the opposite end is established, if the FPGA chip monitors a change in the heartbeat state, the FPGA chip will notify the CPU in the OLT device through the local bus, and the CPU will initiate the PON protection group management action corresponding to the dual-homing group, such as synchronizing the ONU state, synchronizing the configuration, and PON protection group self-negotiation.

[0053] When the FPGA chip monitors the disconnection of the heartbeat of the dual-homing pair, the FPGA chip will perform light detection on the PON protection group related PON ports in the dual-homing pair within a reasonable time: If it is found that the PON port has light, it is determined that the ONU is in normal operation, and the current state is maintained locally; If it is found that the PON port has no light, it is determined that the opposite end is not in the main working state, and the local PON port is actively turned on to emit light, the working state of the PON port is adjusted to the main working state, and the normal service demand of the ONU terminal under the PON port is ensured.

[0054] Further referring to Figure 5 After the completion of the dual-homing pair and PON protection group configuration, the FPGA chip will process the switching interaction request, and when the received switching interaction request is from the local CPU, the working state switching adjustment mode of the local PON port is checked: If the local PON port is switched from the main state to the standby state, the light emission of the local PON port is directly turned off, and the working state of the PON port is adjusted to standby; If the local PON port is switched from the standby state to the main state, in order to prevent both ends from emitting light at the same time, a request to switch the opposite end to standby is first sent to the opposite end, and after the opposite end is switched, a reply of switching completion is sent, the local PON port is turned on to emit light, and the PON port is adjusted to the main working state.

[0055] When the received switching interaction request is from the opposite end, the FPGA chip checks whether the local state is consistent with the request: If the states are consistent, the local switching operation is not performed; If the states are inconsistent, the local light emission and the working state of the PON port are switched according to the request, and then the local switching result is replied to the opposite end.

[0056] In combination with Figure 3 As shown in the figure, when the configuration of the dual-homing pair is not deleted, for the dual-homing pair whose heartbeat has been disconnected, the FPGA chip will still continuously attempt to monitor the heartbeat, so that after the fault is recovered, the PON protection function can be restored.

[0057] Further, when the dual-homing PON protection function is no longer needed, the related configurations of the FPGA chip and the PON MAC chip are synchronously deleted, and the FPGA chip ends the heartbeat monitoring of the dual-homing pair.

[0058] It can be known from the above example scheme that, by loading the FPGA chip in the OLT, the FPGA chip is specially used for the OLT heartbeat and switching interaction monitoring between the dual-homing pairs, the FPGA chip can be parallel and low-delay, can timely and accurately monitor the heartbeat of multiple dual-homing pairs, quickly respond to the switching interaction, is not affected by the working condition of the CPU, can increase the security and stability of the network, improve the convergence speed and working efficiency of the dual-homing PON protection function, and also reduce the complexity of the implementation of the dual-homing PON protection function.

[0059] The basic principle, main features and advantages of the present application are shown and described above. It should be understood by those skilled in the art that the present application is not limited by the above examples, and the above examples and descriptions in the specification are only to illustrate the principle of the present application. Without departing from the spirit and scope of the present application, various changes and improvements can be made to the present application, and these changes and improvements all fall within the scope of the claimed present application. The scope of protection of the present application is defined by the appended claims and their equivalents.

Claims

1. A FPGA-based dual-homing PON protection heartbeat monitoring system, characterized in that, The monitoring system is configured with FPGA chips on two OLT devices constituting a dual-homing pair, the FPGA chips are set to connect the PON MAC chip, the switching chip and the CPU of the OLT device, and are configured to form heartbeat monitoring and switching interaction monitoring and processing for the OLT devices constituting the dual-homing pair.

2. The FPGA-based dual-homing PON protection heartbeat monitoring system according to claim 1, wherein, The FPGA chip is set to establish connection with the PON MAC chip in the local OLT device through the GPIO pin, and establish connection with the CPU of the local OLT device through the bus. 3.The FPGA-based dual-homing PON protection heartbeat monitoring system of claim 2, wherein, The FPGA chip is configured to be able to control the switching state of the PON port light emitter through the GPIO pin, control the switching of the PON port working mode through the GPIO pin, and confirm the PON port light receiving state through the GPIO pin.

4. The FPGA-based dual-homing PON protection heartbeat monitoring system according to claim 1, wherein, The switching chip is set to directly transmit the captured heartbeat and switching interaction messages in the dual-homing protocol to the FPGA chip for processing; the FPGA chip is configured to automatically send heartbeat and switching interaction messages with the switching chip in the local OLT device, and monitor the heartbeat state and switching interaction request between the dual-homing pair OLT devices accordingly.

5. The FPGA-based dual-homing PON protection heartbeat monitoring system according to claim 4, wherein, The FPGA chip is configured to monitor the change of the heartbeat state between the dual-homing pair OLT devices, and simultaneously notify the CPU in the local OLT device through the bus, and the CPU performs PON protection group synchronization management action related to the dual-homing pair according to the state and configuration of the local OLT device.

6. The FPGA-based dual-homing PON protection heartbeat monitoring system according to claim 5, wherein, The CPU receives the heartbeat state change information notified by the FPGA chip through the bus, and records the heartbeat link-up and link-down state of the dual-homing pair, and when the heartbeat is established, judges whether there is a PON protection group configuration within the dual-homing pair, if there is, performs initial working state negotiation, and simultaneously performs PON protection group configuration and state initialization synchronization.

7. The FPGA-based dual-homing PON protection heartbeat monitoring system according to claim 5, wherein, The FPGA chip is configured to check whether there is light receiving in the protection group port within the dual-homing pair to determine the working state of the ONU after monitoring that the heartbeat between the two OLT devices of the dual-homing pair is disconnected: If there is no light receiving, it is determined that the opposite PON port is in standby working state, the FPGA chip in the local OLT device controls the GPIO pin to turn on the local corresponding PON port light, and the FPGA chip switches the local corresponding PON port to the main working mode; If there is light receiving, the current PON port light and working state remain unchanged, and both sides of the OLT simultaneously adopt this working mechanism.

8. The FPGA-based dual-homing PON protection heartbeat monitoring system according to claim 4, wherein, After the FPGA chip receives the PON protection group switching request of the opposite OLT device in the dual-homing pair, the FPGA chip checks whether the master-slave state of the corresponding PON protection group recorded in the local chip is different from the master-slave state after the local switching requested by the opposite OLT, if the master-slave state is different, the FPGA chip changes the light state of the corresponding PON port to the state requested by the opposite OLT through the GPIO pin, thereby changing the working state of the PON port, and re-recording the master-slave state of the PON protection group in the FPGA.

9. The FPGA-based dual-homing PON protection heartbeat monitoring system according to claim 4, wherein, The monitoring system sends a switching configuration request from the CPU in the local device to the local FPGA chip, and the FPGA chip adjusts the light emission and working state of the local PON port according to the state of the local PON protection group, and sends a switching request to the opposite OLT device in the case of active switching initiated by the command line configuration or the MIB configuration mode.

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