Circuit board manufacturing method and circuit board

Abstract

The invention discloses a circuit board manufacturing method and a circuit board, and the method comprises the following steps: taking a core board of which the surface layer is provided with an inner pattern circuit layer; mounting a chip: processing an embedding groove in a preset position of the core plate, and mounting the chip in the embedding groove; laminating and pressing: laminating and fixing a laminate on the surface of the core plate so as to drive the chip to be hidden in the laminate; conducting treatment: a pattern circuit and a communicating hole are arranged on the surface of the laminate, the communicating hole and the chip are arranged correspondingly, and the hole wall of the communicating hole can be coated with copper and drive the pattern circuit to be connected with the chip so as to form a multilayer board; the thickness of the copper block is matched with that of the multi-layer board; the copper block is installed, and the copper block is embedded into the multi-layer board; and surface layer circuit processing: processing an outer layer pattern circuit layer on the surface of the multi-layer board. High-efficiency circuit connection can be realized, a signal transmission path is shortened, delay and reflection loss are reduced, a copper block crimping problem is solved, and quality and efficiency are improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of circuit board manufacturing, in particular to a circuit board manufacturing method and a circuit board manufactured by using the circuit board manufacturing method. BACKGROUND

[0002] With the rapid development of emerging industries such as 5G communication, artificial intelligence, Internet of Things and new energy vehicles, electronic devices are evolving towards high performance and high integration, and the functional requirements of printed circuit boards as the core carrier are significantly increasing. Modern printed circuit boards not only need to carry a large number of high-density electronic components, but also need to meet complex requirements such as high-frequency signal transmission, high-power device heat dissipation, multi-circuit function integration, etc. Traditional printed circuit board manufacturing technology gradually fails to meet the needs of such high-end application scenarios.

[0003] In the prior art, the press-fit copper block technology is one of the main ways to realize the heat dissipation function of the printed circuit board. By press-fitting copper blocks such as phosphor bronze and beryllium copper into the printed circuit board, the high thermal conductivity of copper is used to quickly conduct heat to the outside of the printed circuit board, avoiding performance degradation or damage due to overheating.

[0004] However, the traditional press-fit copper block technology mainly focuses on heat dissipation, and lacks targeted optimization of core indicators such as circuit connection efficiency and signal transmission performance. For example, it is not possible to shorten the signal transmission path between the chip and the surrounding circuit, and it is difficult to reduce the transmission delay and reflection loss of high-frequency signals. In some related technologies, when press-fitting the copper block into the metallized hole of the printed circuit board, the copper layer on the hole wall is prone to cracking, peeling and other damage due to uneven thickness, fluctuation of electroplating quality or stress concentration during press-fitting, which in turn causes poor contact between the copper block and the printed circuit board, such as increased connection resistance, loose press-fitting, etc., directly affecting the electrical performance and long-term reliability of the product. In some other related technologies, in order to realize functions other than heat dissipation, such as signal optimization, multi-circuit interconnection, etc., the traditional scheme needs to add a heat dissipation layer, a signal transmission layer or a special connection structure, resulting in an increase in the overall thickness of the PCB and the occupation of space, and a significant increase in manufacturing cost. SUMMARY

[0005] The present application aims to at least solve one of the technical problems existing in the prior art. To this end, the present application proposes a circuit board manufacturing method, which can realize efficient circuit connection, shorten the signal transmission path, reduce the delay and reflection loss, and solve the problem of copper block press-fitting, thereby improving the quality and efficiency.

[0006] The present application also proposes a circuit board manufactured by using the above-mentioned circuit board manufacturing method.

[0007] The circuit board manufacturing method according to the present application comprises the following steps: Taking a core plate with an inner layer pattern circuit layer on the surface layer; Chip mounting: after the core plate is taken, a buried groove is processed at a preset position of the core plate, and a chip is mounted in the buried groove; Lamination: after the chip is mounted, a surface of the core plate is laminated with a layer plate, so as to drive the chip to be hidden in the layer plate; Conducting processing: before or after the lamination, a pattern line and a communication hole corresponding to the chip are arranged on a surface of the layer plate, a hole wall of the communication hole is capable of being covered with copper, and the pattern line is driven to be connected with the chip, so as to be combined to form a multi-layer plate; Copper block taking: a copper block with a thickness matching a thickness of the multi-layer plate is taken; Copper block mounting: after the conducting processing and the copper block taking, the copper block is embedded and mounted in the multi-layer plate; Surface line processing: after the copper block is mounted, an outer layer pattern line layer is processed on a surface of the multi-layer plate.

[0008] According to the circuit board manufacturing method, at least the following beneficial effects are achieved: the chip is embedded in the circuit board to form a three-dimensional integrated structure by processing the buried groove at the preset position of the core plate and mounting the chip, the signal transmission path of the chip and the surrounding circuit is significantly shortened, the high-frequency signal transmission delay and reflection loss are reduced, and the circuit connection efficiency is improved; and the chip is stably hidden in the layer plate by lamination, and the pattern line and the communication hole in the subsequent conducting processing are designed, so that the chip is protected from external damage, and a multi-layer circuit structure is constructed to enhance the product functionality; further, the outer layer pattern line layer is processed on the surface of the multi-layer plate after the copper block with the matching thickness is pressed to the multi-layer plate, the connection strength of the copper block and the multi-layer plate is enhanced, the low-impedance and high-reliability connection of the circuit board is ensured, and finally the multiple technical effects of heat dissipation, signal optimization, multi-circuit integration and high-reliability pressing are achieved, and the comprehensive performance and manufacturing quality of the circuit board are significantly improved.

[0009] According to the circuit board manufacturing method, the layer plate in the lamination is a multi-layer circuit structure, and an interlayer pattern line layer is arranged in the layer plate.

[0010] According to the circuit board manufacturing method, the layer plate in the lamination is a single-layer circuit structure, and the conducting processing is performed after the lamination; the method further includes the following steps: multi-layer lamination: before the copper block is mounted, the lamination and the conducting processing are cyclically performed for several times, and in each conducting processing before the last time, the pattern line is capable of being electroplated with copper to form the interlayer pattern line layer.

[0011] According to the circuit board manufacturing method, the shortest distance between the copper block and the chip is A, and 0.1mm≤A≤1mm is satisfied.

[0012] According to the circuit board manufacturing method of some embodiments of the present application, the multilayer board is provided with a through-arranged buried copper slot, and the copper block is matched with the shape of the buried copper slot, and in the process of installing the copper block, the copper block is pressed into the buried copper slot.

[0013] According to the circuit board manufacturing method of some embodiments of the present application, after the through processing, the buried copper slot is processed on the multilayer board, and the slot wall of the buried copper slot can be covered with copper.

[0014] According to the circuit board manufacturing method of some embodiments of the present application, before the lamination, the core board is processed with a first buried copper section, and the layer board is processed with a second buried copper section, and in the lamination, the first buried copper section and the second buried copper section are overlapped, and the first buried copper section and the second buried copper section are combined to form the buried copper slot.

[0015] According to the circuit board manufacturing method of some embodiments of the present application, the method further comprises the following step: trimming processing, before the installation of the copper block, the periphery of the buried copper slot is trimmed.

[0016] According to the circuit board manufacturing method of some embodiments of the present application, the method further comprises the following step: chamfering processing, before the installation of the copper block, the upper periphery and the lower periphery of the copper block are chamfered in the thickness direction of the multilayer board.

[0017] The circuit board according to the present application is manufactured by using the circuit board manufacturing method according to the present application.

[0018] The circuit board according to the present application has at least the following beneficial effects: the circuit board can realize efficient connection of circuits, shorten the signal transmission path, reduce the delay and reflection loss, solve the problem of copper block crimping, improve the quality and efficiency, and the comprehensive performance is significantly better than that of the traditional printed circuit board, and can meet the strict requirements of emerging industries such as 5G communication, artificial intelligence, and new energy vehicles for high-performance and high-integrated electronic carriers.

[0019] Additional aspects and advantages of the present application will be made apparent from the following description, which, taken together with the accompanying drawings, will give a better understanding of the present application. BRIEF DESCRIPTION OF DRAWINGS

[0020] The above and / or additional aspects and advantages of the present application will become apparent and more readily appreciated from the following description, taken in conjunction with the accompanying drawings, in which: Figure 1 It is a flowchart of the circuit board manufacturing method of the embodiment of the present application; Figure 2 It is a cross-sectional view of the circuit board manufacturing method of the embodiment of the present application in which the core board is processed with a buried slot; Figure 3A cross-sectional view of the circuit board manufacturing method of the embodiment of the present application after lamination; Figure 4 A cross-sectional view of the circuit board manufacturing method of the embodiment of the present application after via processing; Figure 5 A cross-sectional view of the circuit board manufacturing method of the embodiment of the present application after multi-layer lamination; Figure 6 A cross-sectional view of the circuit board manufacturing method of the embodiment of the present application after setting a buried copper slot on the multi-layer board; Figure 7 A cross-sectional view of the circuit board manufacturing method of the embodiment of the present application after copper plating in the buried copper slot; Figure 8 A cross-sectional view of the circuit board manufacturing method of the embodiment of the present application after mounting a copper block; Figure 9 A cross-sectional view of the circuit board manufactured by using the circuit board manufacturing method of the embodiment of the present application; Figure 10 A flow chart of the circuit board manufacturing method of another embodiment of the present application.

[0021] Explanation of reference numerals: Core board 100; buried slot 101; first buried copper section 102; inner layer pattern circuit layer 110; Chip 200; Layer board 300; communication hole 301; second buried copper section 302; interlayer pattern circuit layer 310; Multi-layer board 400; buried copper slot 401; outer layer pattern circuit layer 410; Copper block 500. DETAILED DESCRIPTION

[0022] The embodiments of the present application are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals represent the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the drawings are exemplary, only for explaining the present application, and cannot be understood as a limitation of the present application.

[0023] In the description of the present application, it should be understood that the orientation description, such as the orientation or position relationship indicated by up, down, front, back, left, right, etc. is based on the orientation or position relationship shown in the drawings, only for the convenience of describing the present application and simplifying the description, and does not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation of the present application.

[0024] In the description of the present application, the meaning of one or more is one or more, the meaning of multiple is two or more, greater than, less than, more than, etc. are understood as not including the number, above, below, within, etc. are understood as including the number. If the first, second is described, it is only used for the purpose of distinguishing technical features, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features or the sequence of indicated technical features.

[0025] In the description of the present application, unless otherwise explicitly limited, the words such as setting, installing, connecting, etc. should be understood broadly, and those skilled in the art can reasonably determine the specific meaning of the above words in the present application in combination with the specific content of the technical solution.

[0026] In the description of the present application, the description of the terms "one embodiment", "some embodiments", "illustrative embodiment", "example", "specific example", or "some examples" means that the specific features, structures, materials or characteristics described in combination with the embodiment or example are included in at least one embodiment or example of the present application. In the present specification, the illustrative description of the above terms does not necessarily refer to the same embodiment or example. Moreover, the described specific features, structures, materials or characteristics can be combined in any one or more embodiments or examples in a suitable manner.

[0027] With the rapid development of emerging industries such as 5G communication, artificial intelligence, Internet of Things and new energy vehicles, electronic devices are evolving towards high performance and high integration, and the functional requirements of printed circuit boards as core carriers are significantly improved. Modern printed circuit boards not only need to carry a large number of high-density electronic components, but also need to meet complex requirements such as high-frequency signal transmission, high-power device heat dissipation, multi-circuit function integration, etc. Traditional printed circuit board manufacturing technology gradually cannot adapt to the needs of such high-end application scenarios.

[0028] In the prior art, the crimping copper block technology is one of the main implementation methods of the heat dissipation function of the printed circuit board. By crimping copper blocks such as phosphor bronze, beryllium copper, etc. to the printed circuit board, the high thermal conductivity of copper is used to quickly conduct heat to the outside of the printed circuit board, avoiding performance degradation or damage due to overheating.

[0029] However, the traditional crimping copper block technology mainly focuses on heat dissipation, and lacks targeted optimization of core indicators such as circuit connection efficiency and signal transmission performance. For example, it is unable to shorten the signal transmission path between the chip and the peripheral circuit, and it is difficult to reduce the transmission delay and reflection loss of high-frequency signals. In some related technologies, when the copper block is crimped into the metalized hole of the printed circuit board, the copper layer on the hole wall is prone to cracking, peeling and other damage due to uneven thickness of the copper layer on the hole wall, fluctuation of electroplating quality or stress concentration of crimping, thereby causing poor contact between the copper block and the printed circuit board, such as increased connection resistance, loose crimping and other problems, which directly affects the electrical performance and long-term reliability of the product. In some other related technologies, in order to realize other functions such as signal optimization and multi-circuit interconnection in addition to heat dissipation, the traditional scheme needs to additionally stack a heat dissipation layer, a signal transmission layer or a special connection structure, resulting in an increase in the overall thickness of the PCB and an expansion of the occupied space, and a significant increase in manufacturing cost.

[0030] To this end, as shown in Figures 1 to 9 The circuit board manufacturing method provided by the present application comprises the following steps: S100, taking a core plate: taking a core plate 100 having an inner layer pattern circuit layer 110 on the surface; S200, installing a chip: after taking the core plate, a buried groove 101 is processed at a predetermined position of the core plate 100, and a chip 200 is installed in the buried groove 101; S300, laminating and pressing: after installing the chip, a layer plate 300 is laminated and fixed on the surface of the core plate 100 to hide the chip 200 inside the layer plate 300; S400, through processing: before or after laminating and pressing, a pattern circuit and a through hole 301 are arranged on the surface of the layer plate 300, the through hole 301 is arranged corresponding to the chip 200, the hole wall of the through hole 301 can be covered with copper and the pattern circuit is connected with the chip 200 to form a multi-layer plate 400; S500, taking a copper block: taking a copper block 500 with a thickness matching that of the multi-layer plate 400; S600, installing a copper block: after the through processing and taking the copper block, the copper block 500 is embedded and installed in the multi-layer plate 400; S700, surface circuit processing: after installing the copper block, an outer layer pattern circuit layer 410 is processed on the surface of the multi-layer plate 400.

[0031] It should be noted that by machining the embedded groove 101 at the preset position of the core plate 100 and loading the chip 200, the chip 200 is embedded in the interior of the circuit board to form a three-dimensional integrated structure, which significantly shortens the signal transmission path of the chip 200 and the surrounding circuit, reduces high-frequency signal transmission delay and reflection loss, and improves circuit connection efficiency; and by laminating and pressing the chip 200 to be stably hidden in the interior of the layer plate 300 and combining the design of the pattern line and the communication hole 301 in the subsequent conduction process, the chip 200 is protected from external damage, and a multi-layer circuit structure is built to enhance product functionality; further, the copper block 500 with a matching thickness is pressed to the multi-layer plate 400, and then the outer layer pattern line layer 410 is machined on the surface of the multi-layer plate 400, which enhances the connection strength of the copper block 500 and the multi-layer plate 400, ensures low impedance and high reliable connection of the circuit board, and finally synchronously achieves the multiple technical effects of heat dissipation, signal optimization, multi-circuit integration and high reliable pressing, which significantly improves the comprehensive performance and manufacturing quality of the circuit board.

[0032] Referring to Figure 5 In some embodiments of the present application, the layer plate 300 in the laminated pressing is a multi-layer circuit structure, and the interlayer pattern line layer 310 is arranged in the layer plate 300. By laminating and pressing the multi-layer circuit structure of the layer plate 300 and the core plate 100, the interlayer pattern line layer 310 arranged in the layer plate 300 can be directly used to realize signal interconnection and functional integration among multiple layers. In this regard, compared with the layer plate 300 with a single-layer circuit structure, the multi-layer circuit structure can simultaneously build complex vertical interconnection channels during the pressing process, reduce subsequent additional wiring steps, improve the functional density of the circuit board, and at the same time, the interlayer pattern line layer 310 and the chip 200 are directly connected through the communication hole 301 in the subsequent conduction process, which further shortens the signal transmission path, reduces the transmission delay and reflection loss of high-frequency signals, and the design of the multi-layer circuit structure enhances the overall mechanical strength and heat dissipation uniformity of the circuit board, providing a more stable three-dimensional integrated environment for the chip 200. In some applications, a semi-finished or finished multi-layer circuit board can be directly used as the layer plate 300, and a multi-layer circuit board containing the chip 200 can be obtained by single pressing of the layer plate 300 and the core plate 100. Further, the frequency of pressing the core plate 100 is maximized, which can improve production efficiency and reduce damage to the chip 200 caused by multiple pressing.

[0033] Referring to Figure 4In some embodiments of the present application, the laminated board 300 in the lamination process is a single-layer circuit structure, and the through-hole processing is performed after lamination. It can be understood that, when the laminated board 300 adopts a single-layer circuit structure, the through-hole processing is performed after the lamination of the core board 100 and the single-layer circuit board 300, so that the chip 200 is stably stored in the laminated board 300, and the correspondence between the through-hole 301 and the chip 200 can be accurately controlled to ensure that the through-hole 301 directly penetrates the chip 200 to achieve efficient electrical connection. It can be understood that the laminated board 300 is a common pp prepreg in the multi-layer board 400, and the through-hole 301 is processed on the pp prepreg after lamination by laser drilling. The surface of the pp prepreg is processed into a patterned circuit by common steps such as exposure and development, and then copper is plated on the hole wall of the through-hole 301 by copper plating, and copper is plated on the patterned circuit to form a patterned circuit layer.

[0034] In addition, in order to construct a more complex multi-layer board 400 circuit structure, a multi-layer lamination step is further included, that is, before the copper block is installed, the lamination and through-hole processing are performed several times in a cycle. In the through-hole processing before the last time, the patterned circuit is electroplated with copper to form an interlayer patterned circuit layer 310. Further, a new circuit layer can be gradually added in each lamination, so as to flexibly construct a multi-layer circuit structure. This scheme not only avoids the defect of single-layer circuit structure that the function is single, but also solves the problems of poor copper layer uniformity of the hole wall and electroplating quality fluctuation caused by too many layers being added at one time in the traditional multi-layer lamination, thereby significantly improving the connection reliability of the copper block 500 and the circuit board and reducing the manufacturing process complexity.

[0035] Referring to Figure 6 In some embodiments of the present application, the multi-layer board 400 is provided with a through-arranged buried copper groove 401, and the shape of the copper block 500 matches the shape of the buried copper groove 401. In the installation of the copper block, the copper block 500 is pressed into the buried copper groove 401. The precise positioning of the buried copper groove 401 and the embedded structure of the copper block 500 can significantly enhance the bonding strength of the copper block 500 and the multi-layer board 400, and avoid the problem of hole wall copper layer cracking or peeling caused by stress concentration in the traditional crimping technology. At the same time, the shape matching design makes the copper block 500 and the buried copper groove 401 tightly crimped, reduces the additional fixing steps, improves the production efficiency, and ensures that the copper block 500 and the patterned circuit realize stable electrical connection through the through-hole 301, thereby comprehensively improving the mechanical stability and electrical reliability of the circuit board.

[0036] In some applications, referring to Figure 7After the on processing, the buried copper groove 401 is processed on the multi-layer board 400, and the groove wall of the buried copper groove 401 can be covered with copper. That is, the buried copper groove 401 is processed on the multi-layer board 400 after the completion of the entire board 300 pressing, connection hole copper filling and interlayer pattern circuit layer 310 processing, so as to avoid the influence of the size of the buried copper groove 401 in the pressing process. It should be noted that after the groove wall of the buried copper groove 401 is covered with a copper layer, the groove wall of the buried copper groove 401 is covered with copper by copper plating processing. On the one hand, the mechanical strength of the groove wall is enhanced, and the copper block 500 is firmly pressed in the buried copper groove 401. On the other hand, the conductivity of the groove wall is enhanced, and the electrical connection consistency of the copper block 500, the interlayer pattern circuit layer 310 and the outer layer pattern circuit layer 410 is ensured. In this regard, the copper layer on the groove wall of the buried copper groove 401 provides a low-impedance conductive path for the copper block 500, reduces signal transmission delay and reflection loss, and at the same time, the subsequent processing steps of the buried copper groove 401 can flexibly adjust the size and position of the groove body according to actual needs, adapt to copper blocks 500 of different specifications, and enhance the flexibility of circuit board design. Further, referring again to Figure 10 In some embodiments of the present application, the following steps are further included: S520, trimming process: before installing the copper block, the periphery of the buried copper groove 401 is trimmed. For example, after the buried copper groove 401 is processed, the periphery of the buried copper groove 401 is trimmed to remove burrs, ensure the size accuracy and surface finish of the groove opening of the buried copper groove 401, provide a smooth copper covering plane for subsequent copper covering of the groove wall of the buried copper groove 401, and further provide a smooth entry interface for subsequent embedding of the copper block 500, avoiding scratches, stress concentration or pressing deviation of the copper block 500 in the pressing process due to sharp or rough edges.

[0037] In other applications, referring again to Figure 6 and Figure 7In the lamination process, the first buried copper section 102 and the second buried copper section 302 are overlapped, and the first buried copper section 102 and the second buried copper section 302 are combined to form the buried copper groove 401. In this way, the buried copper groove 401 is constructed based on the original structure of the core plate 100 and the layer plate 300, without the need for additional slotting process, simplifying the manufacturing process, reducing the scrap caused by processing failure of the finished product, reducing the production cost, and more importantly, reducing the impact of subsequent processing steps on the integrity of the pattern circuit layer, avoiding the impact of slotting processing on the quality of the multilayer plate 400. In addition, due to the cooperation of the internal pattern circuit layer 110 of the core plate 100 and the interlayer pattern circuit layer 310 of the layer plate 300, the combination of the first buried copper section 102 and the second buried copper section 302 has a positioning function, and the embedded position of the copper block 500 is accurately aligned with the internal circuit, and the optimal electrical connection path of the copper block 500 and the chip 200 is designed. It can be understood that after lamination, the buried copper groove 401 will be plated layer by layer during the conduction process after lamination. Similarly, referring to Figure 10 In some embodiments of the present application, the following steps are further included: S520, trimming process: before installing the copper block, the periphery of the buried copper groove 401 is trimmed. After plating copper layer by layer, uneven areas or plating defects are prone to occur, and the thickness of each copper layer is difficult to be completely consistent. Therefore, the periphery of the buried copper groove 401 is trimmed to optimize the continuity of the copper layer on the groove wall, ensure the consistency of the copper layer thickness on the groove wall of the buried copper groove 401 after the combination of the first buried copper section 102 and the second buried copper section 302, improve the dimensional accuracy and surface finish of the buried copper groove 401 after copper plating, so that the copper block 500 is more tightly pressed into the buried copper groove 401, enhances the electrical connection reliability of the copper block 500 and the groove wall copper layer, reduces the contact resistance, improves the electrical performance and long-term stability of the circuit board, reduces the scrap rate caused by assembly errors, and improves the manufacturing efficiency.

[0038] Referring again to Figure 8In some embodiments of the present application, the shortest distance between the copper block 500 and the chip 200 is A, which satisfies: 0.1mm≤A≤1mm. By precisely controlling the distance between the two, the copper block 500 can be prevented from being too close to cause mechanical extrusion or thermal stress concentration of the chip 200, such as the possibility of causing packaging damage or local overheating of the chip 200 when the distance is too small. At the same time, the copper block 500 can also be prevented from being too far away to cause signal transmission path redundancy, such as increasing high-frequency signal delay and reflection loss when the distance is too large. This distance range ensures that the copper block 500 effectively supports the heat dissipation of the chip 200, while ensuring that the electrical connection path between the through hole 301 and the chip 200 is the shortest, thereby optimizing the signal transmission efficiency, balancing the safety and electrical performance of the chip 200, and improving the overall reliability and functionality of the circuit board.

[0039] Referring again to Figures 8 to 10 In some embodiments of the present application, the following steps are included: S510, chamfering: before installing the copper block, chamfers are machined on the upper and lower perimeters of the copper block 500 in the thickness direction of the multilayer board 400. The chamfer structure reduces the sharp edges of the copper block 500, plays a guiding role when the copper block 500 is pressed into the buried copper groove 401, reduces the pressure resistance, and avoids cracking of the copper layer on the groove wall of the buried copper groove 401 or delamination of the circuit board due to stress concentration. Further, referring to Figure 9 After the copper block 500 is pressed into the buried copper groove 401, resin is applied to the chamfered portion of the copper block 500 on the board surface, filling the recessed portion of the chamfer of the copper block 500 with resin. After filling, the surface is plated with copper, and after the copper plating is completed, the surface is smooth and the copper block 500 is in full communication with the inner and outer layers of the circuit board. Moreover, the interface of the copper block 500 of the finished circuit board is smooth, meeting the normal requirements for SMT pad production.

[0040] Referring again to Figure 9 and Figure 10 The circuit board according to the embodiments of the present application is made using the circuit board manufacturing method according to the embodiments of the present application.

[0041] The circuit board according to the embodiments of the present application, by using the circuit board manufacturing method according to the embodiments of the present application, can achieve efficient connection of circuits, shorten the signal transmission path, reduce delay and reflection loss, and solve the problem of copper block 500 pressure connection, improve quality and efficiency, and the comprehensive performance is significantly better than that of traditional printed circuit boards, which can meet the stringent demands of emerging industries such as 5G communication, artificial intelligence, and new energy vehicles for high-performance and high-integration electronic carriers.

[0042] Other configurations and operations of the circuit board according to the embodiments of the present application are known to those skilled in the art and will not be described in detail here.

[0043] The embodiments of the present application are described in detail above with reference to the drawings, but the present application is not limited to the above-described embodiments, and various changes can be made within the knowledge of those skilled in the art without departing from the spirit of the present application.

Claims

1. A method for manufacturing a circuit board, characterized in that, Includes the following steps: Core board extraction: Extract the core board with an inner patterned circuit layer on the surface; Chip installation: After the core board is extracted, an embedding groove is machined at a preset position on the core board and the chip is installed in the embedding groove; Lamination and bonding: After the chip is installed, a layer plate is laminated and fixed to the surface of the core board to drive the chip to be hidden inside the layer plate; Conductive processing: Before or after lamination, patterned circuits and vias are provided on the surface of the layer board. The vias are arranged corresponding to the chips. The walls of the vias can be copper-clad and drive the patterned circuits to connect with the chips to form a multilayer board. Take a copper block: Take a copper block with a thickness matching that of the multilayer board. Installing copper blocks: After the conduction process and copper block removal, the copper blocks are embedded and installed in the multilayer board; Surface circuit processing: After installing the copper block, an outer layer of patterned circuitry is processed on the surface of the multilayer board.

2. The circuit board manufacturing method according to claim 1, characterized in that: The laminated plate in the lamination process has a multi-layer circuit structure, and the laminated plate contains interlayer graphic circuit layers.

3. The circuit board manufacturing method according to claim 1, characterized in that, The laminated plate in the lamination process is a single-layer circuit structure, and a conductivity treatment is performed after lamination. It also includes the following steps: Multilayer lamination: Before installing the copper block, the lamination and conduction processes are performed in several cycles. In each conduction process before the final one, the patterned circuit can be electroplated with copper to form an interlayer patterned circuit layer.

4. The circuit board manufacturing method according to claim 1, characterized in that: The shortest distance between the copper block and the chip is A, which satisfies: 0.1mm≤A≤1mm.

5. The circuit board manufacturing method according to claim 1, characterized in that: The multilayer board is provided with a through-type copper embedding groove, and the shape of the copper block matches the shape of the copper embedding groove. During the installation of the copper block, the copper block is pressed into the copper embedding groove.

6. The circuit board manufacturing method according to claim 5, characterized in that: After the conduction process, the copper embedding groove is machined on the multilayer board, and the groove wall can be coated with copper.

7. The circuit board manufacturing method according to claim 5, characterized in that: Before lamination, the core board is processed with a first embedded copper section, and the layer board is processed with a second embedded copper section. During lamination, the first embedded copper section and the second embedded copper section overlap in position, and the first embedded copper section and the second embedded copper section combine to form the embedded copper groove.

8. The circuit board manufacturing method according to claim 6 or 7, characterized in that, It also includes the following steps: Trimming: Before installing the copper block, the periphery of the copper embedding groove is trimmed.

9. The circuit board manufacturing method according to claim 1, characterized in that, It also includes the following steps: Chamfering: Before installing the copper block, chamfers are machined on both the upper and lower edges of the copper block in the thickness direction of the multilayer board.

10. A circuit board, characterized in that: It is manufactured using the circuit board manufacturing method as described in any one of claims 1 to 9.

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