Modular stacked substrate and manufacturing method thereof

Abstract

The invention relates to the field of packaging substrates, in particular to a modular stacked substrate and a manufacturing method thereof. Comprising a first sub-packaging substrate and a second sub-packaging substrate; the first sub-packaging substrate and the second sub-packaging substrate are connected through a solder ball, and filling glue is arranged between the first sub-packaging substrate and the second sub-packaging substrate; the first sub-packaging substrate comprises a glass core plate, a circuit layer is arranged between the glass core plate and the surface of the first sub-packaging substrate, and the circuit layer is connected through a first metal column; the first sub-packaging substrate comprises a second metal column, the second metal column penetrates through the glass core plate to be connected with the circuit layer, and printing ink is injected into the second metal column. The yield of large-size substrates can be remarkably improved, and meanwhile the manufacturing cost is reduced. The shrinkage phenomenon caused by the state change after the material is pressed, heated and cooled in the pressing process is avoided, and the overall warping is avoided. The method can be applied to packaging of 2.5 D chips, and the technological level of large-size chips is greatly improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of packaging substrates, in particular to a modular stacked substrate and a manufacturing method thereof. BACKGROUND

[0002] The current and future period will be an important strategic opportunity period and a critical period for the development of integrated circuit and chip technology in China, With the miniaturization of semiconductor processes and the widespread application of artificial intelligence (AI) technology, large-size chips have higher requirements for packaging materials, processes, and supply chains. Among them, manufacturing process complexity, size precision and warpage control, and manufacturing yield and cost control are three key issues that restrict the development of large-size chips. As the number of layers of the packaging substrate increases, when each layer is manufactured with laser, electroplating, circuit, etc. process, some undesirable phenomena will inevitably occur, resulting in yield loss, such as short circuit, open circuit, misalignment, foreign matter, and leakage. With the increase in the number of layers, the failure rate of each layer of circuit accumulates, resulting in a decline in overall yield, and packaging substrates that have already appeared undesirable phenomena still continue to be manufactured with the increase in layers, resulting in waste. SUMMARY

[0003] The purpose of the present application is to solve the above-mentioned related problems, and a modular stacked substrate and a manufacturing method thereof are designed. In order to achieve the above-mentioned purpose, the present application provides the following scheme: A modular stacked substrate, comprising a first sub-packaging substrate and a second sub-packaging substrate; the first sub-packaging substrate and the second sub-packaging substrate are connected by solder balls, and the first sub-packaging substrate and the second sub-packaging substrate contain filling glue therebetween; The first sub-packaging substrate contains a glass core plate, and a circuit layer is arranged between the glass core plate and the surface of the first sub-packaging substrate, and the circuit layer is connected by a first metal column; The first sub-packaging substrate contains a second metal column, the second metal column connects the circuit layer by penetrating the glass core plate, and the second metal column is filled with ink; The surface of the first sub-packaging substrate is provided with a solder mask layer; The second sub-packaging substrate is provided with a circuit layer, the circuit layer is connected by a first metal column, and the surface of the second sub-packaging substrate is provided with a solder mask layer.

[0004] As a further improvement of the technical solution, the third sub-packaging substrate is connected to the first sub-packaging substrate by solder balls, blind hole electroplating, copper columns or through connection, and the first sub-packaging substrate and the third sub-packaging substrate contain filling glue therebetween; The first sub-packaging substrate and the second sub-packaging substrate can also be connected by blind hole electroplating, copper columns or through connection.

[0005] As a further improvement of the technical solution, the third sub-packaging substrate and the second sub-packaging substrate are located on the same side of the first sub-packaging substrate. The line width of the line layer of the second sub-packaging substrate is greater than the line width of the first sub-packaging substrate; and the line distance of the line layer of the second sub-packaging substrate is greater than the line distance of the first sub-packaging substrate. The line width of the line layer of the third sub-packaging substrate is greater than the line width of the first sub-packaging substrate; and the line distance of the line layer of the third sub-packaging substrate is greater than the line distance of the first sub-packaging substrate.

[0006] As a further improvement of the technical solution, the first metal column is connected with the solder ball, and the second metal column is connected with the solder ball.

[0007] A manufacturing method of a modular stacked substrate, comprising the following steps: S1. manufacturing a first sub-packaging substrate; S2. manufacturing a second sub-packaging substrate; S3. arranging a solder ball on the surface of the first sub-packaging substrate; S4. connecting the second sub-packaging substrate with the first sub-packaging substrate through the solder ball; S5. injecting glue between the first sub-packaging substrate and the second sub-packaging substrate.

[0008] As a further improvement of the technical solution, the method further comprises manufacturing a third sub-packaging substrate; connecting the third sub-packaging substrate with the first sub-packaging substrate through the solder ball; and injecting glue between the first sub-packaging substrate and the third sub-packaging substrate.

[0009] As a further improvement of the technical solution, the manufacturing of the first sub-packaging substrate comprises the following steps: S11. opening a first through hole on a glass core plate; S12. pressing a dielectric on both sides of the glass core plate, and the dielectric fills the first through hole; S13. pressing a metal layer on both sides of the glass core plate; S14. processing a second through hole in the first through hole; S15. arranging a metal layer on the inner wall of the second through hole; S16. injecting ink in the second through hole; S17. polishing the surface of the glass core plate to remove the excess ink; S18. arranging a line layer and a first metal column on both sides of the glass core plate, and the first metal column is connected with the line layer; S19. arranging a solder mask layer.

[0010] As a further improvement of the technical solution, the diameter of the first through hole is 2 times of the diameter of the second through hole.

[0011] As a further improvement of the technical solution, the manufacturing of the second sub-encapsulation substrate or the third sub-encapsulation substrate comprises the following steps: S21. arranging a circuit layer, a first metal column and a dielectric on both sides of the resin core plate, the first metal column connecting the circuit layer; S22. arranging a solder mask layer on both sides of the resin core plate.

[0012] As a further improvement of the technical solution, the manufacturing of the second sub-encapsulation substrate or the third sub-encapsulation substrate comprises the following steps: S31. arranging a circuit layer, a first metal column and a dielectric on both sides of the detachable core plate, the first metal column connecting the circuit layer; S32. removing the detachable core plate to obtain an intermediate piece; S33. arranging a solder mask layer on both sides of the intermediate piece. BRIEF DESCRIPTION OF DRAWINGS

[0013] Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The accompanying drawings are included to provide a description of the preferred embodiments and are not intended to limit the scope of the application; Figure 1 FIG. 1 is a first structural schematic diagram of a modular stacked substrate according to the present application; Figure 2 FIG. 2 is a second structural schematic diagram of a modular stacked substrate according to the present application; Figures 3a to 3j FIG. 3 is a sectional schematic diagram of a manufacturing process of a modular stacked substrate according to the present application; Figures 4a to 4d FIG. 4 is a sectional schematic diagram of a first manufacturing process of a second sub-encapsulation substrate or a third sub-encapsulation substrate according to the present application; Figures 5a to 5h FIG. 5 is a sectional schematic diagram of a second manufacturing process of a second sub-encapsulation substrate or a third sub-encapsulation substrate according to the present application.

[0014] REFERENCE NUMERALS: 100, glass core board; 101, first surface of glass core board; 102, second surface of glass core board; 200, first surface of first sub-encapsulation substrate; 201, first solder resist layer; 202, solder ball; 203, filling glue; 300, second surface of first sub-encapsulation substrate; 301, second solder resist layer; 400, second metal column; 401, ink; 500, circuit layer; 500a, first copper layer; 501, first metal column; 600, resin core board; 600a, second copper layer; 600b, third copper layer; 600c, detachable core board; 601, first surface of resin core board; 601a, third solder resist layer; 602, second surface of resin core board; 602a, fourth solder resist layer; 700, first surface of second sub-encapsulation substrate; 701, fifth solder resist layer; 701a, first surface of third sub-encapsulation substrate; 701b, second surface of third sub-encapsulation substrate; 702a, eighth solder resist layer; 702b, sixth solder resist layer; 800, second surface of second sub-encapsulation substrate; 801, seventh solder resist layer; 900, dielectric. DETAILED DESCRIPTION

[0015] In order to make the objectives, technical solutions and advantages of the present application clearer, the present application will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and should not be used to limit the present application.

[0016] Those skilled in the art can understand that the singular forms "a", "an" and "the" used herein include the plural forms unless specifically stated otherwise. It should be further understood that the use of the term "include" in the specification of the present application means that the stated features, integers, steps, operations, elements and / or components are present, but does not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups thereof.

[0017] The present application will be described in detail below with reference to the accompanying drawings.

[0018] Embodiment 1:

[0019] As shown in FIG. 1, a first structure schematic diagram of a modular laminated substrate is shown. Figure 1

[0020] ​The modular stacked substrate is composed of two sub-package substrates. The first sub-package substrate includes a first sub-package substrate first surface 200 and a first sub-package substrate second surface 300. The first sub-package substrate contains a glass core board 100, which includes a glass core board first surface 101 and a glass core board second surface 102. Between the first sub-package substrate first surface 200 and the glass core board first surface 101 are multiple circuit layers 500, which are connected by first metal pillars 501. Between the first sub-package substrate first surface 200 and the glass core board first surface 101 is also a dielectric 900, which is used for insulation between the circuit layers 500. The dielectric can be modified epoxy resin, modified polyphenyl ether resin, polyimide resin, etc. Between the first sub-package substrate second surface 300 and the glass core board second surface 102 are multiple circuit layers 500, which are connected by first metal pillars 501. Between the first sub-package substrate second surface 300 and the glass core board second surface 102 is also a dielectric 900. The glass core board 100 contains second metal pillars 400, which pass through the glass core board 100 and connect the circuit layers 500 on both sides of the glass core board 100. The second metal pillars 400 are filled with ink 401. The first sub-package substrate second surface 300 is covered by a second solder mask 301, except for the parts used to connect to external circuits, components or devices, to protect the substrate and circuit, prevent external moisture, dust and mechanical wear and tear from affecting the substrate, and enhance the electrical properties of the substrate. The first sub-package substrate first surface 200 is covered by a first solder mask 201, except for the parts where solder balls 202 are arranged. The solder balls 202 are connected to the circuit layers 500.

[0021] The second sub-package substrate includes a second sub-package substrate first surface 700 and a second sub-package substrate second surface 800, and a resin core board 600 is contained in the second sub-package substrate. The resin core board 600 includes a resin core board first surface 601 and a resin core board second surface 602. The second sub-package substrate first surface 700 and the resin core board first surface 601 contain a plurality of circuit layers 500, and the circuit layers 500 are connected by first metal pillars 501. The second sub-package substrate first surface 700 and the resin core board first surface 601 also contain a dielectric 900 for insulation between the circuit layers 500. The dielectric 900 is a modified epoxy resin, a modified polyphenyl ether resin, a polyimide resin, etc. The second sub-package substrate second surface 800 and the resin core board second surface 602 contain a plurality of circuit layers 500, and the circuit layers 500 are connected by first metal pillars 501. The second sub-package substrate second surface 800 and the resin core board second surface 602 also contain a dielectric 900. The second sub-package substrate second surface 800 is covered by a seventh solder mask layer 801 except for the part used for connecting with external circuits, components or devices, so as to protect the substrate and the circuit, prevent external moisture, dust and mechanical wear from affecting the substrate, and enhance the electrical performance of the substrate. The second sub-package substrate first surface 700 is covered by a fifth solder mask layer 701 except for the part connected with the solder balls 202. The solder balls 202 are connected with the circuit layers 500 of the second sub-package substrate.

[0022] The first sub-package substrate and the second sub-package substrate are connected by the solder balls 202, and the filling glue 203 is injected between the first sub-package substrate and the second sub-package substrate. The filling glue 203 fills the gap between the first sub-package substrate and the second sub-package substrate, and can relieve the mechanical stress and thermal stress between the first sub-package substrate and the second sub-package substrate. The filling glue 203 needs to meet the requirements of low viscosity, high flowability, low thermal expansion coefficient, high bonding strength, etc. and can be selected from epoxy resin, acrylate, polyurethane or silicone.

[0023] Embodiment 2:

[0024] As shown in FIG. 2, a second structure of a modular stacked substrate is shown. Figure 2

[0025] ​The modular stacked substrate is composed of three sub-package substrates. The first sub-package substrate includes a first sub-package substrate first surface 200 and a first sub-package substrate second surface 300. The first sub-package substrate contains a glass core substrate 100, which includes a glass core substrate first surface 101 and a glass core substrate second surface 102. Between the first sub-package substrate first surface 200 and the glass core substrate first surface 101 are multiple layers of circuitry 500, which are connected by first metal pillars 501. Between the first sub-package substrate first surface 200 and the glass core substrate first surface 101 is also a dielectric 900, which insulates the layers of circuitry 500. The dielectric can be modified epoxy resin, modified polyphenyl ether resin, polyimide resin, etc. Between the first sub-package substrate second surface 300 and the glass core substrate second surface 102 are multiple layers of circuitry 500, which are connected by first metal pillars 501. Between the first sub-package substrate second surface 300 and the glass core substrate second surface 102 is also a dielectric 900. The glass core substrate 100 contains second metal pillars 400, which pass through the glass core substrate 100 and connect the layers of circuitry 500 on both sides of the glass core substrate 100. The second metal pillars 400 are filled with ink 401. The first sub-package substrate second surface 300 is covered by a second solder mask 301, except for the locations where it is connected to external circuits, components, or devices. This protects the substrate and circuitry from external moisture, dust, mechanical wear, etc., and enhances the electrical properties of the substrate. The first sub-package substrate first surface 200 is covered by a first solder mask 201, except for the locations where solder balls 202 are arranged. The solder balls 202 are connected to the layers of circuitry 500.

[0026] The second sub-package substrate is a coreless substrate. The second sub-package substrate includes a second sub-package substrate first surface 700 and a second sub-package substrate second surface 800. Between the second sub-package substrate first surface 700 and the second sub-package substrate second surface 800 are multiple layers of circuitry 500, which are connected by first metal pillars 501. The second sub-package substrate second surface 800 is covered by a seventh solder mask 801, except for the locations where it is connected to external circuits, components, or devices. This protects the substrate and circuitry from external moisture, dust, mechanical wear, etc., and enhances the electrical properties of the substrate. The second sub-package substrate first surface 700 is covered by a fifth solder mask 701, except for the locations where it is connected to solder balls 202. The solder balls 202 are connected to the layers of circuitry 500 of the second sub-package substrate.

[0027] The third sub-encapsulation substrate is a coreless substrate. The third sub-encapsulation substrate comprises a third sub-encapsulation substrate first surface 701a and a third sub-encapsulation substrate second surface 701b. Between the third sub-encapsulation substrate first surface 701a and the third sub-encapsulation substrate second surface 701b are a plurality of circuit layers 500, and the circuit layers 500 are connected by first metal pillars 501. The third sub-encapsulation substrate second surface 701b is covered by a sixth solder mask layer 702b except for the part used for connecting with external circuits, components or devices, so as to protect the substrate and the circuit, prevent external moisture, dust and mechanical abrasion from affecting the substrate, and enhance the electrical properties of the substrate. The third sub-encapsulation substrate first surface 701a is covered by an eighth solder mask layer 702a except for the part connected with the solder balls 202. The solder balls 202 are connected with the circuit layers 500 of the third sub-encapsulation substrate.

[0028] The first sub-encapsulation substrate and the second sub-encapsulation substrate and the third sub-encapsulation substrate are connected by the solder balls 202. The second sub-encapsulation substrate and the third sub-encapsulation substrate are located on the same side of the first sub-encapsulation substrate. The first sub-encapsulation substrate and the second sub-encapsulation substrate and the second sub-encapsulation substrate are filled with a filling adhesive 203. The filling adhesive 203 fills the gap between the first sub-encapsulation substrate and the second sub-encapsulation substrate and the third sub-encapsulation substrate, and can relieve the mechanical stress and thermal stress between the first sub-encapsulation substrate and the second sub-encapsulation substrate and the third sub-encapsulation substrate. The filling adhesive 203 needs to meet the requirements of low viscosity, high fluidity, low thermal expansion coefficient, high bonding strength, etc. and can be selected from epoxy resin, acrylic ester, polyurethane or silicone.

[0029] Example 3:

[0030] As shown in FIG. 1, a cross-sectional schematic diagram of a process for manufacturing a modular stacked substrate is shown. Figures 3a to 3j

[0031] ​A through hole is processed on the glass core board 100. The glass substrate is cleaned by ultrasonic cleaning with deionized water, acetone, alcohol, etc. to remove dust, oil stains, organic matter residues and other impurities on the surface to ensure the cleanliness of the subsequent process. The glass substrate surface is dried by nitrogen blowing or high temperature baking to avoid moisture affecting the subsequent processing. A hole is opened on the glass core board 100 by dry etching or wet etching technology. Dry etching can use active particles in plasma to chemically react with glass and physically bombard glass to remove glass material according to the photoresist mask pattern to form a through hole; wet etching is to immerse the glass substrate in an etching solution such as hydrofluoric acid to selectively dissolve glass to form a through hole. The etching process needs to accurately control the time, temperature, etching solution concentration and other parameters to ensure the size accuracy and shape quality of the through hole. Laser or mechanical drilling can also be used to drill holes in the glass. The diameter of the hole is 500um. After the hole is opened, the impurities in the hole and the surface of the glass core board 100 are removed to ensure the cleanliness of the inside of the through hole and the surface of the glass substrate. The dielectric 900 is pressed on both sides of the glass core board 100. The dielectric 900 can be modified epoxy resin, modified polyphenyl ether resin, polyimide resin, etc. During the pressing process, the hole in the glass core board 100 also needs to be filled with dielectric. After pressing the dielectric, a 5um thick first copper layer 500a is pressed on both sides of the glass core board 100. The original through hole is drilled again, which can be done by laser or mechanically to expose the original through hole. The hole wall impurities and the glass core board 100 surface impurities are removed.

[0032] A thin seed layer is deposited on the surface of the packaging substrate and the inner wall area of the through hole by seed layer deposition to provide a conductive basis for subsequent metal filling. Common seed layer deposition methods include physical vapor deposition (PVD) or chemical vapor deposition (CVD). Metal atoms such as copper and titanium form a seed layer of metal attached to the inner wall of the hole and the surface of the substrate. Then, by electroplating, copper is deposited on the surface of the seed layer, increasing the thickness of the first copper layer 500a and forming a second metal pillar 400 on the inner wall of the through hole. In this embodiment, the second metal pillar 400 is a copper pillar connected to the first copper layer 500a. During electroplating, care should be taken to avoid filling the copper pillar with the through hole. The hole diameter in the copper pillar after electroplating is 100um. After forming the through hole, ink 401 is injected into the hole. After the ink 401 solidifies, the surface of the ink 401 is removed to expose the first copper layer 500a. After exposure, development, electroplating and other processes, the circuit layer 500 is made.

[0033] Dielectric is stacked on both sides of the packaging substrate, and first metal pillars 501 and circuit layers 500 are made according to requirements. The first metal pillars 501 connect the circuit layers 500. The first anti-solder layer 201 and the second anti-solder layer 301 are arranged on both sides of the packaging substrate. Solder balls 202 are arranged at positions not covered by the first anti-solder layer 201, which are connected to the circuit layer 500, i.e. a first sub-packaging substrate is obtained.

[0034] The second sub-package substrate is connected to the first sub-package substrate via solder balls 202. Filler adhesive 203 is then injected between the first and second sub-package substrates. Before injection, both sub-package substrates are cleaned using plasma cleaning to remove surface organic contaminants, followed by chemical cleaning using isopropanol combined with ultrasonic waves to control residual ion concentration. Both sub-package substrates are preheated at 80℃~100℃, with controlled preheating temperature and time to improve the subsequent adhesive filling rate. After preheating, the surface temperature of the first and second sub-package substrates should be uniform, with a deviation within 3℃, which can be detected using infrared imaging. The filler adhesive 203 is made of resin and is first preheated at 40℃ for 30 minutes to reduce its viscosity to 1500~3000 cP. A rotational viscometer is used to monitor the preheating process. The substrate is then placed in a vacuum environment of less than 0.5 kPa to degas, reducing the bubble content to less than one-thousandth, until visually free of bubbles is observed in the filler adhesive 203. When sampling and pressurizing to 0.8 MPa, the volume expansion should be less than 0.5%. Use an L-shaped or U-shaped nozzle (0.25~0.4 mm) to dispense the filler, avoiding air bubbles. During the filling process, the substrate temperature and ambient temperature should be controlled to prevent viscosity increase and moisture accumulation after the filler 203 is injected. After filling, perform pre-curing to the B-stage, followed by secondary curing. Secondary curing consists of two stages: gradient heating and heat preservation. The cooling process after heat preservation should be uniform and slow to avoid internal cracking due to thermal stress.

[0035] Example 4:

[0036] like Figures 4a to 4d The diagram shows a cross-sectional view of the process of fabricating a second or third sub-package substrate using a modular stacked substrate.

[0037] A first copper layer 500a, 18µm thick, is laminated onto both sides of the resin core board 600. After exposure, development, and electroplating, a circuit layer 500 is fabricated. A dielectric 900, which can be made of modified epoxy resin, modified polyphenylene ether resin, or polyimide resin, is laminated onto both sides of the resin core board 600. After lamination, holes are made on the surface of the dielectric 900 using mechanical or laser methods, with the holes extending to expose the underlying circuit layer 500. Impurities on the hole walls and surface are cleaned, and a seed layer metal is deposited inside the holes and on the surface. Then, electroplating is used to form a first metal pillar 501 inside the holes and a first copper layer 500a on the surface. This first copper layer 500a is connected to the underlying circuit layer 500 through the first metal pillar 501. The above steps are repeated to fabricate the required circuit layer 500. Finally, a fifth solder resist layer 701 and a seventh solder resist layer 801 are arranged on the surface of the sub-package substrate.

[0038] Example 5:

[0039] As Figures 5a to 5h shown, a cross-sectional view of a second process for manufacturing a second sub-encapsulation substrate or a third sub-encapsulation substrate of a modular stacked substrate.

[0040] The detachable core board 600c is pressed with a second copper layer 600a and a third copper layer 600b on both sides, wherein the second copper layer 600a is 18 um thick, and the third copper layer 600b is 5 um thick. The circuit layer 500 is arranged on both sides of the detachable core board, and then the dielectric 900 is pressed. The dielectric 900 is mechanically or laser drilled until the circuit layer 500 is exposed. The impurities on the hole wall and surface are cleaned, and the seed layer metal is deposited in the hole and on the surface. Then, the first metal column 501 and the metal layer connected to the lower circuit layer 500 through the first metal column 501 are formed by electroplating. The circuit layer 500 is arranged on the metal layer. The above steps are repeated to manufacture the circuit layer 500 and the first metal column 501 as needed. The detachable core board 600c is removed, and the bottom copper on the side of the substrate connected to the detachable core board is removed by rapid etching. The third anti-solder layer 601a and the fourth anti-solder layer 602a are arranged on both sides of the substrate.

[0041] In summary, the modular stacked substrate and the manufacturing method thereof can significantly improve the yield of large-size substrates and reduce the manufacturing cost. By separating one encapsulation substrate into two sub-substrates manufactured separately and connecting them through solder balls, the shrinkage phenomenon caused by the state change of the material after being subjected to pressure, heat and cooling during the pressing process is avoided, which causes the overall warping. At the same time, the solder balls and the sub-substrates are filled with filling glue, which can ensure the overall rigidity. This scheme is flexible in the combination of different sub-substrates and can be applied to the packaging of 2.5D chips, greatly improving the process level of large-size chips.

Claims

1. A modular stacked substrate, characterized in that, The first sub-package substrate and the second sub-package substrate are connected by solder balls, and the first sub-package substrate and the second sub-package substrate contain filling glue; The first sub-package substrate contains a glass core plate, and a circuit layer is arranged between the glass core plate and the surface of the first sub-package substrate, and the circuit layer is connected by a first metal column; The first sub-package substrate contains a second metal column, the second metal column passes through the glass core plate to connect the circuit layer, and the second metal column is filled with ink; The surface of the first sub-package substrate is provided with a solder mask layer; The second sub-package substrate is provided with a circuit layer, the circuit layer is connected by a first metal column, and the surface of the second sub-package substrate is provided with a solder mask layer.

2. The modular stacked substrate of claim 1, wherein, The third sub-package substrate is connected with the first sub-package substrate by solder balls, blind hole plating, copper columns or through connection, and the first sub-package substrate and the third sub-package substrate contain filling glue; The first sub-package substrate and the second sub-package substrate can also be connected by blind hole plating, copper columns or through connection.

3. The modular stacked substrate of claim 2, wherein, The third sub-package substrate and the second sub-package substrate are located on the same side of the first sub-package substrate; The line width of the circuit layer of the second sub-package substrate is greater than the line width of the first sub-package substrate; and the line spacing of the circuit layer of the second sub-package substrate is greater than the line spacing of the first sub-package substrate; The line width of the circuit layer of the third sub-package substrate is greater than the line width of the first sub-package substrate; and the line spacing of the circuit layer of the third sub-package substrate is greater than the line spacing of the first sub-package substrate.

4. The modular stacked substrate of claim 1, wherein, The first metal column is connected with the solder ball, and the second metal column is connected with the solder ball.

5. A method for manufacturing a modular stacked substrate as claimed in any one of claims 1 to 4, characterized in that The method comprises the following steps: S1. manufacturing a first sub-package substrate; S2. manufacturing a second sub-package substrate; S3. arranging solder balls on the surface of the first sub-package substrate; S4. connecting the second sub-package substrate with the first sub-package substrate by solder balls; S5. filling glue between the first sub-package substrate and the second sub-package substrate.

6. The method of claim 5, wherein the method further comprises: The method further comprises manufacturing a third sub-package substrate, connecting the third sub-package substrate with the first sub-package substrate by solder balls, and filling glue between the first sub-package substrate and the third sub-package substrate.

7. The method of claim 5, wherein the method further comprises: Manufacturing the first sub-package substrate comprises the following steps: S11. opening a first through hole in a glass core plate; S12. pressing a dielectric on both sides of the glass core plate, and the dielectric fills the first through hole; S13. pressing a metal layer on both sides of the glass core plate; S14. processing a second through hole in the first through hole; S15. arranging a metal layer on the inner wall of the second through hole; S16. filling ink in the second through hole; S17. polishing the surface of the glass core plate to remove excess ink; S18. arranging a circuit layer and a first metal column on both sides of the glass core plate, and the first metal column connects the circuit layer; S19. arranging a solder mask layer.

8. The method of claim 7, wherein the method further comprises: The diameter of the first through hole is 2 times the diameter of the second through hole.

9. The method of claim 6, wherein the method further comprises: Manufacturing the second sub-package substrate or the third sub-package substrate comprises the following steps: S21. arranging a circuit layer, a first metal column and a dielectric on both sides of a resin core plate, and the first metal column connects the circuit layer; S22. arranging a solder mask layer on both sides of the resin core plate.

10. The method of claim 6, wherein the method further comprises: Fabricating the second sub-encapsulation substrate or the third sub-encapsulation substrate comprises the following steps: S31. arranging a circuit layer, a first metal column and a dielectric on both sides of the detachable core plate, wherein the first metal column is connected to the circuit layer; S32. removing the detachable core plate to obtain an intermediate piece; S33. arranging an anti-soldering layer on both sides of the intermediate piece.

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