Gpu-based parallel spectral delay correction method and apparatus

Abstract

This application provides a GPU-based parallel spectral delay correction method and apparatus, applicable to the field of artificial intelligence technology. The method includes: acquiring multiple parallel units; determining the current parallel unit in chronological order, wherein all time sub-intervals within the current parallel unit simultaneously undergo multiple iterative correction scans through their respective CUDA blocks until a stopping iteration condition is met; after completing multiple iterative correction scans, serially compensating the time sub-intervals within the parallel unit to obtain the accurate solution for the current parallel unit; and sending the accurate solution of the last time sub-interval in the current parallel unit to the next parallel unit. The correction scan process includes: combining the solution calculations of the computing nodes in the current parallel unit into a batch; calling a batch solver to perform batch calculations to obtain an initial solution for each computing node; and performing parallel batch refinement based on the initial solution through the thread group corresponding to each computing node. This application improves GPU utilization.

Description

Technical Field

[0001] This application relates to the field of artificial intelligence technology, and more specifically, to a GPU-based parallel spectral delay correction method and apparatus. Background Technology

[0002] Parallel Full Approximation Scheme in Spectral Deferred Correction (para-SDC) is a high-order, high-precision numerical method for solving ordinary differential equations (ODEs). Its core innovation lies in optimizing the traditionally sequential iterative correction process in parallel, thereby significantly improving computational efficiency.

[0003] Currently, in the process of implementing parallel spectral delay correction methods on GPUs, the problem of solving small-scale linear / nonlinear sub-sub ... Summary of the Invention

[0004] The purpose of this application is to provide a GPU-based parallel spectral delay correction method and apparatus to improve GPU utilization when performing parallel spectral delay correction calculations using a GPU.

[0005] In a first aspect, embodiments of this application provide a GPU-based parallel spectral delay correction method, comprising:

[0006] Multiple parallel units are obtained; each parallel unit includes multiple consecutive time sub-intervals, and each time sub-interval includes multiple computing nodes; the time sub-intervals are obtained by dividing the time intervals.

[0007] The current parallel unit is determined according to the time sequence, and each time sub-interval in the current parallel unit is assigned to a CUDA block of the GPU; all time sub-intervals in the current parallel unit simultaneously perform multiple iterative correction scans through their respective CUDA blocks until the stopping iteration condition is met;

[0008] After completing multiple iterations of correction sweep processing, serial compensation is performed on the time sub-intervals within the same parallel unit in chronological order to obtain the accurate solution of the current parallel unit.

[0009] The exact solution of the last time sub-interval in the current parallel unit is sent to the next parallel unit as its initial condition, so that the next parallel unit performs the correction scan process until the correction scan process of the last parallel unit is completed.

[0010] The calibration scan process in each iteration consists of the following steps:

[0011] For the current parallel unit, the calculations of the computing nodes in the current parallel unit are combined into a batch;

[0012] Call the batch solver in the GPU to perform batch computation and obtain the solution increment or update value used to update the current node value;

[0013] Based on the solution increment or update value, complete the current correction scan update of the values ​​of all computing nodes in the current parallel unit.

[0014] This application embodiment implements a three-layer mapping on the GPU, that is, mapping multiple time sub-intervals of each parallel unit to a CUDA block, and mapping multiple computing nodes of each time sub-interval to the thread group of the corresponding CUDA block to achieve parallel computing. The solutions of all nodes in the parallel unit can be grouped into a batch to achieve batch solving, thereby optimizing the GPU memory layout and improving the utilization of the GPU.

[0015] In one possible implementation of the first aspect, a batch solver in the GPU is invoked to perform batch computation to obtain the solution increment or update value used to update the current node value, including:

[0016] The batch solver in the GPU is invoked. Under the condition of enabling the model, the node value of the previous SDC iteration, the length of the time sub-interval, the calculated node position and the local residual statistics are input into the physical information neural network PINN to generate solution increments or update values ​​for updating the current node value in parallel. The physical information neural network is obtained by minimizing the discrete operator residual.

[0017] The embodiments of this application provide a high-quality solution through PINN, enabling subsequent calculations to converge quickly, reducing the overall number of iterations, and lowering the consumption of computing resources.

[0018] In one possible implementation of the first aspect, the enabling model conditions include:

[0019] The estimated cost values ​​based on the measured batch inference cost, correction scan cost, and number of iterations are less than 0.

[0020] The formula for calculating the cost assessment value is as follows:

[0021] Cost assessment value = ;

[0022] in, For batch reasoning overhead; The estimated number of calibration scans required after enabling PINN; The estimated number of calibration scans required when PINN is not enabled; Expected calibration scan overhead after enabling PINN; Predicted calibration scan overhead when PINN is not enabled.

[0023] In this embodiment of the application, since PINN inference also requires a certain amount of computing resources, the initial solution can be calculated in the optimal way by setting the PINN start conditions, thereby providing a high-quality initial solution with lower consumption.

[0024] In one possible implementation of the first aspect, the method further includes:

[0025] Input the training samples into the PINN to be trained, and obtain the predicted values ​​of the PINN output to be trained;

[0026] Based on the predicted values, the PINN to be trained is optimized using a loss function that includes the norm of the discrete residuals of the computed nodes; where the loss function is:

[0027] ;

[0028] in, This is the discrete residual operator corresponding to this computation node. Let PINN be the predicted value of the nth sub-interval and the i-th node; For boundary constraints, For weighting coefficients, For regularity constraints, Let L2 norm be the parameter of the neural network. To solve for PINN, the regional data formed within the computational domain according to preset rules.

[0029] This application uses physical residuals as a monitoring signal to ensure that the output of PINN satisfies the control equations as much as possible, thus eliminating the dependence on high-cost numerical simulation data.

[0030] In one possible implementation of the first aspect, the method further includes:

[0031] Calculate the physical residual of the computing node corresponding to the current parallel unit;

[0032] PINN is fine-tuned based on the physical residuals.

[0033] In this embodiment, PINN is fine-tuned online using the physical residual of the computing node corresponding to the current parallel unit, enabling PINN to adapt to local nonlinearity or parameter drift.

[0034] In one possible implementation of the first aspect, the method further includes:

[0035] Calculate the physical residual of the computing node corresponding to the parallel unit;

[0036] If the physical residual is greater than the residual threshold, a rollback strategy is triggered;

[0037] The backoff strategies include: using coarse-grained operators for solving or adding Newtonian damping.

[0038] In this embodiment of the application, if the physical residual is large, it indicates that the initial solution given by PINN is not accurate enough. In this case, a more accurate initial solution can be given by adopting other methods through a rollback strategy.

[0039] In one possible implementation of the first aspect, serial compensation is performed on the time sub-intervals within the parallel unit in a sequential manner, including:

[0040] Calculate the discontinuity value between two adjacent parallel units;

[0041] Based on the discontinuity values, serial compensation is performed using polynomial interpolation.

[0042] The steps of calculating discontinuity values ​​and serial compensation are performed within the same GPU core.

[0043] The embodiments of this application reduce scheduling latency by performing the calculation of discontinuity values ​​and serial compensation in the same GPU core.

[0044] In one possible implementation of the first aspect, based on the solution increment or update value, the current correction scan update of the values ​​of all computing nodes within the current parallel unit is completed, including:

[0045] In the corresponding thread group, batch refinement of the solution increment or update value is performed using batch LU, batch QR, or batch iterativesolver.

[0046] In one possible implementation of the first aspect, sending the exact solution of the last time sub-interval in the current parallel unit to the next parallel unit includes:

[0047] The exact solution of the last time sub-interval in the current parallel unit is sent to the next parallel unit asynchronously via CUDA stream.

[0048] In this embodiment, the exact solution of the last time sub-interval in the current parallel unit is sent to the next parallel unit asynchronously via CUDA stream, so that numerical transmission and numerical computation are parallelized, reducing the probability of collisions.

[0049] In one possible implementation of the first aspect, the method further includes:

[0050] For energy-conserving systems, after all parallel units have completed the correction scan, the global relative error is calculated based on the conserved quantities of the energy-conserving system.

[0051] If the global relative error does not meet the requirements, the parameters are adaptively adjusted, the neural network is fine-tuned, or the mesh is refined before solving again.

[0052] The embodiments of this application calculate the global relative error by conserving quantities, and when the global relative error does not meet the requirements, the solution is recalculated after operations such as adaptively adjusting parameters, fine-tuning the neural network, or refining the mesh, so as to obtain a result that meets the requirements.

[0053] In one possible implementation of the first aspect, the step of combining the solution calculations of the computation nodes in the current parallel unit into a batch includes:

[0054] The batch size is dynamically determined based on the GPU's memory capacity and the data size of the computing nodes;

[0055] The calculations of the computing nodes in the current parallel unit are combined into a batch according to the determined batch size.

[0056] This application embodiment maximizes GPU utilization and reduces kernel startup overhead by dynamically adjusting the batch size based on the GPU's memory capacity and the size of the compute node data.

[0057] In one possible implementation of the first aspect, the method is executed based on a three-layer parallel architecture of the GPU, wherein: the first layer of parallelism maps different time sub-intervals to different GPU thread blocks or streams; the second layer of parallelism maps different computing nodes within the same time sub-interval to different threads or thread bundles within the same thread block; and the third layer of parallelism processes the system of equations to be solved on different computing nodes in parallel through a batch solver.

[0058] Secondly, embodiments of this application provide a GPU-based parallel spectral delay correction device, comprising:

[0059] An acquisition module is used to acquire multiple parallel units; wherein each parallel unit includes multiple consecutive time sub-intervals, and each time sub-interval includes multiple computing nodes; the time sub-intervals are obtained by dividing the time intervals;

[0060] The correction module is used to determine the current parallel unit in chronological order and assign each time sub-interval in the current parallel unit to a CUDA block of the GPU; all time sub-intervals in the current parallel unit simultaneously perform multiple iterative correction scans through their respective CUDA blocks until the stopping iteration condition is met;

[0061] The compensation module is used to perform serial compensation on the time sub-intervals within the parallel unit in sequence after completing multiple iterations of correction scan processing, so as to obtain the accurate solution of the current parallel unit.

[0062] The final value sending module is used to send the exact solution of the last time sub-interval in the current parallel unit to the next parallel unit, so that the next parallel unit can perform correction scan processing until the correction scan processing of the last parallel unit is completed.

[0063] The calibration scan processing steps are as follows:

[0064] The calculations of the computing nodes in the current parallel unit are combined into a batch;

[0065] The batch solver in the GPU is invoked to perform batch computation and obtain the initial solution for each computing node;

[0066] Based on the initial solution, parallel batch refinement is performed using the thread group corresponding to each computing node.

[0067] Thirdly, embodiments of this application provide an electronic device, including: a processor, a memory, and a bus, wherein:

[0068] The processor and memory communicate with each other via a bus;

[0069] The memory stores program instructions that can be executed by the processor, and the processor can execute the method of the first aspect by calling the program instructions.

[0070] Fourthly, embodiments of this application provide a non-transitory computer-readable storage medium, comprising:

[0071] A non-transitory computer-readable storage medium stores computer instructions that cause the computer to perform the methods in the various possible implementations of the first aspect.

[0072] Fifthly, embodiments of this application provide a computer program product, including computer program instructions, which, when read and executed by a processor, perform the methods in various possible implementations of the first aspect.

[0073] Other features and advantages of this application will be set forth in the following description and will be apparent in part from the description or may be learned by practicing embodiments of this application. The objectives and other advantages of this application may be realized and obtained by means of the structures particularly pointed out in the written description, claims, and drawings. Attached Figure Description

[0074] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments of this application will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0075] Figure 1 A schematic diagram of a GPU-based parallel spectral delay correction method provided in an embodiment of this application;

[0076] Figure 2 A schematic diagram of PINN training provided for an embodiment of this application;

[0077] Figure 3 This is a schematic flowchart of a post-correction processing method provided in an embodiment of this application;

[0078] Figure 4 A schematic diagram of another GPU-based parallel latency correction method provided in this application embodiment;

[0079] Figure 5 A schematic diagram of a GPU-based parallel spectral delay correction device provided in an embodiment of this application;

[0080] Figure 6 This is a schematic diagram of the physical structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0081] The embodiments of the technical solution of this application will now be described in detail with reference to the accompanying drawings. These embodiments are only used to more clearly illustrate the technical solution of this application and are therefore merely examples, and should not be used to limit the scope of protection of this application.

[0082] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains; the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the application; the terms “comprising” and “having”, and any variations thereof, in the specification, claims, and foregoing description of the drawings are intended to cover non-exclusive inclusion.

[0083] In the description of the embodiments of this application, technical terms such as "first" and "second" are used only to distinguish different objects and should not be construed as indicating or implying relative importance or implicitly specifying the number, specific order, or primary and secondary relationship of the indicated technical features. In the description of the embodiments of this application, "multiple" means two or more, unless otherwise explicitly defined.

[0084] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0085] In the description of the embodiments in this application, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this document generally indicates that the preceding and following related objects have an "or" relationship.

[0086] In the description of the embodiments of this application, the term "multiple" refers to two or more (including two), similarly, "multiple sets" refers to two or more (including two sets), and "multiple pieces" refers to two or more (including two pieces).

[0087] In the description of the embodiments of this application, unless otherwise expressly specified and limited, technical terms such as "installation," "connection," "joining," and "fixing" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. For those skilled in the art, the specific meaning of the above terms in the embodiments of this application can be understood according to the specific circumstances.

[0088] To facilitate understanding of the technical solutions of this application, the relevant terms used in the following embodiments are explained:

[0089] Parallel Spectral Delay Correction (para-SDC) is a high-precision numerical method for solving ordinary differential equations (ODEs). It belongs to the "time-stepping" method family. It combines the concepts of iterative methods and spectral integration to achieve high-order accuracy and inherent parallelism. The goal of para-SDC is to parallelize computational tasks within a single time step while maintaining high-order accuracy, thereby significantly improving computational efficiency on modern multi-core / many-core processors.

[0090] The core idea of ​​para-SDC is built upon SDC. Therefore, we should first understand the basic SDC, and then see how para-SDC parallelizes it.

[0091] The basic SDC calculation principle is as follows:

[0092] Step 1: Divide the time step into "nodes".

[0093] First, set the current time step The time step is divided into several smaller sub-time steps; these points are called nodes. For example, you can choose M+1 nodes: The goal is to find the solution at these nodes. , , ..., Approximate value.

[0094] Step 2: Establish the integral equation.

[0095] Any ODE can be written in integral form. At nodes... The solution at that location can be written as: This integral equation is exact, but the difficulty lies in not knowing the integrand. The specific form (because y(s) is unknown).

[0096] Step 3: Prediction-correction iteration of SDC.

[0097] 1. Prediction: Use a simple, low-order method (such as explicit or implicit Euler's method) to provide an initial, coarse guess of the solution for all nodes. This predicted solution is usually not very accurate.

[0098] 2. Correction: Enter the iteration loop k = 0, 1, 2, ...;

[0099] There is now a guess about the solution. Therefore, it is possible to construct a function for the integrand. Guesses, for example, using a polynomial interpolation .

[0100] A crucial step is calculating the error integral or delay term. The integral can be rewritten as: .

[0101] First point It is unknown, but it is approximated using the currently guessed derivative and a more refined integration rule (such as spectral integral, i.e., Gaussian quadrature). This is the origin of "spectral delay correction" and "delay correction". "Delay" refers to using the information from the previous iteration k to perform the correction for the current k+1.

[0102] In this way, each node can be... Establish a new, more accurate equation to solve it. Typically, this equation is implicit (e.g., using implicit Euler methods to handle the incremental part).

[0103] The problem with SDC: In traditional SDC, computation... Depends on The calculation results are as follows. In other words, these nodes must be solved sequentially in order, m=1,2,...,M, thus limiting parallelism.

[0104] Para-SDC solves the serial dependency problem of SDC through a clever mathematical transformation. Its core idea is that in each correction iteration k, it does not use the newly calculated values ​​from the current iteration. Instead, it uses all the information from the previous iteration k to construct the equations for all nodes in the current iteration k+1.

[0105] The specific calculation method for para-SDC is as follows:

[0106] In calculation In the equation, all terms involving other nodes (e.g.) (j≠m) all use the value from k iterations. .

[0107] In this way, for the current iteration k+1, the equations for all nodes m=1, 2,...,M are independent of each other. These independent equations (usually implicit equations) can be solved simultaneously and in parallel.

[0108] Physical Information Neural Network (PINN): PINN is a novel computational method that combines physical laws with deep learning. Its core innovation lies in directly embedding the partial differential equations (PDEs) describing the physical system into the training process of the neural network, enabling the network to not only learn patterns in the data but also adhere to fundamental physical laws. PINN approximates the solutions to PDEs through neural networks. Consider a typical PDE, including initial and boundary conditions. PINN uses a deep neural network, taking spatial coordinates and time as input, and outputting predicted values ​​of the physical field. The core technology of PINN is automatic differentiation. To calculate the residuals of the PDEs, it is necessary to obtain the partial derivatives of the neural network output with respect to each input coordinate. Through automatic differentiation, these derivatives can be calculated accurately and efficiently without relying on numerical difference methods.

[0109] Because para-SDC involves solving a large number of small-scale linear or nonlinear subproblems, traditional GPUs would launch a large number of kernels when faced with such problems, resulting in low CPU utilization.

[0110] To address the aforementioned technical issues, this application provides a GPU-based parallel spectral delay correction method. This method processes computational tasks in parallel at three granularities: large, medium, and small. Multiple consecutive time sub-intervals are allocated to different GPU blocks for parallel processing. Multiple computational nodes (such as advanced coordinate points) within each time sub-interval are assigned to different warp / thread groups for simultaneous computation. The small sets of equations to be solved on each computational node (such as linear systems in Newton's iterations) are packaged into a batch and computed all at once using the GPU's batch solver, thus fully utilizing the GPU's cores.

[0111] It should be noted that the parallel spectral delay correction provided in this application can be used for rigid ODEs, nonlinear PDEs (including diffusion, convection-diffusion, reaction-diffusion, Allen-Cahn, etc.), and multiphysics coupling simulation scenarios. Specifically, it can be applied to fluid dynamics, electromagnetic field simulation, quantum dynamics, structural dynamics, climate models, etc. Therefore, the method in this application is applicable to various spatial discretization formats, including finite difference, finite element, and spectral methods, and is adapted to different mesh and assembly strategies.

[0112] Furthermore, the method provided in this application embodiment can be implemented as a software product and deployed on GPU clusters via cloud / containerization, providing a time-parallel acceleration module for scientific research / engineering simulation platforms. It supports parallel computing on GPUs, TPUs, FPGAs, or other dedicated AI acceleration hardware.

[0113] Figure 1 This application provides a schematic flowchart of a GPU-based parallel spectral delay correction method, which is applied to a GPU and includes the following steps:

[0114] Step 101: Obtain multiple parallel units; wherein each parallel unit includes multiple consecutive time sub-intervals, and each time sub-interval includes multiple computing nodes; the time sub-intervals are obtained by dividing the time intervals.

[0115] First, the entire simulation time interval is divided into multiple consecutive time sub-intervals. These sub-intervals are obtained by further subdividing the original time interval. Within each time sub-interval, it is further discretized into multiple computational nodes. These nodes typically use numerical integration points such as Gaussian points or Ladow points to represent the changes in the high-precision approximate solution within the sub-interval. Several consecutive time sub-intervals are combined into a parallel unit, thus obtaining multiple parallel units.

[0116] Based on the above division, a three-layer time discrete structure can be obtained, namely: a sequence of parallel units, ordered in time order; time sub-intervals within each parallel unit, which can be processed in parallel; and computational nodes within each time sub-interval, which are used for local solution approximation. Furthermore, the solutions of all computational nodes in the parallel units can be grouped into a batch for batch computation.

[0117] Step 102: Determine the current parallel unit in chronological order, and assign each time sub-interval in the current parallel unit to a CUDA block of the GPU; all time sub-intervals in the current parallel unit simultaneously perform multiple iterative correction scans through their respective CUDA blocks until the stopping iteration condition is met.

[0118] By assigning each time sub-interval within the current parallel unit to an independent CUDA block of the GPU, time sub-intervals within the same parallel unit can be processed simultaneously. Each CUDA block focuses on the computation of one sub-interval, and threads within the block can further parallelize node-level computation.

[0119] The calibration scan processing steps are as follows:

[0120] The correction scan process performs the following steps in each iteration:

[0121] Step 1: Based on the node values ​​obtained after the previous SDC correction scan iteration (or the initial prediction values ​​for the first correction scan), assemble the corresponding implicit correction equation (usually a nonlinear equation or a linear system) for each computing node in the current parallel unit according to the Spectral Delay Correction (SDC) formula.

[0122] Step 2: Combine the implicit correction equations corresponding to all computing nodes in the current parallel unit into a unified batch solution task according to their mathematical structure (such as the Jacobian matrix). Call a dedicated batch solver in the GPU (such as cuSOLVER's batched LU, batched QR, or batched iterative solver) to solve this batch task, directly obtaining the solution vector (or correction amount) used to update the values ​​of each node. This step completes the equation solution for all nodes in a single kernel call, avoiding the overhead of starting a separate kernel for each node. Kernel call overhead is amortized through kernel fusion and stream overlap. The advantages of batch solving are: processing all computing nodes in a single kernel call, reducing the number of kernel calls; merging memory accesses, improving bandwidth utilization; and fully utilizing the parallel computing capabilities of the GPU.

[0123] It should be noted that when grouping the computations of the nodes in the current parallel unit into a batch, the batch size can be dynamically adjusted based on the GPU memory capacity and the data size of the computation nodes. Specifically, the system monitors the GPU's memory usage in real time, including key parameters such as total memory capacity, currently available memory, and system reserved memory. Simultaneously, the system analyzes the memory resources required by each computation node during the solution process, including input data, intermediate variables, temporary buffers, and output results. After determining the batch size, the system can organize a large number of computation nodes into groups suitable for batch processing. For example, it can traverse the computation nodes in order, adding them one by one to the current batch until the batch size limit or memory capacity limit is reached. Another example is sorting the nodes, placing nodes with similar memory requirements in the same batch to reduce memory fragmentation.

[0124] Step 3: Using the solution vector (or correction value) obtained in step 2, update the values ​​of all computing nodes in the current parallel unit, thereby completing a complete correction sweep iteration.

[0125] After each correction scan, it is checked whether the iteration stop conditions are met. These conditions may include the residual norm being lower than a preset threshold, the change in the solution being sufficiently small, or the maximum number of iterations being reached. If the conditions are not met, the next correction scan is performed; otherwise, the iteration is terminated.

[0126] Understandably, during the iteration process, boundary information needs to be transformed between time sub-intervals. Specifically, shared memory or global memory can be used for data exchange, and CUDA synchronization primitives can be used to ensure the correct execution order, thereby achieving efficient inter-thread block communication.

[0127] Step 103: After completing multiple iterations of correction sweep processing, perform serial compensation on the time sub-intervals within the same parallel unit in chronological order to obtain the accurate solution of the current parallel unit.

[0128] Although time sub-intervals are processed in parallel during the iterative correction phase, the nature of time progression is sequential. Errors introduced by parallel computation need to be eliminated through serial compensation to ensure the continuity of the solution in time.

[0129] Specifically, each time sub-interval within the parallel unit can be processed sequentially according to time order. The specific implementation method of its serial compensation is as follows:

[0130] Starting from the first time subinterval, its final solution is used as the initial condition for the next subinterval. The discontinuity value in each time subinterval is calculated. Based on the solution information of two adjacent time subintervals, a more accurate numerical solution is reconstructed, so that the solution is continuous at the boundary of the subinterval.

[0131] When performing serial compensation, the gap between two adjacent time subintervals can be smoothly added to the solution of the subsequent time subintervals using the Picard formula for polynomial interpolation, making the overall solution continuous and smooth.

[0132] In some embodiments, the computation of discontinuity values ​​and serial compensation can be performed within the same GPU kernel, reducing scheduling latency. For example, a dedicated GPU kernel can be designed for a parallel unit. This kernel first has thread blocks that compute the discontinuity values ​​at their respective ends in parallel. Subsequently, through synchronization between thread blocks or by designing a loop within the kernel, the first thread block completes its compensation computation in chronological order, and then passes its result to the second thread block via global memory or shared memory, and so on. The kernel uses synchronization mechanisms to ensure the sequentiality of data transfer, thereby serially completing the compensation computation for all time sub-intervals within the entire parallel unit within the context of a single kernel startup, reducing the scheduling and context switching overhead caused by starting multiple small-scale kernels.

[0133] Step 104: Send the exact solution of the last time sub-interval in the current parallel unit to the next parallel unit as its initial condition, so that the next parallel unit performs the correction scan process until the correction scan process of the last parallel unit is completed.

[0134] After completing the computation of the current parallel unit, the exact solution of its last time sub-interval is passed as the initial condition to the next parallel unit. The passing process includes: copying and transmitting the solution vector, and passing possible state variables and auxiliary variables.

[0135] It should be noted that the processing between parallel units adopts a pipeline mode, that is, when the first parallel unit performs serial compensation, the second parallel unit can start iterative correction.

[0136] It should be noted that the exact solution described in the embodiments of this application is relative to the initial solution or the solution generated during the iteration process. The exact solution is the solution obtained in the last iteration, while the initial solution is the solution given before the iteration. The accuracy of the solution generated during the iteration process (iteration correction before the last iteration) is lower than that of the solution obtained in the last iteration, and can be called the coarse solution.

[0137] In addition, under the IMEX discretization framework, the rigid term F_I is implicitly discretized and A-stability is guaranteed, while the non-rigid term F_E is explicitly discretized, and the stability region is theoretically quantized with Lipschitz constants L_I, L_E and substep CFL conditions.

[0138] This application embodiment implements a three-layer mapping on the GPU, that is, mapping multiple time sub-intervals of each parallel unit to a CUDA block, and mapping multiple computing nodes of each time sub-interval to the thread group of the corresponding CUDA block to achieve parallel computing. The solutions of all nodes in the parallel unit can be grouped into a batch to achieve batch solving, thereby optimizing the GPU memory layout and improving the utilization of the GPU.

[0139] In addition, the embodiments of this application can be implemented in single-precision / mixed-precision scenarios to further improve throughput while ensuring numerical stability. PINN can use low-precision inference and correct iteratively with high precision during the refinement process.

[0140] Building upon the above embodiments, each computation requires solving an implicit or nonlinear equation (e.g., a correction equation of the backward-Euler type). Conventionally, iterating from a rough initial value to convergence requires multiple Newton iterations. However, this embodiment uses a trained PINN algorithm instead of traditional low-order prediction methods, directly providing a "high-quality initial value," enabling subsequent Newton iterations to converge rapidly into the quadratic phase, thus significantly reducing the overall number of iterations and linear solutions. The specific solution is as follows:

[0141] The batch solver in the GPU is invoked. Under the condition of enabling the model, the node value of the previous SDC iteration, the length of the time sub-interval, the calculated node position and the local residual statistics are input into the physical information neural network PINN to generate solution increments or update values ​​for updating the current node value in parallel. The physical information neural network is obtained by minimizing the discrete operator residual.

[0142] In the actual implementation process of parallel spectral delay correction, PINN is not invoked in all cases. The system dynamically decides whether to use PINN for initial value prediction based on preset heuristic rules. The conditions for enabling the model consider multiple factors, including the cost of batch inference of measurements, the cost of calibration scan, and the cost of estimated iteration counts. If the estimated cost based on the batch inference cost of measurements, calibration scan cost, and estimated iteration counts is less than 0, it indicates that the cost of using PINN for initial value prediction is less than the cost of not using PINN.

[0143] Specifically, the system measures or estimates key performance indicators in real time: first, the computational cost of performing a batch inference using PINN for all computing nodes in the current parallel unit; and second, the average computational cost of performing one SDC correction sweep iteration. Simultaneously, based on the characteristics of the current problem being solved (such as nonlinearity intensity, current residual state, and historical convergence), the system estimates the number of correction sweep iterations required to achieve convergence under two strategies: one is the estimated number of iterations required after enabling PINN to provide high-quality initial values, and the other is the estimated number of iterations required when using traditional low-order prediction methods (such as explicit Euler methods) to provide initial values ​​without enabling PINN.

[0144] The system's decision-making logic involves comparing the overall computational costs of the two strategies. The core criterion is: if the additional inference overhead introduced by enabling PINN is less than the computational overhead corresponding to the reduction in iterations due to its provision of high-quality initial values, then enabling PINN reduces the overall cost, and the system automatically enables PINN to generate the initial solution. If the above condition is not met, the system will use traditional methods, such as using low-order methods like explicit Euler methods, to generate a coarse predicted solution for all nodes as the initial value before proceeding to the subsequent correction scan process.

[0145] The estimation of the number of iterations with and without PINN enabled can be achieved using a lightweight online regression model. This model takes dynamic features such as the current time step, initial residual norm, and historical iteration convergence rate as input, and continuously updates the model based on newly generated data during algorithm execution to improve prediction accuracy.

[0146] For example, the formula for calculating the cost assessment value can be as follows:

[0147] Cost assessment value = ;

[0148] in, For batch reasoning overhead; The estimated number of calibration scans required after enabling PINN; The estimated number of calibration scans required when PINN is not enabled; Expected calibration scan overhead after enabling PINN; Predicted calibration scan overhead when PINN is not enabled.

[0149] When the activation conditions are met, the system extracts four key features from the current computational state and organizes them into a tensor format suitable for batch processing. The first type of feature is the node value from the previous SDC iteration, specifically the value of the first node within the current parallel unit, reflecting the approximate state of the current solution. The second type is the length of each time sub-interval, a crucial parameter determining the stability and accuracy of the numerical method. The third type is the relative position of each computational node within the time sub-interval, influencing the weighting of numerical integration. The fourth type is local residual statistics, such as the mean, maximum, or rate of change of the residuals of the computational node in previous SDC scans, reflecting whether the current iteration is stuck. For example, local residual statistics could be the L2 norm of the residuals of the computational node in the previous SDC correction scan iteration, or the ratio of the residual norms of the previous two iterations. The stiffness index can be an approximate value of the spectral radius obtained by estimating the current Jacobian matrix at the node; this approximation can be quickly obtained in a few steps using a power iteration method.

[0150] It should be noted that the fourth type of local residual statistics can also be replaced by stiffness indices (such as the magnitude of the largest eigenvalue of the Jacobian matrix, or the degree of diagonal dominance), which originate from the problem itself and indicate whether more cautious initial values ​​are needed. Understandably, both local residual statistics and stiffness indices are used to characterize the difficulty of solving the problem at the current computational node.

[0151] Input the node values, time subinterval lengths, computation node positions, and local residual statistics from the previous SDC iteration into PINN to obtain the initial solutions corresponding to all computation nodes in this parallel unit output by PINN.

[0152] The specific method of iterative correction scanning of PINN in this application embodiment is as follows:

[0153] When the system starts up, a set of benchmark tests is performed to measure the overhead T of a single calibration scan under the current hardware environment. sweep And PINN batch inference overhead T inference Establish a historical database to record the average number of iterations N in traditional SDC for different problem types. traditional And the number of iterations N after enabling PINN PINN This data can be used for initial estimates and updated during operation.

[0154] During SDC calculations, the system monitors the characteristics of the current problem in real time (such as nonlinear intensity and time step size) and estimates N by referring to historical data. traditional and N PINN For N PINNThe prediction can be achieved using a machine learning model (such as a regression model), taking features including problem parameters and initial residuals as input, and outputting the number of prediction iterations. This model can be trained offline. Simultaneously, the current T is actually measured. sweep and T inference .

[0155] The overhead assessment value is calculated according to the above formula. If the overhead assessment value is less than 0, PINN is enabled; otherwise, PINN is skipped and traditional SDC is used directly.

[0156] If PINN is enabled, the system takes the current state (such as the solution from the previous SDC iteration and time sub-interval information) as input, calls PINN for batch inference, and generates a high-quality initial solution. The output of PINN serves as the starting point for the SDC correction scan, initiating subsequent iterations. The system continues to monitor the actual number of iterations and compares it with the predicted value to update the historical database. If PINN is not enabled, the system directly performs the prediction step of traditional SDC (such as a low-order method) and then proceeds to the correction scan.

[0157] Understandably, the system can record the results of each decision (such as actual cost savings and number of iterations) to improve the accuracy of the prediction model.

[0158] In the SDC correction process, a residual correction model and a coarse integrator can be used. The inputs of the residual correction model include the current state variables, the time step, and the prediction results of the coarse integrator, and the output is an error estimate or correction increment. Furthermore, this residual correction model is trained through supervised learning, physics-guided learning, or a hybrid loss model. During the training phase, a physics-constrained loss is introduced to ensure conservation laws, symmetry, stability, or energy consistency. Moreover, this residual correction model can be adaptively updated during computation to cope with model parameter drift or changes in the external environment.

[0159] The rough integrator can be selected from Euler's method, Heun's method, low-order Runge-Kutta method, linear multistep method, finite difference method, or finite volume method. The residual correction model and the rough integrator are embedded into the SDC iteration during the inference process to form an end-to-end correction calculation flow.

[0160] The spectral delay correction iteration is based on the integral form, and uses methods such as the trapezoidal rule, Gaussian quadrature, and Legendre quadrature to calculate the update of the integral node values.

[0161] Therefore, in this embodiment, when performing batch inference on the GPU, a highly optimized memory layout and computation strategy are adopted. The input data is organized in a structured array format, so that feature values ​​of the same type are stored contiguously in memory, which is beneficial for merging memory accesses and improving cache utilization. The computation tasks are executed in a hierarchical parallel manner, with computations in different time sub-intervals allocated to different computational unit blocks, and the computation of each computation node is processed in parallel by thread groups.

[0162] To maximize CPU utilization, the system overlaps computation and data transmission. While some computing units perform neural network inference, other units can simultaneously prepare data or process results. Furthermore, a mixed-precision computing strategy is employed, combining single-precision and half-precision floating-point numbers during network forward propagation to improve computational throughput while maintaining numerical stability.

[0163] Before generating an initial solution using PINN, PINN can be pre-trained offline with the goal of minimizing the discrete operator residuals. It should be noted that the PINN provided in this embodiment differs from traditional PINN; it does not directly solve the PDE but instead learns the inverse mapping of the SDC discrete operator. During offline training of PINN, various parameter configurations can be uniformly sampled from the parameter space of the target PDE, specifically including different initial conditions, boundary conditions, physical parameters, etc. A reference solution is generated using a high-precision data method, recording the exact solution at each time sub-interval and each configuration node. Figure 2 The PINN training diagram provided in this application illustrates the training process as follows:

[0164] Step 201: Generate representative samples; Strategically select a series of representative sample points from the parameter space of the physical problem to be solved (such as different boundary conditions, physical parameters, and initial states). For each selected parameter combination, solve using traditional numerical methods (such as the finite element method or low-order time integration method running on a coarse mesh). The resulting coarse solution, although imprecise, is qualitatively correct and can capture the basic form and physical characteristics of the solution. Alternatively, existing historical simulation data or the output of a simplified model can be used. For each sample, record its coordinates on a large number of placement points within the computational domain and the corresponding coarse solution values. These placement points and their associated local data constitute the input of PINN.

[0165] Step 202: Construct the unsupervised loss function; the loss function used to train PINN is... .in, For the discrete residual operator corresponding to the computation node, the derivative of the output with respect to the input coordinates (space and time) is used by the automatic differential computation network, and then substituted into the discretized PDE. For boundary constraints, Calculate the difference between the PINN predicted values ​​at the boundary configuration points and the specified boundary conditions. Let PINN be the predicted value of the nth sub-interval and the i-th node; For boundary constraints, For weighting coefficients, For regularity constraints, Let L2 norm be the parameter of the neural network. To solve for PINN, the regional data formed within the computational domain according to preset rules.

[0166] Step 203: Minimize physical residual training; the purpose of this step is to find a set of neural network parameters that minimizes the value of the loss function described above. Specifically, this involves randomly initializing the PINN parameters. By inputting the configuration points into the PINN network, the prediction results of the PINN network can be obtained. The total loss L(θ) is calculated based on the predicted values. It should be noted that when calculating the physical residual term, the true value of the "coarse solution" is not needed as a label; instead, the network predictions are substituted into the physical law G to check their consistency. The gradient of the loss function with respect to the network parameters θ is calculated. θ is updated using a gradient descent algorithm (such as Adam) to reduce the loss value.

[0167] Step 204: Determine whether the model meets the convergence condition; if the loss function converges to the predetermined threshold or reaches the maximum number of iterations, it is determined that the training stop requirement is met, and step 205 is executed; otherwise, step 202 is executed.

[0168] Step 205: Training complete, obtain trained PINN;

[0169] It should be noted that the PINN network can be a lightweight MLP (e.g., 3 hidden layers with 64-256 hidden units) or a small convolutional neural network when spatial information is required. The final layer outputs a linear solution, and if necessary, a physical feasibility mapping (e.g., projection onto an allowable interval) is applied after the output. During inference, batch processing is used to infer the initial solution of all computation nodes in the current parallel unit on the GPU at once.

[0170] This application's embodiments use physical residuals as a monitoring signal to ensure that the PINN output satisfies the governing equations as much as possible, thus eliminating reliance on high-cost numerical simulation data. Furthermore, PINN training is combined with coarse-factor operators, second-derivative information, or domain knowledge to improve initial value quality and further reduce the number of iterations.

[0171] Furthermore, during the PINN solution process, the latest approximate value of the solution is obtained for all computation nodes within the current parallel unit. This approximation may come from the previous iteration or the initial solution. The mathematical form of the physical residual is usually related to the discrete residual operator in the loss function. Directly related, for a given computation node and the current solution, the physical residual can be defined as: .in, For discrete residual operators, This is the current solution value on this computation node. This refers to locally known data, including physical parameters, source terms, boundary condition information, etc.

[0172] The physical residual is calculated at each computing node. Then, a norm (such as the L2 norm) of the residuals across all computing nodes within the current parallel unit can be calculated as a measure of the overall physical inconsistency of that parallel unit, which can be referred to as the error. The larger this norm value, the further the current solution deviates from the physical laws. Therefore, if the calculated error exceeds this error threshold, the PINN fine-tuning process is triggered to dynamically adjust the parameters.

[0173] In this embodiment, PINN is fine-tuned online using the physical residual of the computing node corresponding to the current parallel unit, enabling PINN to adapt to local nonlinearity or parameter drift.

[0174] Based on the above embodiments, the method further includes:

[0175] Calculate the physical residual of the computing node corresponding to the parallel unit;

[0176] If the physical residual is greater than the residual threshold, a rollback strategy is triggered;

[0177] The backoff strategies include: using coarse-grained operators for solving or adding Newtonian damping.

[0178] In the specific implementation process, after using the already trained PINN model, the coordinate information of all computing nodes within the current parallel unit is input. The PINN model generates a set of initial solutions in parallel. The system can substitute the initial solutions output by PINN into physical laws for verification. If it is accurate, then the left-hand side of the governing equation equals the right-hand side. However, since discrete numerical results are not exact solutions, the left-hand side of the governing equation is not strictly equal to the right-hand side. The difference between the left-hand and right-hand sides is the residual. If the physical residual is greater than the residual threshold, it indicates that PINN has generated a physically unreasonable and highly biased prediction for the current specific parallel unit. At this time, a backoff strategy can be triggered.

[0179] The fallback strategy may include using a computationally fast, robust, but less accurate traditional numerical method (i.e., a coarse-solving operator) to generate the initial solution for the parallel cell. This coarse-solving operator can be an explicit Euler method, a low-order implicit method, or a model solved on a coarser mesh.

[0180] The backoff strategy can also include adding Newton damping. Adding Newton damping can improve the condition number of the iteration matrix, making the linear system easier to solve, thereby avoiding divergence caused by excessive step size.

[0181] In this embodiment of the application, if the physical residual is large, it indicates that the initial solution given by PINN is not accurate enough. In this case, a more accurate initial solution can be given by adopting other methods through a rollback strategy.

[0182] Building upon the above embodiments, when sending the exact solution of the last time sub-interval in the current parallel unit to the next parallel unit, an asynchronous CUDA stream can be used. This allows numerical transmission and computation to proceed in parallel, reducing the probability of collisions. Specifically, asynchronous communication, overlapping computation-communication, and hierarchical task scheduling are employed on multi-GPU clusters to improve weak / strong scalability, while incorporating communication error terms into the global error budget.

[0183] Based on the above embodiments, for energy-conserving systems, after completing iterative correction of all parallel units, the global relative error is calculated based on the conserved quantities of the energy-conserving system; if the global relative error does not meet the requirements, the parameters are adaptively adjusted, the neural network is fine-tuned, or the mesh is refined before resolving.

[0184] In the specific implementation process Figure 3 This application provides a schematic flowchart of a post-correction processing method, the specific method of which is as follows:

[0185] Step 301: Calculate the global relative error; based on the specific energy-conserving system (such as a Hamiltonian system, elastic wave system, etc.), define the system's total energy expression as E(t) = Kinetic Energy + Potential Energy. Over the entire computational domain, using the calculated numerical solution and its derivative, calculate the total energy of the entire system at the initial and final moments numerically (e.g., through Gaussian quadrature). The difference between the final and initial total energy, divided by the initial total energy, is called the global relative error. This global relative error quantifies the severity of the numerical solution's violation of the law of energy conservation as a whole.

[0186] Step 302: Determine if the global relative error is less than a preset threshold; after calculating the global relative error, compare it with a preset error tolerance. If the global relative error is less than the error tolerance, the current solution is considered physically reliable and meets the energy conservation requirement, thus completing the parallel spectral delay correction. Otherwise, it indicates that the numerical solution has a significant physical deviation, and an adaptive adjustment strategy can be initiated, i.e., step 303.

[0187] Step 303: Adaptive adjustment strategy.

[0188] During optimization, based on the analysis results of the global relative error, the system adaptively adopts one or more of the following adjustment strategies: adjusting computational parameters by reducing the time step, fine-tuning the physical information neural network online using the current solution data to optimize the quality of its initial values, or densifying the computational grid by increasing the number of time sub-intervals and the number of computational nodes within each sub-interval. After the adjustment is completed, the system restarts the entire parallel spectral delay correction process from the initial time or the previous verified computational state, and repeats the error evaluation until the global relative error meets the preset accuracy requirements.

[0189] The embodiments of this application calculate the global relative error by conserving quantities, and when the global relative error does not meet the requirements, the solution is recalculated after operations such as adaptively adjusting parameters, fine-tuning the neural network, or refining the mesh, so as to obtain a result that meets the requirements.

[0190] Figure 4 This is a schematic diagram of another GPU-based parallel latency correction method provided in this application embodiment. The GPU-accelerated parallel spectral latency correction (para-SDC) method proposed in this application embodiment is executed based on a three-layer parallel architecture of GPU, wherein: the first layer of parallelism maps different time sub-intervals to different GPU thread blocks or streams; the second layer of parallelism maps different computing nodes within the same time sub-interval to different threads or thread bundles within the same thread block; and the third layer of parallelism processes the system of equations to be solved on different computing nodes in parallel through a batch solver.

[0191] The three-layer parallel mapping is implemented on the GPU as follows:

[0192] The first layer (parallel unit level): Each parallel unit is assigned to an independent CUDA stream or a thread block grid. This allows multiple parallel units to execute in a pipelined or concurrent manner, achieving coarse-grained parallelism in the time domain.

[0193] The second layer (time sub-interval level): Within a parallel unit, each time sub-interval is mapped to a CUDA thread block. All threads within this thread block work together, specifically responsible for the related computations of all computing nodes within that sub-interval.

[0194] The third layer (computation node level): Within each thread block (corresponding to a time sub-interval), each computation node is further assigned to different threads or warps for processing. For example, all degrees of freedom computation tasks of a computation node can be assigned to a warp, or a group of consecutive threads within a thread block can be responsible for a node, thereby achieving node-level data parallelism. This mapping method is beneficial for organizing threads to perform coalesced memory access to contiguous memory regions of node data, thereby improving GPU memory bandwidth utilization. This method adopts a "correction-compensation" iterative process: First, [0,T] is divided equally or unequally into N sub-intervals J_n, and M Gauss-Radau nodes are arranged in each sub-interval. P consecutive sub-intervals are combined into a parallel cell. Within each parallel cell, physical features are assembled in parallel for all computation nodes, and high-quality initial solutions are generated in batches using a pre-trained Physical Information Neural Network (PINN). The assembled physical features include: (1) the approximate solution value obtained from the previous round of correction (reflecting the current state); (2) the length of the time period (time step size); (3) the specific position within the time period (e.g., the beginning, middle, or end); and (4) the local "difficulty" index (e.g., how large the previously calculated residual is, and how rigid the problem is). The assembled physical features are spliced ​​together and sent to PINN for batch Newton refinement on the GPU, significantly reducing the number of iterations. After convergence, the time continuity is restored through explicit Picard serial compensation, and the correction scan is repeated until the preset number of iterations is reached. After all parallel units have finished processing, the global relative error is calculated based on energy and other conserved quantities. If the global relative error is greater than the error tolerance, the parameters are adaptively adjusted, the neural network is fine-tuned, or the mesh is encrypted before resolving, thereby achieving efficient parallel acceleration of rigid and nonlinear problems on the GPU while ensuring numerical accuracy and physical structure. Otherwise, the solution is determined as the final solution.

[0195] In this embodiment, stability condition estimation is used. ,in, The value of is related to the Jacobian-Lipschitz constant, which guarantees quadratic convergence and allows for estimation of the number of iterations. The purpose of PINN is to control the initial solution within the neighborhood that satisfies this inequality.

[0196] Figure 5This is a schematic diagram of a GPU-based parallel spectral delay correction device provided in an embodiment of this application. The device can be a module, program segment, or code on an electronic device. It should be understood that this device is similar to the one described above. Figure 1 The method implementation corresponds to this and can be executed. Figure 1 The specific functions of the device involved in the various steps of the method embodiment can be found in the description above; to avoid repetition, detailed descriptions are omitted here. The device includes: an acquisition module 501, a correction module 502, a compensation module 503, and a final value transmission module 504, wherein:

[0197] The acquisition module 501 is used to acquire multiple parallel units; wherein each parallel unit includes multiple consecutive time sub-intervals, and each time sub-interval includes multiple computing nodes; the time sub-intervals are obtained by dividing the time intervals;

[0198] The correction module 502 is used to determine the current parallel unit in chronological order and assign each time sub-interval in the current parallel unit to a CUDA block of the GPU; all time sub-intervals in the current parallel unit simultaneously perform multiple iterative correction scans through their respective CUDA blocks until the stopping iteration condition is met;

[0199] The compensation module 503 is used to perform serial compensation on the time sub-intervals within the parallel unit in sequence after completing multiple iterations of correction scan processing, so as to obtain the accurate solution of the current parallel unit.

[0200] The final value sending module 504 is used to send the exact solution of the last time sub-interval in the current parallel unit to the next parallel unit, so that the next parallel unit performs the correction scan process until the correction scan process of the last parallel unit is completed.

[0201] The calibration scan processing steps are as follows:

[0202] The calculations of the computing nodes in the current parallel unit are combined into a batch;

[0203] The batch solver in the GPU is invoked to perform batch computation and obtain the initial solution for each computing node;

[0204] Based on the initial solution, parallel batch refinement is performed using the thread group corresponding to each computing node.

[0205] Based on the above embodiments, the correction module 502 is specifically used for:

[0206] The batch solver in the GPU is invoked. Under the condition of enabling the model, the node values ​​of the previous SDC iteration, the length of the time sub-interval, the location of the computing node and the local residual statistics are input into the physical information neural network PINN to generate the initial solution for each computing node in parallel. The physical information neural network is obtained by training by minimizing the discrete operator residual.

[0207] Based on the above embodiments, the conditions for enabling the model include:

[0208] The estimated cost values ​​based on the measured batch inference cost, correction scan cost, and number of iterations are less than 0.

[0209] The formula for calculating the cost assessment value is as follows:

[0210] Cost assessment value = ;

[0211] in, The cost of batch inference; The estimated number of calibration scans required after enabling PINN; The estimated number of calibration scans required when PINN is not enabled; Expected calibration scan overhead after enabling PINN; Predicted calibration scan overhead when PINN is not enabled.

[0212] Based on the above embodiments, the device further includes a training module for:

[0213] Input the training samples into the PINN to be trained, and obtain the predicted values ​​output by the PINN to be trained;

[0214] Based on the predicted values, the PINN to be trained is optimized using a loss function that includes the norm of the discrete residuals of the computation nodes; wherein the loss function is:

[0215] ;

[0216] in, This is the discrete residual operator corresponding to this computation node. Let PINN be the predicted value of the nth sub-interval and the i-th node; For boundary constraints, For weighting coefficients, For regularity constraints, Let L2 norm be the parameter of the neural network. To solve for PINN, the regional data formed within the computational domain according to preset rules.

[0217] Based on the above embodiments, the device further includes an online fine-tuning module for:

[0218] Calculate the physical residual of the computing node corresponding to the current parallel unit;

[0219] The PINN is fine-tuned based on the physical residual.

[0220] Based on the above embodiments, the device further includes a rollback module, used for:

[0221] Calculate the physical residual of the computing node corresponding to the parallel unit;

[0222] If the physical residual is greater than the residual threshold, a rollback strategy is triggered;

[0223] The backoff strategy includes: using a coarse solution operator or adding Newton damping.

[0224] Based on the above embodiments, the compensation module 503 is specifically used for:

[0225] Calculate the discontinuity value between two adjacent parallel units;

[0226] Based on the discontinuity value, serial compensation is performed using polynomial interpolation.

[0227] The steps of calculating discontinuity values ​​and serial compensation are performed within the same GPU core.

[0228] Based on the above embodiments, the correction module 502 is specifically used for:

[0229] In the corresponding thread group, batch refinement solutions are implemented using batch LU, batch QR, or batch iterativesolver.

[0230] Based on the above embodiments, the final value sending module 504 is specifically used for:

[0231] The exact solution of the last time sub-interval in the current parallel unit is sent to the next parallel unit asynchronously via CUDA stream.

[0232] Based on the above embodiments, the device further includes an optimization module for:

[0233] For an energy-conserving system, after all parallel units have completed the correction scan, the global relative error is calculated based on the conserved quantities of the energy-conserving system.

[0234] If the global relative error does not meet the requirements, the parameters are adaptively adjusted, the neural network is fine-tuned, or the mesh is refined before resolving.

[0235] Figure 6 This is a schematic diagram of the physical structure of the electronic device provided in the embodiments of this application, such as... Figure 6 As shown, the electronic device includes: a processor 601, a memory 602, and a bus 603; wherein:

[0236] The processor 601 and the memory 602 communicate with each other through the bus 603;

[0237] The processor 601 is used to call program instructions in the memory 602 to execute the methods provided in the above-described method embodiments, such as: acquiring multiple parallel units; wherein each parallel unit includes multiple consecutive time sub-intervals, and each time sub-interval includes multiple computing nodes; the time sub-intervals are obtained by dividing time intervals; determining the current parallel unit according to time order, and allocating each time sub-interval in the current parallel unit to a CUDA block of the GPU; all time sub-intervals in the current parallel unit simultaneously perform multiple iterative correction scans through their respective CUDA blocks until the stopping iteration condition is met; after completing multiple... After iterative correction scan processing, serial compensation is performed on the time sub-intervals within the parallel unit in sequence to obtain the exact solution of the current parallel unit; the exact solution of the last time sub-interval in the current parallel unit is sent to the next parallel unit, so that the next parallel unit performs correction scan processing, until the correction scan processing of the last parallel unit is completed; wherein, the correction scan processing steps are as follows: the solution calculations of the computing nodes in the current parallel unit are combined into a batch; the batch solver in the GPU is called to perform batch calculation to obtain the initial solution of each computing node; based on the initial solution, parallel batch refinement solution is performed through the thread group corresponding to each computing node.

[0238] Processor 601 can be an integrated circuit chip with signal processing capabilities. The processor 601 can be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc.; it can also be a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. It can implement or execute the various methods, steps, and logic block diagrams disclosed in the embodiments of this application. The general-purpose processor can be a microprocessor or any conventional processor.

[0239] The memory 602 may include, but is not limited to, random access memory (RAM), read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), etc.

[0240] This embodiment discloses a computer program product, which includes a computer program stored on a non-transitory computer-readable storage medium. The computer program includes program instructions, and when the program instructions are executed by the computer, the computer can execute the methods provided in the above-described method embodiments, such as: acquiring multiple parallel units; wherein each parallel unit includes multiple consecutive time sub-intervals, and each time sub-interval includes multiple computing nodes; the time sub-intervals are obtained by dividing the time intervals; determining the current parallel unit according to the time order, and allocating each time sub-interval in the current parallel unit to a CUDA block of the GPU; all time sub-intervals in the current parallel unit are executed simultaneously through their respective CUDA blocks. The correction scan process is iterated multiple times until the stopping iteration condition is met. After completing multiple iterations of correction scan processing, the time sub-intervals within the parallel unit are serially compensated in sequence to obtain the exact solution of the current parallel unit. The exact solution of the last time sub-interval in the current parallel unit is sent to the next parallel unit, so that the next parallel unit performs correction scan processing until the correction scan processing of the last parallel unit is completed. The correction scan processing steps are as follows: the solution calculations of the computing nodes in the current parallel unit are combined into a batch; the batch solver in the GPU is called to perform batch calculation to obtain the initial solution of each computing node; based on the initial solution, parallel batch refinement solution is performed through the thread group corresponding to each computing node.

[0241] This embodiment provides a non-transitory computer-readable storage medium storing computer instructions that cause the computer to execute the methods provided in the above-described method embodiments. For example, the methods include: acquiring multiple parallel units; wherein each parallel unit includes multiple consecutive time sub-intervals, and each time sub-interval includes multiple computing nodes; the time sub-intervals are obtained by dividing time intervals; determining the current parallel unit according to time order, and allocating each time sub-interval in the current parallel unit to a CUDA block of the GPU; all time sub-intervals in the current parallel unit simultaneously perform multiple iterative correction scans through their respective CUDA blocks until a certain condition is met. The iteration stops when the condition is met. After completing multiple iterations of correction scan processing, serial compensation is performed on the time sub-intervals within the parallel unit in chronological order to obtain the exact solution of the current parallel unit. The exact solution of the last time sub-interval in the current parallel unit is sent to the next parallel unit, so that the next parallel unit performs correction scan processing until the correction scan processing of the last parallel unit is completed. The correction scan processing steps are as follows: the solution calculations of the computing nodes in the current parallel unit are combined into a batch; the batch solver in the GPU is called to perform batch calculation to obtain the initial solution of each computing node; based on the initial solution, parallel batch refinement solution is performed through the thread group corresponding to each computing node.

[0242] In the embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. The apparatus embodiments described above are merely illustrative. For example, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. Furthermore, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Additionally, the displayed or discussed mutual couplings, direct couplings, or communication connections may be through some communication interfaces; indirect couplings or communication connections between devices or units may be electrical, mechanical, or other forms.

[0243] Furthermore, the units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0244] Furthermore, the functional modules in the various embodiments of this application can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part.

[0245] In this document, relational terms such as first and second are used only to distinguish one entity or operation from another entity or operation, without necessarily requiring or implying any such actual relationship or order between these entities or operations.

[0246] The above description is merely an embodiment of this application and is not intended to limit the scope of protection of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of protection of this application.

Claims

1. A GPU-based parallel spectral delay correction method, characterized in that, include: Multiple parallel units are obtained; each parallel unit includes multiple consecutive time sub-intervals, and each time sub-interval includes multiple computing nodes; the time sub-intervals are obtained by dividing the time intervals. The current parallel unit is determined according to time order, and each time sub-interval in the current parallel unit is assigned to a CUDA block of the GPU; all time sub-intervals in the current parallel unit simultaneously perform multiple iterative correction scans through their respective CUDA blocks until the stopping iteration condition is met; After completing multiple iterations of correction scan processing, serial compensation is performed on the time sub-intervals within the same parallel unit in chronological order to obtain the accurate solution of the current parallel unit. The exact solution of the last time sub-interval in the current parallel unit is sent to the next parallel unit as its initial condition, so that the next parallel unit performs a correction scan until the correction scan of the last parallel unit is completed. The correction scan process in each iteration consists of the following steps: For the current parallel unit, the calculations of the computing nodes in the current parallel unit are combined into a batch; The batch solver in the GPU is invoked to perform batch computation and obtain the solution increment or update value used to update the current node value. Based on the solution increment or update value, complete the current correction scan update of the values ​​of all computing nodes in the current parallel unit.

2. The method according to claim 1, characterized in that, The step of calling the batch solver in the GPU to perform batch computation and obtain the solution increment or update value for updating the current node value includes: The batch solver in the GPU is invoked. Under the condition of enabling the model, the node value of the previous SDC iteration, the length of the time sub-interval, the calculation node position and the local residual statistics are input into the physical information neural network PINN to generate solution increments or update values ​​for updating the current node value in parallel. The physical information neural network is obtained by training through minimizing the discrete operator residual.

3. The method according to claim 2, characterized in that, The conditions for enabling the model include: The estimated cost values ​​based on the measured batch inference cost, correction scan cost, and number of iterations are less than 0. The formula for calculating the cost assessment value is as follows: Cost assessment value = ; in, The cost of batch inference; The estimated number of calibration scans required after enabling PINN; The estimated number of calibration scans required when PINN is not enabled; Expected calibration scan overhead after enabling PINN; Predicted calibration scan overhead when PINN is not enabled.

4. The method according to claim 2, characterized in that, The method further includes: Input the training samples into the PINN to be trained, and obtain the predicted values ​​output by the PINN to be trained; Based on the predicted values, the PINN to be trained is optimized using a loss function that includes the norm of the discrete residuals of the computation nodes; wherein the loss function is: ； in, This is the discrete residual operator corresponding to this computation node. Let PINN be the predicted value of the nth sub-interval and the i-th node; For boundary constraints, For weighting coefficients, For regularity constraints, Let L2 norm be the parameter of the neural network. To solve for PINN, the regional data formed within the computational domain according to preset rules.

5. The method according to claim 2, characterized in that, The method further includes: Calculate the physical residual of the computing node corresponding to the current parallel unit; The PINN is fine-tuned based on the physical residual.

6. The method according to claim 2, characterized in that, The method further includes: Calculate the physical residual of the computing node corresponding to the parallel unit; If the physical residual is greater than the residual threshold, a rollback strategy is triggered; The backoff strategy includes: using a coarse solution operator or adding Newton damping.

7. The method according to claim 1, characterized in that, The step of performing serial compensation on time sub-intervals within a parallel unit in a sequential manner includes: Calculate the discontinuity value between two adjacent parallel units; Based on the discontinuity value, serial compensation is performed using polynomial interpolation. The steps of calculating discontinuity values ​​and serial compensation are performed within the same GPU core.

8. The method according to claim 1, characterized in that, The step of performing the current correction scan update on the values ​​of all computing nodes within the current parallel unit based on the solution increment or update value includes: In the corresponding thread group, the batch refinement solution incrementally or updated values ​​are obtained by using batch LU, batch QR, or batch iterative solver.

9. The method according to claim 1, characterized in that, Sending the exact solution of the last time sub-interval in the current parallel unit to the next parallel unit includes: The exact solution of the last time sub-interval in the current parallel unit is sent to the next parallel unit asynchronously via CUDA stream.

10. The method according to claim 1, characterized in that, The method further includes: For an energy-conserving system, after all parallel units have completed the correction scan, the global relative error is calculated based on the conserved quantities of the energy-conserving system. If the global relative error does not meet the requirements, the parameters are adaptively adjusted, the neural network is fine-tuned, or the mesh is refined before resolving.

11. The method according to claim 1, characterized in that, The step of combining the solution calculations of the computing nodes in the current parallel unit into a batch includes: The batch size is dynamically determined based on the GPU's memory capacity and the data size of the computing nodes; The calculations of the computing nodes in the current parallel unit are combined into a batch according to the determined batch size.

12. The method according to any one of claims 1-11, characterized in that, The method is based on a three-layer parallel architecture of GPU, wherein: the first layer of parallelism maps different time sub-intervals to different GPU thread blocks or streams; the second layer of parallelism maps different computing nodes within the same time sub-interval to different threads or thread bundles within the same thread block; and the third layer of parallelism processes the system of equations to be solved on different computing nodes in parallel through a batch solver.

13. A GPU-based parallel spectral delay correction device, characterized in that, include: An acquisition module is used to acquire multiple parallel units; wherein each parallel unit includes multiple consecutive time sub-intervals, and each time sub-interval includes multiple computing nodes; the time sub-intervals are obtained by dividing the time intervals; The correction module is used to determine the current parallel unit in chronological order and assign each time sub-interval in the current parallel unit to a CUDA block of the GPU; all time sub-intervals in the current parallel unit simultaneously perform multiple iterative correction scans through their respective CUDA blocks until the stopping iteration condition is met; The compensation module is used to perform serial compensation on the time sub-intervals within the same parallel unit in sequence after completing multiple iterations of correction scan processing, so as to obtain the accurate solution of the current parallel unit. The final value sending module is used to send the exact solution of the last time sub-interval in the current parallel unit to the next parallel unit as its initial condition, so that the next parallel unit performs the correction scan process until the correction scan process of the last parallel unit is completed. The correction scan process in each iteration consists of the following steps: For the current parallel unit, the calculations of the computing nodes in the current parallel unit are combined into a batch; The batch solver in the GPU is invoked to perform batch computation and obtain the solution increment or update value used to update the current node value. Based on the solution increment or update value, complete the current correction scan update of the values ​​of all computing nodes in the current parallel unit.

14. An electronic device, characterized in that, include: Processor, memory, and bus, among which: The processor and the memory communicate with each other via the bus; The memory stores program instructions that can be executed by the processor, and the processor can execute the method as described in any one of claims 1-12 by calling the program instructions.

15. A non-transitory computer-readable storage medium, characterized in that, The non-transitory computer-readable storage medium stores computer instructions that, when executed by a computer, cause the computer to perform the method as described in any one of claims 1-12.

16. A computer program product, characterized in that, It includes computer program instructions, which, when read and executed by a processor, perform the method as described in any one of claims 1-12.

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