A safe starting control method and device, equipment, and storage medium

Abstract

The application belongs to the technical field of intelligent control, and discloses a safe starting control method and device, equipment and a storage medium, two independent Flash memories are arranged to store a basic operating system and a complete operating system respectively, physical isolation is realized, and an attack chain is blocked. When it is detected that the electronic equipment is powered on, only the first Flash memory is powered, the basic operating system is loaded and run, the power supply of the first Flash memory is cut off, and the second Flash memory is powered. The complete operating system is mounted to the memory disk, the power supply of the second Flash memory is cut off after the complete operating system is run, so that the first Flash memory can be powered off immediately after the basic operating system is started and run, the second Flash memory is dynamically switched to, and the attack surface is reduced. At the same time, the memory disk mounting mode is adopted, the dependence on the continuous reading and writing of the Flash memory can be reduced, the memory resources are optimized, and then the reliability and safety of the running system are improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of intelligent control, and particularly relates to a safe starting control method and device, equipment and storage medium. BACKGROUND

[0002] Embedded devices, especially Internet of Things terminals, industrial controllers and critical infrastructure components, have very high requirements for the reliability and security of system startup. At present, such devices generally use a single Flash memory as the only startup and storage medium, and the operating system kernel, application programs and critical data are all stored in this medium.

[0003] However, the single Flash memory solution has a single point of failure risk, and if the storage medium is damaged, the system will be completely paralyzed. Moreover, in this single Flash memory architecture, the entire software system is stored in the same writable medium, and the security attack surface is concentrated. Once the attacker breaks through the system protection, he can perform persistent malicious tampering on any link of the startup chain, such as the boot program and the kernel image. After that, no matter how many times the system restarts, the malicious code will be loaded and executed, and the device will be completely compromised.

[0004] It can be seen that the existing single Flash memory solution has the problems of single point of failure risk and concentrated security attack surface, resulting in insufficient reliability and security of the running system. SUMMARY

[0005] In view of the above defects, the purpose of the present application is to provide a safe starting control method and device, equipment and storage medium, which can improve the reliability and security of the running system.

[0006] The first aspect of the present application discloses a safe starting control method, which is applied to an electronic device, the electronic device comprising a first Flash memory, a second Flash memory, a power module and a controller; the controller is connected to the power module, the first Flash memory and the second Flash memory respectively, and the power module is connected to the first Flash memory and the second Flash memory respectively; the method comprises:

[0007] When it is detected that the electronic device is powered on, the power module is controlled to supply power only to the first Flash memory;

[0008] The basic operating system is loaded and run from the first Flash memory;

[0009] After the basic operating system is run, the power module is controlled to cut off the power supply of the first Flash memory;

[0010] The power module is controlled to supply power to the second Flash memory;

[0011] mounting the complete operating system stored in the second Flash memory to a memory disk, and establishing a path mapping table for mapping an original root path of the complete operating system to a mounting point corresponding path of the memory disk;

[0012] controlling the power module to cut off power supply to the second Flash memory after the complete operating system is running.

[0013] In some embodiments, after controlling the power module to supply power to the second Flash memory, and before mounting the complete operating system stored in the second Flash memory to a memory disk, the method further comprises:

[0014] performing integrity verification on a verification index structure stored in the second Flash memory using a hardware root of trust; the verification index structure is used to record sub-signature information of a plurality of software components in the complete operating system image stored in the second Flash memory and dependency relationships between the software components, and the verification index structure is signed by a public key of the hardware root of trust;

[0015] determining a corresponding target software component set from the verification index structure that passes the integrity verification according to context information of the current startup;

[0016] verifying the sub-signature information of the target software components in the target software component set, and triggering the operation of mounting the complete operating system stored in the second Flash memory to a memory disk after the sub-signature information of each target software component passes the verification.

[0017] In some embodiments, mounting the complete operating system stored in the second Flash memory to a memory disk comprises:

[0018] reading and decompressing a first partition of a base layer of the complete operating system from the second Flash memory and mounting to a memory disk;

[0019] simultaneously reading and decompressing a second partition of an extension layer of the complete operating system from the second Flash memory and mounting to a memory disk in parallel while the base layer is running;

[0020] delaying decompression of an application layer of the complete operating system on demand, and only decompressing and mounting to a third partition of a memory disk from the second Flash memory when the corresponding application is invoked.

[0021] In some embodiments, after controlling the power module to cut off power supply to the second Flash memory, the method further comprises:

[0022] predicting a predicted access time point of the second Flash memory;

[0023] calculating a confidence score of the predicted access time point;

[0024] if the confidence score reaches a preset threshold, setting a power supply time according to the predicted access time point;

[0025] when the current time reaches the power supply time, controlling a power module to temporarily supply power to the second Flash memory;

[0026] calculating an access activity index value of the second Flash memory;

[0027] when the access activity index value exceeds a dynamic threshold, cutting off the temporary power supply of the second Flash memory.

[0028] In some embodiments, after the control power module temporarily supplies power to the second Flash memory, the method further comprises:

[0029] real-time monitoring of a current power supply current waveform of the second Flash memory;

[0030] comparing the collected current power supply current waveform with a reference power supply current waveform in a behavior fingerprint database, and calculating a power consumption deviation degree;

[0031] real-time recording of access behavior data of the second Flash memory, and analyzing the access behavior data to generate a current behavior fingerprint;

[0032] comparing the current behavior fingerprint with a reference behavior fingerprint in the behavior fingerprint database to obtain a behavior fingerprint similarity degree;

[0033] when the power consumption deviation degree exceeds a first threshold and the behavior fingerprint similarity degree is lower than a second threshold, determining that the second Flash memory is in an abnormal state;

[0034] when the duration of the abnormal state exceeds a set duration, triggering an abnormality alarm.

[0035] The second aspect of the application discloses a safe start control device, which is applied to an electronic device, and the electronic device comprises a first Flash memory, a second Flash memory, a power module and a controller. The controller is connected with the power module, the first Flash memory and the second Flash memory respectively, and the power module is connected with the first Flash memory and the second Flash memory respectively. The device comprises:

[0036] a first power supply unit, configured to control the power module to supply power to the first Flash memory only when power-on of the electronic device is detected;

[0037] a first loading unit, configured to load and run a basic operating system from the first Flash memory;

[0038] a first power-off unit, configured to control the power module to cut off power supply to the first Flash memory after the basic operating system is run;

[0039] a second power supply unit, configured to control the power module to supply power to the second Flash memory;

[0040] a second loading unit, configured to mount a complete operating system stored in the second Flash memory to a memory disk;

[0041] a mapping unit, configured to establish a path mapping table, the path mapping table being used to map an original root path of the complete operating system to a corresponding path of a mounting point of the memory disk;

[0042] a second power-off unit, configured to control the power module to cut off power supply to the second Flash memory after the complete operating system is run.

[0043] In some embodiments, the apparatus further includes:

[0044] a first verification unit, configured to perform integrity verification on a verification index structure stored in the second Flash memory using a hardware root of trust after the second power supply unit controls the power module to supply power to the second Flash memory and before the second loading unit mounts the complete operating system stored in the second Flash memory to the memory disk; the verification index structure is used to record sub-signature information of a plurality of software components in a complete operating system image stored in the second Flash memory and a dependency relationship between the software components, and the verification index structure is signed by a public key of the hardware root of trust;

[0045] a selection unit, configured to determine a target software component set corresponding to a critical component set from the verification index structure that passes the integrity verification according to context information of the current startup;

[0046] a second verification unit, configured to verify sub-signature information of the target software components in the target software component set, and trigger the second loading unit to perform the operation of mounting the complete operating system stored in the second Flash memory to the memory disk after the sub-signature information of each target software component passes the verification.

[0047] In some embodiments, the apparatus further includes:

[0048] a prediction unit configured to predict a predicted access time point of the second Flash memory after the second power-off unit controls the power module to cut off power supply of the second Flash memory;

[0049] a confidence score calculation unit configured to calculate a confidence score of the predicted access time point;

[0050] a setting unit configured to set a power supply time according to the predicted access time point when the confidence score reaches a preset threshold;

[0051] a third power supply unit configured to control the power module to temporarily supply power to the second Flash memory when the current time reaches the power supply time;

[0052] an index calculation unit configured to calculate an access activity index value of the second Flash memory;

[0053] a third power-off unit configured to cut off the temporary power supply of the second Flash memory when the access activity index value exceeds a dynamic threshold.

[0054] A third aspect of the present application discloses an electronic device, comprising a memory storing executable program code and a processor coupled with the memory; the processor invokes the executable program code stored in the memory, and is configured to execute the secure boot control method disclosed in the first aspect.

[0055] A fourth aspect of the present application discloses a computer readable storage medium storing a computer program, wherein the computer program causes a computer to execute the secure boot control method disclosed in the first aspect.

[0056] Compared with the prior art, the present application has the beneficial effects that by setting two independent Flash memories to store the basic operating system and the complete operating system respectively, physical isolation is achieved to block the attack chain. When power-on of the electronic device is detected, only the first Flash memory is powered, the basic operating system is loaded and run, the power supply of the first Flash memory is cut off, and the second Flash memory is powered; the complete operating system is mounted to the memory disk, and after the complete operating system is run, the power supply of the second Flash memory is cut off, so that the first Flash memory can be powered off immediately after the basic operating system is started and run, and the second Flash memory is dynamically switched to, thereby reducing the attack surface; at the same time, the memory disk mounting method is adopted, which can reduce the continuous reading and writing dependence on the Flash memory, optimize the memory resources, and further improve the reliability and security of the running system. BRIEF DESCRIPTION OF DRAWINGS

[0057] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the embodiments will be briefly introduced. The drawings described below only show some specific examples of the present application, and constitute a part of the specification, which are used to explain the technical solutions, principles and effects of the present application.

[0058] Unless specifically stated or defined otherwise, the same reference signs in different drawings represent the same or similar technical features, and different reference signs may also be used to represent the same or similar technical features.

[0059] Figure 1 is a flow chart of a safe starting control method disclosed by the embodiments of the present application;

[0060] Figure 2 is a structural schematic diagram of a safe starting control device disclosed by the embodiments of the present application;

[0061] Figure 3 is a structural schematic diagram of an electronic device disclosed by the embodiments of the present application.

[0062] Explanation of reference signs:

[0063] 201, first power supply unit; 202, first loading unit; 203, first power-off unit; 204, second power supply unit; 205, second loading unit; 206, mapping unit; 207, second power-off unit; 301, memory; 302, processor. DETAILED DESCRIPTION

[0064] In order to facilitate the understanding of the present application, the specific embodiments of the present application will be described in more detail below with reference to the drawings of the specification. The described embodiments are only some of the embodiments of the present application, not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative labor fall within the scope of protection of the present application.

[0065] Unless specifically stated or defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art. In the case of combining the technical solutions of the present application with the real scene, all technical and scientific terms used herein can also have meanings corresponding to the purpose of implementing the technical solutions of the present application. The terms "first, second" used herein are only used to distinguish the names, not to represent the specific quantity or order. The term "and / or" used herein includes any and all combinations of one or more related listed items.

[0066] It should be noted that the terms "comprising" and "having" and any variations thereof in the embodiments of the present application are intended to cover non-exclusive inclusion, for example, a process, method, system, product or device that includes a list of steps or units need not be limited to those clearly listed, but can include other steps or units not clearly listed or inherent to such processes, methods, products or devices.

[0067] The embodiments of the present application disclose a secure boot control method. The execution subject of the method can be an embedded electronic device such as an Internet of Things terminal and an industrial controller, or a mobile electronic device such as a computer, a notebook computer and a tablet computer, or a secure boot control device embedded in an electronic device, and the present application is not limited thereto. In the embodiments, the electronic device is taken as an example for illustration.

[0068] The electronic device comprises a first Flash memory, a second Flash memory, a power module and a controller; the controller is connected with the power module, the first Flash memory and the second Flash memory respectively, and the power module is connected with the first Flash memory and the second Flash memory respectively. The first Flash memory and the second Flash memory are both nonvolatile memories, the first Flash memory is used for storing a basic operating system, and the second Flash memory is used for storing a complete operating system.

[0069] In the embodiments of the present application, the first Flash memory is specifically set as a SPI NOR memory, and the minimum kernel is less than 2MB; the second Flash memory is specifically set as a NAND memory, and the capacity is greater than or equal to 32MB. One relay is configured for each of the two Flash memories, and the relay is connected between the power module and the Flash memory. By controlling the on-off state of the relay, the power supply or power cut of the power module to the Flash memory is realized.

[0070] Please refer to Figure 1 The secure boot control method comprises the following steps 110-160:

[0071] 110. When it is detected that the electronic device is powered on, the power module is controlled to supply power to only the first Flash memory.

[0072] 120. The basic operating system is loaded and run from the first Flash memory.

[0073] The basic operating system can be specifically a Bootloader program started by hardware.

[0074] 130. After the basic operating system is run, the power module is controlled to cut off the power supply to the first Flash memory.

[0075] Wherein, the power supply of the first Flash memory is cut off, and the response time is less than 10 ms.

[0076] 140. The power supply module is controlled to supply power to the second Flash memory.

[0077] Further preferably, before switching to the complete operating system, i.e. after performing step 140 and before performing step 150, a dynamic priority verification can also be performed, which can specifically include the following steps 141-144 not shown in the figure:

[0078] 141. The verification index structure stored in the second Flash memory is verified for integrity using the hardware root of trust; wherein the verification index structure is used to record the sub-signature information of a plurality of software components in the complete operating system image stored in the second Flash memory and the dependency relationship between the software components, and the verification index structure is signed by the public key of the hardware root of trust.

[0079] It should be noted that when the system is built or updated, not only the digital signature of the complete operating system image stored in the second Flash memory, such as Sig_Full, is generated, but also independent sub-signatures with versions and dependency relationships for the internal software components, such as the kernel, the security driver, and the initialization process, such as Sig_Kernel, Sig_Driver, etc. are generated, and a lightweight verification index structure is formed. The verification index structure is stored in the second Flash memory and is signed by the public key of the hardware root of trust.

[0080] 142. According to the context information of the current startup, the corresponding target software component set is determined from the verification index structure that has passed the integrity verification to form a key component set.

[0081] The context information of the current startup refers to the information related to the current startup and the last run, such as whether the last abnormal shutdown is detected, whether the current startup is a recovery mode, whether the current startup is from a low-power wake-up, etc. The context information is related to the key component set used for the current verification. For example, a normal startup can only need to verify the target software components such as the kernel and the initialization process; the recovery mode needs to verify the recovery tool set.

[0082] 143. The sub-signature information of the target software components in the key component set is verified.

[0083] 144. When the sub-signature information of each target software component is verified, step 150 is performed.

[0084] By not verifying the entire content of the complete operating system in the second Flash memory immediately before switching to the complete operating system, but verifying the integrity of the verification index structure read from the second Flash memory first, then dynamically determining the critical component set according to the context of the current startup, only the critical component set is subjected to digital signature verification, and once the critical component set verification is passed, step 150 is executed.

[0085] By dynamic priority verification, the necessary verification workload is minimized, only the critical component set is verified, which can reduce the verification time, so that the core part of the system can be quickly loaded and run, and fast startup is realized. Not only the verification is completed, but also the safety and reliability of the system are enhanced, and the startup efficiency is improved.

[0086] Moreover, the verification index and the sub-signature can accurately indicate the verification result of the specific software component, and precise fault positioning can be realized, such as invalid graphics card driver signature, which can determine the graphics card failure, rather than general operating system damage, greatly facilitating fault diagnosis and positioning.

[0087] In addition, by context awareness, different verification sets are selected according to the startup context, avoiding loading unnecessary code that may be maliciously exploited in sensitive mode, reducing the attack surface.

[0088] 150、Mount the complete operating system stored in the second Flash memory to the memory disk, and establish a path mapping table for mapping the original root path of the complete operating system to the corresponding path of the mounting point of the memory disk.

[0089] Mount the complete operating system stored in the second Flash memory to the memory disk to start and run the complete operating system.

[0090] Preferably, the system files of the complete operating system are divided into a basic layer, an extension layer and an application layer, and are stored in the second Flash memory after being compressed respectively, and different compression rates can be used for compression; wherein the basic layer contains operating system core components, which are compressed by a low first compression rate; the extension layer contains application support library, which is compressed by a medium second compression rate; and the application layer contains application programs and data files, which are compressed by a high third compression rate; wherein the first compression rate is less than the second compression rate, and the second compression rate is less than the third compression rate.

[0091] Correspondingly, the memory disk can be set as tmpfs. Under the running of the basic operating system, the memory disk partition is established, including the first partition, the second partition and the third partition which are independent of each other.

[0092] In step 150, the complete operating system stored in the second Flash memory is mounted to the memory disk, which can include the following steps 1501-1503 not shown in the figure:

[0093] 1501, the base layer of the complete operating system stored in the second Flash memory is read and decompressed and mounted to the first partition of the memory disk.

[0094] 1502, while the base layer is running, the extension layer of the complete operating system stored in the second Flash memory is read and decompressed and mounted to the second partition of the memory disk in parallel.

[0095] 1503, the application layer of the complete operating system is delayed for decompression on demand, and is decompressed from the second Flash memory and mounted to the third partition of the memory disk only when the corresponding application is called.

[0096] Specifically, the file access can be monitored by a background service, when an application requests to access the target file of the application layer in the complete operating system, the access is redirected to the corresponding position of the mounting point in the third partition of the tmpfs memory disk through the path mapping table; if the requested target file of the application layer is not in the corresponding position of the mounting point in the third partition of the tmpfs memory disk, the target file of the application layer is loaded on demand from the second Flash memory to the third partition of the tmpfs memory disk, and then provided to the application.

[0097] During system operation, the modification of the file in the tmpfs memory disk is temporarily stored in the tmpfs memory disk, and the modification is written back to the second Flash memory when the preset condition is met.

[0098] Further optionally, the memory usage of the memory disk can also be monitored in real time, when the memory usage exceeds a specified threshold, the system files in the memory disk with an access frequency lower than a specified frequency are re-compressed and temporarily stored in the second Flash memory.

[0099] In the present application, by means of hierarchical compression and dynamic decompression, after the base operating system is started, the system files of the complete operating system stored in the second Flash memory are loaded on demand to the tmpfs memory disk, which can optimize the memory disk and achieve the balance between on-demand decompression and fast startup. And by path mapping, the application program can be transparently accessed, which can improve the access speed, reduce the direct read and write of the second Flash memory, thereby reducing the number of Flash accesses and prolonging the service life of the Flash memory. Since the data is in the memory, it disappears when power is off, and the safety is also improved.

[0100] 160, after the complete operating system is running, the power module is controlled to cut off the power supply of the second Flash memory.

[0101] Further, before the complete operating system is started and before the power module is controlled to cut off the power supply of the second Flash memory, the digital signature verification of the sub-signature information of the remaining software components in the second Flash memory that have not been verified can be performed in a protected execution environment, such as in a separate, protected security coprocessor or a dedicated kernel thread. Before the verification is completed, the access request to the unverified area is suspended or redirected until the area is verified. In this way, by delaying the verification of the non-critical software components after the complete operating system is started, the centralized occupation and peak consumption of the Central Processing Unit (CPU) resources can be avoided, and the startup process is smoother.

[0102] Further, after the verification is completed, the verification result is encrypted and signed, and then written to a hardware secure storage area that can be accessed by the trusted code in the subsequent stage. After the complete operating system takes over, the verification result can be read from the hardware secure storage area, and whether to enable all functions such as network, external device, or trigger a security repair process can be determined according to the verification result. In this way, the security state of the startup stage can be known by the subsequent stage of the operating system, and the secure storage and trusted delivery of the verification result are realized.

[0103] As an optional implementation, after the execution of step 160, the following steps 161-166 not shown in the figure can also be executed:

[0104] 161. Predict the predicted access time point of the second Flash memory.

[0105] Optionally, step 161 includes the following steps S11-S15 not shown in the figure:

[0106] S11. Obtain the historical access data of the second Flash memory, the historical access data including a sequence of access time stamps, a sequence of access addresses, and an access type.

[0107] S12. Perform time feature extraction on the sequence of access time stamps to obtain a time feature vector.

[0108] The time feature extraction can be performed in a combination of Long Short-Term Memory (LSTM) and Transformer self-attention mechanism.

[0109] S13. Perform space feature extraction on the sequence of access addresses to obtain a space feature vector.

[0110] The space feature extraction models the spatial relationship between the storage addresses using Graph Neural Networks (GNN).

[0111] S14, the time feature vector and the space feature vector are fused to obtain a fusion feature vector.

[0112] The multi-modal fusion adopts a gating fusion mechanism and a cross-attention module. The multi-modal fusion specifically includes: calculating fusion weights of the time feature vector and the space feature vector by using the gating fusion mechanism; performing weighted fusion on the time feature vector and the space feature vector based on the fusion weights; inputting the weighted fusion result into the cross-attention module to enable the time feature and the space feature to enhance each other; and outputting the enhanced fusion feature vector. By using the multi-modal fusion mechanism, the time sequence feature and the space locality feature are considered simultaneously, so that the internal law of the access mode can be captured more comprehensively, and the prediction accuracy can be improved.

[0113] S15, the fusion feature vector is input into a prediction model to predict an output predicted access time point in a future predetermined time window.

[0114] 162, a confidence score of the predicted access time point is calculated.

[0115] The confidence score of the predicted access time point can be calculated based on the distribution modeling of the historical prediction error. By using the prediction confidence evaluation mechanism, the prediction uncertainty can be identified, the performance degradation caused by the false prediction can be avoided, and intelligent optimization can be realized.

[0116] 163, if the confidence score reaches a preset threshold, a power supply time is set according to the predicted access time point.

[0117] Optionally, when the confidence scores of the continuous multiple predicted access time points are lower than the preset threshold, the prediction model is triggered to be retrained or switched to a conservative prediction strategy. When the prediction model is retrained, the prediction strategy of the prediction model can be dynamically adjusted in combination with the system running state, and the system running state includes CPU load, memory usage, and current task type.

[0118] 164, when the power supply time arrives at the current time, the power supply module temporarily supplies power to the second Flash memory.

[0119] Optionally, after step 164 is performed, the following steps S21-S26 not shown in the figure can also be performed.

[0120] S21, the current power supply current waveform of the second Flash memory is monitored in real time.

[0121] S22, the collected current power supply current waveform is compared with the reference power supply current waveform in the behavior fingerprint database, and a power consumption deviation degree is calculated.

[0122] S23, the access behavior data of the second Flash memory is recorded in real time, and the current behavior fingerprint is generated by analyzing the access behavior data.

[0123] The access behavior data at least includes an access address sequence, an access frequency, and a time pattern.

[0124] A behavior fingerprint database can be preset, which stores reference power supply current waveforms and reference behavior fingerprints of the second Flash memory.

[0125] S24, similarity calculation is performed between the current behavior fingerprint and the reference behavior fingerprint in the behavior fingerprint database to obtain a behavior fingerprint similarity.

[0126] S25, when the power consumption deviation degree exceeds the first threshold value and the behavior fingerprint similarity is lower than the second threshold value, it is determined that the second Flash memory is in an abnormal state.

[0127] S26, when the duration of the abnormal state exceeds a set duration, an abnormal alarm is triggered.

[0128] Further, when the abnormal alarm is triggered, the power supply of the second Flash memory can be cut off, and an encrypted abnormal log is generated and stored.

[0129] Through double verification of the access behavior fingerprint and the power consumption pattern, the accuracy of Flash access abnormality detection can be improved, and the real-time identification capability of potential attacks can be enhanced.

[0130] 165, calculate an access activity index value of the second Flash memory.

[0131] It should be noted that the current idle time can be calculated as the access activity index value, and the current idle time refers to the time elapsed between the completion of the last valid read or write operation to the second Flash memory and the current time. Specifically, the time recorded from the time point when the last I / O operation ends to the current time is the current idle time. If the current idle time is too long, it can be determined that the second Flash memory has entered a long idle state, and the power can be safely cut off.

[0132] However, considering that in actual application, a single current idle time may not be sufficient to stably represent the access activity index value of the memory. Therefore, preferably, the comprehensive access interval can be calculated as the access activity index value by comprehensive consideration;

[0133] Specifically, step 165 includes the following steps S31-S33 which are not shown in the figure:

[0134] S31, obtain an access time sequence within a first time window from the access behavior data of the second Flash memory, and calculate a first access interval according to the access time sequence within the first time window.

[0135] The access time sequence includes respective access time points; the first access interval is calculated according to the access time sequence in the first time window, specifically including: according to a time attenuation factor, calculating the attenuation weight of each access time point in the access time sequence in the first time window, and then according to the attenuation weight and the time interval of each access time point from the current time, calculating the first access interval.

[0136] Supposing that the access time sequence is: {t1, t2, …, tN}, tN is the latest access time; then the specific calculation formula of the first access interval is shown in the following formula (1): N}, N

[0137] Δt = [Σ(a i *W i * (T now - T i ))] / Σ(a i *W i ) (1)

[0138] Wherein, W i is the access weight of the i-th access, W i = τ * (T now - T i ), the access weight of the closer to the current time is greater, τ is a time attenuation factor, 0 < τ < 1, and it is recommended that τ = 0.8; T i is the time of the i-th access, i.e. the i-th access time point; T now is the current time; a i is an adjustment coefficient of the access weight, and by default a i = 1, and important access can be set a i > 1; Σ is a symbol for summing all access time points in the time window, i is from 1 to N, and N is the number of accesses in the time window.

[0139] S32, obtaining the access time sequence located in the second time window from the access behavior data of the second Flash memory, and calculating the second access interval according to the access time sequence in the second time window.

[0140] Wherein, the first time window and the second time window are both the latest time window, both take the current time as the end point, the second time window is greater than the first time window, and the second time window contains the first time window; for example, the first time window can be set to 1 hour in the past, and the second time window can be set to 1 day in the past. It can be understood that the calculation method of the second access interval is the same as that of the first access interval, and the present application will not be repeated here.

[0141] ​S33, according to the current idle time of the second Flash memory, the first access interval and the second access interval, a weighted calculation is performed to obtain a comprehensive access interval of the second Flash memory, and the comprehensive access interval is taken as the access activity index value.

[0142] In the calculation, different weight coefficients a, b and g are respectively assigned to the current idle time of the second Flash memory, the first access interval and the second access interval, and then a weighted summation is performed. Among them, a+b+g=1, and a=0.7, b=0.2 and g=0.1 are recommended; or a=0.3, b=0.3 and g=0.4; or a=0.5, b=0.3 and g=0.2.

[0143] 166、When the access activity index value exceeds the dynamic threshold value, the temporary power supply of the second Flash memory is cut off.

[0144] Among them, the dynamic threshold value is dynamically calculated according to at least one of the following factors: the working temperature of the second Flash memory, the system remaining power, the current load of the system, the average access interval of the second Flash memory within a preset historical time window.

[0145] It can be understood that the higher the working temperature, the smaller the dynamic threshold value should be, which means faster power-off to prevent the second Flash memory from being powered on for a long time under high temperature, aggravating aging or causing thermal safety problems; when the current load of the system is low, it can be assumed that the access demand in the future period of time is also low, and the dynamic threshold value can be appropriately reduced to actively save power; the lower the system remaining power, the smaller the dynamic threshold value should be, to more actively cut off the power supply of unnecessary components and prolong the endurance of the device.

[0146] Specifically, the calculation of the dynamic threshold value can include the following steps S41-S44 which are not shown in the figure:

[0147] S41, the access time sequence within the preset historical time window is obtained from the historical access data of the second Flash memory, and the average access interval within the preset historical time window is calculated.

[0148] It should be noted that, unlike the first time window and the second time window, the preset historical time window refers to a certain historical period in the past, and has no connection with the current time.

[0149] The calculation formula of the average access interval is shown in the following formula (2):

[0150] Δt avg = (t N - t1) / (N - 1)(2)

[0151] Among them, Δt avgT is the average access interval in the preset historical time window, t is the time when the last access occurs in the time window, t1 is the time when the first access occurs in the time window, and N is the number of accesses in the time window. N T is the average access interval in the preset historical time window, t is the time when the last access occurs in the time window, t1 is the time when the first access occurs in the time window, and N is the number of accesses in the time window.

[0152] S42, according to the current idle time of the second flash memory and the average access interval in the preset historical time window, a basic threshold is calculated.

[0153] Specifically, the calculation formula of the basic threshold is shown in the following formula (3):

[0154] T base =λ*ΔT idle + (1-λ) *Δt avg (3)

[0155] Wherein, T base is the basic threshold, λ is the scene coefficient, which can be set by the developer in advance, for example, it can be set to 0.6, and its value can be adjusted according to different scenes. ΔT idle is the current idle time.

[0156] S43, according to the current working temperature of the second flash memory, the system remaining power and the system current load, respectively, a temperature compensation factor, a power compensation factor and a load compensation factor are calculated.

[0157] According to the current working temperature, the temperature compensation factor is calculated, as shown in the following formula (4):

[0158] f Temp = 1 + k temp * (T current - T nominal ) / T range (4)

[0159] Wherein, T current is the current temperature of the second flash memory; T nominal is the rated working temperature, such as 25℃; T range is the working temperature range difference, that is, the difference between the upper limit value and the lower limit value of the working temperature range is the working temperature range difference, such as the working temperature range [-40℃, 85℃], then the working temperature range difference is 85℃-(-40℃)=125℃, k temp is the temperature sensitivity coefficient, which is recommended to be set to 0.5~2.0.

[0160] According to the system remaining power, the power compensation factor is calculated, as shown in the following formula (5):

[0161] f Power = 1+ k power* (1- B remain / B full )(5)

[0162] wherein, B remain is the remaining battery power; B full is the full battery power; k power is the power sensitive coefficient, which is recommended to be set as 0.5~1.5.

[0163] According to the current load of the system, a load compensation factor is calculated, as shown in the following formula (6):

[0164] f Load = 1+k load * (1- R idle )(6)

[0165] wherein, R idle is the system idle ratio, which refers to the CPU occupancy rate of the current load of the system; k load is the load sensitive coefficient, which is recommended to be set as 0.2~0.8.

[0166] S44、According to the temperature compensation factor, the power compensation factor and the load compensation factor, the basic threshold value is adjusted to obtain a dynamic threshold value.

[0167] The calculation of the dynamic threshold value is shown in the following formula (7):

[0168] T dy = T base * f Temp *f Power *f Load (7)

[0169] wherein, T dy is the dynamic threshold value, T base is the basic threshold value, f Temp , f Power and f Load are the temperature compensation factor, the power compensation factor and the load compensation factor respectively.

[0170] Through temperature sensing, power sensing and load sensing, the dynamic threshold value is adaptively set for Flash memory power management, which can prolong the device endurance and reduce the heat attack surface.

[0171] In summary, by implementing the embodiment of the present application, two independent Flash memories are arranged to store a basic operating system and a complete operating system respectively, physical isolation is realized, and an attack chain is blocked. Moreover, the first Flash memory is powered off immediately after the basic operating system is started and runs, the second Flash memory is dynamically switched to, and an attack surface is reduced. Meanwhile, the memory disk mounting mode is adopted, the dependence on continuous reading and writing of the Flash memory is reduced, the memory resource is optimized, and then the reliability and security of the running system are improved.

[0172] Compared with the single-Flash starting scheme, the attack surface is reduced by 70%, and the power-off mechanism can prevent voltage glitch attacks. In addition, the dual-Flash redundancy makes the mean time between failures (MTBF) increase to 100,000 hours, and the reliability is greatly enhanced.

[0173] As shown in Figure 2 The embodiment of the present application discloses a secure starting control device, which is applied to an electronic device, and the electronic device includes a first Flash memory, a second Flash memory, a power module and a controller. The controller is connected with the power module, the first Flash memory and the second Flash memory respectively, and the power module is connected with the first Flash memory and the second Flash memory respectively. The device includes a first power supply unit 201, a first loading unit 202, a first power-off unit 203, a second power supply unit 204, a second loading unit 205, a mapping unit 206 and a second power-off unit 207, wherein,

[0174] The first power supply unit 201 is used for controlling the power module to supply power to the first Flash memory only when it is detected that the electronic device is powered on.

[0175] The first loading unit 202 is used for loading and running the basic operating system from the first Flash memory.

[0176] The first power-off unit 203 is used for controlling the power module to cut off the power supply of the first Flash memory after the basic operating system runs.

[0177] The second power supply unit 204 is used for controlling the power module to supply power to the second Flash memory.

[0178] The second loading unit 205 is used for mounting the complete operating system stored in the second Flash memory to the memory disk.

[0179] The mapping unit 206 is used for establishing a path mapping table, and the path mapping table is used for mapping the original root path of the complete operating system to the corresponding path of the mounting point of the memory disk.

[0180] The second power-off unit 207 is configured to control the power module to cut off the power supply of the second Flash memory after the complete operating system runs.

[0181] Optionally, the apparatus further comprises the following units not shown in the figure:

[0182] The first verification unit is configured to perform integrity verification on the verification index structure stored in the second Flash memory by using the hardware root of trust after the second power supply unit 204 controls the power module to supply power to the second Flash memory and before the second loading unit 205 mounts the complete operating system stored in the second Flash memory to the memory disk; the verification index structure is used to record the sub-signature information of a plurality of software components in the complete operating system image stored in the second Flash memory and the dependency relationship between the software components, and the verification index structure is signed by the public key of the hardware root of trust;

[0183] The selection unit is configured to determine a corresponding target software component set from the verification index structure that passes the integrity verification according to the context information of the current startup;

[0184] The second verification unit is configured to verify the sub-signature information of the target software component in the target software component set, and trigger the second loading unit 205 to perform the operation of mounting the complete operating system stored in the second Flash memory to the memory disk after the sub-signature information of each target software component passes the verification.

[0185] Further, the second loading unit 205 is specifically configured to read and decompress the first partition of the base layer of the complete operating system from the second Flash memory and mount it to the memory disk; read and decompress the second partition of the extension layer of the complete operating system from the second Flash memory in parallel while the base layer runs and mount it to the memory disk; and delay decompressing the application layer of the complete operating system as needed, and only decompress and mount the third partition of the application layer from the second Flash memory to the memory disk when the corresponding application is called.

[0186] Optionally, the apparatus further comprises the following units not shown in the figure:

[0187] The prediction unit is configured to predict a predicted access time point of the second Flash memory after the second power-off unit 207 controls the power module to cut off the power supply of the second Flash memory.

[0188] The confidence score calculation unit is configured to calculate a confidence score of the predicted access time point.

[0189] The setting unit is configured to set a power supply time according to the predicted access time point when the confidence score reaches a preset threshold.

[0190] a third power supply unit, configured to control the power supply module to temporarily supply power to the second Flash memory when a current time reaches a power supply time;

[0191] an index calculation unit, configured to calculate an access activity index value of the second Flash memory;

[0192] a third power-off unit, configured to cut off the temporary power supply of the second Flash memory when the access activity index value exceeds a dynamic threshold.

[0193] Further optionally, the apparatus further comprises the following units not shown in the figure:

[0194] a monitoring unit, configured to monitor a current power supply current waveform of the second Flash memory in real time after the third power supply unit controls the power supply module to temporarily supply power to the second Flash memory;

[0195] a power consumption calculation unit, configured to compare the collected current power supply current waveform with a reference power supply current waveform in a behavior fingerprint database, and calculate a power consumption deviation degree;

[0196] an analysis unit, configured to record access behavior data of the second Flash memory in real time, and analyze the access behavior data to generate a current behavior fingerprint;

[0197] a matching unit, configured to calculate a similarity degree between the current behavior fingerprint and a reference behavior fingerprint in the behavior fingerprint database, and obtain a behavior fingerprint similarity degree;

[0198] a determination unit, configured to determine that the second Flash memory is in an abnormal state when the power consumption deviation degree exceeds a first threshold and the behavior fingerprint similarity degree is lower than a second threshold;

[0199] an alarm unit, configured to trigger an abnormal alarm when a duration of the abnormal state exceeds a set duration.

[0200] Further optionally, the prediction unit comprises the following sub-units not shown in the figure:

[0201] an acquisition sub-unit, configured to acquire historical access data of the second Flash memory, the historical access data comprising an access timestamp sequence, an access address sequence and an access type;

[0202] a first feature extraction sub-unit, configured to perform time feature extraction on the access timestamp sequence to obtain a time feature vector;

[0203] a second feature extraction sub-unit, configured to perform space feature extraction on the access address sequence to obtain a space feature vector;

[0204] a feature fusion sub-unit, configured to perform multi-modal fusion on the time feature vector and the space feature vector to obtain a fusion feature vector.

[0205] a prediction subunit configured to input the fused feature vector into a prediction model to predict an output of a predicted access time point within a future predetermined time window.

[0206] Further optionally, the index calculation unit includes the following non-illustrated subunits:

[0207] a first calculation subunit configured to obtain an access time sequence within a first time window from the access behavior data of the second Flash memory, and calculate a first access interval according to the access time sequence within the first time window;

[0208] a second calculation subunit configured to obtain an access time sequence within a second time window from the access behavior data of the second Flash memory, and calculate a second access interval according to the access time sequence within the second time window;

[0209] a comprehensive subunit configured to calculate a comprehensive access interval of the second Flash memory according to the current idle time of the second Flash memory, the first access interval and the second access interval, and take the comprehensive access interval as the access activity index value.

[0210] Optionally, the device can further include the following non-illustrated units:

[0211] an obtaining unit configured to obtain an access time sequence within a preset historical time window from historical access data of the second Flash memory, and calculate an average access interval within the preset historical time window;

[0212] a threshold calculation unit configured to calculate a basic threshold according to the current idle time of the second Flash memory and the average access interval within the preset historical time window;

[0213] a compensation unit configured to calculate a temperature compensation factor, a power compensation factor and a load compensation factor according to a current working temperature of the electronic device, a system remaining power and a current load of the system, respectively;

[0214] a threshold adjustment unit configured to adjust the basic threshold to obtain a dynamic threshold according to the temperature compensation factor, the power compensation factor and the load compensation factor;

[0215] a transmission unit configured to transmit the dynamic threshold to the third power-off unit.

[0216] As shown in Figure 3 embodiments of the present application disclose an electronic device, which includes a memory 301 storing executable program codes and a processor 302 coupled with the memory 301;

[0217] The processor 302 invokes the executable program code stored in the memory 301 to execute the secure boot control method described in the above embodiments.

[0218] The embodiments of the present application also disclose a computer readable storage medium storing a computer program, wherein the computer program causes a computer to execute the secure boot control method described in the above embodiments.

[0219] Those skilled in the art can understand that part or all of the steps in the above embodiments can be completed by programs instructing relevant hardware, and the programs can be stored in a computer readable storage medium, including a Read-Only Memory (ROM), a Random Access Memory (RAM), a Programmable Read-Only Memory (PROM), an Erasable Programmable Read-Only Memory (EPROM), a One-time Programmable Read-Only Memory (OTPROM), an Electrically-Erasable Programmable Read-Only Memory (EEPROM), a Compact Disc Read-Only Memory (CD-ROM) or other optical disk memories, magnetic disk memories, magnetic tape memories or any other computer readable medium capable of carrying or storing data.

[0220] The above embodiments are intended to exemplarily reproduce and deduce the technical solutions of the present application, and to completely describe the technical solutions, objects and effects of the present application, so as to make the public more thoroughly and comprehensively understand the disclosed content of the present application, and not to limit the protection scope of the present application.

[0221] The above embodiments are not based on an exhaustive enumeration of the present application, and there can be a plurality of other embodiments not listed. Any replacement and improvement made without violating the concept of the present application is within the protection scope of the present application.

Claims

1. A safe start-up control method characterized by comprising: The method is applied to an electronic device, which comprises a first Flash memory, a second Flash memory, a power module and a controller; the controller is connected with the power module, the first Flash memory and the second Flash memory respectively, and the power module is connected with the first Flash memory and the second Flash memory respectively; The method comprises: When it is detected that the electronic device is powered on, the power module is controlled to supply power only to the first Flash memory; The basic operating system is loaded and run from the first Flash memory; After the basic operating system is run, the power module is controlled to cut off the power supply of the first Flash memory; The power module is controlled to supply power to the second Flash memory; The complete operating system stored in the second Flash memory is mounted to a memory disk, and a path mapping table is established, which is used to map the original root path of the complete operating system to the corresponding path of the mounting point of the memory disk; After the complete operating system is run, the power module is controlled to cut off the power supply of the second Flash memory; A predicted access time point of the second Flash memory is predicted; A confidence score of the predicted access time point is calculated; If the confidence score reaches a preset threshold, a power supply time is set according to the predicted access time point; When the current time reaches the power supply time, the power module is controlled to supply temporary power to the second Flash memory; An access activity index value of the second Flash memory is calculated; When the access activity index value exceeds a dynamic threshold, the temporary power supply of the second Flash memory is cut off; wherein the dynamic threshold is dynamically calculated according to at least one of the following factors: the working temperature of the second Flash memory, the system remaining power, the current system load, the average access interval of the second Flash memory within a preset historical time window.

2. The safety start control method according to claim 1, characterized by, After the power module is controlled to supply power to the second Flash memory, and before the complete operating system stored in the second Flash memory is mounted to the memory disk, the method further comprises: The verification index structure stored in the second Flash memory is integrity-verified by using a hardware root of trust; the verification index structure is used to record the sub-signature information of a plurality of software components in the complete operating system image stored in the second Flash memory and the dependency relationship between the software components, and the verification index structure is signed by a public key of the hardware root of trust protected by the hardware root of trust; According to the context information of the current start, the corresponding target software component set is determined from the verification index structure that passes the integrity verification; The sub-signature information of the target software component in the key component set is verified, and after the sub-signature information of each target software component is verified, the operation of mounting the complete operating system stored in the second Flash memory to the memory disk is triggered to be executed.

3. The safety start control method according to claim 2, characterized by, mounting a complete operating system stored in the second Flash memory to an in-memory disk, comprising: reading and decompressing a base layer of the complete operating system from the second Flash memory and mounting to a first partition of the in-memory disk; reading and decompressing an extension layer of the complete operating system from the second Flash memory in parallel with the running of the base layer and mounting to a second partition of the in-memory disk; delaying decompression of an application layer of the complete operating system on demand, and mounting to a third partition of the in-memory disk only when the corresponding application is invoked.

4. The safety start control method according to any one of claims 1 to 3, characterized by, After controlling the power module to temporarily power the second Flash memory, the method further comprises: monitoring a current power supply current waveform of the second Flash memory in real time; comparing the collected current power supply current waveform with a reference power supply current waveform in a behavior fingerprint database to calculate a power consumption deviation degree; recording access behavior data of the second Flash memory in real time, and analyzing the access behavior data to generate a current behavior fingerprint; calculating a behavior fingerprint similarity between the current behavior fingerprint and a reference behavior fingerprint in the behavior fingerprint database to obtain a behavior fingerprint similarity; when the power consumption deviation degree exceeds a first threshold value and the behavior fingerprint similarity is lower than a second threshold value, determining that the second Flash memory is in an abnormal state; when the duration of the abnormal state exceeds a set duration, triggering an abnormal alarm.

5. A safety start control device characterized by comprising: The device is applied to an electronic device, and the electronic device comprises a first Flash memory, a second Flash memory, a power module, and a controller; the controller is connected to the power module, the first Flash memory, and the second Flash memory respectively, and the power module is connected to the first Flash memory and the second Flash memory respectively; The device comprises: a first power supply unit configured to control the power module to power only the first Flash memory when detecting that the electronic device is powered on; a first loading unit configured to load and run a base operating system from the first Flash memory; a first power-off unit configured to control the power module to cut off the power supply of the first Flash memory after the base operating system is run; a second power supply unit configured to control the power module to power the second Flash memory; a second loading unit configured to mount a complete operating system stored in the second Flash memory to an in-memory disk; a mapping unit configured to establish a path mapping table, the path mapping table being used to map an original root path of the complete operating system to a corresponding path of a mounting point of the in-memory disk; a second power-off unit configured to control the power module to cut off the power supply of the second Flash memory after the complete operating system is run; a prediction unit configured to predict a predicted access time point of the second Flash memory after the second power-off unit controls the power module to cut off the power supply of the second Flash memory; a confidence score calculation unit configured to calculate a confidence score of the predicted access time point. The setting unit is configured to set a power supply time according to the predicted access time point when the confidence score reaches a preset threshold; The third power supply unit is configured to control the power module to temporarily supply power to the second Flash memory when the current time reaches the power supply time; The index calculation unit is configured to calculate an access activity index value of the second Flash memory; The third power-off unit is configured to cut off the temporary power supply of the second Flash memory when the access activity index value exceeds a dynamic threshold, wherein the dynamic threshold is dynamically calculated according to at least one of the following factors: the working temperature of the second Flash memory, the system remaining power, the current load of the system, and the average access interval of the second Flash memory within a preset historical time window.

6. The safety start control apparatus according to claim 5, wherein Further comprising: The first verification unit is configured to use a hardware root of trust to verify the integrity of a verification index structure stored in the second Flash memory after the second power supply unit controls the power module to supply power to the second Flash memory and before the second loading unit mounts the complete operating system stored in the second Flash memory to the memory disk; The verification index structure is used to record the sub-signature information of a plurality of software components in the complete operating system image stored in the second Flash memory and the dependency relationship between the software components, and the verification index structure is signed by a public key protected by the hardware root of trust; The selection unit is configured to determine a corresponding target software component set from the verification index structure that passes the integrity verification according to the context information of the current startup; The second verification unit is configured to verify the sub-signature information of the target software components in the target software component set, and trigger the second loading unit to perform the operation of mounting the complete operating system stored in the second Flash memory to the memory disk after the sub-signature information of each target software component passes the verification.

7. An electronic device, comprising: The computer readable storage medium stores a computer program, wherein the computer program causes the computer to execute the secure startup control method of any one of claims 1 to 4.

8. A computer-readable storage medium, characterized in that, The computer readable storage medium stores a computer program, wherein the computer program causes the computer to execute the secure startup control method of any one of claims 1 to 4.

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