Chip packaging method and packaging structure
By forming magnetic bumps and pads on the chip and substrate, automatic alignment is achieved through magnetic adsorption, which solves the problem of insufficient chip mounting accuracy and improves production efficiency and product reliability.
Patent Information
- Application Number
- CN202511631158.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-07
- Publication Date
- 2026-01-23
AI Technical Summary
In existing flip chip packaging processes, chip mounting accuracy is limited by machine capabilities, making it prone to misalignment, resulting in high costs and wasted time, and a high risk of product breakage.
Magnetic bumps and pads are formed on the chip and substrate, and automatic alignment and electrical conduction are achieved through magnetic adsorption, reducing positional offset.
It improves the stability of chip mounting positions and production yield, reduces equipment and process costs, and reduces the number of position inspection alarms and readjustments.
Smart Images
Figure CN121398640A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The embodiment of the present disclosure belongs to the technical field of semiconductor packaging, and particularly relates to a chip packaging method and a packaging structure. BACKGROUND
[0002] In the existing flip chip packaging process, the chip mounting precision needs to be controlled through the amount of flux, image recognition correction of equipment and other process methods. High-precision mounting is limited by the machine capacity, and the process is difficult. After the chip is mounted, due to the small contact area of the chip bump and the substrate solder joint, under the infiltration of the flux, the shaking caused by various factors in the process will increase the risk of chip offset and then cause the chip mounting appearance to affect the recognition system alarm. The chip mounting position needs to be reprocessed and adjusted, the product damage risk is high, the processing cost is consumed, and the operation process time is increased.
[0003] In view of the above problems, it is necessary to provide a chip packaging method and packaging structure which are reasonable in design and effective in solving the above problems. SUMMARY
[0004] The embodiment of the present disclosure aims to at least solve one of the technical problems existing in the prior art, and provides a chip packaging method and a packaging structure.
[0005] One aspect of the embodiment of the present disclosure provides a chip packaging method, which comprises: providing a chip, and forming a plurality of magnetic bumps on the functional surface of the chip; providing a substrate, and forming a plurality of magnetic pads on the functional surface of the substrate, the magnetic pads corresponding to the magnetic bumps; flip mounting the functional surface of the chip on the functional surface of the substrate, wherein the magnetic bumps and the magnetic pads are automatically aligned by magnetic adsorption and electrically connected; forming an underfill glue layer between the chip and the substrate to further fix the chip.
[0006] Optionally, forming a plurality of magnetic bumps on the functional surface of the chip comprises: preparing a magnetic alloy, and processing the magnetic alloy into magnetic particles of nanometer level by laser cutting technology; uniformly mixing the magnetic particles with bump solder to form composite magnetic solder; electroplating the composite magnetic solder on the functional surface of the chip to form a plurality of magnetic bumps.
[0007] Optionally, the preparation of the magnetic alloy comprises: taking iron as a matrix, adding aluminum, nickel and cobalt to form an aluminum-nickel-cobalt magnetic alloy.
[0008] Optionally, a plurality of magnetic pads are formed on the functional surface of the substrate, comprising: A magnetic plating layer is formed on the plurality of pads on the functional surface of the substrate by an electroplating process to form the magnetic pads.
[0009] Optionally, the magnetic plating layer is a magnetic nickel plating layer.
[0010] Optionally, after flip-chip mounting the functional surface of the chip on the functional surface of the substrate, the method comprises: The mounted chip and the substrate are subjected to reflow soldering in a high-temperature furnace to solder and fix the magnetic bumps of the chip to the magnetic pads of the substrate.
[0011] Optionally, the magnetic bumps and the magnetic pads are automatically aligned with a precision range of ±2 μm through magnetic adsorption.
[0012] Another aspect of the embodiments of the present disclosure provides a chip packaging structure, comprising a substrate, a chip flip-chip mounted on the substrate, and an underfill adhesive layer arranged between the substrate and the chip; A functional surface of the substrate is provided with a plurality of magnetic pads, a functional surface of the chip is provided with a plurality of magnetic bumps, and the magnetic pads correspond to the magnetic bumps; wherein, The magnetic bumps and the magnetic pads are fixedly connected through magnetic adsorption.
[0013] Optionally, the magnetic bumps are aluminum-nickel-cobalt magnetic bumps.
[0014] Optionally, the magnetic pads are magnetic nickel plating pads.
[0015] The chip packaging method and packaging structure of the embodiments of the present disclosure, in which a plurality of magnetic bumps are formed on the functional surface of the chip, a plurality of magnetic pads corresponding to the magnetic bumps are formed on the functional surface of the substrate, and when the functional surface of the chip is flip-chip mounted on the functional surface of the substrate, the magnetic bumps and the magnetic pads are automatically aligned through magnetic adsorption and electrically connected. The automatic position alignment through the magnetic adsorption between the magnetic bumps and the magnetic pads when the chip is mounted enhances the stability of the chip mounting position, the automatic alignment precision of the magnetic attraction is ±2 μm, the dependence on the equipment mounting precision is reduced, the chip mounting position deviation is effectively reduced, the production yield is improved, and the product reliability performance is improved. No external magnetic field is needed to apply magnetism to the material, the equipment and process costs are saved, the patch position inspection alarm is reduced, the number of times of reprocessing and adjustment of the chip mounting position is reduced, and the processing cost and time cost are reduced. BRIEF DESCRIPTION OF DRAWINGS
[0016] Figure 1 FIG. 1 is a flowchart of a chip packaging method according to an embodiment of the present disclosure. Figures 2 to 4 A process schematic diagram of a chip packaging method according to another embodiment of the present disclosure. DETAILED DESCRIPTION
[0017] In order for those skilled in the art to better understand the technical solutions of the embodiments of the present disclosure, the embodiments of the present disclosure are further described in detail below in conjunction with the drawings and specific embodiments.
[0018] As shown in the drawings, Figure 1 An aspect of the embodiments of the present disclosure provides a chip packaging method S100, which can specifically include: S110, providing a chip, and forming a plurality of magnetic bumps on a functional surface of the chip.
[0019] As shown in the drawings, Figure 2 A chip 110 is provided, and a plurality of magnetic bumps 111 are formed on the functional surface of the chip.
[0020] Specifically, forming a plurality of magnetic bumps on the functional surface of the chip can include: A magnetic alloy is prepared, and the magnetic alloy is processed into magnetic particles of nanometer level by laser cutting technology.
[0021] The magnetic particles are uniformly mixed with bump solder to form a composite magnetic solder.
[0022] The composite magnetic solder is electroplated on the functional surface of the chip to form a plurality of magnetic bumps.
[0023] Specifically, the process of preparing the magnetic alloy can include: taking iron as the matrix, adding aluminum, nickel and cobalt to form an aluminum-nickel-cobalt magnetic alloy. That is, the magnetic particles formed are aluminum-nickel-cobalt magnetic particles. The aluminum-nickel-cobalt magnetic particles are uniformly mixed with the bump solder to form a composite magnetic solder. The composite magnetic solder is electroplated on the functional surface of the chip to form a plurality of aluminum-nickel-cobalt magnetic bumps.
[0024] In this embodiment, the magnetic bump is an aluminum-nickel-cobalt magnetic bump, so that the magnetic bump has permanent magnetism. The aluminum-nickel-cobalt material itself belongs to a permanent magnet material, and does not need an external magnetic field to exert magnetism on the material, thereby saving equipment and process costs. The aluminum-nickel-cobalt material has low resistivity and strong conductivity, which avoids signal interference caused by magnetic pollution, enhances the electrical signal flowability, and improves product reliability.
[0025] S120, providing a substrate, and forming a plurality of magnetic pads on a functional surface of the substrate, the magnetic pads corresponding to the magnetic bumps.
[0026] As shown in the drawings, Figure 2As shown, a substrate 120 is provided. The functional surfaces of the substrate 120 are cleaned, and a magnetic plating layer is applied to the solder joints on the functional surfaces of the substrate 120 using electroplating or chemical plating processes to form the magnetic pads 121. The magnetic pads 121 correspond to the magnetic bumps 111.
[0027] Preferably, in this embodiment, the magnetic plating layer is a magnetic nickel plating layer. That is, the magnetic pad 121 is a magnetic nickel plating pad. The magnetic pad uses a magnetic nickel plating layer because nickel is a common ferromagnetic metal, has good compatibility with semiconductor packaging processes (commonly used in UBM and surface treatment), and the cost is controllable.
[0028] S130. The functional surface of the chip is flip-chip mounted onto the functional surface of the substrate, wherein the magnetic bumps and the magnetic pads are automatically aligned and electrically connected by magnetic adsorption.
[0029] like Figure 2 As shown, the functional surface of a chip 110 with magnetic bumps 111 is flip-chip mounted onto the functional surface of a substrate 120. The magnetic bumps 111 and the magnetic pads 121 are automatically aligned and electrically connected via magnetic attraction. The magnetic bumps 111, acting as permanent magnets, generate a magnetic field. The magnetic pads 121, being ferromagnetic, are magnetized by this magnetic field, generating an induced magnetic field. A magnetic attraction force is generated between the magnetic bumps 111 and the magnetic pads 121. During chip mounting, automatic position correction between the chip 110 and the substrate 120 can be achieved, preventing positional misalignment and improving alignment accuracy. The alignment accuracy range of the magnetic bumps 111 and the magnetic pads 121 via magnetic attraction is ±2 μm, significantly improving alignment precision.
[0030] In this embodiment, specifically, during the flip-chip mounting of chip 110 onto substrate 120, the AlNiCo magnetic bumps and the magnetic nickel-plated pads are automatically aligned and electrically connected through magnetic adsorption.
[0031] For example, after flip-chip mounting the functional surface of the chip onto the functional surface of the substrate, the method includes: like Figure 3 As shown, the mounted chip 110 and the substrate 120 are reflow soldered in a high-temperature furnace to solder and fix the magnetic bumps 111 of the chip 110 to the magnetic pads 121 of the substrate 120.
[0032] S140. An underfill layer is formed on the chip and the substrate to further fix the chip.
[0033] like Figure 4As shown, the underfill glue is filled between the chip 110 and the substrate 120, and the underfill glue layer 130 is formed by heating through processes such as baking, further reinforcing the chip 110 and improving the reliability of the packaging structure.
[0034] The chip packaging method of the embodiment of the present disclosure forms a plurality of magnetic bumps on the functional surface of the chip, forms a plurality of magnetic pads corresponding to the magnetic bumps on the functional surface of the substrate, and when the functional surface of the chip is flip-chip mounted on the functional surface of the substrate, the magnetic bumps and the magnetic pads are automatically aligned and electrically connected through magnetic attraction. The automatic position alignment is performed through the magnetic attraction between the magnetic bumps and the magnetic pads when the chip is mounted, the stability of the chip mounting position is enhanced, the automatic alignment accuracy of the magnetic attraction is ±2μm, the dependence on the equipment mounting precision is reduced, the chip mounting position deviation is effectively reduced, the production yield is improved, and the product reliability performance is improved. No external magnetic field is needed to apply magnetism to the material, saving equipment and process costs; reducing the inspection alarm of the chip position, reducing the number of times of reprocessing and adjusting the chip mounting position, and reducing the processing cost and time cost.
[0035] As shown, Figure 4 Another aspect of the embodiment of the present disclosure provides a chip packaging structure, which includes a substrate 120, a chip 110 flip-chip mounted on the substrate 120, and an underfill glue layer 130 arranged between the substrate 120 and the chip 110.
[0036] The functional surface of the substrate 120 is provided with a plurality of magnetic pads 121, and the functional surface of the chip 110 is provided with a plurality of magnetic bumps 111, and the magnetic pads 121 correspond to the magnetic bumps 111; wherein the magnetic bumps 111 and the magnetic pads 121 are magnetically attracted and fixedly connected, realizing the automatic alignment between the chip 110 and the substrate 120, avoiding position deviation, and improving the stability of the chip mounting position.
[0037] Illustratively, the magnetic bumps 111 are aluminum-nickel-cobalt magnetic bumps. The aluminum-nickel-cobalt material itself belongs to a permanent magnet material, and no external magnetic field is needed to apply magnetism to the material, saving equipment and process costs; the aluminum-nickel-cobalt material has low resistivity and strong conductivity, avoiding signal interference caused by magnetic pollution, enhancing the electrical signal flow and improving product reliability.
[0038] Illustratively, the magnetic pads 121 are magnetic nickel-plated pads. The magnetic pads adopt a magnetic nickel-plated layer, because nickel is a common ferromagnetic metal, has good compatibility with the semiconductor packaging process (commonly used in UBM and surface treatment), and the cost is controllable.
[0039] The chip packaging structure of the embodiment of the present disclosure, when the chip is flip-chip mounted on the substrate, the magnetic bump and the magnetic pad are magnetically adsorbed and fixedly connected, automatic position alignment is performed, the stability of the chip mounting position is enhanced, the automatic alignment accuracy of the magnetic attraction force is ±2μm, the dependence on the equipment mounting precision capability is reduced, the chip mounting position deviation is effectively reduced, the production yield is improved, and the product reliability performance is improved; without externally increasing the magnetic field to apply magnetism to the material, the equipment and process costs are saved; the patch position inspection alarm is reduced, the number of times of reprocessing and adjustment of the chip mounting position is reduced, and the processing cost and time cost are reduced.
[0040] It can be understood that the above implementation is only an exemplary implementation adopted for illustrating the principle of the embodiment of the present disclosure, and the embodiment of the present disclosure is not limited thereto. Various modifications and improvements can be made by those of ordinary skill in the art without departing from the spirit and essence of the embodiment of the present disclosure, and these modifications and improvements are also considered as the protection scope of the embodiment of the present disclosure.
Claims
1. A chip packaging method, characterized in that, The method includes: A chip is provided, and multiple magnetic bumps are formed on the functional surface of the chip; A substrate is provided, on which a plurality of magnetic pads are formed on the functional surface of the substrate, the magnetic pads corresponding to the magnetic bumps; The functional surface of the chip is flip-chip mounted onto the functional surface of the substrate, wherein the magnetic bumps and the magnetic pads are automatically aligned and electrically connected by magnetic adsorption. An underfill layer is formed on the chip and the substrate to further fix the chip.
2. The method according to claim 1, characterized in that, Multiple magnetic bumps are formed on the functional surface of the chip, including: Magnetic alloys were prepared and processed into nanoscale magnetic particles using laser cutting technology. The magnetic particles are uniformly mixed with the bump solder to form a composite magnetic solder; The composite magnetic solder is electroplated onto the functional surface of the chip to form a plurality of magnetic bumps.
3. The method according to claim 2, characterized in that, Preparation of magnetic alloys, including: Using iron as the base material, aluminum, nickel, and cobalt are added to form an aluminum-nickel-cobalt magnetic alloy.
4. The method according to any one of claims 1 to 3, characterized in that, Multiple magnetic pads are formed on the functional surface of the substrate, including: The magnetic pads are formed by electroplating multiple solder joints on the functional surface of the substrate.
5. The method according to claim 4, characterized in that, The magnetic plating layer is a magnetic nickel plating layer.
6. The method according to any one of claims 1 to 3, characterized in that, After flip-chip mounting the functional surface of the chip onto the functional surface of the substrate, the method includes: The mounted chip and the substrate are reflow soldered in a high-temperature furnace to solder and fix the magnetic bumps of the chip to the magnetic pads of the substrate.
7. The method according to any one of claims 1 to 3, characterized in that, The magnetic bumps and magnetic pads are automatically aligned with a precision range of ±2 μm through magnetic adsorption.
8. A chip packaging structure, characterized in that, It includes a substrate and a chip flip-chip disposed on the substrate, and an underfill layer disposed between the substrate and the chip; The substrate has multiple magnetic pads on its functional surface, and the chip has multiple magnetic bumps on its functional surface, with the magnetic pads corresponding to the magnetic bumps; wherein... The magnetic bump and the magnetic pad are magnetically attracted and fixed together.
9. The structure according to claim 8, characterized in that, The magnetic bump is an AlNiCo magnetic bump.
10. The structure according to claim 8, characterized in that, The magnetic pad is a magnetic nickel-plated pad.