Rule and model based sraf pattern generation method, system and terminal

Abstract

This application provides a rule-based and model-based SRAF pattern generation method, system, and terminal. Based on predefined SRAF insertion rules, multiple initial SRAF patterns are inserted around each lithographic pattern in the photolithographic mask design layout. Based on predefined SRAF cleaning rules and the photolithography process model, the inserted multiple initial SRAF patterns are jointly cleaned and optimized. This allows for the rapid, efficient, and accurate generation of multiple target SRAF patterns, ensuring the imaging quality of each lithographic pattern and thus ensuring the performance of the fabricated wafer and even the integrated circuit. It also effectively reduces computational complexity and computational load, solving the technical problem of existing SRAF pattern generation methods that cannot balance lithographic enhancement effect and computational efficiency. This method is applicable to various complex large-scale integrated circuit designs.

Description

Technical Field

[0001] This application relates to the field of SRAF graphics generation technology, and in particular to a rule-based and model-based SRAF graphics generation method, system and terminal. Background Technology

[0002] As chip sizes shrink, the requirements for lithography precision in chip manufacturing become increasingly stringent. To achieve higher lithography precision, current lithography technologies typically add a series of extremely small SRAF (Sub-Resolution Assistant Feature) sub-resolution auxiliary patterns around the lithographic pattern on the mask. This improves optical interference effects during lithography, optimizes the imaging quality of the lithography process, and enhances the clarity of the lithographic pattern and the stability of the lithography process.

[0003] Existing SRAF graph generation methods are mainly divided into two categories: rule-based SRAF graph generation methods and model-based SRAF graph generation methods.

[0004] Among them, the rule-based SRAF pattern generation method mainly relies on a rule table summarized through extensive experiments. The rule table specifies the size and distance of the SRAF pattern to be added under certain conditions such as the linewidth and spacing of the lithographic pattern. The method is direct and runs relatively fast. However, when the integrated circuit design becomes complex, or the lithography process node shrinks further, the rule table becomes extremely complex, lacks flexibility, and results in poor lithographic enhancement effect.

[0005] The model-based SRAF pattern generation method utilizes a precise lithography model, setting the size and position of the SRAF pattern as optimizable parameters. Through calculation and iteration, it automatically finds the SRAF pattern configuration scheme that optimizes the imaging quality of the lithographic pattern. It offers high optimization freedom and accuracy, and can handle more complex integrated circuit designs. However, it requires enormous computational resources and is difficult to apply to large-scale integrated circuit designs.

[0006] Therefore, existing SRAF pattern generation methods cannot balance lithographic enhancement and computational efficiency, making it difficult to meet the design requirements of large-scale, complex integrated circuits. Summary of the Invention

[0007] In view of the shortcomings of the prior art described above, the purpose of this application is to provide a rule-based and model-based SRAF pattern generation method, system and terminal to solve the technical problem that the existing SRAF pattern generation methods cannot simultaneously achieve lithographic enhancement effect and computational efficiency, and are difficult to meet the design requirements of large-scale and complex integrated circuits.

[0008] To achieve the aforementioned and other related objectives, a first aspect of this application provides a rule-based and model-based SRAF pattern generation method. The rule-based and model-based SRAF pattern generation method includes: acquiring multiple lithographic patterns of a photomask design layout, and generating multiple initial SRAF patterns for each lithographic pattern based on predefined SRAF insertion rules; optimizing each initial SRAF pattern based on predefined SRAF cleaning rules and removing redundant SRAF patterns to generate a first SRAF pattern layout of the photomask design layout; selecting one or more key SRAF patterns from each initial SRAF pattern, and optimizing each key SRAF pattern based on a photolithography process model to remove redundant SRAF patterns to generate a second SRAF pattern layout of the photomask design layout; and selecting multiple target SRAF patterns according to the first SRAF pattern layout and the second SRAF pattern layout, and generating a target SRAF pattern layout of the photomask design layout to generate a target photomask layout.

[0009] In some embodiments of the first aspect of this application, the SRAF cleanup rules are used to define the minimum length, maximum length, minimum width, maximum width, minimum spacing with each lithographic pattern, and shape requirements of the SRAF pattern on the target photomask layout.

[0010] In some embodiments of the first aspect of this application, the method of screening one or more key SRAF patterns from each initial SRAF pattern includes: screening one or more key lithographic pattern regions according to each lithographic pattern of the photomask design layout; obtaining multiple initial SRAF patterns within each key lithographic pattern region and determining them as key SRAF patterns; wherein, the key lithographic pattern regions include: isolated lithographic pattern regions, minimum linewidth lithographic pattern regions, dense lithographic pattern regions, edge lithographic pattern regions, corner lithographic pattern regions, and mixed lithographic pattern regions in the photomask design layout.

[0011] In some embodiments of the first aspect of this application, the optimization of each key SRAF pattern based on the lithography process model includes: inputting each lithography pattern and each key SRAF pattern in each key lithography pattern area into the lithography process model to simulate the lithography process and generate a simulated lithography image of the lithography mask design layout; comparing the simulated lithography image with the lithography mask design layout and evaluating the lithography effect of the simulated lithography image and the lithography effect contribution of each key SRAF pattern; if the lithography effect is less than a preset lithography effect threshold, removing one or more key SRAF patterns whose lithography effect contribution is less than the preset lithography effect contribution threshold, adjusting the size and position of the remaining key SRAF patterns, re-inputting them into the lithography process model to simulate the lithography process, and updating the simulated lithography image until its lithography effect is greater than or equal to the preset lithography effect threshold; if the lithography effect is greater than or equal to the preset lithography effect threshold, generating a second SRAF pattern layout of the lithography mask design layout based on the adjusted key SRAF patterns.

[0012] In some embodiments of the first aspect of this application, the lithographic effect of the simulated lithographic image includes: the lithographic process window of the simulated lithographic image, the resolution and edge roughness of each simulated lithographic pattern in the simulated lithographic image, and the similarity between each simulated lithographic pattern and each lithographic pattern; the contribution of the lithographic effect of the key SRAF pattern includes: the resolution and edge roughness of each simulated lithographic pattern corresponding to one or more lithographic patterns around the key SRAF pattern, and the similarity between each simulated lithographic pattern and each lithographic pattern.

[0013] In some embodiments of the first aspect of this application, the SRAF insertion rule is used to define the minimum length, maximum length, initial width, and initial distance from the photolithographic pattern of the inserted initial SRAF pattern; wherein, the method of generating multiple initial SRAF patterns of the photolithographic pattern based on the SRAF insertion rule includes: offsetting each edge of the photolithographic pattern by the initial distance to generate multiple auxiliary edges of the photolithographic pattern, and adjusting the length of each auxiliary edge based on the minimum length and the maximum length; and generating multiple rectangles as initial SRAF patterns based on the initial width, with each auxiliary edge as the long side of a rectangle.

[0014] In some embodiments of the first aspect of this application, the method of generating the target photolithography mask layout includes: verifying the photolithography effect of the target SRAF pattern layout based on the photolithography process model, and generating the target photolithography mask layout after the photolithography effect verification is passed.

[0015] In some embodiments of the first aspect of this application, the rule-based and model-based SRAF graphic generation method further includes: generating a design report for the target SRAF graphic layout; wherein the design report includes: the size and position of a plurality of initially inserted initial SRAF graphics, the size and position of a plurality of discarded SRAF graphics, and the original size, original position, target size, and target position of a plurality of optimized SRAF graphics.

[0016] To achieve the aforementioned and other related objectives, a second aspect of this application provides a rule-based and model-based SRAF pattern generation system, comprising: an SRAF pattern insertion module for acquiring multiple lithographic patterns of a photomask design layout and generating multiple initial SRAF patterns for each lithographic pattern based on predefined SRAF insertion rules; a first SRAF pattern cleaning module connected to the SRAF pattern insertion module for optimizing each initial SRAF pattern based on predefined SRAF cleaning rules and removing redundant SRAF patterns to generate a first SRAF pattern layout of the photomask design layout; and a second SRAF pattern... The pattern cleaning module, connected to the SRAF pattern insertion module, is used to filter one or more key SRAF patterns from each initial SRAF pattern, and optimize each key SRAF pattern based on the photolithography process model, removing redundant SRAF patterns to generate the second SRAF pattern layout of the photolithography mask design. The target SRAF pattern layout module, connected to the first SRAF pattern cleaning module and the second SRAF pattern cleaning module respectively, is used to filter multiple target SRAF patterns according to the first SRAF pattern layout and the second SRAF pattern layout, and generate the target SRAF pattern layout of the photolithography mask design to generate the target photolithography mask layout.

[0017] To achieve the foregoing and other related objectives, a third aspect of this application provides a rule-based and model-based SRAF graphics generation terminal, the rule-based and model-based SRAF graphics generation terminal comprising: a processor and a memory; the memory for storing a computer program; and the processor for executing the computer program stored in the memory to cause the terminal to perform the rule-based and model-based SRAF graphics generation method as described in any of the above embodiments.

[0018] As described above, this application provides a rule-based and model-based SRAF pattern generation method, system, and terminal. Based on predefined SRAF insertion rules, multiple initial SRAF patterns are inserted around each lithographic pattern in the photolithographic mask design layout. Based on predefined SRAF cleaning rules and the photolithography process model, the inserted multiple initial SRAF patterns are jointly cleaned and optimized. This application has the following beneficial effects: it can generate multiple target SRAF patterns quickly, efficiently, and accurately to ensure the imaging quality of each lithographic pattern, thereby ensuring the performance of the fabricated wafer and even the integrated circuit. It can also effectively reduce computational complexity and computational load, thus solving the technical problem of existing SRAF pattern generation methods that cannot balance lithographic enhancement effect and computational efficiency. It is applicable to various complex large-scale integrated circuit designs. Attached Figure Description

[0019] Figure 1 The diagram shown is a flowchart of a rule-based and model-based SRAF graph generation method in one embodiment of this application.

[0020] Figure 2 The diagram shown is a schematic of an initial SRAF graphic insertion method in one embodiment of this application.

[0021] Figure 3 The diagram shown is a flowchart illustrating a key SRAF graphic optimization method in one embodiment of this application.

[0022] Figure 4 The diagram shown is a schematic of a target SRAF graphic filtering method in one embodiment of this application.

[0023] Figure 5 The diagram shown is a structural schematic of a rule-based and model-based SRAF graphics generation system according to an embodiment of this application.

[0024] Figure 6 The diagram shown is a structural schematic of a rule-based and model-based SRAF graphics generation terminal according to an embodiment of this application. Detailed Implementation

[0025] The following specific examples illustrate the implementation of this application. Those skilled in the art can easily understand other advantages and effects of this application from the content disclosed in this specification. This application can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of this application. It should be noted that, unless otherwise specified, the following embodiments and features in the embodiments can be combined with each other.

[0026] In the embodiments of this application, terms such as "first" and "second" are used to distinguish identical or similar items with essentially the same function and effect. For example, the first SRAF graphic layout and the second SRAF graphic layout are only used to distinguish different SRAF graphic layouts and do not limit their order. Those skilled in the art will understand that terms such as "first" and "second" do not limit the quantity or execution order, and that terms such as "first" and "second" do not necessarily imply that they are different.

[0027] To address the problems mentioned in the background, this application provides a rule-based and model-based SRAF pattern generation method, system, and terminal. The aim is to clean and optimize multiple inserted initial SRAF patterns based on the SRAF cleaning rules and the lithography process model, thereby solving the technical problem that existing SRAF pattern generation methods cannot simultaneously achieve lithography enhancement effects and computational efficiency, and thus cannot meet the design requirements of large-scale, complex integrated circuits.

[0028] To make the objectives, technical solutions, and advantages of this application clearer, the technical solutions in the embodiments of this application are further described in detail below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are only for explaining this application and are not intended to limit this application.

[0029] like Figure 1 The diagram illustrates a flowchart of a rule-based and model-based SRAF graph generation method according to an embodiment of this application. The rule-based and model-based SRAF graph generation method in this embodiment mainly includes the following steps.

[0030] Step S1: Obtain multiple lithographic patterns from the lithographic mask design layout, and generate multiple initial SRAF patterns for each lithographic pattern based on predefined SRAF insertion rules.

[0031] It should be understood that a photomask is a pattern master used in the photolithography process of chip manufacturing to accurately transfer circuit patterns onto a silicon wafer. The specific working principle is as follows: the light generated by the photolithography machine passes through the photomask. The transparent areas on the photomask allow the light to pass through and illuminate the wafer coated with photoresist, causing the photoresist to undergo a chemical change. The areas covered by the light-shielding film block the light. After processes such as development and etching, a circuit pattern that matches the various photolithographic patterns on the photomask will be formed on the wafer.

[0032] Photomasks are mainly created using graphic design software, such as computer-aided design software (CAD), to produce photomask design layouts, which are data files containing multiple photolithographic patterns. A suitable substrate is then selected, and each photolithographic pattern is etched onto the substrate to obtain a photomask for mass production of chip wafers using photolithography.

[0033] To ensure the performance of integrated circuits, it is necessary to strictly control the imaging quality of each circuit pattern lithographically applied to the wafer. Therefore, photolithography enhancement technology can be used to insert multiple SRAF patterns around each photolithographic pattern in the photolithographic mask design layout, thereby improving the optical interference effect during the photolithography process and increasing the resolution and clarity of each circuit pattern lithographically applied to the wafer.

[0034] The SRAF insertion rule is used to define the minimum length, maximum length, initial width, and initial distance from the photolithographic pattern of the inserted initial SRAF pattern. It should be noted that the SRAF insertion rule can be determined based on the design requirements of the photolithographic mask, preferably according to the size, spacing, and design requirements of each photolithographic pattern; however, this application does not specifically limit it.

[0035] In this embodiment, as Figure 2 As shown, the method for generating multiple initial SRAF patterns of the lithography pattern based on the SRAF insertion rule includes the following steps.

[0036] ① Based on each edge of the photolithography pattern, offset by the initial distance to generate multiple auxiliary edges of the photolithography pattern, and adjust the length of each auxiliary edge based on the minimum length and the maximum length.

[0037] The photolithographic mask design layout is a data file containing multiple photolithographic patterns generated using graphic design software. The photolithographic patterns are geometric shapes, such as geometric polygons.

[0038] For example, a photolithographic pattern of the photolithographic mask design layout is as follows: Figure 2 As shown, a rectangle is formed. Each side of the rectangle is offset by the initial distance to generate four auxiliary sides. Based on the minimum and maximum lengths, the auxiliary sides are adjusted: if the length of an auxiliary side is less than the minimum length, it is extended to meet the length requirement for inserting the SRAF graphic; if the length of an auxiliary side is greater than the maximum length, it is shortened to meet the length requirement for inserting the SRAF graphic.

[0039] ②Based on the initial width, multiple rectangles are generated as the initial SRAF graphics, with each auxiliary side as the long side of the rectangle.

[0040] For example, such as Figure 2 As shown, using the four adjusted auxiliary sides as the long sides, four rectangles are generated as the initial SRAF graphics, and the width of the four rectangles is equal to the initial width.

[0041] Therefore, based on the SRAF insertion rules, multiple initial SRAF patterns are generated for each lithographic pattern, resulting in a large number of initial SRAF patterns. However, these initial SRAF patterns may overlap, have varying spacing, and be disorganized in their distance from other lithographic patterns, affecting the imaging quality of each lithographic pattern. Therefore, it is necessary to clean up the inserted initial SRAF patterns.

[0042] Step S2: Based on the predefined SRAF cleaning rules, optimize each initial SRAF pattern and remove redundant SRAF patterns to generate the first SRAF pattern layout of the photolithography mask design.

[0043] The SRAF cleanup rules define the minimum length, maximum length, minimum width, maximum width, minimum spacing from each lithographic pattern, and shape requirements of the SRAF pattern on the target photomask. In a preferred embodiment, the SRAF cleanup rules include: a rectangular shape, a minimum length of 20 nm, a maximum length of 100 nm, a minimum width of 10 nm, a maximum width of 20 nm, and a minimum spacing of 5 nm from each lithographic pattern. It should be noted that the SRAF cleanup rules can be determined based on the design requirements of the photomask, preferably according to the size, spacing, and design requirements of each lithographic pattern; this application does not specifically limit this.

[0044] In one embodiment, based on the SRAF cleanup rules, EDA (Electronic Design Automation) tools can be used to optimize each initial SRAF graphic and remove redundant SRAF graphics.

[0045] Specifically, the SRAF cleanup rules are input into the EDA tool, and the rule engine in the EDA tool is used to scan each lithographic pattern and each initial SRAF graphic of the lithographic mask design layout, so as to identify and separate one or more compliant SRAF graphics that conform to the SRAF cleanup rules and one or more non-compliant SRAF graphics that violate the SRAF cleanup rules.

[0046] For each non-compliant SRAF graphic, optimize or remove it. If the non-compliant SRAF graphic does not meet the shape requirements, remove it; if non-compliant SRAF graphics overlap, remove them; if the minimum spacing between a non-compliant SRAF graphic and one or more lithographic patterns does not meet the rules, adjust the position of the non-compliant SRAF graphic to meet the rules; if a non-compliant SRAF graphic does not meet the dimensional requirements such as minimum length, maximum length, minimum width, and maximum width, adjust the size of the non-compliant SRAF graphic to meet the rules.

[0047] Based on the compliant SRAF graphics and the adjusted non-compliant SRAF graphics, a first SRAF graphic layout for the photomask design is generated. This first SRAF graphic layout includes multiple SRAF graphics optimized based on rules, specifically compliant SRAF graphics conforming to the SRAF cleanup rules and non-compliant SRAF graphics adjusted according to the SRAF cleanup rules.

[0048] Step S3: Select one or more key SRAF patterns from each initial SRAF pattern, and optimize each key SRAF pattern based on the photolithography process model, remove redundant SRAF patterns, and generate the second SRAF pattern layout of the photolithography mask design.

[0049] In one embodiment, the method of selecting one or more key SRAF patterns from each initial SRAF pattern includes: selecting one or more key lithographic pattern regions according to each lithographic pattern of the photomask design layout; obtaining multiple initial SRAF patterns within each key lithographic pattern region, and determining them as key SRAF patterns.

[0050] The key lithographic pattern regions can be selected based on the design requirements of the photomask, primarily choosing regions sensitive to the lithographic process window as key lithographic pattern regions. Specifically, these include: isolated lithographic pattern regions, minimum linewidth lithographic pattern regions, dense lithographic pattern regions, edge lithographic pattern regions, corner lithographic pattern regions, and mixed lithographic pattern regions within the photomask design layout. In a preferred embodiment, EDA tools can be used to filter each key lithographic pattern region.

[0051] In one embodiment, such as Figure 3 As shown, the optimization of key SRAF patterns based on the photolithography process model includes the following steps.

[0052] Step S31: Input each lithography pattern and each key SRAF pattern in each key lithography pattern area into the lithography process model to simulate the lithography process and generate a simulated lithography image of the lithography mask design layout.

[0053] It should be understood that lithography process models are used to simulate the lithography process in a computer using mathematical and physical methods. This allows for the prediction of the accuracy of pattern transfer for each lithographic pattern, optimization of the photomask design layout and lithography process parameters, reducing error costs in actual wafer manufacturing and improving wafer production efficiency. Furthermore, lithography process models can use algorithms such as MBOPC (Model-Based Optical Proximity Correction) and ILT (Inverse Lithography) to correct key SRAF patterns, thereby improving the imaging quality of each lithographic pattern and ensuring the performance of the wafer and even the integrated circuit.

[0054] The simulated lithography image includes multiple simulated lithography patterns corresponding to each lithography pattern. The simulated lithography pattern is a simulated circuit pattern lithographically applied to a wafer.

[0055] It should be noted that when using a photolithography process model to simulate the photolithography process, photolithography process parameters can be preset according to design requirements and gradually adjusted and optimized. The specific preset parameter values ​​are not limited in this application.

[0056] Step S32: Compare the simulated lithography image with the lithography mask design layout, and evaluate the lithography effect of the simulated lithography image and the contribution of each key SRAF pattern to the lithography effect.

[0057] In one embodiment, the lithographic effect of the simulated lithographic image includes: the lithographic process window of the simulated lithographic image, the resolution and edge roughness of each simulated lithographic pattern in the simulated lithographic image, and the similarity between each simulated lithographic pattern and each lithographic pattern. The lithographic process window is a key indicator for measuring the stability and fault tolerance of the lithographic process. It defines a "safe zone" within which a qualified pattern can still be successfully reproduced within the allowable range of variations in parameters such as exposure energy and focal length. This includes: exposure latitude, depth of focus, and a common window.

[0058] The contribution of the key SRAF pattern to the lithography effect is used to define the degree of contribution or influence of each key SRAF pattern to the resolution and imaging quality of the surrounding lithography patterns. It includes: the resolution and edge roughness of each simulated lithography pattern corresponding to one or more lithography patterns around the key SRAF pattern, and the similarity between each simulated lithography pattern and each lithography pattern.

[0059] Step S33: If the lithography effect is less than the preset lithography effect threshold, remove one or more key SRAF patterns whose contribution to the lithography effect is less than the preset lithography effect contribution threshold, adjust the size and position of the remaining key SRAF patterns, re-input the lithography process model to simulate the lithography process, and update the simulated lithography image until its lithography effect is greater than or equal to the preset lithography effect threshold.

[0060] Specifically, the methods for adjusting the size and position of key SRAF patterns include: retaining one or more key SRAF patterns that contribute significantly to the lithography effect, and adjusting the size and position of one or more key SRAF patterns that contribute less to the lithography effect, including adjusting their length, width, and spacing with surrounding lithography patterns, in order to improve the lithography process window.

[0061] It should be noted that the preset lithography effect threshold and lithography effect contribution threshold can be set according to design requirements, and this application does not specifically limit them.

[0062] Step S34: If the lithography effect is greater than or equal to the preset lithography effect threshold, then generate the second SRAF pattern layout of the lithography mask design pattern according to the adjusted key SRAF patterns.

[0063] The second SRAF graphic layout includes multiple key SRAF graphics that have been optimized based on the model.

[0064] The purpose of this design in this embodiment is to simulate the lithography process using only the lithography process model for each key SRAF pattern, that is, to simulate the lithography process model for each initial SRAF pattern in each key lithography pattern area, thereby avoiding the simulation of the lithography process model for all initial SRAF patterns. This can greatly reduce the amount of computation and the computational complexity, and has low requirements for computing resources, making it suitable for large-scale complex integrated circuit design.

[0065] Step S4: Based on the first SRAF pattern layout and the second SRAF pattern layout, select multiple target SRAF patterns and generate the target SRAF pattern layout of the photolithography mask design to generate the target photolithography mask layout.

[0066] In one embodiment, such as Figure 4 As shown, the methods for filtering target SRAF patterns include: removing multiple redundant SRAF patterns; retaining multiple SRAF patterns that conform to the SRAF cleanup rules; and retaining multiple key SRAF patterns optimized based on the lithography process model. It should be noted that the removed multiple SRAF patterns include: each non-compliant SRAF pattern that does not conform to the SRAF cleanup rules (such as each non-compliant SRAF pattern that does not meet shape requirements, each overlapping non-compliant SRAF pattern, etc.) and multiple key SRAF patterns whose contribution to the lithography effect is less than a preset lithography effect contribution threshold (i.e., multiple key SRAF patterns that may affect the lithography effect); the retained multiple SRAF patterns that conform to the SRAF cleanup rules include: multiple initial SRAF patterns that originally conformed to the SRAF cleanup rules and multiple initial SRAF patterns that have been optimized based on the rules; the retained multiple key SRAF patterns optimized based on the lithography process model include: multiple key SRAF patterns with a large contribution to the lithography effect and multiple key SRAF patterns that have been optimized based on the model.

[0067] The target SRAF pattern layout includes multiple target SRAF patterns to generate the target photomask layout.

[0068] In one embodiment, the method for generating the target photolithography mask layout includes: verifying the photolithography effect of the target SRAF pattern layout based on the photolithography process model to ensure that it meets the requirements of the photolithography process window, the imaging quality and resolution of each photolithography pattern, and generating the target photolithography mask layout after the photolithography effect verification is passed.

[0069] The method for verifying the lithography effect of the target SRAF pattern layout includes: inputting all lithography patterns and each target SRAF pattern into a lithography process model to simulate the lithography process and the corresponding simulated lithography image; evaluating the lithography effect of the simulated lithography image; if the lithography effect is greater than or equal to a preset lithography effect threshold, then generating the target lithography mask layout based on each lithography pattern and each target SRAF pattern.

[0070] It should be noted that the file format of the target photomask layout meets the requirements of the photomask design file format, such as a format that can be recognized by photomask fabrication equipment such as GDSII. It can be directly input into the photomask fabrication equipment to make a photomask, so that the photolithography process can be used to transfer each photolithography pattern to the silicon wafer to form a circuit pattern.

[0071] This application, based on the aforementioned SRAF cleaning rules and a photolithography process model, jointly cleans and optimizes multiple inserted initial SRAF patterns. It not only possesses the efficiency and flexibility of rule-based SRAF pattern cleaning but also the accuracy of model-based SRAF pattern cleaning. It can achieve rapid and accurate generation of target SRAF patterns, ensuring the imaging quality of each photolithography pattern, thereby ensuring the performance of the fabricated wafer and even the integrated circuit. It also effectively reduces computational complexity and computational load, solving the technical problem of existing SRAF pattern generation methods that cannot balance photolithography enhancement effect and computational efficiency. It is applicable to various complex large-scale integrated circuit designs.

[0072] In one embodiment, the rule-based and model-based SRAF graphic generation method further includes: generating a design report for the target SRAF graphic layout.

[0073] The design report includes: the size and position of the initial SRAF graphics inserted initially, the size and position of the SRAF graphics removed, and the original size, original position, target size, and target position of the optimized SRAF graphics.

[0074] This application, through the aforementioned design report, can record and trace the generation process of each target SRAF pattern in detail, and use it to optimize the rule-based and model-based SRAF pattern generation method, such as optimizing the SRAF insertion rules, the SRAF cleaning rules, and the lithography process parameters, thereby further improving the generation speed, efficiency, and quality of SRAF patterns.

[0075] like Figure 5 The diagram illustrates the structure of a rule-based and model-based SRAF graphic generation system 500 according to an embodiment of this application. The rule-based and model-based SRAF graphic generation system 500 in this embodiment mainly includes: an SRAF graphic insertion module 501, a first SRAF graphic cleanup module 502, a second SRAF graphic cleanup module 503, and a target SRAF graphic layout module 504.

[0076] Specifically, the SRAF pattern insertion module 501 is used to acquire multiple lithographic patterns of the lithographic mask design layout, and generate multiple initial SRAF patterns for each lithographic pattern based on predefined SRAF insertion rules.

[0077] The first SRAF graphic cleanup module 502, such as Figure 5 As shown, the SRAF pattern insertion module 501 is connected to optimize each initial SRAF pattern based on predefined SRAF cleaning rules, and remove redundant SRAF patterns to generate the first SRAF pattern layout of the photolithography mask design.

[0078] The second SRAF graphic cleanup module 503, such as Figure 5 As shown, the SRAF pattern insertion module 501 is connected to filter one or more key SRAF patterns from each initial SRAF pattern, and optimize each key SRAF pattern based on the photolithography process model, remove redundant SRAF patterns, and generate the second SRAF pattern layout of the photolithography mask design.

[0079] The target SRAF graphic layout module 504, such as Figure 5 As shown, the first SRAF pattern cleaning module 502 and the second SRAF pattern cleaning module 503 are connected respectively. They are used to filter multiple target SRAF patterns according to the first SRAF pattern layout and the second SRAF pattern layout, and generate the target SRAF pattern layout of the photolithography mask design to generate the target photolithography mask layout.

[0080] It should be understood that the rule-based and model-based SRAF graphics generation system and the rule-based and model-based SRAF graphics generation method provided in the above embodiments belong to the same inventive concept. The specific process of each module performing the corresponding steps has been described in detail in the above method embodiments, and will not be repeated here for the sake of brevity.

[0081] It should also be understood that the module division in the embodiments of this application is illustrative and only represents a logical functional division; in actual implementation, there may be other division methods. Furthermore, the functional modules in the various embodiments of this application can be integrated into a single processor, exist as separate physical entities, or be integrated into a single module. The aforementioned integrated modules can be implemented in hardware or as software functional modules.

[0082] Figure 6 This is a schematic diagram of the structure of the rule-based and model-based SRAF graphics generation terminal 700 provided in an embodiment of this application. Figure 6 As shown, the rule- and model-based SRAF graphics generation terminal 600 includes: at least one processor 601, a memory 602, at least one network interface 603, and a user interface 605. The various components in the terminal are coupled together via a bus system 604. It is understood that the bus system 604 is used to implement communication between these components. In addition to a data bus, the bus system 604 also includes a power bus, a control bus, and a status signal bus. However, for clarity, in... Figure 6 The general will label all buses as bus systems.

[0083] The user interface 605 may include a monitor, keyboard, mouse, trackball, clicker, button, touchpad, or touch screen.

[0084] It is understood that memory 602 can be volatile memory or non-volatile memory, or both. Non-volatile memory can be read-only memory (ROM) or programmable read-only memory (PROM), which serves as an external cache. By way of example, but not limitation, many forms of RAM are available, such as static random access memory (SRAM) and synchronous static random access memory (SSRAM). The memories described in the embodiments of this application are intended to include, but are not limited to, these and any other suitable categories of memory.

[0085] In this embodiment, the memory 602 is used to store various types of data to support the operation of the rule-based and model-based SRAF graphics generation terminal 600. Examples of this data include any executable program that operates on the rule-based and model-based SRAF graphics generation terminal 600, such as the operating system 6021 and application program 6022. The operating system 6021 includes various system programs, such as the framework layer, core library layer, and driver layer, for implementing various basic services and handling hardware-based tasks. The application program 6022 may include various applications, such as a media player and a browser, for implementing various application services. The implementation of the rule-based and model-based SRAF graphics generation method provided in this embodiment can be included in the application program 6022.

[0086] The rule-based and model-based SRAF graphics generation method disclosed in the foregoing embodiments of this application can be applied to or implemented by processor 601. Processor 601 may be an integrated circuit chip with signal processing capabilities. During implementation, each step of the aforementioned method can be completed by integrated logic circuits in the hardware of processor 601 or by instructions in software form. The aforementioned processor 601 may be a general-purpose processor, a digital signal processor (DSP), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. Processor 601 can implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of this application. General-purpose processor 601 may be a microprocessor or any conventional processor, etc. The steps of the rule-based and model-based SRAF graphics generation method provided in the embodiments of this application can be directly manifested as execution by a hardware decoding processor, or execution by a combination of hardware and software modules in the decoding processor. The software modules may be located in a storage medium, which is located in memory. The processor reads information from the memory and, in conjunction with its hardware, completes the steps of the aforementioned method.

[0087] In an exemplary embodiment, the rule-based and model-based SRAF graphics generation terminal 600 may be used by one or more application-specific integrated circuits (ASICs), DSPs, programmable logic devices (PLDs), or complex programmable logic devices (CPLDs) to execute the aforementioned rule-based and model-based SRAF graphics generation method.

[0088] If a function is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the rule-based and model-based SRAF graphics generation method described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0089] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

[0090] In summary, this application provides a rule-based and model-based SRAF pattern generation method, system, and terminal. Based on predefined SRAF insertion rules, multiple initial SRAF patterns are inserted around each lithographic pattern in the photolithographic mask design layout. Based on predefined SRAF cleaning rules and the photolithography process model, the inserted multiple initial SRAF patterns are jointly cleaned and optimized. This allows for the rapid, efficient, and accurate generation of multiple target SRAF patterns, ensuring the imaging quality of each lithographic pattern and thus ensuring the performance of the fabricated wafer and even the integrated circuit. It also effectively reduces computational complexity and workload, solving the technical problem of existing SRAF pattern generation methods that cannot simultaneously achieve lithographic enhancement effects and computational efficiency. This method is applicable to various complex large-scale integrated circuit designs.

[0091] Therefore, this application effectively overcomes the various shortcomings of the prior art and has high industrial application value.

[0092] The foregoing embodiments are merely illustrative of the principles and effects of this application and are not intended to limit this application. Any person skilled in the art can modify or alter the foregoing embodiments without departing from the spirit and scope of this application. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in this application should still be covered by the claims of this application.

Claims

1. A rule and model based SRAF pattern generation method, characterized by, The method comprises the following steps: obtaining a plurality of lithography patterns of a lithography mask design layout, and generating a plurality of initial SRAF patterns for each lithography pattern based on a predefined SRAF insertion rule; optimizing each initial SRAF pattern based on a predefined SRAF cleaning rule, and removing redundant SRAF patterns to generate a first SRAF pattern layout of the lithography mask design layout; screening one or more key SRAF patterns from the initial SRAF patterns, and optimizing each key SRAF pattern based on a lithography process model to remove redundant SRAF patterns, thereby generating a second SRAF pattern layout of the lithography mask design layout; screening a plurality of target SRAF patterns from the first SRAF pattern layout and the second SRAF pattern layout, and generating a target SRAF pattern layout of the lithography mask design layout to generate a target lithography mask layout; wherein the way of screening one or more key SRAF patterns from the initial SRAF patterns comprises: screening one or more key lithography pattern regions from the lithography mask design layout; obtaining a plurality of initial SRAF patterns in each key lithography pattern region and determining the initial SRAF patterns as key SRAF patterns; the key lithography pattern regions include isolated lithography pattern regions, minimum line width lithography pattern regions, dense lithography pattern regions, edge lithography pattern regions, corner lithography pattern regions, and mixed lithography pattern regions in the lithography mask design layout; the way of screening each target SRAF pattern comprises: removing redundant SRAF patterns; retaining SRAF patterns that meet the SRAF cleaning rule; retaining key SRAF patterns that are optimized based on the lithography process model; the removed SRAF patterns include exception SRAF patterns that do not meet the SRAF cleaning rule and key SRAF patterns whose lithography effect contribution is less than a preset lithography effect contribution threshold; the retained SRAF patterns that meet the SRAF cleaning rule include initial SRAF patterns that have met the SRAF cleaning rule and initial SRAF patterns that have been optimized based on the rule; and the retained key SRAF patterns that are optimized based on the lithography process model include key SRAF patterns with greater lithography effect contribution and key SRAF patterns that have been optimized based on the model.

2. The rule and model based SRAF pattern generation method of claim 1, wherein, The SRAF cleaning rule is used to define the minimum length, maximum length, minimum width, maximum width, minimum spacing from each lithography pattern, and shape requirement of the SRAF pattern on the target lithography mask layout.

3. The rule and model based SRAF pattern generation method of claim 1, wherein, The way of optimizing each key SRAF pattern based on the lithography process model comprises: inputting each lithography pattern in each key lithography pattern region and each key SRAF pattern into the lithography process model to simulate the lithography process and generate a simulated lithography imaging map of the lithography mask design layout; comparing the simulated lithography imaging map with the lithography mask design layout, and evaluating a lithography effect of the simulated lithography imaging map and a lithography effect contribution of each key SRAF pattern; if the lithography effect is less than a preset lithography effect threshold, removing one or more key SRAF patterns with a lithography effect contribution less than a preset lithography effect contribution threshold, and adjusting the size and position of the remaining key SRAF patterns, re-inputting a lithography process model to simulate a lithography process, updating the simulated lithography imaging map until the lithography effect is greater than or equal to the preset lithography effect threshold; if the lithography effect is greater than or equal to the preset lithography effect threshold, generating a second SRAF pattern layout of the lithography mask design layout according to the adjusted key SRAF patterns.

4. The rule and model based SRAF pattern generation method of claim 3, wherein, The lithography effect of the simulated lithography imaging map includes a lithography process window of the simulated lithography imaging map, a resolution, an edge roughness of each simulated lithography pattern in the simulated lithography imaging map, and a similarity between each simulated lithography pattern and each lithography pattern; and the lithography effect contribution of the key SRAF pattern includes a resolution, an edge roughness of each simulated lithography pattern corresponding to one or more lithography patterns around the key SRAF pattern, and a similarity between each simulated lithography pattern and each lithography pattern.

5. The rule and model based SRAF pattern generation method of claim 1, wherein the SRAF insertion rule is used to define a minimum length, a maximum length, an initial width of the inserted initial SRAF pattern, and an initial distance from the lithography pattern; and wherein the way of generating the plurality of initial SRAF patterns of the lithography pattern based on the SRAF insertion rule comprises: offsetting each edge of the lithography pattern by the initial distance to generate a plurality of auxiliary edges of the lithography pattern, and adjusting the length of each auxiliary edge based on the minimum length and the maximum length; and generating a plurality of rectangles as initial SRAF patterns based on the initial width and taking each auxiliary edge as a long side of the rectangle. The way of generating the target lithography mask layout comprises: verifying a lithography effect of the target SRAF pattern layout based on a lithography process model, and generating the target lithography mask layout after the lithography effect verification is passed. Further comprising: generating a design report of the target SRAF pattern layout; wherein the design report comprises the size and position of the plurality of initial SRAF patterns inserted initially, the size and position of the plurality of SRAF patterns removed, and the original size, the original position, the target size and the target position of the plurality of SRAF patterns optimized. Further comprising: an SRAF pattern insertion module configured to acquire a plurality of lithography patterns of a lithography mask design layout, and generate a plurality of initial SRAF patterns of each lithography pattern based on a predefined SRAF insertion rule; ​ 6. The rule and model based SRAF pattern generation method of claim 1, wherein, ​ ​ 7. The rule and model based SRAF pattern generation method of claim 1, wherein, ​ ​ ​ 8. A rule and model based SRAF pattern generation system, characterized by, ​ ​ a first SRAF pattern cleaning module connected to the SRAF pattern inserting module, configured to optimize each initial SRAF pattern based on a predefined SRAF cleaning rule, and to remove redundant SRAF patterns, to generate a first SRAF pattern layout of the photomask design layout; a second SRAF pattern cleaning module connected to the SRAF pattern inserting module, configured to screen one or more key SRAF patterns from each initial SRAF pattern, and to optimize each key SRAF pattern based on a photolithography process model, and to remove redundant SRAF patterns, to generate a second SRAF pattern layout of the photomask design layout; a target SRAF pattern layout module connected to the first SRAF pattern cleaning module and the second SRAF pattern cleaning module, respectively, configured to screen a plurality of target SRAF patterns from the first SRAF pattern layout and the second SRAF pattern layout, and to generate a target SRAF pattern layout of the photomask design layout, to generate a target photomask layout; wherein the manner of screening one or more key SRAF patterns from each initial SRAF pattern comprises: screening one or more key pattern regions from each lithography pattern of the photomask design layout; obtaining a plurality of initial SRAF patterns within each key pattern region, and determining the initial SRAF patterns as key SRAF patterns; the key pattern regions include: isolated pattern regions, minimum line width pattern regions, dense pattern regions, edge pattern regions, corner pattern regions, and mixed pattern regions in the photomask design layout; the manner of screening each target SRAF pattern comprises: removing redundant SRAF patterns; retaining SRAF patterns that meet the SRAF cleaning rule; retaining key SRAF patterns that are optimized based on the photolithography process model; the removed SRAF patterns include: exception SRAF patterns that do not meet the SRAF cleaning rule, and key SRAF patterns whose lithography effect contribution is less than a preset lithography effect contribution threshold; the retained SRAF patterns that meet the SRAF cleaning rule include: initial SRAF patterns that originally meet the SRAF cleaning rule, and initial SRAF patterns that are optimized based on the rule; the retained key SRAF patterns that are optimized based on the photolithography process model include: key SRAF patterns with greater lithography effect contribution, and key SRAF patterns that are optimized based on the model.

9. A rule and model based SRAF pattern generation terminal, characterized by, comprise: a processor and a memory; the memory is configured to store a computer program; the processor is configured to execute the computer program stored in the memory, so that the terminal executes the rule and model based SRAF pattern generation method in any one of claims 1 to 7.

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