Via structure for inner layer layer change wiring of ultra-high rate differential signal and test board

By inserting separating ground holes between differential signal pairs, the problem of insufficient bandwidth in traditional via structures under high-density and high-speed scenarios is solved, achieving higher signal propagation quality and bandwidth requirements.

CN121419111BActive Publication Date: 2026-03-20零壹半导体技术(常州)有限公司
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Patent Information

Application Number
CN202511997889.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-12-28
Publication Date
2026-03-20
Estimated Expiration
2045-12-28

AI Technical Summary

Technical Problem

Traditional via optimization methods are insufficient to meet the differential signal bandwidth requirements in high-density, high-speed scenarios, especially since the double-sided residual pile structure caused by the double-sided back drilling process has a serious impact on bandwidth attenuation.

Method used

Design a via structure for inner layer switching routing of ultra-high speed differential signals. By inserting separating ground vias between differential signal pairs, coupling is broken and impedance continuity is improved. This includes the specific arrangement of differential signal pairs, accompanying ground vias, and separating ground vias.

Benefits of technology

It effectively improves the impedance continuity problem caused by double-sided back drilling, meets the bandwidth requirements of ultra-high speed differential signals, and improves signal propagation quality.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application relates to the field of test boards, in particular to a via structure for inner layer layer-changing wiring of an ultrahigh-speed differential signal and a test board, and especially to a 224Gbps test board. The via structure for inner layer layer-changing wiring of the ultrahigh-speed differential signal comprises a differential signal pair hole, a plurality of accompanying ground holes and at least one separation ground hole; wherein the differential signal pair hole comprises a pair of two differential signal holes, is located on a wiring path of the test board and is used for transmitting a differential signal between two different layers inside the test board; the accompanying ground holes are arranged outside the differential signal pair hole; and the separation ground hole is arranged between the two differential signal holes, and the center of one of the separation ground holes is located at a midpoint of the connection of the centers of the two differential signal holes. The application can solve the impedance continuity problem of double-sided residual stubs caused by double-sided back drilling, and meet the bandwidth requirement of the ultrahigh-speed differential signal.
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Description

TECHNICAL FIELD

[0001] The present application relates to the field of test boards, in particular to a via structure for inner layer layer change wiring of ultra-high rate differential signals and a test board, and more particularly to a 224Gbps test board. BACKGROUND

[0002] Under the driving of AI, 5G and other technologies, the demand for data throughput capacity of chips has surged, directly pushing the continuous rise of high-speed pin density, which has become an irreversible trend in the industry. With the increase in density, the demand for direct loopback testing of high-speed networks of chips is increasingly urgent, which makes the problems such as outlet congestion and signal crosstalk caused by pin density become the key variables restricting the accuracy of testing.

[0003] To understand the core impact of these problems, the basic concept of "bandwidth" needs to be clarified first. Bandwidth is used to represent the highest effective sinusoidal frequency component in the frequency spectrum. The term bandwidth was originally used in the field of radio frequency to identify the frequency range of a signal, and each frequency component in the signal forms a frequency band. The frequency range of such a radio frequency signal is called bandwidth. For digital signals, bandwidth also refers to the frequency range in the signal spectrum, but for digital signals, the low frequency range starts from the direct current component and extends to the highest frequency component. Therefore, the bandwidth always corresponds to the highest effective sinusoidal frequency component value.

[0004] For high-speed signal transmission, via (differential signal hole) is one of the core physical carriers that affect bandwidth. For high-speed vias, the differential via spacing, the distance between the signal hole and the ground hole, the pad size, the stub size, the hole depth, etc. will affect the bandwidth of the differential via and affect the quality of high-speed signal propagation. This problem is particularly prominent in the layer change hole of the ATE board: the unique double-sided back drilling process of the ATE board will form "double-sided stubs", and in extreme cases, even the length of the upper stub: the effective length of the differential signal hole: the length of the lower stub = 1:1:1 imbalance structure. This structure has a destructive effect on the attenuation of differential via bandwidth. Unfortunately, traditional via optimization methods are helpless in this regard and have been unable to meet the bandwidth requirements in high-density high-speed scenarios. SUMMARY

[0005] The technical problem to be solved by the present application is to overcome the defects of the prior art and provide a via structure for inner layer layer change wiring of ultra-high rate differential signals, which can solve the impedance continuity problem of double-sided stubs caused by double-sided back drilling and meet the bandwidth requirements of ultra-high rate differential signals.

[0006] In order to solve the above technical problems, the technical scheme of the present application is as follows: a via structure for inner layer layer change wiring of ultra-high rate differential signals, comprising a differential signal pair hole, a plurality of accompanying ground holes and at least one separation ground hole; wherein,

[0007] The differential signal pair hole includes a pair of two differential signal holes located on the wiring path of the test board for transmitting differential signals between two different layers inside the test board;

[0008] The accompanying hole is arranged outside the differential signal pair hole; the partition hole is arranged between the two differential signal holes, and the center of one of the partition holes is located at the midpoint of the connection of the centers of the two differential signal holes.

[0009] Further, at least one of the accompanying hole and the partition hole is a buried hole, and both ends of the buried hole exceed the corresponding wire-out layer of the differential signal hole.

[0010] Further, the upper end of the buried hole is flush with the free end of the upper stub of the differential signal hole, and the lower end of the buried hole is flush with the free end of the lower stub of the differential signal hole.

[0011] Further, the size of the reference plane of the pad of the stub of the differential signal hole is greater than the size of the reference plane of the pad of the effective part of the differential signal hole.

[0012] Further, the shape of the reference plane of the pad of the stub of the differential signal hole is circular or elliptical.

[0013] Further, the hole diameter of the differential signal hole, the accompanying hole and the partition hole is greater than 4 mil;

[0014] The center distance between the differential signal hole and the accompanying hole and the center distance between the differential signal hole and the partition hole are both greater than 8 mil.

[0015] Further, the wiring directions of the two wire-out layers of the differential signal hole are different; wherein,

[0016] The accompanying hole surrounds at least one circle at other positions of the differential signal pair hole except the wiring position;

[0017] The partition hole has one; or the partition hole has multiple and is arranged at intervals on the median line of the connection line of the centers of the two differential signal holes.

[0018] Further, the wiring directions of the two wire-out layers of the differential signal hole are the same; wherein,

[0019] The accompanying hole surrounds two circles on the side away from the wiring direction of the differential signal pair hole, and surrounds one or two circles on the side along the wiring direction of the differential signal pair hole;

[0020] The partition hole has multiple and is arranged at intervals on the median line of the connection line of the centers of the two differential signal holes.

[0021] The present application also relates to a test board comprising a via structure for ultra-high-speed differential signal inner-layer layer-changing wiring.

[0022] By adopting the above technical solution, the present invention inserts a separating ground hole between two pairs of differential signal holes, thereby breaking the coupling between the two differential signal holes and turning a pair of differential signal holes into two single-ended vias. This allows the single-ended vias to have closer return flow, improves the impedance continuity problem of the double-sided stub (residual pile) caused by double-sided back drilling in the layer-changing hole, and meets the bandwidth requirements of ultra-high speed differential signals. Attached Figure Description

[0023] Figure 1 This is a schematic diagram of the first via structure for inner layer switching routing of ultra-high speed differential signals according to the present invention.

[0024] Figure 2 for Figure 1 Top view;

[0025] Figure 3 This is a top view of the second via structure for inner layer switching routing of ultra-high speed differential signals according to the present invention.

[0026] Figure 4 This is a layout diagram of the third type of via structure for inner layer switching routing of ultra-high speed differential signals according to the present invention.

[0027] Figure 5 for Figure 4 Top view;

[0028] Figure 6 This is a layout diagram of the fourth via structure for inner layer switching routing of ultra-high speed differential signals according to the present invention.

[0029] Figure 7 This is a schematic diagram of the differential signal aperture and an accompanying ground aperture of the present invention;

[0030] Figure 8 This is a simulation diagram of differential insertion loss according to Embodiment 1 of the present invention;

[0031] Figure 9 This is a simulation diagram of differential insertion loss in Embodiment 2 of the present invention;

[0032] In the diagram, 1 is the differential signal via; 11 is the differential signal via; 2 is the accompanying ground via; and 3 is the separating ground via. Detailed Implementation

[0033] To make the content of this invention easier to understand, the invention will be further described in detail below with reference to specific embodiments and accompanying drawings.

[0034] like Figures 1 to 6 As shown, a via structure for inner layer switching routing of ultra-high speed differential signals includes differential signal pair vias 1, multiple accompanying ground vias 2, and at least one separating ground via 3; wherein,

[0035] The differential signal via 1 includes two differential signal vias 11 located on the wiring path of the test board, for transmitting differential signals between two different layers inside the test board;

[0036] The accompanying ground hole 2 is arranged outside the differential signal hole 1; the separating ground hole 3 is arranged between the two differential signal holes 11, and the center of one of the separating ground holes 3 is located at the midpoint connecting the centers of the two differential signal holes 11.

[0037] Specifically, in the wiring path of differential lines, if vias are required, a differential signal pair via 1 design is typically used. A key feature of a differential signal pair via 1 is that it includes two paired differential signal vias 11. In traditional differential signal pair vias 1, the two differential signal vias 11 need to be very close together to form coupling; there cannot be other signal vias between the two differential signal vias 11. However, in this embodiment, a separating ground via 3 is inserted between the two paired differential signal vias 11, breaking the coupling between the two differential signal vias 11, turning a pair of differential signal vias 11 into two single-ended vias. This allows the single-ended vias to have closer return current, improving the impedance continuity problem of double-sided stubs (residual piles) caused by double-sided back drilling in layer-changing vias, and meeting the bandwidth requirements of ultra-high-speed differential signals.

[0038] It should be noted that setting the separator ground hole 3 does indeed reduce the coupling between the two differential signal holes 11, thus theoretically decreasing the anti-interference capability of the differential signal. However, the presence of more ground holes around the differential signal holes 11 can improve the anti-interference capability to some extent. Through simulation and physical testing, the negative impact of disrupting coupling is far less than the positive benefit of increased bandwidth.

[0039] In this embodiment, preferably, the diameters of the differential signal aperture 11, the accompanying ground aperture 2, and the separating ground aperture 3 are all greater than 4 mil; the center distance between the differential signal aperture 11 and the accompanying ground aperture 2, and the center distance between the differential signal aperture 11 and the separating ground aperture 3 are all greater than 8 mil.

[0040] In this embodiment, the routing directions of the two output layers of the differential signal aperture 11 can be different or the same.

[0041] like Figures 1 to 3 As shown, the two output layers of the differential signal via 11 have different routing directions; the accompanying ground via 2 forms at least one ring around the differential signal via 1 at positions other than the routing points; there is one separating ground via 3; or there are multiple separating ground via 3, which are arranged at intervals on the perpendicular bisector of the line connecting the centers of the two differential signal vias 11.

[0042] Figure 1 and Figure 2 In the structure shown, there is one separating ground hole 3, and its center is located at the midpoint where the centers of the two differential signal holes 11 are connected.

[0043] Figure 3 In the structure shown, the partition ground hole 3 is arranged in multiple on the midline of the connecting line of the two differential signal holes 11, and the center of one of the partition ground holes 3 is located at the midpoint of the connecting line of the centers of the two differential signal holes 11.

[0044] Specifically, the two outgoing line layers of the differential signal hole 11 have different wire directions, which can reduce the coupling between the two outgoing line layers, so that the accompanying ground hole 2 does not need to be completely wrapped, and one circle of wrapping is sufficient, and the number of partition ground holes 3 is not high, and one or more can be set according to needs.

[0045] As shown in Figures 4 to 6 , the two outgoing line layers of the differential signal hole 11 have the same wire direction; the accompanying ground hole 2 is surrounded by two circles on the side away from the wire direction of the differential signal pair hole 1, and is surrounded by one or two circles on the side along the wire direction of the differential signal pair hole 1.

[0046] The partition ground hole 3 is arranged in multiple on the midline of the connecting line of the two differential signal holes 11.

[0047] Figure 4 And Figure 5 , the accompanying ground hole 2 is surrounded by two circles on the side away from the wire direction of the differential signal pair hole 1, and is surrounded by two circles on the side along the wire direction of the differential signal pair hole 1.

[0048] Figure 6 In the structure shown, the accompanying ground hole 2 is surrounded by two circles on the side away from the wire direction of the differential signal pair hole 1, and is surrounded by one circle on the side along the wire direction of the differential signal pair hole 1.

[0049] Specifically, the two outgoing line layers of the differential signal hole 11 have the same wire direction, and the coupling between the two outgoing line layers is higher than when the wire directions are different, so that the accompanying ground hole 2 is surrounded by two circles on the side away from the wire direction of the differential signal pair hole 1, which realizes basic wrapping and ensures that there is no signal leakage, and the accompanying ground hole 2 is also set on the side along the wire direction, and multiple partition ground holes 3 are also set to ensure the bandwidth.

[0050] In some examples, as shown in Figure 7 , at least one of the accompanying ground hole 2 and the partition ground hole 3 is a buried hole, and both ends of the buried hole extend beyond the corresponding outgoing line layer of the differential signal hole 11. Preferably, the upper end of the buried hole is flush with the free end of the upper stub of the differential signal hole 11, and the lower end of the buried hole is flush with the free end of the lower stub of the differential signal hole 11.

[0051] In this way, the accompanying ground hole 2 and the partition ground hole 3 do not need to be designed as through holes, which can increase the space utilization rate of the test board.

[0052] In some examples, the size of the reference plane pad of the stub of the differential signal hole 11 is larger than the size of the reference plane pad of the effective part of the differential signal hole 11. The shape of the reference plane pad of the stub of the differential signal hole 11 can be circular or oval.

[0053] Specifically, considering that the stub of the differential signal hole 11 is in an open circuit state, when a high-speed signal is transmitted to the end of the stub, total reflection occurs and returns to the main transmission line along the original path. The equivalent electrical characteristics formed on the main transmission line after the superposition of this reflected signal and the main signal are consistent with the change rule of current and voltage during the process of capacitor charging and discharging. Therefore, the size of the reference plane pad of the stub is increased to reduce the parasitic capacitance, increase the differential impedance, so that the impedance at the stub of the differential signal hole 11 is closer to the target impedance.

[0054] A test board includes the via structure for the inner layer layer-changing wiring of the ultra-high-rate differential signal described in the above embodiments. This test board mainly refers to an ATE board (chip automatic test carrier board) for 224Gbps chip testing.

[0055] The via structure for the inner layer layer-changing wiring of the ultra-high-rate differential signal involved in the above embodiments will be described in detail below in combination with specific embodiments.

[0056] Embodiment one: as shown in Figure 1 and Figure 2 , a via structure for the inner layer layer-changing wiring of the ultra-high-rate differential signal,

[0057] including a differential signal pair hole 1, a plurality of accompanying ground holes 2, and a separation ground hole 3; the differential signal pair hole 1 includes a pair of two differential signal holes 11, the wiring directions of the two outgoing layers of the differential signal hole 11 are arranged at an angle; the accompanying ground hole 2 is arranged outside the differential signal pair hole 1, and the center of the separation ground hole 3 is located at the midpoint of the connection of the centers of the two differential signal holes 11.

[0058] The aperture of the differential signal hole 11 is 5.1 mil, the apertures of the accompanying ground hole 2 and the separation ground hole 3 are also 5.1 mil, the center distance between the accompanying ground hole 2 and the differential signal hole 11 is 29 mil, and there is an accompanying ground hole 2 every 30 degrees with the corresponding differential signal hole 11 as the center and 29 mil as the radius. The hole distance between the two differential signal holes 11 is 47 mil, and the separation ground hole 3 is at a horizontal distance of 23.5 mil. In order to realize the layer-changing outgoing wiring from L5 to L7, the length of the stub on the differential signal hole 11: the length of the effective part of the differential signal hole 11: the length of the stub below the differential signal hole 11 = 5:6.6:5, and the stub has a greater impact on the differential signal hole 11.

[0059] The anti-pad of the stub reference plane is runway type with a radius of 29 mil and a horizontal length of 47 mil, and the anti-pad of the reference plane (L6 reference layer) of the effective part of the differential signal hole 11 is circular with a radius of 11 mil.

[0060] The simulation results of the differential insertion loss of the via structure of the super-high-rate differential signal inner layer layer-changing wiring are as shown in Figure 8

[0061] Embodiment two: as shown in Figure 4 and Figure 5 A via structure for super-high-rate differential signal inner layer layer-changing wiring,

[0062] including a differential signal pair hole 1, a plurality of accompanying ground holes 2 and a plurality of separation ground holes 3; the differential signal pair hole 1 includes a pair of two differential signal holes 11, the wiring directions of the two outgoing layers of the differential signal hole 11 are the same, the accompanying ground holes 2 are arranged in two circles on the side of the differential signal pair hole 1 away from the wiring direction, and are also arranged in two circles on the side of the differential signal pair hole 1 along the wiring direction, and the separation ground holes 3 are arranged on the median line of the connecting line of the centers of the two differential signal holes 11. The center of one of the separation ground holes 3 is located at the midpoint of the connecting line of the centers of the two differential signal holes 11.

[0063] The aperture of the differential signal hole 11 is 5.1 mil, and the apertures of the accompanying ground holes 2 and the plurality of separation ground holes 3 are also 5.1 mil. The distance between the center of the accompanying ground hole 2 in the inner circle of the side of the differential signal pair hole 1 away from the wiring direction and the corresponding differential signal hole 11 is 15 mil, and there is an accompanying ground hole 2 every 45 degrees with the corresponding differential signal hole 11 as the center and a radius of 15 mil. The distance between the center of the second row of accompanying ground holes 2 and the differential signal hole 11 is 22 mil, and the interval is also 45 degrees. There are four separation ground holes 3 between the two differential signal holes 11, and the four separation ground holes 3 are vertically arranged and isolated. The distance between the centers of the two adjacent separation ground holes 3 is 10 mil, the distance between the two differential signal holes 11 is 30 mil, and the separation ground hole 3 is at a horizontal distance of 15 mil. In order to realize layer-changing outgoing wiring from L7 to L15, the length of the stub on the differential signal hole 11: the length of the effective part of the differential signal hole 11: the length of the stub below the differential signal hole 11 = 5:24:5.

[0064] The anti-pad of the stub reference plane is circular with a radius of 13 mil, and the anti-pad of the reference plane (L8-L11 reference layer) of the effective part of the differential signal hole 11 is circular with a radius of 9 mil.

[0065] The simulation results of the differential insertion loss of the via structure of the super-high-rate differential signal inner layer layer-changing wiring are as shown in Figure 9 ​As shown, the 3dB resonance bandwidth is basically to 105GHz, which meets the test requirement of 224Gbps PAM4.

[0066] The above is the ideal embodiment according to the application, and the above description can be changed and modified by the relevant personnel without deviating from the technical idea of the application. The technical scope of the application is not limited to the content of the specification, and the technical scope must be determined according to the scope of claims.

Claims

1. A via structure for inner layer switching routing of ultra-high speed differential signals, characterized in that, It includes differential signal pair vias (1), multiple accompanying ground vias (2), and at least one separator ground via (3); wherein, The differential signal pair via (1) includes two differential signal vias (11) located on the wiring path of the test board for transmitting differential signals between two different layers inside the test board; The accompanying ground hole (2) is arranged outside the differential signal pair hole (1); the separating ground hole (3) is arranged between the two differential signal holes (11), and the center of one of the separating ground holes (3) is located at the midpoint connecting the centers of the two differential signal holes (11).

2. The via structure for inner layer switching routing of ultra-high speed differential signals according to claim 1, characterized in that, At least one of the accompanying ground hole (2) and the separating ground hole (3) is a buried hole, and both ends of the buried hole extend beyond the corresponding outgoing layer of the differential signal hole (11).

3. The via structure for inner layer switching routing of ultra-high speed differential signals according to claim 2, characterized in that, The upper end of the buried hole is flush with the free end of the upper residual pile of the differential signal hole (11), and the lower end of the buried hole is flush with the free end of the lower residual pile of the differential signal hole (11).

4. The via structure for inner layer switching routing of ultra-high speed differential signals according to claim 1, characterized in that, The size of the antipad of the reference plane of the residual post of the differential signal hole (11) is larger than the size of the antipad of the reference plane of the effective part of the differential signal hole (11).

5. The via structure for inner layer switching routing of ultra-high speed differential signals according to claim 1, characterized in that, The anti-pad of the reference plane of the residual post of the differential signal hole (11) is circular or elliptical.

6. The via structure for inner layer switching routing of ultra-high speed differential signals according to claim 1, characterized in that, The diameters of the differential signal aperture (11), the accompanying ground aperture (2), and the separating ground aperture (3) are all greater than 4 mil; The center distance between the differential signal aperture (11) and the accompanying ground aperture (2) and the center distance between the differential signal aperture (11) and the separating ground aperture (3) are both greater than 8 mil.

7. The via structure for inner layer switching routing of ultra-high speed differential signals according to claim 1, characterized in that, The two output layers of the differential signal via (11) have different routing directions; among them, The accompanying ground hole (2) forms at least one ring around the differential signal pair hole (1) at locations other than the traces; There is one separating ground hole (3); or there are multiple separating ground holes (3), which are arranged at intervals on the perpendicular line connecting the centers of the two differential signal holes (11).

8. The via structure for inner layer switching routing of ultra-high speed differential signals according to claim 1, characterized in that, The two output layers of the differential signal via (11) have the same routing direction; among them, The accompanying ground hole (2) is arranged in two circles on the side of the differential signal pair hole (1) away from the trace direction, and in one or two circles on the side of the differential signal pair hole (1) along the trace direction. Multiple ground holes (3) are arranged at intervals on the perpendicular line connecting the centers of two differential signal holes (11).

9. A test board, characterized in that, Includes the via structure for inner layer switching routing of ultra-high speed differential signals as described in any one of claims 1-8.

Citation Information

Patent Citations

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