A multi-junction solar cell and a method of fabricating the same

Abstract

The application discloses a kind of multi-junction solar cell and preparation method thereof, it is related to semiconductor technical field, the multi-junction solar cell includes transferable battery film structure;The battery film structure includes sequentially stacked light incident layer, first cell unit, gradual change buffer layer and second cell unit;The material system of the first cell unit is matched with GaAs lattice constant;The material system of the second cell unit is matched with InP lattice constant;The gradual change buffer layer is alternately stacked by two different semiconductor sub-layers of lattice constant, and the lattice constant of the gradual change buffer layer gradually changes from matching the first cell unit to matching the second cell unit.The application solves the integration problem and cost bottleneck of existing high-efficiency multi-junction solar cell systematically by transferable battery film structure and special gradual change buffer layer design.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a multi-junction solar cell and its fabrication method. Background Technology

[0002] To achieve higher photoelectric conversion efficiency, multi-junction solar cells utilize a series stacking of various semiconductor materials with different bandgapes via tunneling junctions, thereby segmenting the absorption of the solar spectrum. Recognized theoretical calculations and industry consensus indicate that introducing a sub-cell with a bandgap of approximately 1.0 eV to broaden the spectral absorption range, based on a traditional triple-junction cell, is one of the key pathways to breaking through existing efficiency bottlenecks and moving towards a new generation of ultra-high-efficiency photovoltaic devices. Among these, InGaAsP material with a bandgap of 1.0 eV is considered one of the "magic" materials for achieving this goal due to its excellent photoelectric properties.

[0003] However, this technological evolution path faces a core materials physics challenge: lattice mismatch. Specifically, for quad-junction solar cells containing 1.0 eV InGaAsP, a significant challenge arises: to achieve efficient current matching, the 1.0 eV InGaAsP material needs to be grown under conditions matching the lattice constant of InP (~5.87 Å), while traditional high-efficiency sub-cells (such as InGaP and GaAs) are typically grown in systems with lattice matching to the GaAs substrate (~5.65 Å). This significant difference in lattice constants (large-scale mismatch) introduces numerous penetrating dislocations and residual stresses into heteroepitaxial growth. Dislocations, acting as non-radiative recombination centers, severely impair carrier lifetime and cell voltage; residual stresses can lead to epitaxial wafer warping or even cracking, threatening device reliability and mass production yield.

[0004] Existing technologies typically employ buffer layer techniques to mitigate the lattice mismatch problem in multi-junction solar cells. For example, Chinese patent CN108493284A discloses a modified buffer layer scheme combining a graded sublayer with constant In composition and a delta-doped layer, aiming to enhance dislocation blocking and stress release, thereby improving crystal quality. However, this scheme has the following inherent limitations when adapted to the aforementioned next-generation quad-junction solar cells containing 1.0 eV InGaAsP:

[0005] 1. Insufficient lattice fit span: The modified buffer layer of this scheme relies on a continuous gradient of the In composition of ternary / quaternary materials, which is mainly for small-span mismatch optimization. For the large-span, high-precision lattice gradient requirements from GaAs to InP, this method may not provide sufficient strain release and may not be able to ensure high crystal quality of the top 1.0 eV material.

[0006] 2. Narrow process window: The performance of the modified buffer layer in this scheme is highly dependent on the fine optimization of the composition, thickness and doping period of each sublayer. It is sensitive to process fluctuations and is not conducive to stability and yield control in large-scale production.

[0007] 3. High manufacturing costs remain unresolved: This technical approach permanently grows the entire battery structure on expensive GaAs or Ge substrates. As a disposable consumable, the substrate constitutes a fundamental bottleneck to cost reduction, which contradicts the industrialization goal of pursuing "high efficiency and low cost" for next-generation batteries.

[0008] In summary, existing multi-junction solar cells suffer from difficulties in achieving large-span lattice matching and in fundamentally reducing manufacturing costs, thus requiring urgent improvement. Summary of the Invention

[0009] This invention provides a multijunction solar cell and its fabrication method, aiming to solve the problems of existing multijunction solar cells, such as difficulty in achieving large-span lattice matching and inability to fundamentally reduce manufacturing costs.

[0010] The present invention adopts the following technical solution:

[0011] A multi-junction solar cell includes a transferable thin-film structure; the thin-film structure includes a light incident layer, a first cell, a gradient buffer layer, and a second cell stacked sequentially; the material system of the first cell is matched with the lattice constant of GaAs; the material system of the second cell is matched with the lattice constant of InP; the gradient buffer layer is composed of alternating stacks of two semiconductor sublayers with different lattice constants, and the lattice constant of the gradient buffer layer gradually changes from matching the first cell to matching the second cell.

[0012] Furthermore, the semiconductor sublayer includes a GaP sublayer that matches the lattice constant of the first battery cell and an InP sublayer that matches the lattice constant of the second battery cell.

[0013] Furthermore, in the gradient buffer layer, the total thickness of each cycle is equal, and along the direction away from the first battery cell, the thickness of the GaP sublayer decreases linearly during different cycles, while the thickness of the InP sublayer increases linearly.

[0014] Furthermore, it also includes an InGaP lattice-matching transition layer disposed between the first battery cell and the gradient buffer layer.

[0015] Furthermore, the first battery cell includes a first sub-cell, a first tunnel junction, a second sub-cell, a second tunnel junction, a third sub-cell, and a third tunnel junction stacked sequentially; the band gap widths of the first sub-cell, the second sub-cell, and the third sub-cell decrease sequentially.

[0016] Furthermore, the first sub-cell is an InGaP sub-cell; the second sub-cell is an AlGaAs sub-cell; and the third sub-cell is a GaAs sub-cell.

[0017] Furthermore, the second battery unit includes a fourth sub-cell, which is an InGaAsP sub-cell.

[0018] Furthermore, it also includes a support substrate, which is disposed on the surface of the second battery cell away from the gradient buffer layer via a bonding layer.

[0019] A method for fabricating a multi-junction solar cell, characterized by comprising the following steps:

[0020] Step S1: Grow a battery thin film structure on a growth substrate. The battery thin film structure includes a sacrificial layer, a light incident layer, a first battery cell, a gradient buffer layer, and a second battery cell stacked on top of each other.

[0021] Step S2: The battery thin film structure is peeled off from the growth substrate by selectively etching the sacrificial layer;

[0022] Step S3: Transfer the peeled battery thin film structure onto the support substrate through the bonding layer.

[0023] Furthermore, the gradient buffer layer is a GaP / InP superlattice, in which GaP sublayers and InP sublayers are alternately grown on the first battery cell, controlling the total thickness of each cycle to be equal, gradually decreasing the thickness of the GaP sublayer during different cycles, and simultaneously increasing the thickness of the InP sublayer.

[0024] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0025] This invention systematically overcomes the shortcomings of existing technologies through a transferable battery thin film structure and a special gradient buffer layer design. The gradient buffer layer utilizes alternating stacks of two semiconductor sublayers to achieve a large-span, high-precision lattice matching from GaAs to InP, fundamentally solving the problem of insufficient adaptability of traditional composition gradient schemes. Furthermore, the gradient buffer layer has a simple and clear structure, significantly superior to processes relying on complex composition control, greatly improving production stability and repeatability. Simultaneously, the peelable and transferable characteristics of the battery thin film structure completely break through the cost bottleneck of using expensive, single-use substrates. Attached Figure Description

[0026] Figure 1 This is a schematic diagram of the extensional structure of the present invention.

[0027] Figure 2 This is a schematic diagram of the epitaxial structure of the gradient buffer layer in this invention.

[0028] In the figure: 10-GaAs substrate; 11-Sacrificial layer; 20-Light incident layer; 30-First cell; 31-First sub-cell; 32-First tunnel junction; 33-Second sub-cell; 34-Second tunnel junction; 35-Third sub-cell; 36-Third tunnel junction; 40-InGaP lattice matching transition layer; 50-Gradient buffer layer; 60-Second cell; 61-Fourth sub-cell; 70-Binding layer; 80-Supporting substrate. Detailed Implementation

[0029] Specific embodiments of the present invention will now be described with reference to the accompanying drawings. Many details are described below to provide a comprehensive understanding of the invention; however, those skilled in the art will be able to implement the invention without these details.

[0030] Reference Figure 1 The core concept of this invention lies in providing a transferable battery thin-film structure and a substrate transfer method based on this battery thin-film structure. The battery thin-film structure achieves large-span lattice mismatch relaxation from GaAs to InP through a gradient buffer layer 50, thereby completing high-quality heterogeneous integration of GaAs-based cell units and InP-based cell units. The substrate transfer method employs sacrificial layer 11 peeling and substrate reuse technology to transfer the complete battery thin film to a low-cost support substrate 80, thus systematically solving the integration problem and cost bottleneck of existing high-efficiency multi-junction solar cells.

[0031] Reference Figure 1 Based on this core concept, this embodiment first provides a multi-junction solar cell, which includes a transferable thin-film structure, a bonding layer 70, and a supporting substrate 80. Specifically, the thin-film structure includes a light incident layer 20, a first cell 30, an InGaP lattice-matching transition layer 40, a gradient buffer layer 50, and a second cell 60, stacked sequentially. The functions, material design, and beneficial effects of each layer are described in detail below:

[0032] Light incident layer 20: This layer, located on the light incident side of the battery thin-film structure, is made of GaAs. Its main function is to serve as the interface between the battery and the external environment, improving light coupling efficiency through anti-reflection. In subsequent processes, the surface of this layer can be fabricated with micro- and nano-structures to form light-trapping or surface plasmon structures, thereby further enhancing the ability to capture wide-angle incident light and ultimately increasing the short-circuit current density of the battery.

[0033] First cell unit 30: This cell unit is a high-efficiency multi-junction cell array matched with the lattice constant of GaAs, used to absorb high-energy photons in the solar spectrum. Preferably, the first cell unit 30 includes a first sub-cell 31, a first tunneling junction 32, a second sub-cell 33, a second tunneling junction 34, a third sub-cell 35, and a third tunneling junction 36 stacked sequentially. The first sub-cell 31 is an InGaP sub-cell with a bandgap of approximately 1.9 eV; the second sub-cell 33 is an AlGaAs sub-cell with a bandgap of approximately 1.7 eV; and the third sub-cell 35 is a GaAs sub-cell with a bandgap of approximately 1.42 eV. The bandgap widths of the three sub-cells decrease sequentially, and they are connected in series with high efficiency and low loss through tunneling junctions, enabling synergistic absorption of sunlight in the 300 nm to 870 nm wavelength range. The materials of the first tunneling junction 32, the second tunneling junction 34, and the third tunneling junction 36 are all GaAs / AlGaAs.

[0034] InGaP lattice-matched transition layer 40: This layer is disposed between the first battery cell 30 and the gradient buffer layer 50, and its composition is preferably In. 0.48 Ga 0.52 P. This specific composition ratio makes its lattice constant (approximately 5.651 Å) almost perfectly match that of GaAs (approximately 5.653 Å), thus achieving a seamless lattice connection with the underlying first cell unit 30. Simultaneously, it possesses a wide bandgap (>1.8 eV), making it transparent to the long-wavelength photons required for absorption by subsequent cell units. This layer provides an atomically flat and lattice-matched initial growth interface for subsequent superlattice structures, which is crucial for suppressing interface defects and ensuring the bottom crystal quality of the gradient buffer layer 50.

[0035] The gradient buffer layer 50 is a core innovative structure that enables a large-span, low-defect-density transition from the GaAs lattice system to the InP lattice system. The gradient buffer layer 50 consists of alternating stacks of two semiconductor sublayers with different lattice constants: GaP and InP sublayers. Through precise design and control, the total thickness of each cycle (composed of one GaP and one InP sublayer) remains constant. Simultaneously, along the direction away from the first cell 30 (i.e., the growth direction), the thickness of the GaP sublayer decreases linearly, while the thickness of the InP sublayer increases linearly until it finally transitions to a pure InP layer. This "binary material thickness gradient" design replaces the traditional compositional gradient of ternary or quaternary alloys, fundamentally avoiding problems such as compositional fluctuations, segregation, and narrow process windows caused by difficulties in controlling multi-component components. The growth stability and repeatability are significantly superior.

[0036] The second battery cell 60 is grown on a high-quality "virtual substrate" with a lattice constant matched to InP, provided by the gradient buffer layer 50. In this embodiment, the second battery cell 60 includes only a fourth sub-cell 61, which is an InGaAsP sub-cell with a bandgap of approximately 1.0 eV. This sub-cell is specifically designed to absorb near-infrared light in the 870 nm to 1240 nm band of the solar spectrum, complementing the spectral absorption of the first battery cell 30 above, greatly expanding the overall spectral response range of the battery, and is key to overcoming the efficiency bottleneck.

[0037] Bonding layer 70: Bonding layer 70 is disposed on the back side of the battery thin film structure (i.e. the side surface of the second battery cell 60 away from the gradient buffer layer 50), and is made of materials such as InGaAs, to provide good ohmic contact and bonding interface.

[0038] Support substrate 80: The support substrate 80 is permanently flip-chip bonded to the battery thin film structure via bonding layer 70. The support substrate 80 is preferably a low-cost, large-size, high thermal conductivity silicon substrate, which can replace expensive disposable compound semiconductor substrates and provide the final mechanical support, heat dissipation and electrode interconnection functions for the battery. It is a key element for realizing low-cost industrial manufacturing.

[0039] Reference Figure 1 and Figure 2 The gradient buffer layer 50 is the design focus of this invention and is key to achieving high-quality monolithic integration of GaAs-based and InP-based solar cell units. This layer, through its continuous gradient of lattice constant, fundamentally relaxes the approximately 4% macroscopic lattice mismatch stress between GaAs (~5.65 Å) and InP (~5.87 Å), constructing a "virtual InP" platform suitable for epitaxial growth of low-defect-density InGaAsP materials. Its structural design and working principle are further analyzed below:

[0040] The design concept of the gradient buffer layer 50 is to achieve continuous control of the lattice constant by utilizing the gradual change in the thickness ratio of the binary compounds InP and GaP. By periodically alternating GaP sublayers with smaller lattice constants and InP sublayers with larger lattice constants in a superlattice form, according to Vegard's law and the principle of thickness weighted averaging, the average lattice constant of a single superlattice period in the direction parallel to the interface will be determined by the thickness ratio of the two within that period. Through growth program design, the thickness of the GaP layer decreases linearly along the growth direction while the thickness of the InP layer increases linearly, thus achieving a smooth, continuous, and linear gradient of the average lattice constant of the entire buffer layer from matching GaAs at the bottom to matching InP at the top. In addition, both InP and GaP are wide bandgap materials, and the effective bandgap of the strained superlattice they form is always higher than 1.3 eV, which is much higher than the photon energy absorbed by the fourth sub-cell 61 (1.0 eV), thereby ensuring that the buffer layer is completely transparent to light in the working wavelength band and avoiding parasitic absorption losses.

[0041] Specifically, in this embodiment, a 100nm thick In layer is first grown. 0.48 Ga 0.52 P serves as the InGaP lattice-matched transition layer 40. Subsequently, an InP / GaP superlattice consisting of 53 cycles is grown as a gradient buffer layer 50, with a constant total thickness of 5 nm for each cycle. Starting from the first cycle near the InGaP lattice-matched transition layer 40, the InP sublayer thickness is set to 2.4 nm, and the GaP sublayer thickness is 2.6 nm. In each subsequent growth cycle, the InP sublayer thickness increases by 0.05 nm, while the GaP sublayer thickness decreases by 0.05 nm. After 53 cycles of linear gradient, a 5 nm thick pure InP layer is finally grown on top as the termination. The cycle thickness in this design is much smaller than the critical thickness of the material, ensuring that each sublayer can effectively bend, block, and annihilate penetrating dislocations within the elastic strain range using the strain field at the superlattice interface, thereby achieving a lower dislocation density while realizing the lattice transition.

[0042] The quad-junction solar cell provided in this embodiment adopts a bandgap combination of 1.9 eV (InGaP) / 1.7 eV (AlGaAs) / 1.42 eV (GaAs) / 1.0 eV (InGaAsP). This combination represents the optimal balance between material feasibility and theoretical efficiency potential achieved through systematic optimization of spectral and current matching theories. It is one of the core designs for realizing high-efficiency, highly feasible multi-junction solar cells, and its performance advantages are specifically reflected in the following three aspects:

[0043] 1. Achieving Wider Spectral Absorption and Higher Photon Utilization: This combination significantly broadens the spectral response range of the battery by performing a more refined "four-segment" division and absorption of the solar spectrum. Specifically, the introduction of the 1.0 eV InGaAsP sub-cell not only effectively utilizes low-energy infrared photons that traditional triple-junction cells cannot convert, but more importantly, it reduces the thermal loss of high-energy photons in narrow-bandgap cells, thereby improving the overall spectral utilization.

[0044] 2. Optimized current matching for improved output performance: This bandgap combination is carefully designed to ensure that the photocurrent densities generated by each sub-cell under the standard solar spectrum are more similar. Theoretical calculations show that this combination enables the current of the four sub-cells to achieve a better balance, avoiding any single sub-cell becoming a current bottleneck, thereby maximizing the battery's short-circuit current density and final conversion efficiency.

[0045] 3. Balancing Theoretical Limits and Engineering Feasibility: The material combinations selected in this invention (InGaP, AlGaAs, GaAs, InGaAsP) fully consider their technological maturity on GaAs substrate platforms, epitaxial crystal quality, and compatibility with lattice matching constraints. Although from a purely theoretical perspective, there may be other combinations of ideal bandgap values ​​for quadruple-junction solar cells, the combination in this invention approaches the theoretical efficiency limit within the most mature and stable material systems currently available, providing a solid engineering foundation for moving from the laboratory to industrialization.

[0046] Reference Figure 1 and Figure 2 This embodiment further provides a method for fabricating a multi-junction solar cell. The method first involves epitaxially growing a complete cell thin film structure on a GaAs substrate 10, then selectively etching away the sacrificial layer 11, and finally transferring and bonding it to a support substrate. The key steps of this fabrication process are described in detail below:

[0047] Step S1: Epitaxially grow a thin cell structure on a GaAs growth substrate.

[0048] A 6-inch GaAs substrate 10 with a (100) crystal orientation was provided and subjected to standard chemical cleaning and high-temperature thermal deoxidation. Subsequently, metal-organic chemical vapor deposition (MOCVD) was used to grow the following sequentially under optimized temperature and pressure:

[0049] 1. Sacrificial layer 11 (AlAs layer);

[0050] 2. Light incident layer 20 (intrinsic GaAs layer);

[0051] 3. First cell unit 30: InGaP sub-cell, first tunnel junction 32, AlGaAs sub-cell, second tunnel junction 34, GaAs sub-cell and third tunnel junction 36 are grown sequentially.

[0052] 4. InGaP lattice-matched transition layer 40;

[0053] 5. Gradient buffer layer 50: By precisely programming and controlling the flow rate and time of trimethylindium (TMIn), triethylgallium (TEGa), and phosphine (PH3), InP sublayers and GaP sublayers are grown alternately, and the above-mentioned linear thickness gradient sequence is strictly executed;

[0054] 6. Second battery unit 60: Growing a 1.0 eV InGaAsP sub-cell;

[0055] 7. Bonding layer 70 (InGaAs layer).

[0056] Step S2: Peel off the battery film structure.

[0057] The grown sample is immersed in an aqueous solution of hydrofluoric acid (HF) of appropriate concentration. The HF acid selectively etches the sacrificial layer 11 laterally, while the etching rate of the GaAs layer and other III-V compound layers above and below it is extremely low. After etching, the complete battery thin film structure (from the light incident layer 20 to the bonding layer 70) will automatically separate from the GaAs substrate 10. The separated GaAs substrate 10 can be reused for epitaxial growth after cleaning and polishing, significantly reducing the substrate material cost per cell.

[0058] Step S3: Flip-bond to the support substrate 80 and perform post-processing.

[0059] One side of the bonding layer 70 of the peeled-off battery thin film structure is aligned with a pre-treated support substrate 80 (preferably a silicon substrate) in a vacuum or inert atmosphere, and a permanent bond is formed by applying appropriate temperature and pressure, creating a strong mechanical and electrical connection. After bonding, the battery thin film structure is rigidly supported by the support substrate 80. Finally, the surface of the light incident layer 20 can be microfabricated by nanoimprinting or dry etching to form periodic light-trapping microstructures, further improving the long-wavelength response and overall conversion efficiency of the battery.

[0060] The fabrication method provided in this embodiment successfully decouples the complex high-efficiency battery structure from a low-cost manufacturing process. A high-quality top cell is grown on a GaAs substrate 10, leveraging its mature material system. The bottom cell is integrated using an innovative gradient buffer layer technology, and finally, integration and packaging are completed using a mature silicon process platform. This process combines the high-performance potential of III-V materials with the good compatibility of silicon substrates and the cost advantages of subsequent packaging processes. The process route is clear and has broad prospects for industrialization.

[0061] The above are merely specific embodiments of the present invention, but the design concept of the present invention is not limited thereto. Any non-substantial modifications made to the present invention using this concept shall be considered as infringing upon the protection scope of the present invention.

Claims

1. A multi-junction solar cell, comprising: a transferable cell thin film structure; the cell thin film structure comprising, in order, a light incident layer, a first cell unit, a graded buffer layer, and a second cell unit; a material system of the first cell unit matching a GaAs lattice constant; a material system of the second cell unit matching an InP lattice constant; the graded buffer layer being formed by alternatingly stacking semiconductor sub-layers with two different lattice constants, and a lattice constant of the graded buffer layer gradually changing from matching the first cell unit to matching the second cell unit; the semiconductor sub-layers comprising GaP sub-layers matching the lattice constant of the first cell unit, and InP sub-layers matching the lattice constant of the second cell unit; in the graded buffer layer, a total thickness of each period being equal, and along a direction away from the first cell unit, a thickness of the GaP sub-layers linearly decreasing and a thickness of the InP sub-layers linearly increasing between different periods. further comprising an InGaP lattice-matching transition layer disposed between the first cell unit and the graded buffer layer. the first cell unit comprising, in order, a first sub-cell, a first tunnel junction, a second sub-cell, a second tunnel junction, a third sub-cell, and a third tunnel junction; the first sub-cell, the second sub-cell, and the third sub-cell having band gap widths decreasing in order. the first sub-cell being an InGaP sub-cell; the second sub-cell being an AlGaAs sub-cell, and the third sub-cell being a GaAs sub-cell. the second cell unit comprising a fourth sub-cell, the fourth sub-cell being an InGaAsP sub-cell. further comprising a support substrate disposed on a side surface of the second cell unit away from the graded buffer layer via a bonding layer.

2. A multi-junction solar cell as claimed in claim 1, characterized in that: comprising the following steps:

3. A multi-junction solar cell as claimed in claim 1, characterized in that: S1. growing a cell thin film structure on a growth substrate, the cell thin film structure comprising, in order, a sacrificial layer, a light incident layer, a first cell unit, a graded buffer layer, and a second cell unit; 4. A multi-junction solar cell as claimed in claim 3, characterized in that: S2. peeling the cell thin film structure from the growth substrate by selectively etching the sacrificial layer; 5. A multi-junction solar cell as claimed in claim 3 or 4, wherein: S3. transferring the peeled cell thin film structure to a support substrate via a bonding layer.

6. A multi-junction solar cell as claimed in claim 1, wherein: the graded buffer layer being a GaP / InP superlattice, GaP sub-layers and InP sub-layers being alternately grown on the first cell unit, a total thickness of each period being controlled to be equal, and a thickness of the GaP sub-layers being gradually decreased and a thickness of the InP sub-layers being simultaneously increased between different periods.

7. A method of fabricating a multi-junction solar cell as claimed in claim 1, characterized by: ​ ​ ​ ​ 8. The method of claim 7, wherein the method further comprises: depositing a first electrode on the first surface of the substrate; and depositing a second electrode on the second surface of the substrate. ​

Images