Fault detection method and system for infrared chip reading circuit

Abstract

The invention relates to a fault detection method and system for an infrared chip readout circuit, and the method comprises the following steps: applying a bias voltage to the infrared chip readout circuit, and obtaining an infrared image of the infrared chip readout circuit while applying the bias voltage; matching a fault area in the infrared image with a component layout area in a design layout according to the infrared image and the design layout of the infrared chip readout circuit so as to determine the position of a suspected fault component on the design layout; and a physical component corresponding to the position information of the suspected fault component is determined on the infrared chip reading circuit, and fault detection is carried out on the physical component. According to the method, the infrared image and the design layout of the infrared chip readout circuit are combined to quickly and accurately position and detect the fault site of the nanoscale component, so that the nondestructive fault detection of the infrared chip readout circuit can be realized.

Description

Technical Field

[0001] This invention relates to the field of electronic components technology, and in particular to a fault detection method and system for an infrared chip readout circuit. Background Technology

[0002] The infrared chip readout circuit (ROIC) is a CMOS integrated circuit used to receive and process electrical signals obtained through infrared radiation conversion. Due to its high integration density, manufacturing defects (circuit fabrication, bonding damage, insulation layer damage, etc.), and improper device application (electrical breakdown, thermal breakdown, electrostatic breakdown, etc.), the infrared chip readout circuit can malfunction (such as short circuits between the upper and lower plates of the filter capacitor), leading to the failure of the entire circuit.

[0003] Therefore, existing technologies typically employ methods such as electrical performance testing (e.g., IV curves), optical beam-induced resistance change (OBIRCH) detection, lock-in thermography, and physical detection (e.g., FIB-SEM dual-beam system scanning) to detect faults in the infrared chip readout circuit.

[0004] However, due to the high integration of infrared chip readout circuits, dense capacitor arrays, and numerous factors related to capacitor failure, electrical performance testing makes it difficult to accurately locate short circuit points. Hotspot analysis techniques (such as OBIRCH and Lock-in Thermography) suffer from problems such as low signal-to-noise ratio and ambiguous location, while physical detection suffers from problems such as long processing time, low detection efficiency, and inaccurate fault location. Summary of the Invention

[0005] The purpose of this invention is to provide a fault detection method and system for infrared chip readout circuits. By combining the infrared image of the infrared chip readout circuit with the design layout, it can quickly and accurately locate and detect the fault sites of nanoscale components, thereby achieving non-destructive fault detection of infrared chip readout circuits.

[0006] To achieve the above objectives, the present invention provides the following technical solution:

[0007] On the one hand, a fault detection method for an infrared chip readout circuit is provided, which includes the following steps:

[0008] A bias voltage is applied to the infrared chip readout circuit, and an infrared image of the infrared chip readout circuit is acquired while the bias voltage is applied, wherein the infrared image contains a fault area.

[0009] Based on the infrared image and the design layout of the infrared chip readout circuit, the fault area in the infrared image is matched with the component layout area in the design layout to determine the location of the suspected faulty component on the design layout.

[0010] The physical component corresponding to the location information of the suspected faulty component is determined on the infrared chip readout circuit, and the physical component is subjected to fault detection to determine whether the corresponding physical component has failed.

[0011] Preferably, based on the infrared image and the design layout of the infrared chip readout circuit, the fault area in the infrared image is matched with the component layout area in the design layout to determine the location of the suspected faulty component on the design layout, including the following steps:

[0012] Construct a coordinate transformation matrix between the map coordinate system and the infrared image coordinate system;

[0013] According to the coordinate transformation matrix, the coordinates of each pixel point and the centroid image coordinates of the fault area are mapped to the layout coordinate system to obtain the layout fault area in the layout coordinate system and the centroid layout coordinates of the centroid image coordinates in the layout coordinate system.

[0014] On the design layout, the component layout area is determined with the centroid layout coordinates as the center and a preset value as the radius;

[0015] The layout fault area is superimposed and matched with the component layout area, and the suspected faulty component is determined based on the overlap area between the component in the component layout area and the layout fault area, or the distance between the component in the component layout area and the center point of the layout fault area.

[0016] Preferably, constructing the coordinate transformation matrix between the map coordinate system and the infrared image coordinate system specifically includes the following steps:

[0017] In the infrared image, an alignment mark is determined, and the image coordinates of the alignment mark in the pixel coordinate system and the layout coordinates in the layout coordinate system are determined.

[0018] Construct a coordinate transformation matrix based on the image coordinates and layout coordinates of the alignment mark.

[0019] Preferably, after identifying a suspected faulty component, the location information of the suspected faulty component is output.

[0020] Preferably, the location information includes one or more of the following: the layer of the suspected faulty component in the design layout, the layout coordinates, and the component number.

[0021] Preferably, the suspected faulty component is a capacitor.

[0022] Preferably, fault detection is performed on the physical components to determine whether a fault has occurred in the corresponding physical component, including the following steps:

[0023] Measure the capacitor's resistance value, or observe defects in the capacitor's dielectric layer using FIB cross-sections, to determine if the capacitor is short-circuited.

[0024] Preferably, the fault includes one or more of the following: short circuit, leakage current, gate oxide layer defect, electrostatic discharge damage, and latch-up effect.

[0025] Preferably, before acquiring the infrared image of the infrared chip readout circuit, the method further includes determining whether the infrared chip readout circuit has a fault that could cause abnormal temperature in a local area.

[0026] On the other hand, a fault detection system for an infrared chip readout circuit is also provided, comprising:

[0027] An infrared imaging module is used to acquire an infrared image of the infrared chip readout circuit when a fault is determined in the infrared chip readout circuit and a bias voltage is applied to the infrared chip readout circuit.

[0028] The matching module is used to match the fault area in the infrared image with the component layout area in the design layout based on the infrared image and the design layout of the infrared chip readout circuit, so as to determine the location of the suspected faulty component on the design layout.

[0029] In addition, a fault re-detection module is used to perform fault detection on the physical component corresponding to the location information of the suspected faulty component, so as to determine whether the corresponding physical component has failed.

[0030] In summary, the present invention has the following advantages compared with the prior art:

[0031] The present invention is highly efficient and simple to implement, and has high fault location accuracy. By combining the infrared image of the infrared chip readout circuit with the design layout, it can quickly and accurately locate and detect the fault sites of nanoscale components. In particular, it can quickly distinguish and locate capacitor short-circuit faults in the VDDD power network of the infrared chip readout circuit, especially the tiny short-circuit defects of the upper and lower plates of the filter capacitor. There is no need to set up a complex detection system, and non-destructive fault detection of the infrared chip readout circuit can be achieved. Attached Figure Description

[0032] Figure 1 This is a flowchart of the fault detection method for the infrared chip readout circuit in this invention.

[0033] Figure 2The infrared image is the infrared image of the infrared chip readout circuit in this invention;

[0034] Figure 3 This is a schematic diagram showing the correspondence between the location of the suspected faulty component in the infrared chip readout circuit design layout of this invention and the actual component.

[0035] Figure 4 This is a schematic diagram of the fault detection system for the infrared chip readout circuit in this invention. Detailed Implementation

[0036] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0037] Example 1

[0038] like Figure 1 As shown, this embodiment provides a fault detection method for an infrared chip readout circuit, which includes the following steps:

[0039] S1. Determine whether there is a fault in the infrared chip readout circuit that causes abnormal temperature in a local area. If the fault is determined to exist, proceed to step S2.

[0040] In this embodiment, the temperature anomaly refers to a region temperature higher than the normal value. Therefore, the fault specifically includes one or more of the following: short circuit, leakage current, gate oxide defects, electrostatic discharge failure, and latch-up.

[0041] For example, for short-circuit fault detection, a bias voltage can be applied to the infrared chip readout circuit, such as applying a digital circuit power supply voltage VDDD=3.3V, and then a static current test can be used to confirm whether there is a short circuit in the circuit. In addition, other methods in the prior art can be used for detection, as long as it can be determined whether the infrared chip readout circuit has the aforementioned fault.

[0042] S2, such as Figure 2 As shown, a bias voltage is applied to the infrared chip readout circuit, and an infrared image of the infrared chip readout circuit is acquired at the same time as the bias voltage is applied. The infrared image includes a fault region p, and the fault region p includes a capacitor short-circuit region.

[0043] In this embodiment, the infrared image can be acquired based on phase-locked thermal imaging technology or a high-resolution infrared thermal imaging device. For example, phase-locked thermal imaging can be performed based on a modulation frequency of 1Hz, or an infrared image can be acquired based on an infrared thermal imaging device with a resolution of 5 micrometers.

[0044] S3. Based on the infrared image and the design layout of the infrared chip readout circuit, match the fault area p in the infrared image with the component layout area in the design layout to determine the location of the suspected faulty component on the design layout. This specifically includes the following steps:

[0045] S31. Preprocess the infrared image and the design layout;

[0046] For example, the infrared image can be denoised (e.g., denoised using a Gaussian filtering algorithm) and its contrast enhanced to eliminate environmental thermal noise interference and highlight the infrared characteristics of the fault area p.

[0047] Simultaneously, the design layout in GDSII format is rendered to obtain an image of the layout area of ​​components (such as capacitors, especially filter capacitors) with the same resolution and field of view as the infrared image.

[0048] S32. Construct the coordinate transformation matrix between the map coordinate system and the infrared image coordinate system, which specifically includes the following steps:

[0049] S321. In the infrared image, at least two clear and complete alignment marks are determined, and the coordinates of the alignment marks in the pixel coordinate system (represented by (u,v)) are determined and denoted as image coordinates, and the coordinates of the alignment marks in the layout coordinate system (represented by micrometers or nanometers) are determined and denoted as layout coordinates.

[0050] S322. Construct a coordinate transformation matrix (such as an affine transformation matrix) based on the image coordinates and layout coordinates of the alignment mark.

[0051] S33. Based on image connected component analysis or edge detection algorithms, determine the contour of the fault region p in the infrared image and calculate the centroid image coordinates of the fault region p.

[0052] S34. Based on the coordinate transformation matrix, the coordinates of each pixel point in the fault region p and the centroid image coordinates are...

[0053] Mapping to the layout coordinate system to obtain the layout fault area p in the layout coordinate system, and the centroid image coordinates in the layout coordinate system.

[0054] S35. On the design layout, the component layout area is determined with the centroid layout coordinates as the center and a preset value (such as 5μm) as the radius.

[0055] S36. Overlay and match the layout fault area with the component layout area, and determine the suspected faulty component based on the overlap area between the component in the component layout area and the layout fault area, or the distance between the component in the component layout area and the center point of the layout fault area.

[0056] For example, in this embodiment, if the overlap area between a certain component in the component layout area and the fault area of ​​the layout meets the preset requirements (such as being greater than the preset value of the overlap area), or if the distance between a certain component and the center point of the fault area of ​​the layout meets the preset requirements (such as being less than the preset value of the distance), then the component is identified as a suspected faulty component.

[0057] S37. On the design layout, mark the suspected faulty components by highlighting them (e.g., ...). Figure 3 The system identifies "suspected fault points" and outputs the location information of the suspected faulty components. The location information includes one or more of the following: the layer of the suspected faulty component in the design layout, the layout coordinates, and the component number (such as C123). This facilitates the rapid determination of the actual location of the suspected faulty components for the next step of physical testing.

[0058] And, S4, determine the physical component (such as...) on the infrared chip readout circuit that corresponds to the location information of the suspected faulty component. Figure 3 The physical capacitor is used to detect faults in the physical component to determine whether the corresponding physical component has failed.

[0059] For example, in this embodiment, the suspected faulty component is a capacitor. Therefore, it can be determined whether the capacitor is short-circuited by contacting the capacitor plate with a chip probe to measure the capacitor resistance value, or by observing defects in the capacitor dielectric layer (such as whether the capacitor dielectric layer is broken down) through FIB slicing.

[0060] It should be noted that there are existing technical solutions for determining whether a circuit board has a short circuit fault through image analysis. However, it should be noted that the circuit board is usually a PCB board, which is mainly composed of circuits and patterns, dielectric layers, holes, solder resist ink, silkscreen printing, surface treatment, etc., and serves as a substrate to support and connect other electronic components (such as ICs).

[0061] Meanwhile, the circuit board and the electronic components connecting the circuit board are relatively large and can usually be observed directly with the naked eye to help determine whether faults such as short circuits or disconnected connections have occurred.

[0062] The application of this invention is an infrared chip readout circuit, which is a special type of CMOS integrated circuit. It is obtained by integrating a large number of micro-electronic components (from millions to tens of millions) on a very small chip area. Its manufacturing process is completely different from that of the circuit board mentioned above, and mainly includes steps such as oxidation, photolithography, etching, deposition, ion implantation, metal wiring, electrical testing and packaging.

[0063] Therefore, the electronic component arrays of infrared chip readout circuits are dense (especially capacitors) and small in size (such as the size of MIM capacitors, which are in the nanometer range), making it impossible to determine the fault location by direct visual observation.

[0064] As mentioned above, since the circuit board and the infrared chip readout circuit in this invention have many differences in structural design, size, and manufacturing process, the technical solutions for circuit board fault detection in the prior art cannot be applied to the infrared chip readout circuit.

[0065] Short circuits between the upper and lower plates of filter capacitors (such as MIM capacitors) in infrared chip readout circuits are a common type of fault. However, due to the dense capacitor array and the numerous factors associated with capacitor failure, common methods for locating capacitor short circuits (such as locating them using an EMMI microscope) are cumbersome, have low efficiency, and cannot distinguish between capacitor short circuits in the VDDD power network of the infrared chip readout circuit and other types of defects.

[0066] Therefore, this embodiment is a fault detection solution specifically for infrared chip readout circuits. By combining infrared images and design layout, it can quickly and accurately locate and detect fault sites in nanoscale components (such as capacitors, especially MIM capacitors). It can also quickly distinguish and locate capacitor short-circuit faults in the VDDD power network of the infrared chip readout circuit, especially tiny short-circuit defects in the upper and lower plates of the filter capacitor. There is no need to set up a complex detection system. This method is efficient and simple, and solves the problem of locating fault points in high-density component arrays in infrared chip readout circuits. Its fault point location accuracy can reach 1μm. Moreover, this method can be directly integrated into the infrared chip testing process without damaging the chip structure.

[0067] Example 2:

[0068] This embodiment provides a fault detection system for an infrared chip readout circuit, which can implement the fault detection method described in Embodiment 1, such as... Figure 4 As shown, the fault detection system includes:

[0069] The preliminary fault detection module 1 is used to determine whether there is a fault in the infrared chip readout circuit that causes abnormal temperature in a local area. The method is the same as step S1.

[0070] Infrared imaging module 2 is used to acquire an infrared image of the infrared chip readout circuit when a fault is determined in the infrared chip readout circuit and a bias voltage is applied to the infrared chip readout circuit.

[0071] Matching module 3 is used to match the fault area p in the infrared image with the component layout area in the design layout based on the infrared image and the design layout of the infrared chip readout circuit, so as to determine the location of the suspected faulty component on the design layout. The method is the same as step S3.

[0072] In addition, the fault re-detection module 4 is used to perform fault detection on the physical component corresponding to the location information of the suspected faulty component, so as to determine whether the corresponding physical component has failed. The method is the same as step S4.

[0073] In summary, this application enables non-destructive fault detection of infrared chip readout circuits. By combining the infrared image of the infrared chip readout circuit with the design layout, it can quickly and accurately locate and detect fault sites in nanoscale components. In particular, it can quickly distinguish and locate capacitor short-circuit faults in the VDDD power network of the infrared chip readout circuit, especially tiny short-circuit defects in the upper and lower plates of the filter capacitor. There is no need to set up a complex detection system. This solution is efficient, simple to implement, and has high fault location accuracy (up to 1μm).

[0074] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A method for detecting a failure of an infrared chip readout circuit, characterized by, The method comprises the following steps: A bias voltage is applied to the infrared chip readout circuit, and an infrared image of the infrared chip readout circuit is obtained while the bias voltage is applied, and the infrared image contains a fault area; According to the infrared image and the design layout of the infrared chip readout circuit, the fault area in the infrared image is matched with the component layout area in the design layout to determine the position of the suspected faulty component on the design layout; The physical component corresponding to the position information of the suspected faulty component is determined on the infrared chip readout circuit, and fault detection is performed on the physical component to determine whether the corresponding physical component has failed.

2. The fault detection method of claim 1, wherein, According to the infrared image and the design layout of the infrared chip readout circuit, the fault area in the infrared image is matched with the component layout area in the design layout to determine the position of the suspected faulty component on the design layout, comprising the following steps: A coordinate transformation matrix between the layout coordinate system and the infrared image coordinate system is constructed; According to the coordinate transformation matrix, the coordinates of each pixel point of the fault area and the centroid image coordinates are mapped into the layout coordinate system to correspondingly obtain the layout fault area of the fault area in the layout coordinate system and the centroid layout coordinates of the centroid image coordinates in the layout coordinate system; On the design layout, a component layout area is determined with the centroid layout coordinates as the center and a preset value as the radius; The layout fault area and the component layout area are superimposed and matched, and the suspected faulty component is determined according to the overlapping area of the components in the component layout area and the layout fault area, or the distance between the components in the component layout area and the center point of the layout fault area.

3. The fault detection method of claim 2, wherein, A coordinate transformation matrix between the layout coordinate system and the infrared image coordinate system is constructed, which specifically comprises the following steps: In the infrared image, a positioning mark is determined, and the image coordinates of the positioning mark in the pixel coordinate system and the layout coordinates of the positioning mark in the layout coordinate system are determined; The coordinate transformation matrix is constructed according to the image coordinates and layout coordinates of the positioning mark. After determining the suspected faulty component, the position information of the suspected faulty component is output.

4. The fault detection method of claim 2, wherein, The position information includes one or more of the level, layout coordinates and component number of the suspected faulty component in the design layout.

5. The fault detection method of claim 4, wherein, The suspected faulty component is a capacitor.

6. The fault detection method of claim 1, wherein, The fault detection on the physical component to determine whether the corresponding physical component has failed comprises the following steps:

7. The fault detection method of claim 6, wherein, The resistance value of the capacitor is measured, or the defects of the capacitor dielectric layer are observed through FIB slicing to determine whether the capacitor is short-circuited. The fault includes one or more of short circuit, leakage, gate oxide layer defect, electrostatic discharge damage and latch-up effect.

8. The fault detection method of claim 1, wherein, Before obtaining the infrared image of the infrared chip readout circuit, it further comprises determining whether the infrared chip readout circuit has a fault causing abnormal temperature in a local area.

9. The fault detection method of claim 1, wherein, It comprises:

10. A fault detection system for an infrared chip readout circuit, characterized by an infrared imaging module for obtaining an infrared image of the infrared chip readout circuit when it is determined that the infrared chip readout circuit has a fault and a bias voltage is applied to the infrared chip readout circuit; ​ a matching module, configured to match a failure area in the infrared image with a component layout area in a design layout of an infrared chip readout circuit according to the infrared image and the design layout, so as to determine a position of a suspected failure component on the design layout; and a failure re-detection module, configured to perform failure detection on a physical component corresponding to the position information of the suspected failure component, so as to determine whether the corresponding physical component is faulty.

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