Display interface switching control system and control method

Abstract

The invention discloses a switching control system and a switching control method for a display interface. The system comprises a switching control module, a display interface circuit and display equipment, the switching control module comprises a signal detection circuit, a signal switching circuit and a signal conversion circuit, the signal detection circuit is connected with the display interface circuit, the signal switching circuit and the signal conversion circuit, the signal switching circuit is further connected with the signal conversion circuit and the display interface circuit, and the signal conversion circuit is further connected with the display interface circuit; the display interface circuit is connected with a display device. According to the embodiment of the invention, the signal detection circuit, the signal switching circuit and the signal conversion circuit are utilized to detect, switch and convert the display signal output by the display equipment so as to obtain the interface opening signal, and the interface opening signal is transmitted to the corresponding display interface circuit, so that the display equipment is opened; and the selection flexibility of the display equipment is met, so that the applicability and the operation efficiency are improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of interface switching control, in particular to a display interface switching control system and method. BACKGROUND

[0002] OPS (Open Pluggable Specification, open pluggable specification) computer is a small, portable, pre-installed operating system computer, and OPS computer is widely used in education / conference interactive display; in the display, a computer motherboard is embedded to connect and control the display screen. Generally, large-screen displays support two display interfaces, one is LVDS display screen, and the other is EDP display screen. All-in-one display screen will select to use EDP display screen or LVDS display screen to build an all-in-one machine according to resolution, refresh rate and cost and other factors.

[0003] At present, the embedded computer motherboard only supports EDP or only supports LVDS display interface, and cannot flexibly select the display interface according to the display requirements in use. Therefore, in the prior art, the switching control scheme of the display interface cannot meet the flexibility of selection, thereby causing the problems of low applicability and low operation efficiency. SUMMARY

[0004] The embodiments of the present application provide a display interface switching control system and method, which aims to solve the problem of low applicability and low operation efficiency caused by the OPS computer embedded computer motherboard only supporting EDP or only supporting LVDS display interface in the prior art, which cannot meet the flexibility of selection in use.

[0005] In order to solve the above problems, in the first aspect, the embodiments of the present application provide a display interface switching control system, which comprises a switching control module, a display interface circuit and a display device; the switching control module comprises a signal detection circuit, a signal switching circuit and a signal conversion circuit, the signal detection circuit is connected with the display interface circuit, the signal switching circuit and the signal conversion circuit, the signal switching circuit is further connected with the signal conversion circuit and the display interface circuit, and the signal conversion circuit is further connected with the display interface circuit; the display interface circuit is connected with the display device. When the display device accesses the display interface circuit and the display device outputs a display signal to the display interface circuit, the display interface circuit generates a corresponding interface signal by using the received display signal and transmits the interface signal to the signal detection circuit; the signal detection circuit detects the received interface signal to obtain a detection signal, and processes the detection signal according to the signal switching circuit and the signal conversion circuit to obtain an interface opening signal; and the interface opening signal is transmitted to the display interface circuit to realize opening processing on the display device.

[0006] In a second aspect, the embodiment of the present application further provides a control method of a switching control system of a display interface, which is applied to the switching control system of the display interface as described in the first aspect, and the switching control system of the display interface comprises a switching control module, a display interface circuit and a display device; the switching control module comprises a signal detection circuit, a signal switching circuit and a signal conversion circuit, the signal detection circuit is connected with the display interface circuit, the signal switching circuit and the signal conversion circuit, the signal switching circuit is further connected with the signal conversion circuit and the display interface circuit, and the signal conversion circuit is further connected with the display interface circuit; the display interface circuit is connected with the display device; and the method comprises the following steps: When the display device accesses the display interface circuit and the display device outputs a display signal to the display interface circuit, the display interface circuit generates a corresponding interface signal by using the received display signal and transmits the interface signal to the signal detection circuit; The signal detection circuit detects the received interface signal to obtain a detection signal, and processes the detection signal according to the signal switching circuit and the signal conversion circuit to obtain an interface opening signal; The interface opening signal is transmitted to the display interface circuit to realize opening processing on the display device.

[0007] The embodiment of the present application provides a switching control system and a control method of a display interface, wherein the system comprises a switching control module, a display interface circuit and a display device; the switching control module comprises a signal detection circuit, a signal switching circuit and a signal conversion circuit, the signal detection circuit is connected with the display interface circuit, the signal switching circuit and the signal conversion circuit, the signal switching circuit is further connected with the signal conversion circuit and the display interface circuit, and the signal conversion circuit is further connected with the display interface circuit; and the display interface circuit is connected with the display device. By implementing the embodiment of the present application, the display signal output by the display device is detected, switched and converted by the signal detection circuit, the signal switching circuit and the signal conversion circuit, so that the interface opening signal is transmitted to the corresponding display interface circuit, the display device is opened, the flexibility of the display device selection is met, and the applicability and the operation efficiency are improved. BRIEF DESCRIPTION OF DRAWINGS

[0008] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed in the embodiment description will be briefly introduced. Obviously, the drawings in the following description are some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0009] Figure 1 The schematic structural diagram of the switching control system of the display interface provided by the embodiment of the present application is shown in the figure. Figure 2 The circuit schematic structural diagram of the signal detection circuit in the switching control system of the display interface provided by the embodiment of the present application is shown in the figure. Figure 3 The circuit schematic structural diagram of the signal switching circuit in the switching control system of the display interface provided by the embodiment of the present application is shown in the figure. Figure 4 The circuit schematic structural diagram of the signal conversion circuit in the switching control system of the display interface provided by the embodiment of the present application is shown in the figure. Figure 5 The circuit schematic structural diagram of the first display interface circuit in the switching control system of the display interface provided by the embodiment of the present application is shown in the figure. Figure 6 The circuit schematic structural diagram of the second display interface circuit in the switching control system of the display interface provided by the embodiment of the present application is shown in the figure. Figure 7 The flowchart of the control method of the switching control system of the display interface provided by the embodiment of the present application is shown in the figure. DETAILED DESCRIPTION

[0010] With reference to the accompanying drawings, the technical solutions in the embodiments of the present application will be clearly and completely described below, obviously, the described embodiments are some of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work belong to the protection scope of the present application.

[0011] The direction terms mentioned in the present application, such as "up", "down", "front", "back", "left", "right", "inner", "outer", "side" and the like, are only the directions of the attached drawings. Therefore, the direction terms used are used to illustrate and understand the present application, and are not used to limit the present application. In addition, in the drawings, structures similar or identical to each other are denoted by the same reference numerals.

[0012] It should be understood that when used in the specification and the appended claims, the terms "comprise" and "include" indicate the presence of described features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0013] It should also be understood that the terms used in the present application specification are only for the purpose of describing specific embodiments and are not intended to limit the present application. As used in the present application specification and the appended claims, "a", "an", and "the" in singular form are intended to include plural forms unless the context clearly indicates otherwise.

[0014] It should be further understood that the term "and / or" used in the present application specification and the appended claims means any combination of one or more of the associated listed items and all possible combinations, and includes these combinations.

[0015] Please refer to Figures 1 to 6 , Figure 1 a schematic structural diagram of a display interface switching control system provided by an embodiment of the present application; Figure 2 a circuit schematic structural diagram of a signal detection circuit in the display interface switching control system provided by an embodiment of the present application; Figure 3 a circuit schematic structural diagram of a signal switching circuit in the display interface switching control system provided by an embodiment of the present application; Figure 4 a circuit schematic structural diagram of a signal conversion circuit in the display interface switching control system provided by an embodiment of the present application; Figure 5 a circuit schematic structural diagram of a first display interface circuit in the display interface switching control system provided by an embodiment of the present application; Figure 6 a circuit schematic structural diagram of a second display interface circuit in the display interface switching control system provided by an embodiment of the present application;

[0016] As Figures 1 to 6 shown in the figure, the embodiment of the present application provides a switching control system 1 of display interface, which comprises a switching control module 10, a display interface circuit 20 and a display device 30; the switching control module 10 comprises a signal detection circuit 11, a signal switching circuit 12 and a signal conversion circuit 13, the signal detection circuit 11 is connected with the display interface circuit 20, the signal switching circuit 12 and the signal conversion circuit 13, the signal switching circuit 12 is also connected with the signal conversion circuit 13 and the display interface circuit 20, the signal conversion circuit 13 is also connected with the display interface circuit 20; the display interface circuit 20 is connected with the display device 30; When the display device 30 is connected to the display interface circuit 20, and the display device 30 outputs display signals to the display interface circuit 20, the display interface circuit 20 generates corresponding interface signals by using the received display signals, and transmits the interface signals to the signal detection circuit 11; the signal detection circuit 11 detects the received interface signals to obtain detection signals, and processes the detection signals according to the signal switching circuit 12 and the signal conversion circuit 13 to obtain interface opening signals; the interface opening signals are transmitted to the display interface circuit 20 to realize opening processing of the display device 30.

[0017] In this embodiment, as Figures 1 to 6 shown in the figure, the switching control system 1 of display interface is specifically applied to the control mainboard of OPS computer, and the control mainboard is connected with the signal detection circuit 11, the signal switching circuit 12, the signal conversion circuit 13 and the display interface circuit 20. The display device 30 can comprise an EDP display screen 31 and an LVDS display screen 32, and the display interface circuit 20 comprises a first display interface circuit 21 and a second display interface circuit 22; the EDP display screen 31 is connected with the OPS computer through the first display interface circuit 21, and outputs the display signals to the first display interface circuit 21; the LVDS display screen 32 is connected with the OPS computer through the second display interface circuit 22, and outputs the display signals to the second display interface circuit 22.

[0018] When the display device 30 accesses the display interface circuit 20 and the display device 30 outputs a display signal to the display interface circuit 20, the display interface circuit 20 generates a corresponding interface signal by using the received display signal and transmits the interface signal to the signal detection circuit 11; the signal detection circuit 11 detects the received interface signal to obtain a detection signal, and processes the detection signal according to the signal switching circuit 12 and the signal conversion circuit 13 to obtain an interface opening signal; the interface opening signal is transmitted to the display interface circuit 20 to realize opening processing of the display device 30. Wherein, the interface signal includes a first interface signal and a second interface signal; the interface opening signal includes a first interface opening signal, a second interface opening signal and a third interface opening signal; in Figures 2-6 , the display signal is represented by EDP_LVDS_PWR, the first interface signal is represented by EDP_HPD, the second interface signal is represented by LVDS_SENSE, the detection signal is represented by SW_IN_SEL2, the first interface opening signal is represented by TO EDP, and the second interface opening signal is represented by TO LVDS.

[0019] Specifically, when the EDP display screen 31 accesses the first display interface circuit 21 and the EDP display screen 31 outputs the display signal to the first display interface circuit 21, the first display interface circuit 21 generates the first interface signal by using the received display signal and transmits the first interface signal to the signal detection circuit 11; the signal detection circuit 11 detects the received first interface signal to obtain a detection signal, and the signal switching circuit 12 processes the detection signal to obtain a first interface opening signal; the first interface opening signal is transmitted to the first display interface circuit 21 to realize opening processing of the EDP display screen 31.

[0020] When the LVDS display screen 32 is connected to the second display interface circuit 22, and the LVDS display screen 32 outputs the display signal to the first display interface circuit 21, the second display interface circuit 22 generates a second interface signal using the received display signal and transmits the second interface signal to the signal detection circuit 11; the signal detection circuit 11 detects the received second interface signal to obtain a detection signal, and the signal switching circuit 12 switches the detection signal to obtain a second interface enable signal, which is then sent to the signal conversion circuit 13; the signal conversion circuit 13 converts the second interface enable signal into a third interface enable signal, and outputs the third interface enable signal to the LVDS display screen 32 through the second display interface circuit 22, thereby enabling the LVDS display screen 32 to be turned on.

[0021] Among them, Figures 2 to 6 In the process, the display interface switching control system 1 also includes a power supply device, which is represented by +VCC3 and VCC33.

[0022] As can be seen from the above embodiments, the signal detection circuit 11, the signal switching circuit 12, and the signal conversion circuit 13 detect, switch, and convert the display signal output by the display device 30 to obtain an interface opening signal, which is then sent to the corresponding display interface circuit 20 to enable the display device 30. This satisfies the flexibility of selecting the display device 30, thereby improving applicability and operational efficiency.

[0023] In one embodiment, such as Figures 1 to 6As shown, the display interface circuit 20 comprises a first display interface circuit 21 connected with the display device 30, the signal detection circuit 11 and the signal conversion circuit 13 respectively; the first display interface circuit 21 comprises a first interface connector EDP port, a first resistor DR111, a first capacitor DC87 and a second capacitor DC88, a first end of the first resistor DR111 is connected with the display device 30, a second end of the first resistor DR111 is connected with a first end of the first capacitor DC87 and a first end of the second capacitor DC88, the second end of the first resistor DR111 is also connected with a 19th pin, a 20th pin, a 21st pin, a 22nd pin, a 23rd pin and a 24th pin of the first interface connector EDP port; a second end of the first capacitor DC87 and a second end of the second capacitor DC88 are grounded; a 28th pin of the first interface connector EDP port is connected with the signal detection circuit 11; a 2nd pin, a 3rd pin, a 5th pin, a 6th pin, an 8th pin, a 9th pin, an 11th pin, a 12th pin, a 14th pin and a 15th pin of the first interface connector EDP port are connected with the signal switching circuit 12; The display interface circuit 20 further comprises a second display interface circuit 22 connected with the display device 30, the signal detection circuit 11 and the signal conversion circuit 13 respectively; the second display interface circuit 22 comprises a second interface connector LVDS port and a second resistor R114, a 1st pin, a 2nd pin and a 3rd pin of the second interface connector LVDS port are connected with the display device 30; a 4th pin and a 6th pin of the second interface connector LVDS port are connected with a first end of the second resistor R114; a second end of the second resistor R114 is connected with the signal detection circuit 11; a 5th pin, a 13th pin, a 14th pin, a 25th pin and a 26th pin of the second interface connector LVDS port are grounded.

[0024] In the embodiment, as shown in Figure 5 As shown, the 19th pin, the 20th pin, the 21st pin, the 22nd pin, the 23rd pin and the 24th pin of the first interface connector EDP port are grounded through the first capacitor DC87 and the second capacitor DC88, and are connected with the EDP display screen 31 through the first resistor DR111. Among them, a 1st pin, a 4th pin, a 7th pin, a 10th pin, a 13th pin, a 16th pin, a 26th pin, a 27th pin, a 29th pin, a 30th pin, a G1 pin, a G2 pin, a G3 pin and a G4 pin of the first interface connector EDP port are grounded.

[0025] When the EDP display screen 31 is connected to the first interface connector EDP port through the first resistor DR111, and the EDP display screen 31 outputs the display signal to the first interface connector EDP port, the 19th-24th pins of the first interface connector EDP port are electrified, and the first interface connector EDP port generates and processes the received display signal to output a high-level first interface signal from the 28th pin of the first interface connector EDP port. At the same time, after receiving the high-level first interface signal, the control mainboard performs handshake and data communication with the EDP display screen 31 through the DP_D_AUXN / P signal, and then outputs display data according to the related parameters of the EDP display screen 31, such as the resolution and refresh rate of the EDP screen.

[0026] As shown in Figure 6 The second display interface circuit 22 can be connected to the signal conversion circuit 13 through the pins of the second interface connector LVDS port, and the specific pin connection can be defined and set.

[0027] When the LVDS display screen 32 is connected to the second interface connector LVDS port through the pins, and the LVDS display screen 32 outputs the display signal to the second interface connector LVDS port, the 2nd pin or the 4th pin of the second interface connector LVDS port will be connected to the GND of the LVDS display screen 32. Therefore, as long as the LVDS display screen 32 is connected, this signal will be low level, that is, the second interface connector LVDS port generates and processes the received display signal to output a low-level second interface signal from the 4th pin and the 6th pin of the second interface connector LVDS port and the second resistor R114.

[0028] Through the above embodiment, it can be known that the first display interface circuit 21 and the second display interface circuit 22 quickly realize outputting the corresponding interface signal according to the display device 30, so as to perform subsequent targeted processing. Therefore, the flexibility of selecting the display device 30 can be met, thereby improving the applicability and operation efficiency.

[0029] In an embodiment, as Figures 1 to 6As shown, the signal detection circuit 11 comprises a third resistor SR3, a fourth resistor SR9, a first diode D156, a fifth resistor SR5 and a first connector LVDS_EDP_SW; the first end of the third resistor SR3 is connected with a power supply device, the second end of the third resistor SR3 is connected with the first pin of the first diode D156; the second pin of the first diode D156 is connected with the first end of the fourth resistor SR9, the third pin of the first diode D156 is connected with the first end of the fifth resistor SR5 and the third pin of the first connector LVDS_EDP_SW; the second end of the fourth resistor SR9 is connected with the 28th pin of the first interface connector EDP port; the second end of the fifth resistor SR5 is connected with the fourth pin and the sixth pin of the second interface connector LVDS port; the second pin of the first connector LVDS_EDP_SW is connected with the signal switching circuit 12; the third pin of the first connector LVDS_EDP_SW is grounded.

[0030] In the embodiment, as shown in Figure 2 As shown, the first connector LVDS_EDP_SW is a 3-pin connector, and the jumper cap is by default on the second pin and the third pin. According to the first interface signal connected with the fourth resistor SR9 and the second interface signal connected with the fifth resistor SR5, it is determined that the connected display device 30 is an EDP display screen 31 or an LVDS display screen 32, and then the second pin of the first connector LVDS_EDP_SW automatically outputs a detection signal SW_IN_SEL2 to control the interface on signal output by the signal switching circuit 12. When the EDP display screen 31 is connected, the detection signal is a high-level signal; when the LVDS display screen 32 is connected, the detection signal is a low-level signal, which also controls the 36th pin RESET_N signal of the conversion chip CSU1 to determine whether the conversion chip needs to work. If the EDP display screen 31 is connected to the first display interface circuit 21 and the LVDS display screen 32 is connected to the second display interface circuit 22, that is, the EDP display screen 31 and the LVDS display screen 32 are connected to the corresponding interface circuit at the same time, the second display interface circuit 22 connected with the LVDS display screen 32 preferentially outputs the second interface signal.

[0031] When the EDP display screen 31 is connected to the first interface connector EDP port through the first resistor DR111, and the EDP display screen 31 outputs the display signal to the first interface connector EDP port, the 19th-24th pins of the first interface connector EDP port are electrified, the first interface connector EDP port generates and processes the received display signal to output a high-level first interface signal EDP_HPD from the 28th pin of the first interface connector EDP port, and the first interface signal is connected to the signal detection circuit 11 through the fourth resistor SR9 and the first diode D156; and since the LVDS display screen 32 is not connected, the 4th pin or the 6th pin of the second display interface circuit 22 is in a suspended state, and the fifth resistor SR5 connected thereto is also in a suspended state; the high-level first interface signal is connected through the 2nd-3rd pins of the first connector LVDS_EDP_SW, a high-level detection signal is output from the 2nd pin of the first connector LVDS_EDP_SW, and the high-level detection signal is output to the signal switching circuit 12. At the same time, the high-level detection signal output from the 2nd pin of the first connector LVDS_EDP_SW is also connected to the thirteenth resistor SR8 of the signal conversion circuit 13, and the high-level thirteenth resistor SR8 turns on the second MOS tube Q96, the D / Spin of the second MOS tube Q96 pulls down the LVDS_RESETN signal of the signal conversion chip CSU1, the 36th pin of the conversion chip CSU1 is always low, and the conversion chip cannot work normally, so that the LVDS display function is closed.

[0032] When the LVDS display screen 32 is connected to the second interface connector LVDS port through the pin, and the LVDS display screen 32 outputs the display signal to the second interface connector LVDS port, the 4th pin and the 6th pin of the second interface connector LVDS port are connected to the GND of the LVDS display screen 32, so as long as the LVDS display screen 32 is connected, the signal will be low, that is, the second interface connector LVDS port generates and processes the received display signal to output a low-level second interface signal from the 4th pin and the 6th pin of the second interface connector LVDS port and the second resistor R114; the low-level second interface signal passes through the fifth resistor SR5 and is connected through the 2nd-3rd pins of the first connector LVDS_EDP_SW, a low-level detection signal is output from the 2nd pin of the first connector LVDS_EDP_SW, and the low-level detection signal is output to the signal switching circuit 12.

[0033] Through the above embodiment, it can be known that the signal detection circuit 11 detects the received interface signal to obtain a corresponding detection signal, which is input into the input signal switching circuit 12, so as to perform subsequent targeted processing. Therefore, the flexibility of the display device 30 selection can be met, thereby improving the applicability and operation efficiency.

[0034] In an embodiment, as shown in Figures 1 to 6 the signal switching circuit 12 includes a switching chip SU5, a sixth resistor SR6 and a seventh resistor SR7; a first end of the sixth resistor SR6 is connected with the power supply device, and a second end of the sixth resistor SR6 is connected with a 16th pin of the switching chip SU5; a first end of the seventh resistor SR7 is connected with a 2nd pin of the first connector LVDS_EDP_SW, and a second end of the seventh resistor SR7 is connected with a 17th pin of the switching chip SU5; a 22nd pin of the switching chip SU5 is connected with a 15th pin of the first interface connector EDP port; a 23rd pin of the switching chip SU5 is connected with a 14th pin of the first interface connector EDP port; a 24th pin of the switching chip SU5 is connected with a 12th pin of the first interface connector EDP port; a 25th pin of the switching chip SU5 is connected with an 11th pin of the first interface connector EDP port; a 27th pin of the switching chip SU5 is connected with a 2nd pin of the first interface connector EDP port; a 28th pin of the switching chip SU5 is connected with a 3rd pin of the first interface connector EDP port; a 29th pin of the switching chip SU5 is connected with a 5th pin of the first interface connector EDP port; a 30th pin of the switching chip SU5 is connected with a 6th pin of the first interface connector EDP port; a 39th pin of the switching chip SU5 is connected with an 8th pin of the first interface connector EDP port; and a 40th pin of the switching chip SU5 is connected with a 9th pin of the first interface connector EDP port.

[0035] In the embodiment, as shown in Figure 3As shown, the 2nd pin to the 14th pin of the switching chip SU5 are connected with the control mainboard; the 31st pin to the 38th pin and the 41st pin, the 42nd pin of the switching chip SU5 are connected with the signal conversion circuit 13 to send the second interface opening signal; the 22nd pin to the 30th pin and the 39th pin, the 40th pin of the switching chip SU5 are connected with the first display interface circuit 21; the 43rd pin of the switching chip SU5 is grounded to send the first interface opening signal. The signal switching circuit 12 further comprises a third capacitor SC3, a fourth capacitor SC4 and a fifth capacitor SC13; the 3rd pin of the switching chip SU5 is connected with the control mainboard through the third capacitor SC3; the 4th pin of the switching chip SU5 is connected with the control mainboard through the fourth capacitor SC4; the 9th pin of the switching chip SU5 is grounded through the fifth capacitor SC13.

[0036] When the EDP display screen 31 is connected with the first interface connector EDP port through the first resistor DR111 and the EDP display screen 31 outputs the display signal to the first interface connector EDP port, the 19th pin to the 24th pin of the first interface connector EDP port is electrified, the first interface connector EDP port generates and processes the received display signal to output the high-level first interface signal from the 28th pin of the first interface connector EDP port, and the first interface signal is connected to the signal detection circuit 11 through the fourth resistor SR9 and the first diode D156; and since the LVDS display screen 32 is not connected, the 4th pin or the 6th pin of the second display interface circuit 22 is in a suspended state, and the fifth resistor SR5 connected therewith is also in a suspended state; the high-level first interface signal is connected through the 2nd pin to the 3rd pin of the first connector LVDS_EDP_SW, the high-level detection signal is output from the 2nd pin of the first connector LVDS_EDP_SW, and the high-level detection signal is output to the 17th pin of the switching chip SU5 in the signal switching circuit 12, the 17th pin of the switching chip SU5 receives the high-level detection signal, the switching chip SU5 switches the signal to group B to output the first interface opening signal to the first display interface circuit 21, and the EDP display screen 31 is opened.

[0037] When the LVDS display screen 32 is connected to the second interface connector LVDS port through the pins, and the LVDS display screen 32 outputs the display signal to the second interface connector LVDS port, the 4th pin and the 6th pin of the second interface connector LVDS port are connected to the GND of the LVDS display screen 32. Therefore, as long as the LVDS display screen 32 is connected, the signal will be low level. The second interface connector LVDS port generates and processes the received display signal to output a low-level second interface signal through the 4th pin and the 6th pin of the second interface connector LVDS port and the second resistor R114. The low-level second interface signal passes through the fifth resistor SR5 and is connected through the 2nd to 3rd pins of the first connector LVDS_EDP_SW, and is output from the 2nd pin of the first connector LVDS_EDP_SW. The low-level detection signal is output to the 17th pin of the switching chip SU5 in the signal switching circuit 12. The 17th pin of the switching chip SU5 receives the low-level detection signal, and the switching chip SU5 switches the signal to the A group to output the second interface opening signal to the signal conversion circuit 13.

[0038] Through the above embodiment, it can be known that the signal switching circuit 12 switches and processes the detection signal to obtain the corresponding interface opening signal, so as to open the EDP display screen 31 or transport to the signal conversion circuit 13 for subsequent targeted processing. Therefore, the flexibility of the display device 30 selection can be met, thereby improving the applicability and operation efficiency.

[0039] In an embodiment, as Figures 1 to 6The signal conversion circuit 13 is connected with the second display interface circuit 22 and the signal switching circuit 12, and includes a conversion chip CSU1, a sixth capacitor SC5, a seventh capacitor SC6, an eighth capacitor SC7, a ninth capacitor SC8, a tenth capacitor SC9, an eleventh capacitor SC10, a twelfth capacitor SC11, a thirteenth capacitor SC12, an eighth resistor CR9, a ninth resistor CR10, a tenth resistor R116, a first MOS tube Q18, an eleventh resistor R117, a twelfth resistor R127, a thirteenth resistor SR8, a second MOS tube Q96, and a fourteenth resistor R340. The 13th pin of the conversion chip CSU1 is connected with the 38th pin of the switching chip SU5 through the sixth capacitor SC5. The 14th pin of the conversion chip CSU1 is connected with the 37th pin of the switching chip SU5 through the seventh capacitor SC6. The 15th pin of the conversion chip CSU1 is connected with the 36th pin of the switching chip SU5 through the eighth capacitor SC7. The 16th pin of the conversion chip CSU1 is connected with the 35th pin of the switching chip SU5 through the ninth capacitor SC8. The 17th pin of the conversion chip CSU1 is connected with the 34th pin of the switching chip SU5 through the tenth capacitor SC9. The 18th pin of the conversion chip CSU1 is connected with the 33rd pin of the switching chip SU5 through the eleventh capacitor SC10. The 19th pin of the conversion chip CSU1 is connected with the 32nd pin of the switching chip SU5 through the twelfth capacitor SC11. The 20th pin of the conversion chip CSU1 is connected with the 31st pin of the switching chip SU5 through the thirteenth capacitor SC12. The 21st pin of the conversion chip CSU1 is connected with the 42nd pin of the switching chip SU5 through the eighth resistor CR9. The 22nd pin of the conversion chip CSU1 is connected with the 41st pin of the switching chip SU5 through the ninth resistor CR10. The first end of the tenth resistor R116 and the first end of the twelfth resistor R127 are connected with the power supply device. The 2nd pin of the first MOS tube Q18 is connected with the control mainboard through the eleventh resistor R117. The 3rd pin of the first MOS tube Q18 is connected with the 3rd pin of the second MOS tube Q96, the second end of the tenth resistor R116, the first end of the fourteenth resistor R340, and the 36th pin of the conversion chip CSU1. The 5th pin and the 6th pin of the first MOS tube Q18 are both connected with the second end of the tenth resistor R116. The 1st pin of the second MOS tube Q96 is connected with the 17th pin of the switching chip SU5 through the thirteenth resistor SR8. The 1st pin and the 4th pin of the first MOS tube Q18, the 2nd pin of the second MOS tube Q96, and the second end of the fourteenth resistor R340 are all grounded.

[0040] In the embodiment, when the LVDS display screen 32 is connected to the second interface connector LVDS port through the pins and the LVDS display screen 32 outputs the display signal to the second interface connector LVDS port, the fourth pin and the sixth pin of the second interface connector LVDS port are connected to the GND of the LVDS display screen 32, so that the signal is low level as long as the LVDS display screen 32 is connected, that is, the second interface connector LVDS port generates and processes the display signal received to output a low-level second interface signal from the fourth pin and the sixth pin of the second interface connector LVDS port and the second resistor R114; the low-level second interface signal passes through the fifth resistor SR5 and is connected through the second pin to the third pin of the first connector LVDS_EDP_SW, and outputs a low-level detection signal from the second pin of the first connector LVDS_EDP_SW, and outputs the low-level detection signal to the seventeenth pin of the switching chip SU5 in the signal switching circuit 12, and the seventeenth pin of the switching chip SU5 receives the low-level detection signal, and the switching chip SU5 switches the signal to the A group to output the second interface opening signal to the signal conversion circuit 13; at the same time, when the control signal PCIRST1_N output by the control mainboard changes from low level to high level through the eleventh resistor R117, the G1 pole of the first MOS tube Q18 is high level, the D1S1 is turned on, the G2 pole is in low level state, the D2S2 is not turned on, and the thirty-sixth pin of the conversion chip CSU1 is pulled up to high level; at the same time, the low-level detection signal output from the second pin of the first connector LVDS_EDP_SW passes through the thirteenth resistor SR8 to the G pole of the second MOS tube Q96, the G pole of the second MOS tube Q96 is low level, and the D and S poles are not turned on. The thirty-sixth pin of the conversion chip CSU1 is high level and cannot be pulled down, the conversion chip CSU1 works normally, so that the third interface opening signal is converted, and the third interface opening signal is output to the LVDS display screen 32 through the second display interface circuit 22 to realize the opening processing of the LVDS display screen 32.

[0041] Through the above embodiment, it can be known that the third interface opening signal is obtained by the signal conversion circuit 13 for converting the second interface opening signal to realize the opening processing of the LVDS display screen 32. Therefore, the flexibility of the display device 30 selection can be met, so that the applicability and operation efficiency are improved.

[0042] In summary, when the EDP display screen 31 is connected to the first interface connector EDP port through the first resistor DR111, and the EDP display screen 31 outputs the display signal to the first interface connector EDP port, the 19th-24th pins of the first interface connector EDP port are electrified, the first interface connector EDP port generates and processes the received display signal to output a high-level first interface signal EDP_HPD from the 28th pin of the first interface connector EDP port, and the first interface signal is connected to the signal detection circuit 11 through the fourth resistor SR9 and the first diode D156; moreover, since the LVDS display screen 32 is not connected, the 4th pin or the 6th pin of the second display interface circuit 22 is in a suspended state, and the fifth resistor SR5 connected thereto is also in a suspended state; the high-level first interface signal is connected through the 2nd-3rd pins of the first connector LVDS_EDP_SW, a high-level detection signal is output from the 2nd pin of the first connector LVDS_EDP_SW, and the high-level detection signal is output to the 17th pin of the switching chip SU5 in the signal switching circuit 12, the 17th pin of the switching chip SU5 receives the high-level detection signal, the switching chip SU5 switches the signal to group B to output the second interface opening signal to the first display interface circuit 21, and the opening processing of the LVDS display screen 32 is realized.When the LVDS display screen 32 is connected to the second interface connector LVDS port through the pins, and the LVDS display screen 32 outputs the display signal to the second interface connector LVDS port, the fourth pin and the sixth pin of the second interface connector LVDS port are connected to the GND of the LVDS display screen 32, so that the signal is low level as long as the LVDS display screen 32 is connected, and the second interface connector LVDS port generates and processes the received display signal to output a low-level second interface signal through the fourth pin and the sixth pin of the second interface connector LVDS port and the second resistor R114; the low-level second interface signal passes through the fifth resistor SR5 and is connected through the second pin to the third pin of the first connector LVDS_EDP_SW, and outputs a low-level detection signal from the second pin of the first connector LVDS_EDP_SW, and outputs the low-level detection signal to the seventeenth pin of the switching chip SU5 in the signal switching circuit 12, and the seventeenth pin of the switching chip SU5 receives the low-level detection signal, and the switching chip SU5 switches the signal to the A group to output the second interface opening signal to the signal conversion circuit 13; at the same time, when the control signal PCIRST1_N output by the control mainboard changes from low level to high level through the eleventh resistor R117, the G1 pole of the first MOS tube Q18 is high level, the D1S1 is turned on, the G2 pole is in low level state, the D2S2 is not turned on, and the thirty-sixth pin of the conversion chip CSU1 is pulled up to high level; at the same time, the low-level detection signal output from the second pin of the first connector LVDS_EDP_SW passes through the thirteenth resistor SR8 to the G pole of the second MOS tube Q96, the G pole of the second MOS tube Q96 is low level, and the D and S poles are not turned on. The thirty-sixth pin of the conversion chip CSU1 is high level and cannot be pulled down, the conversion chip CSU1 works normally, and the third interface opening signal is converted and output to the LVDS display screen 32 through the second display interface circuit 22, so as to realize the opening processing of the LVDS display screen 32. Therefore, the signal detection circuit 11, the signal switching circuit 12 and the signal conversion circuit 13 realize the detection, switching and conversion processing of the display signal output by the display device 30 to obtain the interface opening signal and output to the corresponding display interface circuit 20, so as to realize the opening processing of the display device 30, meet the flexibility of the selection of the display device 30, and improve the applicability and operation efficiency.

[0043] As Figures 1 to 7 shown, the embodiment of the application also provides a control method of the switching control system of the display interface, Figure 7is a flowchart of a control method of a display interface switching control system provided by the embodiment of the present application. The control method of the display interface switching control system is applied to the display interface switching control system 1.

[0044] As shown in Figures 1 to 7 The embodiment of the present application further provides a display interface switching control system 1, which comprises a switching control module 10, a display interface circuit 20 and a display device 30; the switching control module 10 comprises a signal detection circuit 11, a signal switching circuit 12 and a signal conversion circuit 13, the signal detection circuit 11 is connected with the display interface circuit 20, the signal switching circuit 12 and the signal conversion circuit 13, the signal switching circuit 12 is further connected with the signal conversion circuit 13 and the display interface circuit 20, and the signal conversion circuit 13 is further connected with the display interface circuit 20; and the display interface circuit 20 is connected with the display device 30.

[0045] As shown in Figure 7 The control method of the display interface switching control system comprises the following steps S110-S130.

[0046] S110, when the display device accesses the display interface circuit and the display device outputs a display signal to the display interface circuit, the display interface circuit generates a corresponding interface signal by using the received display signal, and transmits the interface signal to the signal detection circuit.

[0047] S120, the signal detection circuit detects the received interface signal to obtain a detection signal, and processes the detection signal according to the signal switching circuit and the signal conversion circuit to obtain an interface opening signal.

[0048] S130, the interface opening signal is transmitted to the display interface circuit, so as to realize opening processing on the display device.

[0049] In the embodiment, as shown in Figures 1 to 7As shown, the switching control system 1 of the display interface is specifically applied to the control mainboard of the OPS computer, and the control mainboard is connected with the signal detection circuit 11, the signal switching circuit 12, the signal conversion circuit 13 and the display interface circuit 20. The display device 30 can include an EDP display screen 31 and an LVDS display screen 32, and the display interface circuit 20 includes a first display interface circuit 21 and a second display interface circuit 22; the EDP display screen 31 is connected with the OPS computer through the first display interface circuit 21 and outputs the display signal to the first display interface circuit 21; and the LVDS display screen 32 is connected with the OPS computer through the second display interface circuit 22 and outputs the display signal to the second display interface circuit 22.

[0050] When the display device 30 accesses the display interface circuit 20 and the display device 30 outputs the display signal to the display interface circuit 20, the display interface circuit 20 generates the corresponding interface signal by using the received display signal and transmits the interface signal to the signal detection circuit 11; the signal detection circuit 11 detects the received interface signal to obtain a detection signal, and processes the detection signal according to the signal switching circuit 12 and the signal conversion circuit 13 to obtain an interface opening signal; and the interface opening signal is transmitted to the display interface circuit 20 to realize the opening processing of the display device 30. The interface signal includes a first interface signal and a second interface signal; and the interface opening signal includes a first interface opening signal, a second interface opening signal and a third interface opening signal.

[0051] Specifically, when the EDP display screen 31 accesses the first display interface circuit 21 and the EDP display screen 31 outputs the display signal to the first display interface circuit 21, the first display interface circuit 21 generates the first interface signal by using the received display signal and transmits the first interface signal to the signal detection circuit 11; the signal detection circuit 11 detects the received first interface signal to obtain a detection signal, and processes the detection signal by using the signal switching circuit 12 to obtain a first interface opening signal; and the first interface opening signal is transmitted to the first display interface circuit 21 to realize the opening processing of the EDP display screen 31.

[0052] When the LVDS display screen 32 is connected to the second display interface circuit 22, and the LVDS display screen 32 outputs the display signal to the first display interface circuit 21, the second display interface circuit 22 generates the second interface signal by using the received display signal, and transmits the second interface signal to the signal detection circuit 11; the signal detection circuit 11 detects the received second interface signal to obtain a detection signal, and the signal switching circuit 12 switches the detection signal to obtain a second interface opening signal, and transmits the second interface opening signal to the signal conversion circuit 13; the signal conversion circuit 13 converts the second interface opening signal into a third interface opening signal, and outputs the third interface opening signal to the LVDS display screen 32 through the second display interface circuit 22, so as to realize the opening processing of the LVDS display screen 32.

[0053] It should be noted that the specific implementation process of the above method and each module can be clearly understood by those skilled in the art, and the corresponding description in the foregoing system embodiments can be referred to. For the convenience and brevity of description, it will not be repeated here.

[0054] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited to this. Any person skilled in the art can easily think of various equivalent modifications or replacements within the technical range disclosed by the present application, and these modifications or replacements should be covered within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A switching control system of a display interface, characterized by, The application relates to a display interface circuit and a display device, and belongs to the technical field of display interface circuits. When the display device is connected to the display interface circuit and the display device outputs display signals to the display interface circuit, the display interface circuit generates corresponding interface signals by using the received display signals, and transmits the interface signals to the signal detection circuit; the signal detection circuit detects the received interface signals to obtain detection signals, and processes the detection signals by using the signal switching circuit and the signal conversion circuit to obtain an interface opening signal; and the interface opening signal is transmitted to the display interface circuit to realize opening processing of the display device.

2. The system of claim 1, wherein, The display interface circuit comprises a first display interface circuit which is connected with the display device, the signal detection circuit and the signal conversion circuit; the first display interface circuit comprises a first interface connector, a first resistor, a first inductor and a second inductor, the first end of the first resistor is connected with the display device, the second end of the first resistor is connected with the first end of the first capacitor and the first end of the second capacitor, the second end of the first resistor is also connected with the 19th pin, the 20th pin, the 21st pin, the 22nd pin, the 23rd pin and the 24th pin of the first interface connector; the second end of the first capacitor and the second end of the second capacitor are grounded; the 28th pin of the first interface connector is connected with the signal detection circuit; the 2nd pin, the 3rd pin, the 5th pin, the 6th pin, the 8th pin, the 9th pin, the 11th pin, the 12th pin, the 14th pin and the 15th pin of the first interface connector are connected with the signal switching circuit. The display interface circuit further comprises a second display interface circuit which is connected with the display device, the signal detection circuit and the signal conversion circuit; the second display interface circuit comprises a second interface connector and a second resistor, the 1st pin, the 2nd pin and the 3rd pin of the second interface connector are connected with the display device; the 4th pin and the 6th pin of the second interface connector are connected with the first end of the second resistor; the second end of the second resistor is connected with the signal detection circuit; the 5th pin, the 13th pin, the 14th pin, the 25th pin and the 26th pin of the second interface connector are grounded.

3. The system of claim 2, wherein, The signal detection circuit includes a third resistor, a fourth resistor, a first diode, a fifth resistor and a first connector; the first end of the third resistor is connected with a power supply device, the second end of the third resistor is connected with the first pin of the first diode; the second pin of the first diode is connected with the first end of the fourth resistor, the third pin of the first diode is connected with the first end of the fifth resistor and the third pin of the first connector; the second end of the fourth resistor is connected with the 28th pin of the first interface connector; the second end of the fifth resistor is connected with the fourth pin and the sixth pin of the second interface connector; the second pin of the first connector is connected with the signal switching circuit; the third pin of the first connector is grounded.

4. The system of claim 3, wherein, The signal switching circuit includes a switching chip, a sixth resistor and a seventh resistor; the first end of the sixth resistor is connected with the power supply device, the second end of the sixth resistor is connected with the 16th pin of the switching chip; the first end of the seventh resistor is connected with the second pin of the first connector, the second end of the seventh resistor is connected with the 17th pin of the switching chip; the 22nd pin of the switching chip is connected with the 15th pin of the first interface connector; the 23rd pin of the switching chip is connected with the 14th pin of the first interface connector; the 24th pin of the switching chip is connected with the 12th pin of the first interface connector; the 25th pin of the switching chip is connected with the 11th pin of the first interface connector; the 27th pin of the switching chip is connected with the 2nd pin of the first interface connector; the 28th pin of the switching chip is connected with the 3rd pin of the first interface connector; the 29th pin of the switching chip is connected with the 5th pin of the first interface connector; the 30th pin of the switching chip is connected with the 6th pin of the first interface connector; the 39th pin of the switching chip is connected with the 8th pin of the first interface connector; the 40th pin of the switching chip is connected with the 9th pin of the first interface connector.

5. The system of claim 4, wherein, The signal conversion circuit is connected with the second display interface circuit and the signal switching circuit; the signal conversion circuit comprises a conversion chip, a sixth capacitor, a seventh capacitor, an eighth capacitor, a ninth capacitor, a tenth capacitor, an eleventh capacitor, a twelfth capacitor, a thirteenth capacitor, an eighth resistor, a ninth resistor, a tenth resistor, a first MOS tube, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a second MOS tube and a fourteenth resistor; a 13th pin of the conversion chip is connected with a 38th pin of the switching chip through the sixth capacitor; a 14th pin of the conversion chip is connected with a 37th pin of the switching chip through the seventh capacitor; a 15th pin of the conversion chip is connected with a 36th pin of the switching chip through the eighth capacitor; a 16th pin of the conversion chip is connected with a 35th pin of the switching chip through the ninth capacitor; a 17th pin of the conversion chip is connected with a 34th pin of the switching chip through the tenth capacitor; a 18th pin of the conversion chip is connected with a 33rd pin of the switching chip through the eleventh capacitor; a 19th pin of the conversion chip is connected with a 32nd pin of the switching chip through the twelfth capacitor; a 20th pin of the conversion chip is connected with a 31st pin of the switching chip through the thirteenth capacitor; a 21st pin of the conversion chip is connected with a 42nd pin of the switching chip through the eighth resistor; a 22nd pin of the conversion chip is connected with a 41st pin of the switching chip through the ninth resistor; a first end of the tenth resistor and a first end of the twelfth resistor are connected with the power supply device; a 2nd pin of the first MOS tube is connected with the control mainboard through the eleventh resistor, a 3rd pin of the first MOS tube is connected with a 3rd pin of the second MOS tube, a second end of the tenth resistor, a first end of the fourteenth resistor and a 36th pin of the conversion chip; a 5th pin and a 6th pin of the first MOS tube are both connected with the second end of the tenth resistor; a 1st pin of the second MOS tube is connected with a 17th pin of the switching chip through the thirteenth resistor; a 1st pin and a 4th pin of the first MOS tube, a 2nd pin of the second MOS tube and a second end of the fourteenth resistor are all grounded.

6. A control method of a switching control system of a display interface, characterized by, The application discloses a switching control system applied to a display interface, and belongs to the technical field of display interface switching control. When the display device accesses the display interface circuit and the display device outputs a display signal to the display interface circuit, the display interface circuit generates a corresponding interface signal by using the received display signal and transmits the interface signal to the signal detection circuit; The signal detection circuit detects the received interface signal to obtain a detection signal, and processes the detection signal according to the signal switching circuit and the signal conversion circuit to obtain an interface opening signal; The interface opening signal is transmitted to the display interface circuit to realize opening processing of the display device.

7. The method of claim 6, wherein, The display interface circuit includes a first display interface circuit, which is connected with the display device, the signal detection circuit and the signal conversion circuit respectively; the first display interface circuit includes a first interface connector, a first resistor, a first inductor and a second inductor, a first end of the first resistor is connected with the display device, a second end of the first resistor is connected with a first end of the first capacitor and a first end of the second capacitor, and the second end of the first resistor is also connected with a 19th pin, a 20th pin, a 21st pin, a 22nd pin, a 23rd pin and a 24th pin of the first interface connector; a second end of the first capacitor and a second end of the second capacitor are grounded; a 28th pin of the first interface connector is connected with the signal detection circuit; a 2nd pin, a 3rd pin, a 5th pin, a 6th pin, an 8th pin, a 9th pin, an 11th pin, a 12th pin, a 14th pin and a 15th pin of the first interface connector are connected with the signal switching circuit; The display interface circuit also includes a second display interface circuit, which is connected with the display device, the signal detection circuit and the signal conversion circuit respectively; the second display interface circuit includes a second interface connector and a second resistor, a 1st pin, a 2nd pin and a 3rd pin of the second interface connector are connected with the display device; a 4th pin and a 6th pin of the second interface connector are connected with a first end of the second resistor; a second end of the second resistor is connected with the signal detection circuit; a 5th pin, a 13th pin, a 14th pin, a 25th pin and a 26th pin of the second interface connector are grounded.

8. The method of claim 7, wherein, The signal detection circuit includes a third resistor, a fourth resistor, a first diode, a fifth resistor and a first connector; the first end of the third resistor is connected with a power supply device, the second end of the third resistor is connected with the first pin of the first diode; the second pin of the first diode is connected with the first end of the fourth resistor, the third pin of the first diode is connected with the first end of the fifth resistor and the third pin of the first connector; the second end of the fourth resistor is connected with the 28th pin of the first interface connector; the second end of the fifth resistor is connected with the fourth pin and the sixth pin of the second interface connector; the second pin of the first connector is connected with the signal switching circuit; the third pin of the first connector is grounded.

9. The method of claim 8, wherein, The signal switching circuit includes a switching chip, a sixth resistor and a seventh resistor; the first end of the sixth resistor is connected with the power supply device, the second end of the sixth resistor is connected with the 16th pin of the switching chip; the first end of the seventh resistor is connected with the second pin of the first connector, the second end of the seventh resistor is connected with the 17th pin of the switching chip; the 22nd pin of the switching chip is connected with the 15th pin of the first interface connector; the 23rd pin of the switching chip is connected with the 14th pin of the first interface connector; the 24th pin of the switching chip is connected with the 12th pin of the first interface connector; the 25th pin of the switching chip is connected with the 11th pin of the first interface connector; the 27th pin of the switching chip is connected with the 2nd pin of the first interface connector; the 28th pin of the switching chip is connected with the 3rd pin of the first interface connector; the 29th pin of the switching chip is connected with the 5th pin of the first interface connector; the 30th pin of the switching chip is connected with the 6th pin of the first interface connector; the 39th pin of the switching chip is connected with the 8th pin of the first interface connector; the 40th pin of the switching chip is connected with the 9th pin of the first interface connector.

10. The method of claim 9, wherein, The signal conversion circuit is connected with the second display interface circuit and the signal switching circuit; the signal conversion circuit comprises a conversion chip, a sixth capacitor, a seventh capacitor, an eighth capacitor, a ninth capacitor, a tenth capacitor, an eleventh capacitor, a twelfth capacitor, a thirteenth capacitor, an eighth resistor, a ninth resistor, a tenth resistor, a first MOS tube, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a second MOS tube and a fourteenth resistor; a 13th pin of the conversion chip is connected with a 38th pin of the switching chip through the sixth capacitor; a 14th pin of the conversion chip is connected with a 37th pin of the switching chip through the seventh capacitor; a 15th pin of the conversion chip is connected with a 36th pin of the switching chip through the eighth capacitor; a 16th pin of the conversion chip is connected with a 35th pin of the switching chip through the ninth capacitor; a 17th pin of the conversion chip is connected with a 34th pin of the switching chip through the tenth capacitor; a 18th pin of the conversion chip is connected with a 33rd pin of the switching chip through the eleventh capacitor; a 19th pin of the conversion chip is connected with a 32nd pin of the switching chip through the twelfth capacitor; a 20th pin of the conversion chip is connected with a 31st pin of the switching chip through the thirteenth capacitor; a 21st pin of the conversion chip is connected with a 42nd pin of the switching chip through the eighth resistor; a 22nd pin of the conversion chip is connected with a 41st pin of the switching chip through the ninth resistor; a first end of the tenth resistor and a first end of the twelfth resistor are connected with the power supply device; a 2nd pin of the first MOS tube is connected with the control mainboard through the eleventh resistor, a 3rd pin of the first MOS tube is connected with a 3rd pin of the second MOS tube, a second end of the tenth resistor, a first end of the fourteenth resistor and a 36th pin of the conversion chip; a 5th pin and a 6th pin of the first MOS tube are connected with the second end of the tenth resistor; a 1st pin of the second MOS tube is connected with a 17th pin of the switching chip through the thirteenth resistor; a 1st pin and a 4th pin of the first MOS tube, a 2nd pin of the second MOS tube and a second end of the fourteenth resistor are grounded.

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