Display system

Abstract

The invention provides a display system, relates to the technical field of display, and is used for improving the stability of the display system. The display system comprises a first display controller, a second display controller and a display screen, the display screen comprises a first chip, a second chip and a display module, the first chip is connected with the display module and the first display controller, and the second chip is connected with the display module and the second display controller. And the first display controller is used for processing the received image data and transmitting the processed image data to the first chip. And the second display controller is used for processing the received image data and transmitting the processed image data to the second chip. Wherein under the condition that the working state of the first chip is an abnormal state and the working state of the second chip is a normal state, the second chip transmits the processed image data to the display module, so that the display module displays the processed image data.

Description

Technical Field

[0001] This application relates to the field of display technology, and more particularly to a display system. Background Technology

[0002] With the development of the Light Emitting Diode (LED) industry, LED displays are widely used in various industries and scenarios. At the same time, some situations place high demands on the reliability of LED systems. For example, in important occasions such as live broadcasts and conferences / exhibitions, if the LED system malfunctions and cannot be repaired on-site in a timely manner, the LED display will fail to function properly, thus affecting the effectiveness of the broadcast or conference.

[0003] Therefore, improving the stability of display systems has become a pressing technical problem that needs to be solved. Summary of the Invention

[0004] This application provides a display system for improving the stability of the display system.

[0005] To achieve the above objectives, this application adopts the following technical solution:

[0006] In a first aspect, this application provides a display system. The display system includes: a first display controller, a second display controller, and a display screen. The display screen includes: a first chip, a second chip, and a display module. The first chip is connected to both the display module and the first display controller, and the second chip is connected to both the display module and the second display controller. The first display controller processes received image data and transmits the processed image data to the first chip. The second display controller processes received image data and transmits the processed image data to the second chip. Wherein, when the first chip is in an abnormal operating state and the second chip is in a normal operating state, the second chip transmits the processed image data to the display module, so that the display module displays the processed image data.

[0007] Based on the above technical solution, by configuring multiple display controllers and multiple interface chips in the display system, with the display controllers transmitting image data to the interface chips and the interface chips transmitting image data to the display module, a backup scheme between the receiving card and the display screen can be added. Furthermore, when the first chip is in an abnormal operating state and the second chip is in a normal operating state, the second chip transmits processed image data to the display module, enabling the display module to display the processed image data. Thus, when one link between the receiving card and the display screen fails, other links can be used to transmit image data, thereby improving the stability of the display system.

[0008] In one possible design, when the first chip is in an abnormal operating state and the second chip is in a normal operating state, the output state of the first chip is a high-impedance state, and the output state of the second chip is a data output state.

[0009] In one possible design, a first display controller is a primary display controller, and a second display controller is a backup display controller. The first display controller is also configured to send first information to a first chip, indicating that the chip is a primary chip. The second display controller is also configured to send second information to a second chip, indicating that the chip is a backup chip.

[0010] In one possible design, the first chip is used to acquire the operating states of the first chip and the second chip. The first chip is also used to adjust the output states of the first chip and the second chip based on their respective operating states.

[0011] In one possible design, the master / standby control interface of the first chip and the master / standby control interface of the second chip are in pull-up and pull-down states, respectively; wherein the pull-up and pull-down states are used to indicate the master chip and the standby chip, respectively, and the master chip is used to transmit data to the standby chip.

[0012] In one possible design, the first chip is the main chip, and the second chip is the backup chip. The first chip includes a first input / output (I / O) interface, and the second chip includes a second I / O interface. The first I / O interface is in an output state, used to send the operating status of the first chip to the second chip. The second I / O interface is in an input state, used to receive the operating status from the first chip.

[0013] In one possible design, a first chip is used to acquire the operating state of the first chip and adjust its output state accordingly. A second chip is used to acquire the operating states of both the first and second chips and adjust its output state accordingly.

[0014] In one possible design, the first chip and the second chip are the same target chip, which includes a main input interface and a backup input interface. The first chip operates in the main input interface state, and the second chip operates in the backup input interface state. Specifically, when the main input interface is in an abnormal state and the backup port is in a normal state, the target chip transmits the processed image data received through the backup input interface to the display module, enabling the display module to display the processed image data.

[0015] In one possible design, the first display controller is connected to the target chip via a main input interface, and the second display controller is connected to the target chip via a backup input interface.

[0016] In one possible design, the target chip is used to acquire the operating status of the main input interface and the operating status of the backup input interface, and adjust the data receiving status of the main input interface and the data receiving status of the backup input interface according to the operating status of the main input interface and the operating status of the backup input interface. Attached Figure Description

[0017] Figure 1 A system architecture diagram of a display system provided in this application embodiment;

[0018] Figure 2 A system architecture diagram of another display system provided in this application embodiment;

[0019] Figure 3 A system architecture diagram of another display system provided in this application embodiment;

[0020] Figure 4 A system architecture diagram of another display system provided in this application embodiment;

[0021] Figure 5 A system architecture diagram of another display system provided in this application embodiment;

[0022] Figure 6 This is a system architecture diagram of another display system provided in an embodiment of this application. Detailed Implementation

[0023] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0024] The terms “first” and “second” in the specification and claims of this application are used to distinguish different objects, rather than to describe a specific order of objects.

[0025] Furthermore, the terms "comprising" and "having," and any variations thereof, used in the description of this application are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or modules is not limited to the steps or modules listed, but may optionally include other steps or modules not listed, or may optionally include other steps or modules inherent to such process, method, product, or device.

[0026] Furthermore, in the embodiments of this application, the words "exemplary" or "for example" are used to indicate that they are examples, illustrations, or descriptions. Any embodiment or design that is described as "exemplary" or "for example" in this application should not be construed as being more preferred or advantageous than other embodiments or design options. Specifically, the use of the words "exemplary" or "for example" is intended to present concepts in a concrete manner.

[0027] In recent years, with the vigorous development of the LED industry, its application in various fields has become more and more widespread. At the same time, some key occasions have put forward high requirements for the reliability of LED systems. Therefore, the application of multi-host, multi-controller backup solutions has become more and more widespread.

[0028] For example, multiple video processing modules and multiple sending cards can be used for link backup. Figure 1 As shown, the display system includes: a transmitting card 101, a transmitting card 102, a receiving card 103, and a display screen 104. Transmitting card 101 is connected to both video processing module 105 and receiving card 103; transmitting card 102 is connected to both video processing module 106 and receiving card 103; and receiving card 103 is connected to the interface chip of the display screen 104. The video processing module 105, transmitting card 101, and receiving card 103 constitute the main link for video source transmission. The video processing module 106, transmitting card 102, and receiving card 103 constitute a backup link for video source transmission.

[0029] Alternatively, a video processing module and a transmitting card can be used to back up the link via cable backup. For example... Figure 2 As shown, the display system may include a transmitting card 201, a receiving card 202, and a display screen 203. The transmitting card 201 is connected to both the video processing module 204 and the receiving card 202, and the receiving card 202 is connected to the interface chip of the display screen 203. The video processing module 204 and the transmitting card 201 have a main link and a backup link, and the transmitting card 201 and the receiving card 202 also have a main link and a backup link.

[0030] However, none of the above solutions include backups for the connectors and wiring between the receiver card and the display screen. Therefore, if any abnormality occurs in the connectors or wiring between the receiver card and the display screen, it may cause malfunctions in the display system.

[0031] In response to the technical problems pointed out in the background section of this application, embodiments of this application provide a display system. For example... Figure 3As shown, the display system includes: a first display controller 301, a second display controller 302, and a display screen 303. The display screen 303 includes: a first chip 304, a second chip 305, and a display module 306.

[0032] It should be noted that the type of display screen is not limited in this application. For example, LED displays (such as subpixel LED displays, real-pixel LED displays), OLED displays, etc. As another example, the display screen can be a Liquid Crystal Display (LCD) display. Taking an LED display screen as an example, it can be a regular LED display screen, or it can be MicroLED, MiniLED, or future new types of LEDs. Furthermore, in some embodiments, the packaging method of the display screen can also be one of the following: for example, surface-mount device (SMD), chip-on-board (COB), chip-on-glass (COG), or future new packaging methods. Moreover, the type of display module is not limited in this application. For example, the display module can be an LED light board, an LCD panel, etc.

[0033] In some embodiments, the first video processing module can acquire video source data. Then, the first video processing module can process the video source data to obtain first video data. Next, the video processing module can send the first video data to a first transmitting card, which processes the first video data to obtain multiple image data within the first video data. Then, the first transmitting card can send the image data to the first display controller 301.

[0034] It should be noted that the first video processing module can perform data optimization on video source data (such as improving image quality and enhancing sound effects), resolution adjustment, image restoration, and image cropping and adjustment.

[0035] In this embodiment of the application, the first display controller 301 is used to process the received image data.

[0036] It should be noted that the embodiments of this application do not limit the display controller. For example, the display controller can be a receiver card. As another example, the display controller can be a receiver card chip, i.e., a TCON chip.

[0037] For example, the first display controller 301 can perform grayscale processing, brightness and color correction, etc., on the first video data. For a detailed description of the data processing performed by the first display controller 301, please refer to the methods used by a receiving card to process data in conventional technology; these will not be elaborated upon here. Alternatively, the first display controller 301 can convert the data into a data format that the driver chip can recognize, so that the driver chip can drive the display screen.

[0038] In one possible implementation, the first display controller 301 can verify the received image data to determine whether the received image data is complete and accurate.

[0039] It should be noted that the detailed description of the display controller's data verification process can be found in the following embodiments, and will not be repeated here. Furthermore, the display controller can also perform data decoding, data error handling and feedback, data synchronization and control, etc., which are not limited in this application embodiment.

[0040] In this embodiment, the first chip 304 is connected to the display module 306 and the first display controller 301, respectively.

[0041] For example, in combination Figure 3 It can be seen that the first display controller 301 is connected to the first chip 304 through a set of lines, which includes two Low-Voltage Differential Signaling (LVDS) transmission lines and one LVDS reception line. Similarly, the second display controller 305 is connected to the second chip 305 through a set of lines.

[0042] In this embodiment, the first display controller 301 is also used to transmit processed image data to the first chip 304.

[0043] In one possible design, the processed image data transmitted by the first display controller 301 to the first chip 304 is in the form of Low Voltage Differential Signaling (LVDS).

[0044] It should be noted that in conventional technical solutions, the receiver card can be connected to a driver integrated circuit (IC) (such as a driver module). The driver module can receive data in Transistor-Transistor Logic (TTL) or Complementary Metal-Oxide-Semiconductor Level (CMOS) format, but it cannot receive or recognize data in LVDS format.

[0045] In some embodiments, the first chip 304 is connected to the driver module. The first chip 304 is used to convert the data format of image data, and can convert image data in a first format to image data in a second format. The driver module is used to drive the display module 306 to display the image data in the second format. The driver module is capable of receiving the image data in the second format.

[0046] For example, the first chip 304 can convert LVDS format image data into TTL or CMOS level format image data.

[0047] Similarly, the second display controller 302 is used to process the received image data and transmit the processed image data to the second chip 305. The second chip 305 is connected to both the display module 306 and the second display controller 302.

[0048] It should be noted that for a detailed description of the second display controller 302 and the second chip 305, please refer to the above description of the first display controller 301 and the first chip 304, which will not be repeated here. Furthermore, in this embodiment, both the first chip and the second chip can be referred to as interface chips.

[0049] In this embodiment of the application, when the first chip 304 is in an abnormal state and the second chip 305 is in a normal state, the second chip 305 transmits the processed image data to the display module 306 so that the display module 306 displays the processed image data.

[0050] Optionally, the processed image data transmitted by the second chip 305 to the display module 306 is data in a second format.

[0051] Based on the above technical solution, by configuring multiple display controllers and multiple interface chips in the display system, with the display controllers transmitting image data to the interface chips and the interface chips transmitting image data to the display module, a backup scheme between the receiving card and the display screen can be added. Furthermore, when the first chip is in an abnormal operating state and the second chip is in a normal operating state, the second chip transmits processed image data to the display module, enabling the display module to display the processed image data. Thus, when one link between the receiving card and the display screen fails, other links can be used to transmit image data, thereby improving the stability of the display system.

[0052] In this embodiment, when the first chip is in an abnormal operating state and the second chip is in a normal operating state, the first chip's output state is a high-impedance state, and the second chip's output state is a data output state. The data output state indicates that the chip is outputting image data, and the high-impedance state indicates that the chip is not outputting image data.

[0053] For example, when the first chip is in a data output state, it can output a high or low level. When the second chip is in a high-impedance state, its output or input resistance is high, and it can be considered to be in an open-circuit state.

[0054] Understandably, if the first chip is in an abnormal operating state while the second chip is in a normal operating state, the first chip will output in a high-impedance state, and the second chip will output in a data output state. This ensures that if the first chip malfunctions, the second chip will continue operating, thus guaranteeing the stability of the display system.

[0055] The display system of this application will be described below with reference to specific embodiments.

[0056] In some embodiments, the primary / backup status of the first chip and the second chip can be set by the display controller.

[0057] like Figure 4 As shown, the display system includes: a first display controller 401, a second display controller 402, and a display screen 403. The display screen 403 includes: a first chip 404, a second chip 405, and a display module 406.

[0058] In this design, the first display controller 401 is the main display controller, and the second display controller 402 is the backup display controller. The first chip 404 is the main chip, and the second chip 405 is the backup chip.

[0059] In one possible implementation, the first display controller 401 is further configured to send first information to the first chip 404, the first information indicating that the chip 404 is the main chip. The second display controller 402 is further configured to send second information to the second chip 405, the second information indicating that the chip 405 is the backup chip.

[0060] For example, the primary display controller and the backup display controller can be pre-configured. The display controller can configure the interface chip via a configuration protocol to set the primary and backup chips.

[0061] It should be noted that when the main display controller and the backup display controller send data to the corresponding interface chip, apart from the main / backup flags (i.e., the first information and the second information), all other configurations (such as function switches, core voltage of the interface chip, etc.) and image data are the same and synchronized.

[0062] It is understandable that by configuring the chips differently with the main display controller and the backup display controller, the display system can distinguish the primary and backup relationships of the two chips, thereby maintaining the stability of the display system.

[0063] In this embodiment, the first chip 404 and the second chip 405 are connected to the display module via an AND connection.

[0064] The following is about Figure 4 The display methods corresponding to the displayed system will be introduced.

[0065] In this embodiment, the first chip 404 is used to acquire the operating state of the first chip 404 and the operating state of the second chip 405. The first chip 404 is also used to adjust the output state of the first chip 404 and the output state of the second chip 405 based on their respective operating states. The second chip 405 is used to send its operating state to the first chip 404.

[0066] For example, the working status may include: error information, packet loss information, lock information, etc.

[0067] In one possible implementation, if the first chip 404 is in a data output state and the second chip 405 is in a normal state, then the first chip 404 will adjust its output state to a high impedance state and the second chip 405 will adjust its output state to a data output state.

[0068] In one possible implementation, if the first chip 404 is in a data output state and its operating state is normal, then the first chip 404 will not adjust its output state or the output state of the second chip 405. The second chip 405 can operate in either a normal or abnormal state.

[0069] In one possible implementation, if the output state of the second chip 405 is a data output state, and the working states of the first chip 404 and the second chip 405 are both in a normal state, then the first chip 404 will not adjust the output state of the first chip 404 and the output state of the second chip 405.

[0070] For example, after power-on, if both chip 404 and chip 405 are functioning normally, and then chip 404 malfunctions while chip 405 functions normally, then chip 405 will output data. Later, when chip 404 returns to normal, chip 405 will also function normally, and thus chip 405 will continue to output data. In other words, the chip that is in a normal state and whose output state is data output has the highest priority.

[0071] It should be noted that if the working state of the first chip 404 and the working state of the second chip 405 are both abnormal, then the output state of the first chip 404 and the output state of the second chip 405 will both be in a high-impedance state.

[0072] In some embodiments, the primary and backup identities of the first and second chips can be pre-configured by the developers.

[0073] like Figure 5 As shown, the display system includes: a first display controller 501, a second display controller 502, and a display screen 503. The display screen 503 includes: a first chip 504, a second chip 505, and a display module 506.

[0074] In this configuration, the master / standby control interface of the first chip 504 and the master / standby control interface of the second chip 505 are in pull-up and pull-down states, respectively; the pull-up and pull-down states are used to indicate the master chip and the standby chip, respectively. The master / standby control interface is used to control the master / standby status of the chips.

[0075] In one possible design, a pull-up state indicates that the chip is the master chip, and a pull-down state indicates that the chip is the backup chip. Alternatively, a pull-up state indicates that the chip is the backup chip, and a pull-down state indicates that the chip is the master chip. The master chip is used to transfer data to the backup chip.

[0076] For example, when the primary / standby control interface of the first chip 504 is in a pull-up state, the first chip 504 is the primary chip; when the primary / standby control interface of the second chip 505 is in a pull-down state, the second chip 505 is the standby chip. Alternatively, when the primary / standby control interface of the first chip 504 is in a pull-up state, the first chip 504 is the standby chip; when the primary / standby control interface of the second chip 505 is in a pull-down state, the second chip 505 is the primary chip.

[0077] Understandably, the pull-up and pull-down states of the chip interface allow for the configuration of the primary and backup chips. This facilitates the setting of data transmission between the primary and backup chips, which in turn makes it easier for the control chip to send image data to the display module, thereby ensuring the stability of the display system.

[0078] It should be noted that in this embodiment, the first display controller 502 and the second display controller 502 are not distinguished as primary or backup. The following description uses the first chip 504 as the primary chip and the second chip 505 as the backup chip as an example to illustrate this embodiment.

[0079] In this embodiment, the first chip 504 is the main chip, and the second chip 505 is the backup chip. The first chip 504 includes a first input / output (I / O) interface 507, and the second chip 505 includes a second I / O interface 508. The first I / O interface 507 is in an output state and is used to send the operating status of the first chip 504 to the second chip 505. The second I / O interface 508 is in an input state and is used to receive the operating status from the first chip 504.

[0080] The first chip 504 is used to acquire the operating state of the first chip 504 and adjust the output state of the first chip 504 according to the operating state of the first chip 504. The second chip 505 is used to acquire the operating states of the first chip 504 and the second chip 505 and adjust the output state of the second chip 505 according to the operating states of the first chip 504 and the second chip 505.

[0081] For example, the first chip 504 can send its operating status to the second chip 505 through the first I / O interface 507, and the second chip 505 can receive the operating status of the first chip 504 through the second I / O interface 508.

[0082] In one possible implementation, if the first chip 504 is in a data output state, and the first chip 504 is in an abnormal operating state while the second chip 505 is in a normal operating state, then the second chip 505 will adjust its output state to a data output state. Simultaneously, the first chip 504 will adjust its output state to a high-impedance state.

[0083] Alternatively, if the first chip 504 is in a data output state and its operating state is normal, then the first chip 504 will not adjust its output state.

[0084] Alternatively, if the output state of the second chip 505 is the data output state and the working state of the first chip 504 is the high impedance state, and if the working states of the first chip 504 and the second chip 505 are both normal, then the first chip 504 will adjust its working state to the data output state, and the second chip 505 will adjust its working state to the high impedance state.

[0085] In some embodiments, the primary and backup identities of the first and second chips can be pre-configured by the developers.

[0086] like Figure 6 As shown, the display system includes: a first display controller 601, a second display controller 602, and a display screen 603. The display screen 603 includes: a target chip 604 and a display module 605. The target chip 604 includes: a main input interface 606 and a backup input interface 607.

[0087] In this embodiment, the first chip and the second chip are the same target chip 604, which includes a main input interface 606 and a backup input interface 607. The first chip operates in the main input interface 606 state, and the second chip operates in the backup input interface 607 state. The first display controller 601 can be connected to the target chip 604 via the main input interface 606, and the second display controller 602 can be connected to the target chip 604 via the backup input interface 607.

[0088] It should be noted that the settings of the main input interface 606 and the backup input interface 607 can be pre-configured by the developers. The first display controller 601 can be connected to the main input interface 606 via a first line, and the second display controller 602 can be connected to the backup input interface 607 via a second line.

[0089] Understandably, adding interfaces increases the wiring between the display controller and the system, thereby improving the stability of the display system.

[0090] In this embodiment, the target chip 604 is used to acquire the operating status of the main input interface 606 and the backup input interface 607, and adjust the data receiving status of the main input interface 606 and the backup input interface 607 according to their respective operating statuses. Specifically, when the main input interface 606 is in an abnormal state and the backup interface is in a normal state, the target chip 604 transmits the processed image data received through the backup input interface 607 to the display module, enabling the display module to display the processed image data. The data receiving status indicates whether the input interface continues to operate to receive data from the display controller.

[0091] It is understandable that by obtaining the operating status of the main and backup input interfaces through the target chip, the data receiving status of the main and backup input interfaces can be adjusted; in this way, the image data can be stably transmitted to the display module, thereby ensuring the stability of the display system.

[0092] The following describes the methods for determining the operating status of an interface chip or an interface. Taking the determination of the operating status of the first chip as an example, the methods for determining the operating status of an interface chip or an interface will be introduced.

[0093] In one possible implementation, the first chip can use data parameters for the first data, which is image data received by the first chip. These data parameters characterize the validity of the data. Subsequently, the first chip can determine its operating state based on the data parameters of the first data.

[0094] It should be noted that the first chip can determine its working status by detecting whether there is a valid LVDS signal, whether the LVDS is locked, and whether there are errors or packet loss in the LVDS data.

[0095] For example, the first chip can determine whether there is a valid electrical signal by detecting the difference between the two original signals in the differential signal and determining whether the amplitude of the difference is greater than a preset amplitude threshold (such as 80mV).

[0096] It should be noted that the specific process for detecting whether a valid LVDS signal exists can refer to the methods for detecting whether a valid signal exists in a conventional LVDS system, and will not be elaborated here.

[0097] In this embodiment, if a valid signal is determined to exist, the operating state of the first chip is determined to be normal. If no valid signal is determined to exist, the operating state of the first chip is determined to be abnormal.

[0098] In another example, the first chip determines whether the LVDS is locked by detecting whether it can continuously receive valid feature words (e.g., K code in 8B10B encoding mode) over a period of time.

[0099] It should be noted that if no valid signal is present, it could be due to a malfunction in the first chip or a malfunction in the display controller connected to the first chip; this application embodiment does not limit this. In other words, if the first display controller malfunctions, chip switching can also be performed.

[0100] In this embodiment, if it is determined that the LVDS is in a locked state, the operating state of the first chip is determined to be normal. If it is determined that the LVDS is not in a locked state, the operating state of the first chip is determined to be abnormal.

[0101] In another example, the first chip uses fields such as checksums or Cyclic Redundancy Check (CRC) to determine if there are any errors in the transmission. Alternatively, the first chip uses mechanisms such as serial numbers (e.g., the serial number of each data packet increments by 1) to determine if there are any errors in the transmission.

[0102] For example, as shown in Table 1, a data packet of image data is illustrated.

[0103] Table 1

[0104] logo illustrate Length (Bytes) SOP K28.1 1 RunNum serial number 1 Data Data field segment N CheckSum Arithmetic sum of Data field 2 EOP K28.3 1

[0105] It should be noted that for a detailed explanation of how the first chip uses checksums or CRC to determine whether there are errors in the transmission, please refer to the methods of checking using checksums or CRC in conventional technologies, which will not be elaborated here.

[0106] In this embodiment, if the transmission is determined to be normal, the operating state of the first chip is determined to be normal. If the transmission is determined to be faulty, the operating state of the first chip is determined to be abnormal.

[0107] The foregoing mainly describes the solutions provided by the embodiments of this application from the perspective of systems and methods. It is understood that, in order to achieve the above functions, the display system includes corresponding hardware structures and / or software modules for executing each function. Those skilled in the art should readily recognize that, based on the display method steps of the various examples described in conjunction with the embodiments disclosed in this application, this application can be implemented in hardware or a combination of hardware and computer software. Whether a certain function is executed in hardware or by computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0108] Through the above description of the embodiments, those skilled in the art can clearly understand that, for the sake of convenience and brevity, only the division of the above functional modules is used as an example. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above.

[0109] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another apparatus, or some features may be ignored or not executed. Furthermore, the mutual coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0110] The units described as separate components may or may not be physically separate. A component shown as a unit can be one or more physical units; that is, it can be located in one place or distributed in multiple different locations. Some or all of the constituent units can be selected to achieve the purpose of this embodiment, depending on actual needs.

[0111] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0112] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a readable storage medium. Based on this understanding, the technical solution of the embodiments of this application, essentially, or the part that contributes to the prior art, or a complete or partial classification of the technical solution, can be embodied in the form of a software product. This software product is stored in a storage medium and includes several instructions to cause a device (which may be a microcontroller, chip, etc.) or processor to execute all or part of the steps of the methods of the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, ROM, RAM, magnetic disks, or optical disks.

[0113] The above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A display system, characterized by, The display system comprises a first display controller, a second display controller and a display screen, the display screen comprises a first chip, a second chip and a display module, the first chip is connected with the display module and the first display controller respectively, and the second chip is connected with the display module and the second display controller respectively; The first display controller is configured to process the received image data and transmit the processed image data to the first chip; The second display controller is configured to process the received image data and transmit the processed image data to the second chip; In a case where the working state of the first chip is an abnormal state and the working state of the second chip is a normal state, the second chip transmits the processed image data to the display module, so that the display module displays the processed image data.

2. The system of claim 1, wherein In a case where the working state of the first chip is an abnormal state and the working state of the second chip is a normal state, the output state of the first chip is a high-impedance state, and the output state of the second chip is a data output state.

3. The system of claim 1 or 2, wherein, The first display controller is a main display controller, and the second display controller is a backup display controller; The first display controller is further configured to send first information to the first chip, the first information being used to indicate that the chip is a main chip; The second display controller is further configured to send second information to the second chip, the second information being used to indicate that the chip is a backup chip.

4. The system of claim 3, wherein The first chip is configured to acquire the working state of the first chip and the working state of the second chip; The first chip is further configured to adjust the output state of the first chip and the output state of the second chip according to the working state of the first chip and the working state of the second chip.

5. The system of claim 1 or 2, wherein, The master-slave control interface of the first chip and the master-slave control interface of the second chip are in a pull-up state and a pull-down state respectively; wherein the pull-up state and the pull-down state are used to indicate a main chip and a backup chip respectively, and the main chip is used to transmit data to the backup chip.

6. The system of claim 5, wherein, The first chip is the main chip, the second chip is the backup chip, the first chip comprises a first input-output (IO) interface, and the second chip comprises a second IO interface; The state of the first IO interface is an output state, and the first IO interface is used to send the working state of the first chip to the second chip; The state of the second IO interface is an input state, and the second IO interface is used to receive the working state of the first chip.

7. The system of claim 6, wherein The first chip is configured to acquire the working state of the first chip and adjust the output state of the first chip according to the working state of the first chip; The second chip is configured to acquire the working state of the first chip and the working state of the second chip, and adjust the output state of the second chip according to the working state of the first chip and the working state of the second chip.

8. The system of claim 1 or 2, wherein, The first chip and the second chip are a same target chip, and the target chip comprises a main input interface and a backup input interface; wherein a working state of the first chip is a working state of the main input interface, and a working state of the second chip is a working state of the backup input interface; In a case where the working state of the main input interface is an abnormal state and the working state of the backup interface is a normal state, the target chip transmits the processed image data received through the backup input interface to the display module, so that the display module displays the processed image data.

9. The system of claim 8, wherein, The first display controller is connected with the target chip through the main input interface, and the second display controller is connected with the target chip through the backup input interface.

10. The system of claim 8, wherein The target chip is configured to acquire the working state of the main input interface and the working state of the backup input interface, and adjust a data receiving state of the main input interface and a data receiving state of the backup input interface according to the working state of the main input interface and the working state of the backup input interface.

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