LED driver system based on gaN encapsulation technology and automotive vehicle lamp

By employing a co-packaging technology of GaN FET and silicon-based control circuit in the vehicle lighting controller, the contradiction between frequency and size in traditional vehicle lighting controllers is resolved, achieving a highly efficient and reliable miniaturized design, and improving system performance and applicability.

CN121463296BActive Publication Date: 2026-03-17MARELLI CHINA +1
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2026-01-06
Publication Date
2026-03-17

AI Technical Summary

Technical Problem

Existing vehicle lighting controllers, due to the use of silicon-based power devices, face a contradiction between operating frequency and size, resulting in high switching losses, low system efficiency, difficulty in miniaturization, and external layout that increases system complexity and cost.

Method used

By replacing Si MOSFETs with GaN FETs and integrating silicon-based control circuitry with GaN FETs in the same package, boost/SEPIC GaN FET converters and buck GaN FET converters are formed. Combined with a top heat dissipation structure and high-frequency operation, the circuit topology and protection mechanisms are optimized.

Benefits of technology

It achieves high-frequency stable operation of the controller, reduces component size and weight, improves system efficiency and reliability, simplifies layout, enhances anti-interference capability and applicability, and reduces cost and complexity.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application provides an LED driver system and an automobile lamp based on GaN sealing technology, which comprises a boost / SEPIC GaN FET converter chip and / or a buck GaN FET converter chip, both of which integrate a silicon-based control circuit and a GaN FET in the same package by using sealing technology; the silicon-based control circuit comprises a digital circuit core, an analog circuit, a gate drive circuit and an EEPROM, and power supply, signal processing, PWM generation and drive control are realized through internal connection; the GaN FET is connected with an external inductor and a capacitor through a pin, and a corresponding DC-DC topology is formed. The application supports high-frequency operation, has multiple power expansion, constant voltage / constant current mode configuration, complete circuit protection and SPI / UART communication functions, is suitable for an automobile lamp driving system, and realizes the design goals of high integration, high efficiency and small size.
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Description

Technical Field

[0001] This invention relates to the field of automotive lighting controller technology, specifically to an LED driver system and automotive lighting based on GaN encapsulation technology. Background Technology

[0002] The automotive lighting controller module provides a stable power current output for automotive LED lights to meet relevant regulations. Currently, automotive lighting controller modules mainly consist of a DC-DC converter and its application circuitry. Most mainstream automotive lighting DC-DC converters utilize silicon-based power metal-oxide-semiconductor field-effect transistors (SiMOSFETs). However, due to the inherent physical properties of silicon, these controllers face the following bottlenecks when targeting higher-performance automotive lighting applications:

[0003] The trade-off between operating frequency and size causes a sharp increase in switching losses of silicon-based power devices at high frequencies, limiting their mainstream operating frequency in automotive lighting applications to around 400kHz. Because the frequency cannot be effectively increased, the size and weight of passive components such as filter inductors, power inductors, and energy storage capacitors cannot be further reduced, hindering the miniaturization of automotive lighting controller modules.

[0004] The challenges of system efficiency and integration are significant. Existing automotive lighting controllers mostly employ a two-stage DC-DC conversion topology, with a typical system efficiency of around 80% and substantial power conversion losses. The generated heat requires management with an additional heat sink, often necessitating the external placement of the controller outside the lighting assembly to utilize airflow for cooling. This external layout not only increases system complexity but also introduces additional sealing design requirements and costs.

[0005] In recent years, wide-bandgap semiconductor power device technology, represented by gallium nitride field-effect transistors (GaN FETs), has matured significantly. GaN devices possess higher operating frequency potential, negligible switching losses, and superior thermal performance. Applying GaN FETs to automotive LED lighting controllers is expected to directly overcome these bottlenecks.

[0006] Patent application CN110445394A discloses a high-efficiency GaN power module for LED automotive lighting, including an input filter module, a GaN PFC power factor correction module, and a GaN half-bridge LLC converter module. It employs an input filter + two-stage isolated DC-DC converter topology for greater flexibility and higher performance. The power module achieves high-frequency operation by using LGA-packaged GaN HEMT devices. A double-sided layout structure optimizes the gate drive circuit, HEMT devices, power bus, and heat dissipation design, improving reliability and achieving high-density power integration and high efficiency. However, this patent application cannot completely solve the existing technical problems, nor can it meet the needs of this invention. Summary of the Invention

[0007] To address the shortcomings of existing technologies, the present invention aims to provide an LED driver system and automotive lighting based on GaN encapsulation technology.

[0008] The LED driver system based on GaN co-packing technology provided by the present invention includes a boost / SEPIC GaN FET converter chip and / or a buck GaN FET converter chip;

[0009] Both the boost / SEPIC GaN FET converter chip and the buck GaN FET converter chip adopt co-packaging technology, integrating the silicon-based control circuit and GaN FET into the same package.

[0010] The silicon-based control circuit includes a digital circuit core, an analog circuit, a gate drive circuit, and an EEPROM;

[0011] The boost / SEPIC GaN FET converter chip receives external input power at its VIN pin. Its internal LDO module converts the VIN voltage into VCC and VDD. VCC powers the analog circuit and gate drive circuit, while VDD powers the digital circuit core and EEPROM. The digital circuit core is connected to an external controller via a serial communication bus to receive external commands. The digital circuit core is also connected to the analog circuit, converting external commands into control signals and sending them to the analog circuit. The analog circuit generates a PWM signal and sends it to the gate drive circuit. The gate drive circuit converts the PWM signal into a drive voltage signal to control the on / off state of the GaN FET encapsulated within the chip. The GaN FET is connected to external inductors and capacitors via its VOUT, SW1, SW2, and PGND pins, forming a boost or SEPIC circuit topology.

[0012] The VCC and VDD pins of the buck GaN FET converter chip receive external power; VCC powers the analog circuit and gate drive circuit, and VDD powers the digital circuit core and EEPROM; the digital circuit core is connected to an external controller via a serial communication bus to receive external commands; the digital circuit core is connected to the analog circuit and converts the external commands into control signals to be sent to the analog circuit; the analog circuit generates a PWM signal and sends it to the gate drive circuit; the gate drive circuit converts the PWM signal into a drive voltage signal to control the on and off of the GaN FET encapsulated inside the chip; the GaN FET is connected to external inductors and capacitors via the VOUT, SW1, SW2, and PGND pins to form a buck circuit topology.

[0013] Preferably, the analog circuit of the boost / SEPIC GaN FET converter chip includes a first feedback control network and a second feedback control network;

[0014] The first feedback control network receives the output voltage feedback signal through the FB pin and connects to the COMP pin to access the external compensation network, thereby realizing constant voltage control of the boost circuit.

[0015] The second feedback control network receives the output current feedback signal through the CSP and CSN pins and connects to the COMP pin to access the external compensation network, thereby realizing constant current control of the SEPIC circuit.

[0016] Preferably, the analog circuit of the buck GaN FET converter chip includes a constant voltage control loop and a constant current control loop;

[0017] The constant current control loop is connected to the CSP and CSN pins, and current closed-loop control is performed by detecting the voltage difference between the CSP and CSN pins;

[0018] The constant voltage control loop is connected to the CSN pin, and voltage closed-loop control is performed by detecting the voltage of the CSN pin.

[0019] The core of the digital circuit receives a mode switching command sent via a serial communication bus, controls the constant voltage control loop and the constant current control loop to work selectively, and sends the output PWM signal to the gate drive circuit.

[0020] Preferably, the boost / SEPIC GaN FET converter chip and the buck GaN FET converter chip are in leadless packages;

[0021] The GaN FET is located above the silicon-based control circuit, and the two are electrically and mechanically connected through metal bumps to form a top heat dissipation structure.

[0022] Preferably, the GaN FET, gate drive circuit and analog circuit modules integrated in the boost / SEPIC GaN FET converter chip and / or the buck GaN FET converter chip are multiple sets;

[0023] In boost / SEPIC GaN FET converter chips, multiple circuits operate in parallel to combine the output;

[0024] In a buck GaN FET converter chip, multiple circuits independently drive multiple loads.

[0025] Preferably, the serial communication bus is an SPI bus or a UART bus;

[0026] The SPI bus includes CS, CLK, MOSI / RX, and MISO / TX pins; the UART bus includes TX and RX pins.

[0027] Preferably, the analog circuit integrates diagnostic and protection functions, including:

[0028] When the gate drive voltage is detected to be lower than the threshold, the analog circuit stops outputting the PWM signal;

[0029] When the digital circuit core detects that the GaN FET junction temperature exceeds the first threshold through the analog circuit, the alarm flag is set; when the junction temperature reaches the second threshold, the analog circuit stops outputting the PWM signal.

[0030] During the on-time of each switching cycle, the peak current of the GaN FET is detected. When the peak current exceeds a set threshold, the analog circuit controls the gate driver to immediately terminate the on-time of the current cycle.

[0031] Preferably, the EEPROM is connected to the core of the digital circuit via internal wiring;

[0032] The EEPROM is used to store the operating frequency, over-temperature protection threshold, over-current protection threshold, and part number information.

[0033] After power-on, the digital circuit core loads the stored configuration information from the EEPROM to control the operation of the analog circuit.

[0034] Preferably, the gate driving circuit is connected to the analog circuit, receives the PWM signal output by the analog circuit, and converts the PWM signal into a driving voltage signal and outputs it to the gate of the GaN FET;

[0035] The boost / SEPIC GaN FET converter chip and the buck GaN FET converter chip set their operating frequencies based on the switching characteristics of the GaN FET.

[0036] The automotive headlights provided by the present invention include the aforementioned LED driver system based on GaN encapsulation technology.

[0037] Compared with the prior art, the present invention has the following beneficial effects:

[0038] (1) By replacing the traditional Si MOSFET with GaN FET with faster switching speed and encapsulating the silicon-based control circuit with GaN FET, the drive circuit is greatly shortened, the risk of parasitic inductance and gate ringing is reduced, and the DC-DC converter can operate stably at the MHz level switching frequency. The significant increase in operating frequency allows the size and weight of passive components such as filter inductor, power inductor, and energy storage capacitor to be significantly reduced, thereby achieving a compact overall size of the controller and effectively solving the bottleneck of traditional controller in terms of size and power density.

[0039] (2) GaN FET has lower on-resistance and negligible switching losses. Combined with the optimization of magnetic components brought about by high-frequency operation, the system conversion efficiency of the boost, SEPIC and buck conversion topologies constructed in this invention is significantly higher than that of the traditional two-stage silicon-based solution. High efficiency means less energy is converted into heat, thereby directly reducing the difficulty of thermal management of the system. At the same time, the top heat dissipation packaging technology adopted by the co-encapsulation further optimizes the heat conduction path, which makes it possible for the controller module to be directly integrated into the inside of the vehicle lighting assembly, eliminating the complex sealing structure, external heat sink and connection harness required by the traditional external controller. This not only reduces the system cost and complexity, but also improves the overall reliability.

[0040] (3) The proposed integrated architecture integrates GaN FET, gate drive circuit, analog control circuit, digital core and EEPROM into a single chip package. This highly integrated design reduces the number of external discrete components and connection points on the PCB, and simplifies the layout of peripheral circuits. The integrated packaging of drive, protection and control circuits shortens the critical signal path and reduces the risk of failure caused by external interference or connection failure, thereby significantly improving the overall robustness and long-term reliability of the system.

[0041] (4) The encapsulated chip integrates comprehensive diagnostic and protection circuits, including GaN FET overcurrent protection based on cycle-by-cycle peak current detection, programmable threshold overtemperature protection, and gate driver undervoltage protection. These protection functions are implemented by internal analog and digital circuits in concert, with fast response speed, which can effectively prevent device damage under abnormal operating conditions. In addition, the encapsulation design itself helps to achieve ±2kV HBM level electrostatic protection, protecting GaN FET from ESD damage. These inherent protection mechanisms enhance the driver's anti-interference capability and applicability in harsh automotive electronic environments.

[0042] (5) The converter chip defined in this invention supports parameter configuration and mode control via a serial communication bus, eliminating the need for configuration based on a large number of external resistors and capacitors in traditional solutions, thus increasing design flexibility. Specifically, the buck converter chip integrates independent constant voltage and constant current control loops, which can be switched by instructions to adapt to different needs such as LED loads or subsequent linear drive chips. The boost / SEPIC converter chip also supports two topology controls. In addition, by expanding the power stage modules into multiple groups, power merging output or multi-channel independent drive can be achieved, providing an efficient and simple solution for the diversified design of vehicle lighting systems. Attached Figure Description

[0043] Other features, objects, and advantages of the present invention will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings:

[0044] Figure 1 Block diagram of a Boost / SEPIC GaN FET converter packaged chip;

[0045] Figure 2 Block diagram of a packaged chip for a step-down GaN FET converter;

[0046] Figure 3 A typical application system architecture diagram;

[0047] Figure 4 This is a block diagram of a typical application system architecture.

[0048] Figure 5 A schematic diagram of a GaN DC-DC converter package with top heat dissipation technology;

[0049] Figure 6 This is a schematic diagram of the sealing technology. Detailed Implementation

[0050] The present invention will now be described in detail with reference to specific embodiments. These embodiments will help those skilled in the art to further understand the present invention, but do not limit the invention in any way. It should be noted that those skilled in the art can make several changes and improvements without departing from the concept of the present invention. These all fall within the protection scope of the present invention.

[0051] This invention provides an advanced design concept based on silicon-based control circuits - GaN FET co-package, and a systematic definition of DC-DC converter and its application system architecture after combining the design requirements of automotive lighting controllers. It aims to systematically solve the fundamental limitations of traditional automotive lighting controllers in terms of efficiency, power density and integration.

[0052] Traditional automotive LED control typically employs two architectures. One requires a two-stage topology consisting of a boost DC-DC converter and a buck DC-DC converter. The other is a single-stage circuit that directly drives the LED using a DC-DC converter (e.g., a single-ended primary inductor converter, SEPIC), providing a stable current output. This invention replaces the Si MOSFETs in traditional converter circuits with GaN FETs and encapsulates them within a single chip, defining a boost / SEPIC GaNFET converter and a buck GaNFET converter specifically designed for automotive LED control.

[0053] Boost / SEPIC GaN FET converters, such as Figure 1 .

[0054] This system integrates a GaN FET and its gate drive circuitry for boost / SEPIC DC-DC conversion, an analog circuitry for controlling its operation, and a digital circuitry for controlling the analog circuitry and handling external digital communication. It constitutes a hybrid digital-analog converter chip using GaN technology.

[0055] The external power supply (the vehicle power input after external filtering) supplies power to the LDO module through the VIN chip pin. The LDO module steps down and stabilizes the VIN voltage, and outputs two sets of low-voltage power supplies, VCC and VDD.

[0056] VDD further provides the necessary stable operating power to the Digital Core and EEPROM modules for proper functioning. VCC further provides the necessary stable operating power to the Analog circuitry and Gate Driver circuitry.

[0057] The GaN FET is packaged inside the chip and connected to external peripheral devices (inductors, capacitors, etc.) through the VOUT, SW1, SW2, and PGND pins to work together to form the corresponding complete boost or SEPIC circuit.

[0058] The operation of a GaNFET is controlled by a gate driver, which controls the presence or absence of the gate voltage. The gate driver receives a PWM signal from the analog circuitry and amplifies it sufficiently to drive the GaN FET at high speed.

[0059] The analog circuit receives current feedback signals via the CSN and CSP pins or voltage feedback signals via the VFB pin, and performs closed-loop control compensation via the COMP pin. It generates a PWM signal to control the GaN FET, directly driving the gate driver in the subsequent stage.

[0060] The digital circuitry is connected to an external controller via a serial communication bus (CS, CLK, MOSI / RX, MISO / TX). The external controller sends boost / SEPIC related commands to the converter chip via the bus. It is also connected to the analog circuitry via internal integrated circuit traces, converting the commands received through communication into control of the analog circuitry, enabling it to operate according to the target requirements.

[0061] The EEPROM is connected to the digital circuitry via internal integrated circuit traces. On one hand, the digital circuitry can write information stored in the EEPROM. On the other hand, the digital circuitry can load the written stored information to operate after power-on.

[0062] 1) VCC, Low Dropout Linear Controller (LDO), outputs a stable 5V voltage VCC to provide independent drive power for Analog circuits and Gate Driver circuits, ensuring fast and powerful switching of GaN FETs.

[0063] 2) VDD, Low Dropout Linear Controller (LDO), outputs a stable 5V voltage VDD to provide a stable low-voltage power supply for the Digital Core and 4.EEPROM modules.

[0064] 3) Digital Core: The core circuit of the digital circuit is responsible for executing control logic (such as voltage setting), controlling the analog circuit, handling protection logic, and communicating with external devices. For example, SPI communication is a common internal communication method for automotive lighting controllers, implemented through CS, CLK, MOSI, and MISO as shown in the diagram.

[0065] 4) EEPROM, Electrically Erasable Programmable Read-Only Memory, is used to store user configuration information for converter operating parameters (such as output voltage setting value, overcurrent and overvoltage protection thresholds, etc.). After power-on, the digital circuit will load the EEPROM information to control the analog circuit to drive the GaN FET, so as to quickly respond to commands such as switching requests from SPI.

[0066] 5) Analog circuitry includes two independent feedback control networks responsible for boost control and SEPIC control. It receives control requests from the digital circuitry and outputs a switching PWM signal to the Gate Driver circuit to drive the GaN FET. It also includes a diagnostic and protection circuitry section that returns information from the analog circuitry, such as diagnostic status, to the digital circuitry (e.g., overvoltage, overcurrent, and overtemperature alarm information).

[0067] 6) Gate Driver: The gate driver circuit is connected to the Analog circuit and receives the PWM signal for GaN control from the analog circuit input.

[0068] The gate drive circuit converts the input PWM signal into a voltage signal that can drive the GaN FET, typically up to 6.5V.

[0069] 7) GaN FETs are used to replace traditional Si MOSFETs to form the upper and lower transistors in DC-DC boost or SEPIC circuits. By utilizing the high-speed switching characteristics of GaN FETs, circuits can efficiently boost the input voltage to a higher target voltage (two-stage topology applications) or provide a stable operating current for LEDs (single-stage topology applications).

[0070] Buck GaN FET converters, such as Figure 2 .

[0071] This system integrates a GaN FET and its gate drive circuit for buck DC-DC conversion, an analog circuit for controlling its operation, and a digital circuit for controlling the analog circuit and external digital communication. It constitutes a hybrid digital-analog converter chip using GaN technology.

[0072] An external 5V power supply is connected to the chip through the VCC and VDD pins, providing two sets of low-voltage 5V outputs, VCC and VDD.

[0073] VDD further provides the necessary stable operating power to the Digital Core and EEPROM modules for proper functioning. VCC further provides the necessary stable operating power to the Analog circuitry and Gate Driver circuitry.

[0074] The GaN FET is encapsulated inside the chip and connected to external peripheral devices (inductors, capacitors, etc.) through the VOUT, SW1, SW2, and PGND pins to work together to form the corresponding complete buck circuit.

[0075] The operation of a GaNFET is controlled by a gate driver, which controls the presence or absence of the gate voltage. The gate driver receives a PWM signal from the analog circuitry and amplifies it sufficiently to drive the GaN FET at high speed.

[0076] The analog circuit receives current feedback signals via the CSN and CSP pins, or voltage feedback signals via the CSN pin, and performs closed-loop control compensation via the COMP pin. It generates a PWM signal to control the GaN FET, directly driving the gate driver in the subsequent stage.

[0077] The digital circuitry is connected to an external controller via a serial communication bus (CS, CLK, MOSI / RX, MISO / TX). The external controller sends buck-related commands to the converter chip via the bus. It is also connected to the analog circuitry via internal integrated circuit traces, converting the commands received through communication into control of the analog circuitry, enabling it to operate according to the target requirements.

[0078] The EEPROM is connected to the digital circuitry via internal integrated circuit traces. On one hand, the digital circuitry can write information stored in the EEPROM. On the other hand, the digital circuitry can load the written stored information to operate after power-on.

[0079] 1) VCC, Low Dropout Linear Controller (LDO), outputs a stable 5V voltage VCC to provide independent drive power for Analog circuits and Gate Driver circuits, ensuring fast and powerful switching of GaN FETs.

[0080] 2) VDD, Low Dropout Linear Controller (LDO), outputs a stable 5V voltage VDD to provide a stable low-voltage power supply for the Digital Core and EEPROM modules.

[0081] 3) Digital Core: The core circuit of the digital circuit is responsible for executing control logic (such as current setting), controlling the analog circuit, handling protection logic, and communicating with external devices. For example, SPI communication is a common internal communication method for automotive lighting controllers, implemented through CS, CLK, MOSI, and MISO as shown in the diagram.

[0082] 4) EEPROM, Electrically Erasable Programmable Read-Only Memory, is used to store user configuration information for converter operating parameters (such as output current setting value, overcurrent and overvoltage protection thresholds, etc.). After power-on, the digital circuit will load the EEPROM information to control the analog circuit to drive the GaN FET, so as to quickly respond to commands such as switching requests from SPI.

[0083] 5) Analog circuit section, which includes two parts: feedback buck control and diagnostics and protection. It receives control requirements from the digital circuit and returns information such as diagnostic status from the analog circuit section to the digital circuit section. On the other hand, it outputs the PWM signal to the gate driver circuit to drive the GaN FET.

[0084] 6) Gate Driver: The gate driver circuit is connected to the Analog circuit and receives the PWM signal for GaN control from the analog circuit input.

[0085] The gate drive circuit converts the input PWM signal into a voltage signal that can drive the GaN FET, typically up to 6.5V.

[0086] 7) GaN FETs are used to replace traditional Si MOSFETs to form the upper and lower transistors in a DC-DC buck circuit, realizing power conversion, that is, converting the high voltage from the boost converter into a stable current output to the target load (such as an LED string).

[0087] Key pins: COMP, FB, CSP, and CSN are the core external pins of the converter chip.

[0088] In boost / SEPIC converter chips, each pin is independently connected to the internal analog circuitry, providing its own function. In buck converter chips, the CSN and CSP pins are used together to implement current sampling, while the CSN pin can also be used independently to implement voltage feedback.

[0089] COMP is the compensation pin, connected to an external RC network, used to stabilize the voltage / current feedback control loop, prevent system oscillation, and is key to ensuring output stability.

[0090] FB is the feedback voltage pin, which can be connected to an output voltage divider resistor network to sample the output voltage. Or, as shown below... Figure 1 The block diagram design integrates a resistor network within the converter, which, after being connected to the output, can be directly used for output voltage monitoring.

[0091] CSP and CSN are current sampling pins that measure the voltage difference across a resistor to detect the current flowing through the load in real time and accurately, supporting current closed-loop control and achieving stable load current output. Additionally, in constant voltage output applications, the CSN pin can function similarly to the FB feedback voltage pin, enabling output voltage monitoring to support voltage closed-loop control and achieve stable voltage output.

[0092] This invention defines a packaged DC-DC converter chip that integrates silicon-based control circuitry and GaN FETs for use in vehicle lighting control.

[0093] Packaging design such as Figure 5 As shown, GaN converters employ leadless package designs (such as the industry-standard Quad Flat No-Leader (QFN)) to minimize lead inductance and chip size. Minimizing lead inductance helps reduce GaN FET ringing effects during high-speed switching, which is beneficial to driver efficiency. Minimizing chip size further facilitates reduction in system size and cost.

[0094] In terms of heat dissipation design, GaN converters prioritize top heat dissipation packaging technology. Top heat dissipation can achieve better heat dissipation performance by attaching a heat sink with high thermal conductivity silicone.

[0095] For external communication, the GaN converter uses SPI communication to configure itself. This communication configuration method eliminates the need for a large number of interface pins to connect to external passive devices, which is required when configuring functions in a traditional DC-DC controller, thus reducing the size of the converter.

[0096] The communication method can be a Serial Peripheral Interface (SPI), implemented through the CS, CLK, MOSI, and MISO pins shown in the diagram. However, it is not limited to SPI communication; generally, a Universal Asynchronous Serial Bus (UART) can also be used in converter designs, implemented through the TX and RX pins shown in the diagram.

[0097] High-frequency operating characteristics: Thanks to GaN's high-speed switching turn-on delay performance, GaN converters will be designed to support switching frequencies above 2MHz, which is 4 to 5 times that of traditional DC-DC converters used in automotive lighting applications.

[0098] Multiple combined output functions are available for both boost and buck converters. As shown in Block 2 (dashed box) in the figure, the packaged GaN FETs, gate drivers, and analog circuit modules can be expanded from a single group to multiple groups (e.g., two groups). For boost converters, multiple GaN DC-DC circuits can operate in parallel, and the combined output achieves higher power output capability (e.g., two groups can provide approximately twice the power). For buck converters, integrating multiple GaN FETs allows them to independently drive multiple loads, with typical applications including simultaneously driving multiple strings of LEDs, thus enabling more flexible system design.

[0099] The buck converter integrates two independent closed-loop detection and control loops, one for constant current output and the other for constant voltage output. Users can select between CV and CC modes based on system application requirements and load type (e.g., CC drive for LED loads and CV drive for linear LED driver chips). Users can send switching commands to the core digital circuitry within the chip via a serial communication bus. The digital circuitry controls the two integrated control loops in the analog circuitry to switch between CV and CC. The two independent closed-loop detection and control circuits are located within the analog circuitry module of the buck GaN FET converter. Externally, they are connected in parallel to the CSP and CSN pins, allowing for closed-loop monitoring. The PWM control signals generated by the internal control loops are output to the gate driver module, but due to the control of the digital circuitry core, only one PWM signal is output to the gate driver at a time; that is, CV and CC do not operate simultaneously. Figure 3 As shown in the typical application system architecture: During constant current output, the differential current detection via CSP and CSN is fed back to the internal buck constant current control loop to control a stable current output to drive the load (e.g., LED). During constant voltage output, the voltage is fed back to the internal buck constant voltage control loop via the CSP2 pin to control a stable voltage output to drive the load.

[0100] Supports multiple DC-DC topologies, this boost / SEPIC GaN FET converter features an internal design that integrates two independent closed-loop detection and control circuits, one for constant voltage output control and the other for constant current output control, adaptable to various application systems. Figure 3 In applications, the feedback pin (VFB) detects and feeds back to the internal boost control loop, which is responsible for generating a stable primary voltage for the secondary buck converter. Figure 4 In applications, differential current detection via the CSP and CSN pins is fed back to the internal SEPIC control loop to control a stable current output to drive the load (e.g., an LED).

[0101] like Figure 6 As shown, the GaN FET is placed above the silicon-based control circuit, and the electrical and mechanical connection between the two is achieved through metal pillar bumps. Based on a mature encapsulation process design, the stability and reliability of the encapsulated chip are ensured.

[0102] The GaN controller after being encapsulated according to this invention will have the following characteristics:

[0103] By minimizing the gate drive circuit and reducing parasitic inductance, the GaN converter can operate stably and reliably at MHz-level switching frequencies, while also improving switching immunity.

[0104] After sealing, the chip has With 2kV HBM (Human Body Discharge Model) electrostatic discharge protection capability, GaN FETs are effectively protected from electrostatic ESD damage.

[0105] The stacked encapsulation structure enables heat dissipation at the top of the GaN FET, improving power density and reliability.

[0106] The drive, protection and control circuits are packaged together, reducing the number of external components and connection points, and improving the overall reliability of the system.

[0107] After encapsulation, only a few external components are required, greatly simplifying the GaN FET circuit layout requirements on the circuit board.

[0108] How the circuit works:

[0109] 1) Startup and Power Supply: For boost / SEPIC GaN FET converters, after external power is connected, VCC and VDD are powered on. VDD is used for the startup of the digital circuit core, and VCC is used for the stable power supply of the analog circuit and gate drive circuit. For buck GaN FET converters, power is supplied by an external module.

[0110] 2) Boost control: The output voltage is fed back to the 5. Analog circuit section via the FB feedback pin and compensated by the external network of the COMP pin, ensuring that the entire control loop is both fast-responding and stable without oscillation. The digital core, combined with EEPROM configuration and external SPI communication input instructions, transmits control signals to the analog circuit section, ultimately generating a suitable duty cycle PWM control signal and outputting it to the subsequent stage to achieve stable boost control.

[0111] 3) Constant current control: The output current is fed back to the 10.Analog circuit section through the CSP and CSN feedback pins, and compensated by the external network of the COMP pin, ensuring that the entire control loop is both fast-responding and stable without oscillation. The digital core, combined with EEPROM configuration and external SPI communication input instructions, transmits control signals to the analog circuit section, ultimately generating a suitable duty cycle PWM control signal and outputting it to the subsequent stage to achieve stable constant current control.

[0112] 4) Diagnosis and protection: The gate driver and analog section will integrate numerous diagnostic and protection functions. In the event of a fault, the control logic will immediately adjust or shut down the PWM output to implement protection and ensure system safety.

[0113] Fault protection functions include:

[0114] The gate driver undervoltage shutdown protection prevents the GaN FET from fully turning on when the gate drive voltage is too low. This can lead to increased internal resistance, overheating, and potential failure. When the gate driver detects an undervoltage, the analog circuitry stops the PWM output and shuts down the GaN FET to prevent damage. Once the voltage returns to normal, the undervoltage shutdown protection function resets, and the GaN FET resumes normal operation.

[0115] The GaN FET over-temperature protection works as follows: When the digital circuitry detects that the junction temperature of the GaN FET exceeds a target alarm threshold (the threshold can be defined by the user in conjunction with the actual application via EEPROM, and the digital circuitry reads it from the EEPROM), it sets the corresponding alarm flag. The user can then control the chip to reduce power output via the serial communication bus to reduce heat and prevent the temperature from rising further. If the temperature continues to rise, the analog circuitry will stop the PWM output and shut down the GaN FET to prevent damage once the maximum allowable junction temperature (e.g., 150°C) is reached. When the junction temperature drops below the detection threshold, the over-temperature protection function resets, and the GaN FET resumes normal operation.

[0116] In GaN FET overcurrent protection, when a GaN FET fault (such as a short circuit) causes a sudden increase in current, the analog circuit will perform overcurrent detection cycle by cycle. Specifically, during the on-time of each switching cycle, the peak current of the GaN FET is detected. Once the threshold is exceeded, the analog circuit will control the gate driver to immediately terminate the conduction of the current cycle, and the next cycle will start again. This can clamp the current peak within a safe range.

[0117] 5) Gate driver: The gate driver is essential for the efficient and reliable operation of GaN FETs, and it integrates the following functions:

[0118] Dead-time control automatically generates and adjusts the brief delay between the upper and lower transistor switches to prevent shoot-through and ensure system safety.

[0119] Level conversion converts the low-voltage control signal into a high-voltage (or negative-voltage) signal suitable for GaN gate driving, ensuring accurate and fast switching action.

[0120] The charge pump function is used to generate a stable high voltage for reliable conduction of the upper GaN FET.

[0121] 6) GaN FET, located at the very end of the entire power link, is responsible for implementing the DC-DC boost / SEPIC circuit and the DC-DC buck circuit, replacing the traditional Si MOSFET.

[0122] 7) EEPROM: EEPROM is a power-off information storage device with the characteristics of being rewritable and retaining information even when power is off. Therefore, this converter chip integrates it to store information, which can be retrieved after the chip is powered on to obtain parameters that were fixed during the design phase. For example:

[0123] The circuit operating characteristics parameters of the boost / SEPIC or buck circuit, such as the operating frequency.

[0124] Strategies for handling chip fault protection functions, such as setting thresholds for over-temperature protection.

[0125] Some users need additional information stored within the product, such as component part numbers.

[0126] 8) Typical application system architectures of boost and buck converters, such as Figure 3 As shown, the boost GaN FET converter and the buck GaN FET converter are cascaded in practical applications. Combined with the peripheral components necessary for DC-DC circuits, such as inductors, capacitors, feedback networks, loop compensation capacitors and resistors, they form the GaN FET boost circuit and the GaN FET buck circuit.

[0127] 9) Typical application system architecture of single-ended primary inductor converters (SEPIC converters), such as... Figure 4 As shown, the circuit is built based on the SEPIC DC-DC conversion principle, and combined with necessary peripheral components, such as coupling inductors, capacitors, feedback networks, loop compensation capacitors and resistors, etc., it constitutes a SEPIC converter. This application architecture can directly convert a wide input voltage range (9~16V) from the vehicle into a stable current output to the target load (e.g., an LED string).

[0128] In the description of this application, it should be understood that the terms "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0129] Those skilled in the art will understand that, in addition to implementing the system, apparatus, and their modules provided by this invention in purely computer-readable program code, the same program can be implemented in the form of logic gates, switches, application-specific integrated circuits, programmable logic controllers, and embedded microcontrollers by logically programming the method steps. Therefore, the system, apparatus, and their modules provided by this invention can be considered a hardware component, and the modules included therein for implementing various programs can also be considered structures within the hardware component; alternatively, modules for implementing various functions can be considered both software programs implementing the method and structures within the hardware component.

[0130] Specific embodiments of the present invention have been described above. It should be understood that the present invention is not limited to the specific embodiments described above, and those skilled in the art can make various changes or modifications within the scope of the claims, which do not affect the essence of the present invention. Unless otherwise specified, the embodiments and features described in this application can be arbitrarily combined with each other.

Claims

1. A LED driver system based on GaN potted technology, characterized in that, The boost / SEPIC GaN FET converter chip and / or the buck GaN FET converter chip; The boost / SEPIC GaN FET converter chip and the buck GaN FET converter chip both adopt the sealing technology to integrate the silicon-based control circuit and the GaN FET in the same package; The silicon-based control circuit includes a digital circuit core, an analog circuit, a gate drive circuit and an EEPROM; The VIN pin of the boost / SEPIC GaN FET converter chip receives an external input power supply, and the internal LDO module converts the VIN voltage into VCC and VDD; VCC is used to power the analog circuit and the gate drive circuit, and VDD is used to power the digital circuit core and the EEPROM; the digital circuit core is connected with an external controller through a serial communication bus to receive external instructions; the digital circuit core is connected with the analog circuit to convert the external instructions into control signals and send them to the analog circuit; the analog circuit generates PWM signals and sends them to the gate drive circuit; the gate drive circuit converts the PWM signals into driving voltage signals to control the conduction and shutdown of the GaN FET sealed in the chip; the GaN FET is connected with an external inductor and capacitor through the VOUT, SW1, SW2 and PGND pins to form a boost or SEPIC circuit topology; The VCC and VDD pins of the buck GaN FET converter chip receive an externally provided power supply; VCC is used to power the analog circuit and the gate drive circuit, and VDD is used to power the digital circuit core and the EEPROM; the digital circuit core is connected with an external controller through a serial communication bus to receive external instructions; the digital circuit core is connected with the analog circuit to convert the external instructions into control signals and send them to the analog circuit; the analog circuit generates PWM signals and sends them to the gate drive circuit; the gate drive circuit converts the PWM signals into driving voltage signals to control the conduction and shutdown of the GaN FET sealed in the chip; the GaN FET is connected with an external inductor and capacitor through the VOUT, SW1, SW2 and PGND pins to form a buck circuit topology.

2. The GaN-based encapsulation technology based LED driver system according to claim 1, wherein, The analog circuit of the boost / SEPIC GaN FET converter chip includes a first feedback control network and a second feedback control network; The first feedback control network receives an output voltage feedback signal through the FB pin and connects the COMP pin to access an external compensation network to realize constant voltage control of the boost circuit; The second feedback control network receives an output current feedback signal through the CSP and CSN pins and connects the COMP pin to access an external compensation network to realize constant current control of the SEPIC circuit.

3. The GaN-based encapsulation technology based LED driver system of claim 1, wherein, The analog circuit of the buck GaN FET converter chip includes a constant voltage control loop and a constant current control loop; The constant current control loop is connected to the CSP and CSN pins to perform current closed-loop control by detecting the voltage difference between the CSP and CSN pins; The constant voltage control circuit is connected to a CSN pin, and voltage closed-loop control is performed by detecting the voltage of the CSN pin; The digital circuit core receives a mode switching instruction sent through a serial communication bus, and controls the constant voltage control circuit and the constant current control circuit to work alternatively, and the output PWM signal is sent to the gate drive circuit.

4. The GaN-based encapsulation technology based LED driver system of claim 1, wherein, The boost / SEPIC GaN FET converter chip and the buck GaN FET converter chip adopt a leadless package; The GaN FET is located above the silicon-based control circuit, and the two are electrically and mechanically connected through metal bumps to form a top heat dissipation structure.

5. The GaN-based encapsulation technology based LED driver system of claim 1, wherein, The boost / SEPIC GaN FET converter chip and / or the GaN FET, gate drive circuit and analog circuit module integrated in the buck GaN FET converter chip are multiple groups; In the boost / SEPIC GaN FET converter chip, multiple groups of circuits work in parallel to merge the output; In the buck GaN FET converter chip, multiple groups of circuits independently drive multiple loads.

6. The GaN-based encapsulation technology based LED driver system of claim 1, wherein, The serial communication bus is an SPI bus or a UART bus; The SPI bus includes CS, CLK, MOSI / RX and MISO / TX pins; and the UART bus includes TX and RX pins.

7. The GaN-based technology based LED driver system according to claim 1, wherein, The analog circuit integrates a diagnosis and protection function, including: When the gate drive voltage is detected to be lower than a threshold value, the analog circuit stops outputting the PWM signal; When the digital circuit core detects through the analog circuit that the junction temperature of the GaN FET exceeds a first threshold value, an alarm flag is set; and when the junction temperature reaches a second threshold value, the analog circuit stops outputting the PWM signal; The peak current of the GaN FET is detected within the on-time of each switching cycle, and when the peak current exceeds a set threshold value, the analog circuit controls the gate driver to immediately terminate the on-time of the current cycle.

8. The GaN-based technology based LED driver system according to claim 1, wherein, The EEPROM is connected to the digital circuit core through internal wiring; The EEPROM is used to store working frequency, over-temperature protection threshold value, over-current protection threshold value and part number information; After power-on, the digital circuit core loads the stored configuration information from the EEPROM to control the working of the analog circuit.

9. The GaN-based technology based LED driver system according to claim 1, wherein, The gate drive circuit is connected to the analog circuit, receives the PWM signal output by the analog circuit, and converts the PWM signal into a drive voltage signal output to the gate of the GaN FET; The boost / SEPIC GaN FET converter chip and the buck GaN FET converter chip set the working frequency based on the switching characteristics of the GaN FET.

10. An automotive vehicle lamp characterized by An LED driver system based on the GaN hybrid packaging technology of any one of claims 1 to 9. An LED driver system based on the GaN hybrid packaging technology of any one of claims 1 to 9.

Citation Information

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