Three-frequency large group time delay difference dispersion circuit and control method thereof

Abstract

The application discloses a three-frequency large-group time delay difference dispersion circuit and a control method thereof, and belongs to the technical field of group time delay difference dispersion circuits. The circuit comprises at least three cascaded group time delay dispersion units. A positive group time delay dispersion unit comprises a coupled microstrip line and an adjustable capacitor. The adjustable capacitor is connected between a non-ground port of the coupled microstrip line and the ground. The group time delay dispersion units are connected in series with each other through two ports in the respective coupled microstrip lines, and a series microstrip line is connected between each series port. A reconfigurable microstrip line is further connected in series between the adjustable capacitor and the non-ground port of the negative group time delay dispersion unit. The length of the coupled microstrip line, the coupling distance and the adjustable capacitor value of each group time delay dispersion unit are independently set, so as to generate three resonance peaks with different center frequencies and group time delay differences in the required frequency range, so that the dispersion circuit has the function of having multiple frequency bands and large time delay differences, and lays a theoretical and practical foundation for realizing millimeter wave dispersion spectrum analysis.

Description

Technical Field

[0001] This invention belongs to the field of group delay difference dispersion circuit technology, and particularly relates to a three-frequency large group delay difference dispersion circuit and its control method. Background Technology

[0002] Microwave and millimeter-wave dispersive spectrometers are core tools for conducting large-area spectroscopic surveys and exploring the formation and evolution of high-redshift galaxies, and high-precision dispersive spectral networks are key to their effectiveness. However, traditional microwave and millimeter-wave spectrometers are limited by the multi-channel frequency division (filter bank) technology they rely on, making it difficult to achieve breakthroughs in reducing device size, lowering manufacturing costs, and simplifying integration complexity.

[0003] In recent years, group delay dispersive network devices have made significant progress in integration, miniaturization, and tunability. Through group delay dispersive network theory, high-precision dispersion compensation and wide-range tuning have been achieved, leading to their widespread application in optical communication, femtosecond laser systems, and microwave photonics. This promising development path for dispersive spectrometers aims to provide key technical support for microwave and millimeter-wave dispersive spectrometer terminals by studying the theoretical principles of group delay dispersive circuits, and to offer novel ideas for the innovation of microwave and millimeter-wave dispersive spectroscopy detection technology.

[0004] Existing dispersion compensation techniques that use group delay dispersion mostly employ the concept of negative group delay for compensation, which cannot generate delay difference dispersion. In addition, most existing negative group delay dispersion networks are manufactured using PCB technology, which occupies a large area and is not convenient for integration. Summary of the Invention

[0005] The purpose of this invention is to overcome the shortcomings of the prior art and provide a three-frequency large group delay difference dispersion circuit and its control method. Based on CMOS technology, multiple group delay dispersion units with different delay symbols are cascaded to facilitate circuit integration. By adjusting specific circuit parameters, the negative group delay and positive group delay can be changed, so that the dispersion circuit forms a group delay dispersion difference with negative / positive group delay.

[0006] To achieve the above objectives, the present invention is implemented using the following technical solution:

[0007] In a first aspect, the present invention provides a three-frequency large group delay difference dispersion circuit, comprising: at least three cascaded group delay dispersion units integrated based on CMOS technology; wherein, the cascaded group delay dispersion units include positive group delay dispersion units and negative group delay dispersion units.

[0008] The positive group time-delay dispersion unit includes a coupled microstrip line and an adjustable capacitor;

[0009] The coupled microstrip line includes at least two microstrip lines coupled at a certain distance, having at least four ports, and one of the ports being grounded;

[0010] The adjustable capacitor is connected between the ungrounded port of the coupled microstrip line and ground.

[0011] The group delay dispersion units are connected in series with each other through two ports in their respective coupled microstrip lines, and each series port is connected by a series microstrip line.

[0012] The negative group delay dispersion unit is further connected in series with a reconfigurable microstrip line between the adjustable capacitor and the non-grounded port connected to the adjustable capacitor.

[0013] The coupling microstrip line length, coupling spacing, and adjustable capacitance value of each cascaded group delay dispersion unit are set independently to generate three resonant peaks with different center frequencies and different group delays within the required operating frequency range.

[0014] Optionally, the dispersion circuit includes a cascaded first group of time-delay dispersion units, a second group of time-delay dispersion units, and a third group of time-delay dispersion units;

[0015] The first group of delay dispersion units is a negative group delay dispersion unit, and the second group and the third group of delay dispersion units are positive group delay dispersion units;

[0016] Each group of time-delay dispersion units has a coupled first microstrip line and a coupled second microstrip line in its coupled microstrip line;

[0017] In each group of time-delay dispersion units, the width of the first microstrip line is 16µm, the width of the second microstrip line is 13µm, and the adjustable capacitance value is 0.3pF.

[0018] Optionally, the length of the coupled microstrip line in the first group of time-delay dispersion units is 0.55 mm, the coupling spacing is 3 μm, and the length of the reconfigurable microstrip line is 34 μm.

[0019] Optionally, the length of the coupled microstrip line in the second group of time-delay dispersion units is 0.48 mm, and the coupling spacing is 11 μm.

[0020] Optionally, the length of the coupled microstrip line in the third group of time-delay dispersion units is 0.34 mm, and the coupling spacing is 21 μm.

[0021] Optionally, the connecting lines at both ends of the serial ports of each group of time-delay dispersion units are symmetrically distributed and have the same length, with each connecting line having a length of 0.1 mm.

[0022] Optionally, the length of the cascaded microstrip line between each group of time-delay dispersion units is 0.1 mm.

[0023] Optionally, the operating frequency bands of the dispersion circuit are selected as 24.5 GHz, 26.5 GHz and 31.5 GHz, respectively.

[0024] In a second aspect, the present invention provides a control method applied to a three-frequency large-group time-delay difference dispersion circuit as described in any one of the first aspects, comprising:

[0025] Based on the required frequency band, the coupling microstrip line length, coupling spacing, and adjustable capacitance value of each group delay dispersion unit are independently set so that each group delay dispersion unit produces resonance peaks with different center frequencies and opposite group delay signs within the required frequency band.

[0026] The group delay dispersion units with completed parameter configuration are cascaded in series via microstrip lines in a predetermined order, so that the dispersion circuit can achieve three-band, large group delay difference and adjustable dispersion output on the same chip.

[0027] Optionally, the control method includes: setting the length of the coupled microstrip line and the value of the adjustable capacitor according to the linear relationship between the center frequency of the group delay unit and the length of the corresponding coupled microstrip line and the value of the adjustable capacitor; wherein the linear relationship includes: the center frequency of the group delay unit decreases as the length of the corresponding coupled microstrip line increases, and decreases as the value of the corresponding adjustable capacitor increases.

[0028] Compared with existing technologies, the beneficial effects achieved by this invention are as follows: By cascading and integrating multiple group delay dispersion units with different delay symbols using CMOS technology, the small area required is suitable for circuit integration. Furthermore, the device parameters in each group delay dispersion unit can be independently set according to the required frequency band, thereby enabling the cascaded overall dispersion circuit to simultaneously possess the composite functions of multi-band, large group delay difference, and adjustable dispersion on the same chip. At the same time, it enables the dispersion circuit to be applied to high-frequency bands, not limited to the low-frequency band where traditional negative group delay dispersion circuits operate, thus laying the foundation for realizing millimeter-wave dispersive spectral analysis. Attached Figure Description

[0029] Figure 1 The diagram shown is a schematic diagram of the group delay dispersion unit structure in one embodiment of the present invention;

[0030] Figure 2 The diagram shown is a schematic of the ADS theoretical model of a three-frequency large group delay difference dispersion circuit in one embodiment of the present invention;

[0031] Figure 3 The diagram shows the layout of the ADS theoretical model of a three-frequency large group delay difference dispersion circuit in one embodiment of the present invention;

[0032] Figure 4 The figure shown is a schematic diagram of the group delay simulation results of a three-frequency large group delay difference dispersion circuit in one embodiment of the present invention;

[0033] Figure 5The figure shown is a simulation result of adjusting the center frequency and group delay value of the microstrip line coupled by adjusting the length L1 of the first group delay dispersion circuit in one embodiment of the present invention.

[0034] Figure 6 The figure shown is a simulation result of adjusting the center frequency and group delay value of the first group delay dispersion circuit by adjusting the adjustable capacitor C1 of the first group delay dispersion circuit in one embodiment of the present invention.

[0035] Figure 7 The figure shown is a simulation result of adjusting the center frequency and group delay value of the reconfigurable microstrip line TL3 by adjusting the length d1 of the first group delay dispersion circuit in an embodiment of the present invention.

[0036] Figure 8 The figure shown is a simulation result of adjusting the center frequency and group delay value of the microstrip line coupled by adjusting the length L3 of the third group delay dispersion circuit in one embodiment of the present invention.

[0037] Figure 9 The diagram shown is a simulation result of adjusting the center frequency and group delay value of the third group delay dispersion circuit by adjusting the adjustable capacitor C3 in one embodiment of the present invention. Detailed Implementation

[0038] The present invention will be further described below with reference to the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solution of the present invention, and should not be used to limit the scope of protection of the present invention.

[0039] In the description of this invention, it should be understood that the terms "center," "longitudinal," "lateral," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicating orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, are used only for the convenience of describing the invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the invention. Furthermore, the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined with "first," "second," etc., may explicitly or implicitly include one or more of that feature. In the description of this invention, unless otherwise stated, "a plurality of" means two or more.

[0040] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art will understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0041] Example 1

[0042] This embodiment uses a coupled crosstalk transmission line unit. For lossy units, the group delay value is determined by the energy storage capacity of the circuit. In the case of external coupling, the internal quality factor of the resonant unit can be expressed as:

[0043] ,

[0044] in, This refers to the internal quality factor of the resonant unit. The internal resistance of the resonant unit. The internal capacitance of the resonant unit. This refers to the internal inductance of the resonant unit.

[0045] According to the definition of quality factor, the formula for calculating the external quality factor of a circuit is:

[0046] ,

[0047] in, This refers to the external quality factor of the resonant unit. The admittance of the signal source. Representing the resonant unit of the dispersive circuit, substituting the above two equations into the definition of group delay, the group delay calculation formula for the circuit can be expressed as:

[0048] ,

[0049] in, The group delay center frequency is denoted by . Therefore, for the circuit described above, the sign of the group delay is ultimately determined by . and The ratio is determined. When At that point, a critical point occurs. When the denominator on the right side of the above group delay calculation formula is greater than zero, it results in a positive group delay response, while when At that time, a negative group delay response will be obtained.

[0050] The above general analysis of the quality factor of the dispersive element yields the method for determining the sign of the group delay. Specifically, for dispersive circuits with different resonant structures, this can be achieved by adjusting the resonator structure, dielectric material, coupling coefficient, etc. and The purpose of the ratio is to obtain the dispersive circuit with the corresponding group delay response.

[0051] This embodiment provides a three-frequency large group delay difference dispersion circuit, which is composed of three structurally similar group delay dispersion circuits connected together. It includes a first, second, and third group delay dispersion unit cascaded sequentially. The first group delay dispersion unit is a negative group delay dispersion unit, while the second and third group delay dispersion units are both positive group delay dispersion units. The negative and positive group delays are represented by whether or not a reconfigurable microstrip line is added to each group delay dispersion unit. Figure 1 The diagram shown is a schematic of the group delay dispersion unit structure.

[0052] The negative group delay dispersion unit includes a coupled microstrip line consisting of a first microstrip line and a second microstrip line, a reconfigurable microstrip line, and an adjustable capacitor. The left end of the second microstrip line is connected to one end of the reconfigurable microstrip line, and the other end of the reconfigurable microstrip line is connected to ground via a series adjustable capacitor. The right end of the second microstrip line is grounded. The port of the first microstrip line is connected to the port of the first microstrip line in the coupled microstrip line of other group delay dispersion units via a series microstrip line. In a separate negative group delay dispersion unit, the two ports of the first microstrip line are connected to the characteristic impedance Z0 (typically 50Ω), and serve as the input port ① and output port ② of the negative group delay dispersion unit, respectively.

[0053] The positive group time-delay dispersion unit includes a coupled microstrip line consisting of a first microstrip line and a second microstrip line, and an adjustable capacitor. The left end of the second microstrip line is connected to ground via a series adjustable capacitor, and the right end of the second microstrip line is also grounded. The ports of the first microstrip line are connected to the ports of the coupled microstrip lines of other group time-delay dispersion units via series microstrip lines. In a separate positive group time-delay dispersion unit, the two ports of the first microstrip line are connected to the characteristic impedance Z0, and serve as the input port ① and output port ② of the positive group time-delay dispersion unit, respectively.

[0054] Figure 2The diagram shown is a schematic of the ADS (Advanced Design System) theoretical model of the three-frequency large-group time-delay dispersion circuit in this embodiment. In the dispersion circuit of this embodiment, the coupling microstrip lines of the first group of time-delay dispersion units are composed of microstrip lines TL1 and TL2, the coupling microstrip lines of the second group of time-delay dispersion units are composed of microstrip lines TL4 and TL5, and the coupling microstrip lines of the third group of time-delay dispersion units are composed of microstrip lines TL6 and TL7. The left port of TL1 is connected to the characteristic impedance Z0, and the right port of TL1 is connected to the left port of microstrip line TL4 through the series microstrip line TL8. The right port of microstrip line TL4 is connected to the left port of microstrip line T through the series microstrip line T8. L8 connects to the left port of microstrip line TL6, and the right port of TL6 is connected to the characteristic impedance Z0; the left port of TL2 connects to reconfigurable microstrip line TL3, which is connected in series with the first adjustable capacitor C1 and then grounded, and the right port of TL2 is grounded through an adapter cable TL9; the left port of TL5 connects to the second adjustable capacitor C2 connected in series and then grounded, and the right port of TL5 is grounded through an adapter cable TL9; the left port of TL7 connects to the third adjustable capacitor C3 connected in series and then grounded, and the right port of TL7 is grounded through an adapter cable TL9. When the first, second, and third group time delay dispersion units are connected to form a three-frequency large group time delay difference dispersion circuit, the left port of TL1 connected to the characteristic impedance Z0 is the input port ① of this dispersion circuit, and the right port of TL6 connected to the characteristic impedance Z0 is the output port ② of this dispersion circuit.

[0055] By adjusting the coupling distance between the first and second microstrip lines and the length of the coupling microstrip lines in each group delay dispersion unit, as well as the value of the adjustable capacitor, the center frequency and group delay value of each group delay dispersion unit can be adjusted, enabling the dispersion circuit to have the function of large delay difference in multiple frequency bands.

[0056] Figure 3 The diagram shows the layout of the ADS theoretical model of the three-frequency large-group delay difference dispersion circuit in this embodiment. In the first, second, and third group delay dispersion units, the width W2 of TL1, TL4, and TL6 is 16µm, the width W1 of TL2, TL5, and TL7 is 13µm, the length d2 of the adapter TL9 is 32µm, and the adjustable capacitor values ​​C1, C2, and C3 are all 0.3pF. In the first group delay dispersion unit, the length L1 of the coupling microstrip line is 0.55mm, and the coupling spacing S1 is 3µm. The length d1 of the reconfigurable microstrip line TL3 is 34 μm; the length L2 of the coupled microstrip line in the second group of time delay dispersion units is 0.48 mm, and the coupling spacing S2 is 11 μm; the length L3 of the coupled microstrip line in the third group of time delay dispersion units is 0.34 mm, and the coupling spacing S3 is 21 μm; the connecting lines at both ends of the series ports of the first, second, and third groups of time delay dispersion units are symmetrically distributed and have the same length, with the connecting line length L4 being 0.1 mm; the length of the series microstrip line TL8 is 0.1 mm.

[0057] In this embodiment, the parameters of the tri-frequency large group delay difference dispersion circuit after adopting the 180-nm CMOS process are as follows: the substrate thickness is 6.6um, the dielectric constant is 3.76, and the top metal layer is 3.4um. At the same time, the tri-frequency large group delay difference dispersion circuit is composed of a negative group delay circuit and a positive group delay circuit. By connecting the three dispersion circuits, a function with large delay difference in three frequency bands is formed.

[0058] The optimization results of ADS for this circuit size are shown in the table below:

[0059] Table 1. Basic Circuit Parameters and Dimensions

[0060] name unit name unit <![CDATA[C1,C2,C3]]> 0.3pF <![CDATA[S1]]> 3um <![CDATA[L1]]> 0.55mm <![CDATA[S2]]> 11um <![CDATA[L2]]> 0.48mm <![CDATA[S3]]> 21um <![CDATA[L3]]> 0.34mm <![CDATA[W1]]> 16um <![CDATA[L4]]> 0.1mm <![CDATA[W2]]> 13um <![CDATA[d1]]> 34um <![CDATA[d2]]> 32um

[0061] In the microwave and millimeter-wave frequency bands, 24.5 GHz, 26.5 GHz, and 31.5 GHz are important windows for astronomical observation and key frequency bands for water vapor observation. They are of great significance for radio astronomy observation and astrophysical research. Therefore, this embodiment selects the above three frequency bands as the operating frequency bands of the three-frequency large group time delay difference dispersion circuit. Figure 4 As shown, the three-frequency large group delay difference dispersion circuit achieves group delay values ​​of approximately -3.1ns, 1.8ns, and 6.7ns in the three frequency bands of 24.5GHz±0.1GHz, 26.5GHz±0.1GHz, and 31.5GHz±0.1GHz, respectively, with a group delay difference of approximately 9.8ns, laying a theoretical and practical foundation for realizing millimeter-wave spectral analysis.

[0062] In summary, the three-frequency large group delay difference dispersion circuit of this embodiment achieves the characteristics of large delay difference across three frequencies. It also features a simple circuit structure, small size, good port matching, and adjustable frequency bands. The group delay difference reaches approximately 9.8 ns, laying a theoretical and practical foundation for realizing millimeter-wave dispersive spectroscopy analysis.

[0063] Example 2

[0064] This embodiment provides a control method for a three-frequency large-group time-delay difference dispersion circuit, specifically including the following control strategies:

[0065] like Figure 5 As shown, by adjusting the length L1 of the coupling microstrip line of the first group delay dispersion circuit, the center frequency and group delay value of the negative group delay dispersion circuit can be changed, while the center frequency and group delay value of the other positive group delay dispersion circuits are less affected. When the value of L1 increases from 0.45mm to 0.65mm, the center frequency of the corresponding negative group delay dispersion circuit changes from 27.05GHz to 22.52GHz, and the group delay value changes from -2.36ns to -3.4ns.

[0066] like Figure 6As shown, by adjusting the value of the first adjustable capacitor C1 in the first group delay dispersion circuit, the center frequency and group delay value of the negative group delay dispersion circuit can be changed, while the center frequency and group delay value of the other positive group delay dispersion circuits are less affected. When the value of C1 increases from 0.2pF to 0.4pF, the center frequency of the corresponding negative group delay dispersion circuit changes significantly, from 29.42GHz to 21.44GHz, while the group delay value changes less, from -3.07ns to -3.3ns.

[0067] like Figure 7 As shown, adjusting the length d1 of the reconfigurable microstrip line TL3 of the first group delay dispersion circuit can change the center frequency and group delay value of the negative group delay dispersion circuit, while the center frequency and group delay value of the other positive group delay dispersion circuits are less affected. When the value of d1 increases from 14µm to 54µm, the center frequency of the corresponding negative group delay dispersion circuit changes little, from 25.02GHz to 24.02GHz, while the group delay value changes significantly, from -7.73ns to -1.97ns.

[0068] like Figure 8 As shown, by adjusting the length L3 of the coupling microstrip line of the third group delay dispersion circuit, the center frequency and group delay value of the third group delay dispersion circuit can be changed, while the center frequency and group delay value of other group delay dispersion circuits are less affected. When the value of L3 increases from 26µm to 42µm, the center frequency of the corresponding negative group delay dispersion circuit changes from 36.07GHz to 28.2GHz, and the group delay value changes only slightly, from 7.87ns to 8.03ns.

[0069] like Figure 9 As shown, by adjusting the value of the third adjustable capacitor C3 in the third group delay dispersion circuit, the center frequency and group delay value of the third group delay dispersion circuit can be changed, while the center frequency and group delay value of other group delay dispersion circuits are less affected. When the value of C3 increases from 0.2pF to 0.4pF, the center frequency of the corresponding positive group delay dispersion circuit changes significantly, from 37.99GHz to 27.39GHz, and the group delay value also changes significantly, from 5.03ns to 9.34ns.

[0070] The embodiments of the present invention have been described above with reference to the accompanying drawings. However, the present invention is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of the present invention without departing from the spirit and scope of the claims. All of these forms are within the protection scope of the present invention.

Claims

1. A three-frequency large population time-delayed differential dispersion circuit, characterized by, The dispersion circuit comprises at least three cascaded group delay dispersion units integrated based on a CMOS process; wherein the cascaded group delay dispersion units comprise positive group delay dispersion units and negative group delay dispersion units; The positive group delay dispersion unit comprises a coupled microstrip line and an adjustable capacitor; The coupled microstrip line comprises at least two coupled microstrip lines, has at least four ports, and one port is grounded, and a coupling interval exists between the two coupled microstrip lines; The adjustable capacitor is connected between the non-grounded port of the coupled microstrip line and the ground; The group delay dispersion units are connected in series through two ports in the respective coupled microstrip lines, and a series microstrip line is connected between the two series ports; The negative group delay dispersion unit further comprises a reconfigurable microstrip line connected in series between the adjustable capacitor and the non-grounded port connected to the adjustable capacitor; The lengths of the coupled microstrip lines, the coupling intervals and the values of the adjustable capacitors of the cascaded group delay dispersion units are independently set to generate three resonance peaks with different center frequencies and group delay differences in the required frequency range. The dispersion circuit comprises a first group delay dispersion unit, a second group delay dispersion unit and a third group delay dispersion unit connected in series; The first group delay dispersion unit is a negative group delay dispersion unit, and the second group delay dispersion unit and the third group delay dispersion unit are positive group delay dispersion units; Each group delay dispersion unit has a first microstrip line and a second microstrip line coupled in the coupled microstrip line; The width of the first microstrip line in each group delay dispersion unit is 16 um, the width of the second microstrip line is 13 um, and the value of the adjustable capacitor is 0.3 pF. The length of the coupled microstrip line in the first group delay dispersion unit is 0.55 mm, the coupling interval is 3 um, and the length of the reconfigurable microstrip line is 34 um.

2. The tri-frequency bulk delay difference dispersion circuit of claim 1, wherein, The length of the coupled microstrip line in the second group delay dispersion unit is 0.48 mm, and the coupling interval is 11 um.

3. The tri-frequency bulk delay difference dispersion circuit of claim 1, wherein, The length of the coupled microstrip line in the third group delay dispersion unit is 0.34 mm, and the coupling interval is 21 um.

4. The tri-frequency bulk delay difference dispersion circuit of claim 1, wherein, The connection lines between the two series ports of each group delay dispersion unit are symmetrically distributed and have the same length, and the length of the connection line is 0.1 mm.

5. The tri-frequency bulk delay difference dispersion circuit of claim 1, wherein, The length of the series microstrip line between the group delay dispersion units is 0.1 mm.

6. The tri-frequency bulk delay difference dispersion circuit of claim 1, wherein, The required frequency bands of the dispersion circuit are 24.5 GHz, 26.5 GHz and 31.5 GHz, respectively.

7. The tri-frequency bulk delay difference dispersion circuit of claim 1, wherein, The lengths of the coupled microstrip lines, the coupling intervals and the values of the adjustable capacitors of the group delay dispersion units are independently set according to the required frequency bands, so that the group delay dispersion units generate resonance peaks with different center frequencies and opposite group delay signs in the required frequency bands.

8. A control method applied to the three-frequency large group time delay difference dispersion circuit according to any one of claims 1-7, characterized in that, The group delay dispersion units with completed parameter configuration are connected in series through the series microstrip line in the predetermined order, so that the dispersion circuit realizes three frequency bands, large group delay difference and dispersion adjustable output on the same chip. The lengths of the coupled microstrip lines and the values of the adjustable capacitors are set according to the linear relationship between the center frequency of the group delay unit and the corresponding coupled microstrip line length and adjustable capacitor value; wherein the linear relationship includes that the center frequency of the group delay unit decreases with the increase of the corresponding coupled microstrip line length and the corresponding adjustable capacitor value. ​ 9. The control method according to claim 8, characterized by ​ ​

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