Buck circuit parallel current-sharing current detection method and Buck circuit parallel current-sharing current detection circuit

Abstract

The invention provides a Buck circuit parallel current-sharing current detection method and circuit, and relates to the field of current detection. The method comprises the following steps: collecting current data of a freewheeling tube, and processing the current data through a conditioning circuit to obtain a conditioning signal; synchronously shunting the conditioning signal into a smoothing circuit and an analog-to-digital converter, and respectively outputting an average current signal and an original digital current signal; performing digital domain processing on the average current signal and the original digital current signal through a fusion algorithm, and reconstructing a voltage signal instantaneously equivalent to inductive current; and performing current sharing control on the Buck circuit parallel system based on the voltage signal instantaneously equivalent to the inductive current. The technical problems of high isolation sampling cost, large mutual inductor size, large parasitic parameter influence and dynamic response lag are solved.

Description

Technical Field

[0001] This application relates to the field of current detection, and more particularly to a method and circuit for detecting current sharing in a Buck circuit. Background Technology

[0002] In wide-range output power supply applications, multiple Buck circuits are typically connected in parallel to achieve high power or high current output. To achieve power sharing, parallel current sharing circuits are usually required. Parallel current sharing control requires sampling the output current and dynamically controlling the output current of each power source to achieve power sharing. Since Buck circuits are non-isolated topologies, when the outputs are directly connected in parallel, the negative current at the output terminal is the total current, making it impossible to directly sample the current of each Buck circuit from the negative terminal. Existing inductor current or output current sampling methods typically require isolated sampling of each current source. For example, Hall effect sensors or high-side current detection chips can be used to directly sample inductor current or output current, but this incurs high overall circuit costs. Using current transformers to isolate the current of the switching transistors is problematic because the transformers are large and increase parasitic inductance, leading to increased voltage stress on the devices under high di / dt conditions. Furthermore, the transformers require magnetic reset every cycle, thus limiting the maximum duty cycle. Summary of the Invention

[0003] This application provides a method and circuit for detecting current sharing in parallel Buck circuits, which solves the technical problems of high cost of isolation sampling, large size of current transformers, large influence of parasitic parameters, and lag in dynamic response in the prior art.

[0004] To achieve the above objectives, this application adopts the following technical solution: In a first aspect, a method for detecting current sharing in a parallel Buck circuit includes: acquiring freewheeling diode current data, processing it through a conditioning circuit to obtain a conditioning signal; synchronously splitting the conditioning signal to a smoothing circuit and an analog-to-digital converter to output an average current signal and a raw digital current signal, respectively; performing digital domain processing on the average current signal and the raw digital current signal through a fusion algorithm to reconstruct a voltage signal that is instantaneously equivalent to inductor current; and performing current sharing control on the parallel Buck circuit system based on the voltage signal that is instantaneously equivalent to inductor current.

[0005] Based on the above technical solution, in the Buck circuit parallel current sharing detection method provided in this application, a hybrid analog and digital architecture is used to integrate freewheeling tube current sampling, signal conditioning, analog smoothing circuit and ADC dual-channel synchronous sampling. This allows the current sharing circuit to be detected by simply collecting and conditioning the data from the freewheeling tube. At the same time, the digital intelligent fusion algorithm dynamically compensates for the phase delay and system error caused by pure analog smoothing. This effectively overcomes the technical pain points of high cost of isolated sampling, large size of current transformer, large influence of parasitic parameters and lag in dynamic response in traditional Buck circuit parallel current sharing, thereby achieving low cost, small size, high precision and fast response current sharing control.

[0006] In conjunction with the first aspect mentioned above, in one possible implementation, the process of synchronously splitting the conditioning signal to the smoothing circuit and the analog-to-digital converter (ADC) to output the average current signal and the original digital current signal respectively includes: constructing a dual-layer independent processing architecture, which includes a smoothing circuit layer and an ADC layer; the smoothing circuit layer classifies the conditioning signal based on the on and off states of the freewheeling diode, and fuses the signals to generate a voltage signal based on the classification results, entering tracking mode in the on state and signal holding in the off state; the ADC layer includes channel one and channel two, where channel one obtains the original pulse signal CH1 based on the conditioning signal, and channel two generates the average current signal CH2 based on the voltage signal output by the smoothing circuit layer.

[0007] In conjunction with the first aspect mentioned above, one possible implementation also includes a state prediction model: the state prediction model, based on the freewheeling diode drive signal and the voltage signal that is equivalent to the inductor current at instantaneous intervals, predicts the inductor current data of each Buck circuit in the future multiple switching cycles through a multi-cycle prediction algorithm; the predicted inductor current value is input into the current sharing controller to adjust the duty cycle of the switching transistors of each Buck circuit, which is used to perform advance current sharing control on multiple circuits.

[0008] In conjunction with the first aspect mentioned above, in one possible implementation, the process of calibrating the detection and control model using a voltage signal that is instantaneously equivalent to inductor current specifically includes: acquiring the sampling nodes of key components in the sampling resistor and signal conditioning circuit, and collecting real-time temperature data of the sampling nodes; constructing a temperature-voltage correspondence table, and embedding the expected values ​​of the voltage signal that is instantaneously equivalent to inductor current at different temperatures; calculating the voltage deviation between the voltage signal that is instantaneously equivalent to inductor current and the expected voltage value corresponding to the current temperature in the temperature-voltage correspondence table, and adaptively adjusting the inductance parameters of the state prediction model using a proportional-integral algorithm.

[0009] In conjunction with the first aspect mentioned above, in one possible implementation, the process of the state prediction model performing current sharing control on multiple circuits specifically includes: calculating the current current deviation and the predicted current deviation, and generating a comprehensive deviation signal through weighted fusion; feeding the comprehensive deviation signal back to the current sharing controller to generate a duty cycle adjustment command.

[0010] Secondly, a Buck circuit parallel current sharing detection circuit is provided, comprising: a current sampling module, including a sampling resistor Rsns connected to a freewheeling diode to form a current path, used to collect freewheeling diode current data and convert it into a microvolt-level voltage signal; a signal conditioning module, including an operational amplifier OPA, resistors, and capacitors, connected to the current sampling module, used to amplify and filter the microvolt-level voltage signal to obtain a conditioned signal; a signal splitting module, connected to the signal conditioning module, and using a PCB splitter or a voltage divider network at the output of the operational amplifier for hardware splitting, used to synchronously split the conditioned signal to a smoothing module and an analog-to-digital conversion module; and a smoothing module, including a resistor Rf, a freewheeling diode, and a capacitor. A smoothing circuit consisting of a switch Qf controlled by drive signal G2 and a capacitor Cf is connected to the signal shunting module and outputs an average current signal. An analog-to-digital converter (ADC) module, including a dual-channel synchronous sampling ADC, is used to convert the shunted signal into a raw digital current signal. A digital processing module, connected to the smoothing module and the ADC module, is used to perform digital domain processing on the average current signal and the raw digital current signal using a fusion algorithm to reconstruct a voltage signal that is instantaneously equivalent to inductor current. A current sharing control module, connected to the digital processing module, is used to generate a duty cycle adjustment command based on the voltage signal that is instantaneously equivalent to inductor current, and to perform current sharing control on the Buck circuit parallel system.

[0011] In conjunction with the second aspect mentioned above, in one possible implementation, the signal splitting module, smoothing module, and analog-to-digital converter module are constructed as a two-layer independent processing architecture. The two-layer independent processing architecture includes a smoothing circuit layer and an analog-to-digital converter layer: the smoothing circuit layer classifies the conditioning signal based on the on and off states of the freewheeling diode: in the on state, the switch Qf is closed, the resistor Rf and the capacitor Cf form an RC low-pass filter circuit, the capacitor Cf is charged, and the output tracking mode voltage signal is output; in the off state, the switch Qf is open, the capacitor Cf maintains the voltage, and the output signal maintains the mode voltage signal; the analog-to-digital converter layer has two channels for the analog-to-digital converter ADC, namely channel one and channel two. Channel one obtains the original pulse signal CH1 based on the conditioning signal, and channel two generates the average current signal CH2 based on the voltage signal output by the smoothing circuit layer.

[0012] In conjunction with the second aspect above, one possible implementation also includes a state prediction module connected to the digital processing module and the current sharing control module. The state prediction module receives the freewheeling diode drive signal G2, the instantaneous voltage signal equivalent to the inductor current from the digital processing module, and the input voltage Vin and output voltage Vout sampled by the analog-to-digital conversion module. It processes the input data through a multi-cycle prediction algorithm to predict the inductor current data of each Buck circuit in multiple future switching cycles and feeds it back to the current sharing control module for adjusting the duty cycle of the switching transistor in advance to perform current sharing control on multiple circuits in advance.

[0013] In conjunction with the second aspect above, in one possible implementation, the feature is that it further includes a temperature compensation module, which is connected to the current sampling module and the signal conditioning module: the temperature compensation module collects real-time temperature data of the sampling node through the sampling resistor Rsns and the operational amplifier OPA; constructs a temperature-voltage correspondence table and embeds the expected values ​​of the voltage signals that are instantaneously equivalent to inductor currents at different temperatures; calculates the voltage deviation between the real-time voltage signal and the expected value, and adaptively adjusts the inductance parameter L of the state prediction module through a proportional-integral algorithm, and outputs the calibrated inductance parameter to the state prediction module.

[0014] In conjunction with the second aspect above, one possible implementation also includes a communication unit and a processing unit; the communication unit is used to communicate with a host computer or other Buck circuit modules to transmit current data, status information and current sharing control commands; the processing unit is used to execute the fusion algorithm of the digital processing module and the multi-cycle prediction algorithm of the status prediction module, and coordinate the data of the current sampling module, the signal conditioning module and the temperature compensation module.

[0015] This application provides a method and circuit for detecting current sharing in parallel Buck circuits. It integrates freewheeling diode current sampling, signal conditioning, analog smoothing circuit, and dual-channel synchronous sampling of ADC through a hybrid analog and digital architecture. This allows the current sharing circuit to be detected simply by collecting and conditioning the data from the freewheeling diode. At the same time, it uses a digital intelligent fusion algorithm to dynamically compensate for the phase delay and system error caused by pure analog smoothing. This effectively overcomes the technical pain points of traditional Buck circuit parallel current sharing, such as high cost of isolated sampling, large size of current transformer, large influence of parasitic parameters, and lag in dynamic response. Thus, it achieves low-cost, small-size, high-precision, and fast-response current sharing control.

[0016] It should be understood that the descriptions of technical features, technical solutions, beneficial effects, or similar language in this application do not imply that all features and advantages can be achieved in any single embodiment. Rather, it is understood that the description of a feature or beneficial effect means that a specific technical feature, technical solution, or beneficial effect is included in at least one embodiment. Therefore, the descriptions of technical features, technical solutions, or beneficial effects in this specification do not necessarily refer to the same embodiment. Furthermore, the technical features, technical solutions, and beneficial effects described in this embodiment can be combined in any suitable manner. Those skilled in the art will understand that embodiments can be implemented without one or more specific technical features, technical solutions, or beneficial effects of a particular embodiment. In other embodiments, additional technical features and beneficial effects may be identified in specific embodiments that do not embody all embodiments. Attached Figure Description

[0017] Figure 1 A system architecture diagram of a parallel current sharing detection method for Buck circuits provided in this application embodiment; Figure 2 A schematic flowchart illustrating a method for detecting current sharing in a parallel Buck circuit, provided in an embodiment of this application; Figure 3 A typical timing and waveform diagram of parallel current sharing sampling in a Buck circuit parallel current sharing detection method provided in an embodiment of this application; Figure 4 This is an actual working waveform diagram of the parallel current sharing sampling circuit in a Buck circuit parallel current sharing detection method provided in an embodiment of this application; Figure 5 A partially enlarged view of the actual working waveform of the parallel current sharing sampling circuit of a Buck circuit parallel current sharing detection method provided in the embodiments of this application; Figure 6 A schematic flowchart illustrating a method for detecting current sharing in a parallel Buck circuit, provided in an embodiment of this application; Figure 7 A flowchart illustrating a method for detecting current sharing in a parallel Buck circuit, as provided in this application embodiment. Figure 8 A flowchart illustrating a method for detecting current sharing in a parallel Buck circuit, as provided in this application embodiment. Figure 9 A schematic flowchart illustrating a method for detecting current sharing in a parallel Buck circuit, provided in an embodiment of this application; Figure 10 A schematic diagram of a Buck circuit parallel current sharing detection circuit provided in an embodiment of this application; Figure 11A schematic diagram of a Buck circuit parallel current sharing detection circuit provided in an embodiment of this application; Figure 12 This is a schematic diagram of the hardware structure of a Buck circuit parallel current sharing detection circuit provided in an embodiment of this application.

[0018] In the diagram: G1, switch drive signal; G2, freewheeling drive signal; iL, actual inductor current waveform; iQ2, freewheeling current waveform; iLavg, average current signal CH2; Vin, input power supply; Co, output filter capacitor; Rload, output load; Rsns, freewheeling current; Q1, first switch; Q2, first freewheeling; L, first inductor; Q3, second switch; Q4, second freewheeling; L2, second inductor; OPA, operational amplifier; R1-R4, resistors; C1-C2, capacitors. Detailed Implementation

[0019] In the description of this application, unless otherwise stated, "" means "or," for example, A / B can mean A or B. "And / or" in this document is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, and B alone. Furthermore, "at least one" means one or more, and "multiple" means two or more. The words "first," "second," etc., do not limit the quantity or order of execution, and "first," "second," etc., do not necessarily imply differences.

[0020] It should be noted that, in this application, the terms "exemplary" or "for example" are used to indicate that something is being described as an example, illustration, or illustration. Any embodiment or design described as "exemplary" or "for example" in this application should not be construed as being more preferred or advantageous than other embodiments or design solutions. Specifically, the use of terms such as "exemplary" or "for example" is intended to present the relevant concepts in a concrete manner.

[0021] To address the challenges of using existing technologies in wide-range output power supply applications where multiple Buck circuits are connected in parallel to achieve high power or high current output, it is necessary to sample the output current to dynamically control the output current of each power supply to achieve power distribution. However, because Buck circuits are non-isolated topologies, when their outputs are directly connected in parallel, the negative current at the output terminal is the total current, making it impossible to directly sample the current of each Buck circuit from the negative terminal. Therefore, isolated sampling methods must be used, such as directly sampling the inductor current or output current through Hall sensors or high-side current detection chips, resulting in high overall circuit costs. Using current transformers to isolate and sample the current of the switching transistors results in large transformers, increases parasitic inductance in the circuit, and increases voltage stress on devices under high di / dt conditions. Furthermore, current transformers require magnetic switching every cycle. Reset causes limitations on the maximum duty cycle. Furthermore, there are technical problems such as significant parasitic parameter influence and lag in dynamic response. This application provides a method for detecting current sharing in parallel Buck circuits. This method integrates freewheeling diode current sampling, signal conditioning, analog smoothing circuitry, and dual-channel synchronous sampling of an ADC through a hybrid analog-digital architecture. This allows for the detection of the current sharing circuit by collecting and conditioning data from the freewheeling diode. Simultaneously, a digital intelligent fusion algorithm dynamically compensates for phase delay and system errors caused by pure analog smoothing. This effectively overcomes the technical pain points of traditional parallel Buck circuit current sharing, such as high cost of isolated sampling, large transformer size, significant parasitic parameter influence, and lag in dynamic response. Thus, it achieves low-cost, small-size, high-precision, and fast-response current sharing control.

[0022] like Figure 1 As shown in the embodiment of this application, a method for detecting the parallel current sharing of a Buck circuit includes: Step 101: Collect the freewheeling diode current data and process it through the conditioning circuit to obtain the conditioning signal.

[0023] The signal conditioning circuit consists of an operational amplifier (OPA) and external resistors R1, R2, R3, R4 and capacitors C1 and C2. It uses analog circuit design to amplify the signal and perform low-pass filtering, ensuring that the signal is not distorted during amplification while maintaining sufficient bandwidth to track the dynamic changes in the switching frequency.

[0024] In some implementations, the current of the freewheeling diode is first acquired in real time through the sampling resistor Rsns to generate a microvolt-level voltage signal. This microvolt-level voltage signal is then amplified and filtered by a signal conditioning circuit composed of an operational amplifier (OPA) and external resistors and capacitors to obtain a conditioned signal. The amplification factor of this conditioned signal is set by the ratio of R1 and R2, and the cutoff frequency is configured to be 10-50 times the switching frequency to reduce distortion.

[0025] Step 102: Synchronously split the conditioning signal into the smoothing circuit and the analog-to-digital converter to output the average current signal and the original digital current signal, respectively.

[0026] The smoothing circuit refers to an analog circuit composed of a resistor Rf, a switching transistor Qf, and a capacitor Cf. The switching transistor Qf is controlled by a freewheeling diode drive signal, enabling signal tracking and holding. The values ​​of the resistor Rf and capacitor Cf in the smoothing circuit must match the switching frequency to effectively prevent over-smoothing from causing dynamic response lag. The analog-to-digital converter (ADC) can use a synchronous sampling chip, such as the ADS8556; the digital controller can be a microprocessor such as the STM32F4 series. During operation, the ADC's sampling rate should be at least 10 times higher than the switching frequency to ensure signal integrity.

[0027] In some implementations, the smoothing circuit and the analog-to-digital converter (ADC) form a two-layer independent processing architecture. The conditioning signal is simultaneously input to the smoothing circuit layer and the ADC layer. During the freewheeling diode's conduction period, the smoothing circuit layer controls the switch Qf to close and charge the capacitor Cf; or during the turn-off period, it controls the switch Qf to open, maintaining the voltage of capacitor Cf. This is combined with the stable average current signal CH2 output by the ADC layer. The ADC layer then directly samples the generated original pulse signal CH1 using the configured ADC, triggered by the freewheeling diode drive signal G2. The two-layer independent processing architecture then simultaneously inputs the generated original pulse signal CH1 and the average current signal CH2 into the fusion algorithm.

[0028] It should be noted that the original pulse signal CH1 is the instantaneous value of the freewheeling current acquired in each switching cycle based on the freewheeling drive signal, and is a high-frequency pulse sequence. Therefore, the analog-to-digital converter layer can use a digital current reconstruction algorithm for calibration and reconstruction, accurately calculating the true average value and ripple of the inductor current, thus improving its detection accuracy. The average current signal CH2, on the other hand, is a relatively stable DC voltage obtained in each switching cycle based on the freewheeling drive signal after analog smoothing. It directly corresponds to the average value of the inductor current estimated in the original scheme and is used for loop control, thereby achieving rapid feedback and response, maintaining extremely low latency, and ensuring its basic stability.

[0029] For example, when the load suddenly increases, the output voltage Vout will drop slightly. At this time, the digital controller can acquire the original signal of the freewheeling tube current through ADCCH1 and display the instantaneous value as it rises. At the same time, the smoothing circuit CH2 outputs the average current signal, which increases slowly.

[0030] Step 103: The average current signal and the original digital current signal are processed in the digital domain by a fusion algorithm to reconstruct the voltage signal that is instantaneously equivalent to the inductor current.

[0031] The fusion algorithm refers to a software routine running in the digital controller that reconstructs the inductor current by comparing the average current signal and the original current signal. During its operation, the fusion algorithm can quickly identify differences and use the model to predict that the inductor current will rise excessively in the next cycle. It then reduces the duty cycle of the switching transistor in advance, allowing the current to quickly stabilize to the target value and avoiding the oscillation problem of traditional methods.

[0032] In some implementations, the average current signal CH2 and the original digital current signal CH1 are input into the digital domain, allowing the controller to read the average current signal CH2 and the original digital current signal CH1. Based on the Buck circuit model, the instantaneous inductor current can be calculated using the original pulse signal CH1. The difference between CH1 and the average current signal CH2 can then be used to dynamically calibrate the phase delay and gain error of the smoothing circuit, and output a reconstructed instantaneous voltage signal that is equivalent to the inductor current.

[0033] Based on the Buck circuit model, the steps for calculating the instantaneous inductor current using the original pulse signal CH1 are as follows: The digital controller synchronously reads the original pulse signal CH1 (i.e., the instantaneous sampled value of the freewheeling current iQ2) and the switching timing signals (switching transistor drive signal G1 and freewheeling transistor drive signal G2), and divides the CH1 data into the freewheeling transistor conduction segment (G2 is high level) and the turn-off segment (G2 is low level) according to the G2 signal.

[0034] When the CH1 sample value is directly equal to the instantaneous value of the inductor current, i.e., iL (t) =iQ2 (t) This is denoted as the freewheeling diode conducting segment. During this segment, the inductor current continues through the freewheeling diode, hence the two are the same. Therefore, the current value iL at the end of the conducting segment (t0) is... (t0） Start accumulating points, through Calculate the instantaneous current iL in the turn-off section (t） The integration step size is determined by the ADC sampling interval, and the input voltage Vin and output voltage Vout are obtained through real-time sampling.

[0035] When the original pulse signal CH1 is sampled to zero, and the inductor current is still changing, this is recorded as the off-state. The inductor value L is then preset or calibrated in real-time, and the rate of change of current is calculated. This can be achieved through the inductor voltage equation. Calculate and obtain the inductor voltage V L .

[0036] Finally, by integrating the results of the on and off segments, the instantaneous inductor current for the entire cycle is output.

[0037] Step 104: Perform current sharing control on the parallel Buck circuit system based on the voltage signal that is equivalent to the inductor current at instantaneous moment.

[0038] In some implementations, the instantaneous voltage signal equivalent to the inductor current of each channel is acquired in real time, compared with the current sharing target value set by the system, and the current deviation is calculated. Based on the deviation value, the duty cycle adjustment command is generated through the proportional-integral-derivative (PID) control algorithm. The adjusted duty cycle signal is then applied to the drive circuit of each switching transistor to regulate the current of each channel, so that the current of each channel quickly tends to be consistent when the load changes. The whole process is repeated in each switching cycle to ensure dynamic response speed and stability.

[0039] Based on the above technical solution, by using a hybrid analog and digital architecture, the current sampling of the freewheeling diode, signal conditioning, analog smoothing circuit and dual-channel synchronous sampling of the ADC are integrated. This allows the current sharing circuit to be detected by simply collecting and conditioning the data from the freewheeling diode. At the same time, the phase delay and system error caused by pure analog smoothing are dynamically compensated by a digital intelligent fusion algorithm. This effectively overcomes the technical pain points of high cost of isolated sampling, large size of current transformer, large influence of parasitic parameters and lag in dynamic response in the parallel current sharing of traditional Buck circuits. Thus, low cost, small size, high precision and fast response current sharing control are achieved.

[0040] In one possible implementation of the embodiments of this application, combined with Figure 1 ,like Figure 2 As shown, the conditioning signal is synchronously split into the smoothing circuit and the analog-to-digital converter to output the average current signal and the original digital current signal, respectively. This can be achieved through the following steps 201 to 203, which are explained in detail below: Step 201: Construct a two-layer independent processing architecture, which includes a smoothing circuit layer and an analog-to-digital converter layer.

[0041] In some implementations, the conditioning signal is split into two paths via a hardware signal shunting node (such as a splitter on the PCB or a voltage divider network at the op-amp output). The first path enters a smoothing circuit layer to convert the pulse waveform of the freewheeling diode current into a stable DC voltage signal that is easy to process and can represent the average value of the inductor current. This signal is used for the front-end analog preprocessing and fast response layer of the current sensing system. The second path, an analog-to-digital converter layer, converts the two analog signals into digital signals with high precision and synchronously, and sends them to the digital domain of the microcontroller. This allows the original digital current signal to provide accurate input data for the open-loop current reconstruction module, while the average current signal provides a reference for the fast control loop and state observer.

[0042] Step 202: The smoothing circuit layer classifies the conditioning signal based on the on and off states of the freewheeling diode, and generates a voltage signal by fusing the classification results. The signal enters tracking mode when the freewheeling diode is on and signal holding mode when the freewheeling diode is off.

[0043] In some implementations, the smoothing circuit can directly divide the freewheeling diode into a freewheeling diode conduction period (when the microcontroller sets the freewheeling diode drive signal G2 to a high level) and a freewheeling diode turn-off period (when the microcontroller sets the freewheeling diode drive signal G2 to a low level) based on the state of the freewheeling diode. Then, based on the different states of the two, different operations are performed on the conditioning signal, thereby merging the operation results to obtain a smooth, stable DC voltage signal that can represent the average value of the inductor current.

[0044] During the freewheeling diode's conduction period, resistor Rf and capacitor Cf form a complete RC low-pass filter circuit, directly connected in parallel across capacitor Cf. This allows the conditioning signal (pulse voltage) to charge capacitor Cf through resistor Rf. Essentially, this RC circuit is a first-order low-pass filter: resistor Rf limits the charging current, while capacitor Cf smooths the voltage. High-frequency components of the pulse signal (switching noise and sharp ripple) are effectively bypassed to ground by capacitor Cf, while low-frequency components (the DC component representing the average current) generate a slowly changing voltage across capacitor Cf, achieving the filtering effect. Furthermore, during the freewheeling diode's conduction period, the voltage across capacitor Cf (i.e., the output voltage of the smoothing circuit) tracks the average level of the input pulse signal in real time. If the inductor current increases, the amplitude of the pulse signal increases, capacitor Cf is charged, and the output voltage rises accordingly.

[0045] During the turn-off period of the freewheeling diode, the capacitor Cf is completely disconnected from the preceding circuit path. At this time, the capacitor Cf forms an island. According to the law of conservation of charge, under ideal conditions, the voltage charged across the capacitor Cf at the moment of turn-off will not be released and will be maintained. This allows the output voltage of the smoothing circuit to stabilize at the voltage value at the instant before the freewheeling diode turns off, forming a stable DC plateau period. At this time, the voltage of the DC plateau period corresponds exactly to the average value of the inductor current during the previous conduction phase.

[0046] Step 203: The analog-to-digital converter layer includes channel one and channel two. Channel one obtains the original pulse signal CH1 based on the conditioning signal, and channel two generates the average current signal CH2 based on the voltage signal output by the smoothing circuit layer.

[0047] In some implementations, the microcontroller is triggered by the freewheeling diode's drive signal G2 to perform multiple samplings during the freewheeling diode's conduction period, thereby capturing the complete current waveform. At the same sampling clock edge, the internal sample-and-hold circuit of the analog-to-digital converter (ADC) simultaneously captures both channel one (conditioning signal) and channel two (voltage signal output from the smoothing circuit layer). Channel one directly converts the captured voltage data into a digital code, denoted as the original digital current signal CH1, reflecting the instantaneous value of the freewheeling diode current at the sampling moment. Since the freewheeling diode current is a pulse sequence, CH1 is also a series of high and low-level digital sequences, accurately corresponding to the original current ripple and noise. Channel two converts the captured voltage signal output from the smoothing circuit layer into a digital code, denoted as the average current signal CH2.

[0048] It should be noted that voltage capture at the same sampling clock edge ensures that the original pulse signal and the smoothed signal are frozen and ready for conversion at exactly the same moment.

[0049] Based on the above technical solution, by using hardware signal splitting and a dual-channel synchronous sampling structure, the analog smoothing circuit and digital sampling path are integrated in parallel, solving the problems of high cost and slow response of isolated sampling in traditional current sharing detection. At the same time, the smoothing circuit provides a fast response path, while the analog-to-digital converter provides a high-precision path. By using a digital domain fusion algorithm to achieve signal complementarity, the accuracy and dynamic performance of current detection can be improved while reducing costs, making it more suitable for high power density power supply systems. In addition, synchronous sampling and synchronous control of drive signals also ensure data consistency and enhance the reliability and adaptability of the system.

[0050] In one possible implementation of this application embodiment, the state prediction model can be implemented through the following steps 301 to 302, which are described in detail below: Step 301: The state prediction model, based on the freewheeling diode drive signal and the voltage signal that is equivalent to the inductor current at instantaneous moment, predicts the inductor current data of each Buck circuit in multiple future switching cycles through a multi-cycle prediction algorithm.

[0051] The state prediction model refers to a software module that uses mathematical algorithms to predict future current values. The multi-cycle prediction algorithm is a calculation method based on state-space equations, capable of predicting current data after multiple switching cycles. A switching cycle refers to a complete unit of time for the Buck circuit's switching transistor to turn on and off. The state-space equations are mathematical models describing the circuit's dynamics, and their variables include inductor current and output voltage.

[0052] In some implementations, the inductance value L and capacitance value C are obtained through offline calibration, and the input voltage Vin and output voltage Vout are directly measured by sensors to obtain the drive signal of the microcontroller and the load resistance Rload in the circuit. This completes the initialization of the state space equation in the state prediction model. The actual data from the open-loop current reconstruction module is continuously received and compared with the current value calculated by the internal equation of the observer. The coefficient matrix is ​​dynamically fine-tuned by the difference (error) between the two to achieve adaptive calibration of the model. This overcomes the model mismatch problem caused by component aging and temperature drift. The fine-tuning coefficient matrices A and B are based on the inductance L, capacitance C, load Rload and switching frequency in the circuit.

[0053] At the start of each switching cycle, the observer acquires the current state vector X[k] (including the average current signal, the original digital current signal, and the voltage signal that is instantaneously equivalent to the inductor current) and the input vector U[k] (including the input voltage sampled by the analog-to-digital converter ADC and the duty cycle of the current switching cycle) at the k-th sampling time, and then substitutes them into the discrete state equation. This allows us to calculate the predicted inductor current value X[k] for the next N cycles.

[0054] Step 302: Input the predicted inductor current value into the current sharing controller and adjust the duty cycle of the switching transistors of each Buck circuit to perform advance current sharing control on multiple circuits.

[0055] In some implementations, the predicted inductor current for the next N periods is divided into short-term predicted values ​​(e.g., for the next 1 period) and medium-term predicted values ​​(e.g., for the next 5 periods).

[0056] The current sharing controller receives predicted values ​​and compares the future current deviations of each Buck circuit. If a current deviation from the current sharing target is predicted in the first future cycle, a control PWM signal is generated to immediately adjust the duty cycle of that switch for rapid compensation. If a cumulative deviation is predicted in the fifth future cycle, a PWM signal is generated to synchronously fine-tune the duty cycle of all circuits, achieving medium- to long-term balance. Finally, the current sharing controller transmits the PWM signal to the switch driver circuit to complete closed-loop control and repeats the entire process in each switching cycle to ensure real-time performance.

[0057] Based on the above technical solution, by using the state prediction model and multi-cycle prediction algorithm, the future multi-cycle current can be predicted using the driving signal and instantaneous current data, thereby achieving advance control, which improves the dynamic response speed and stability of the system and solves the problems of slow response and low accuracy caused by detection delay in traditional current sharing control.

[0058] In one possible implementation of this application embodiment, calibrating the detection control model using a voltage signal that is instantaneously equivalent to inductor current can be achieved through the following steps 401 to 403, which are described in detail below: Step 401: Obtain the sampling nodes of the sampling resistor and key components in the signal conditioning circuit, and collect the real-time temperature data of the sampling nodes.

[0059] Among them, the sampling node refers to the physical location of the current sampling resistor and the operational amplifier in the signal conditioning circuit, and the temperature sensor can be the DS18B20 digital temperature sensor integrated on the PCB.

[0060] In some implementations, in a Buck circuit system, a temperature sensor (such as a DS18B20) is mounted near the sampling resistor and next to the conditioning circuit op-amp, and temperature data is acquired in real time through the microcontroller's ADC channel three, synchronized with the voltage acquisition cycle.

[0061] It should be noted that the temperature sensors at the sampling nodes should be placed close to the heating elements to reduce measurement delay. In scenarios where the ambient temperature changes drastically (such as industrial power supplies), the temperature acquisition frequency needs to be increased to more than a thousand times per second.

[0062] Step 402: Construct a temperature-voltage correspondence table and embed the expected values ​​of the voltage signals that are instantaneously equivalent to inductor currents at different temperatures.

[0063] In some implementations, the reference temperature T is obtained through initial experimental calibration. ref The reference voltage value V base Simultaneously, based on the component datasheet or actual measurements, the fitted temperature coefficient α is obtained. Offline calibration is performed at startup. The Buck circuit system is placed in a temperature-controlled chamber, and the chamber temperature is set to vary in steps (e.g., every 10°C) from the minimum operating temperature (e.g., -40°C) to the maximum operating temperature (e.g., 125°C). After stabilization at each temperature point, the instantaneous voltage signal equivalent to the inductor current at the sampling node (denoted as V) is measured using a high-precision multimeter. meas ), then the formula can be used Calculate the expected value V at the current temperature T. exp (T) can be used to correlate temperature T with the expected voltage value V. exp The mapping relationship of (T) is stored as a lookup table, namely the temperature-voltage correspondence table, and is stored in the microcontroller's non-volatile memory (such as FLASH) in the form of an array, where each entry contains the temperature value and the corresponding expected voltage value.

[0064] The microcontroller synchronously acquires temperature data (via ADC channel three) and instantaneous equivalent voltage signal in each switching cycle, and then... Calculate the current deviation ΔV. If the deviation ΔV continues to exceed a threshold (e.g., 5%), trigger the online learning algorithm: allow the system to record the measured voltage at multiple temperature points under steady-state load conditions, and update V using the sliding window averaging method. base The temperature coefficient α is calculated, and a temperature-voltage correspondence table is regenerated. The online learning cycle can be set to once a month or adaptively adjusted according to the frequency of temperature changes to ensure that the data always reflects the current system status.

[0065] Step 403: Calculate the voltage deviation between the instantaneous equivalent voltage signal (inductor current) and the expected voltage value corresponding to the current temperature in the temperature-voltage correspondence table, and adaptively adjust the inductor parameters of the state prediction model using the proportional-integral algorithm.

[0066] In some implementations, the microcontroller synchronously acquires temperature data (via ADC channel three) and instantaneous equivalent voltage signal in each switching cycle, and obtains the adjustable gain K. p and K i You can pass Calculate the current deviation ΔV, and then the deviation ΔV and the current inductance parameter L can be directly compared. est，old The state prediction model is analyzed using the proportional-integral algorithm. The adjusted inductance parameter L is obtained. est，new The feedback is then sent to the current sharing controller to dynamically adjust the duty cycle of the switching transistors in each Buck circuit.

[0067] For example, in a two-way Buck parallel system, if the input voltage is 12V, the output is 5V, and the switching frequency is 100kHz, when the ambient temperature rises from 25°C to 85°C, the sampling resistor value increases with temperature, causing the measured value of the instantaneous equivalent voltage signal to decrease. Therefore, the temperature change can be detected by a temperature sensor, and by consulting a temperature-voltage correspondence table, it can be found that the expected voltage should decrease by 5%. If the measured deviation shows a voltage decrease of 7%, the inductance parameter of the state prediction model can be lowered by 2%, thereby correcting the predicted current value. This allows the current sharing controller to increase its duty cycle in advance, avoiding the expansion of current sharing error due to temperature drift and improving the measured current sharing accuracy.

[0068] Based on the above technical solution, by introducing a temperature-voltage correspondence table to directly correlate temperature variables with current sampling signals, a closed-loop architecture of acquisition, correspondence table establishment, and calibration can be constructed. This allows the temperature acquisition layer to provide environmental parameters, the correspondence table layer to perform data mapping, and the calibration layer to complete adaptive adjustment of model parameters. This solves the problem of decreased current sharing accuracy caused by temperature drift in traditional methods, improves the stability and reliability of the system over a wide temperature range, and reduces the need for external calibration and maintenance costs through synchronous acquisition and real-time calibration.

[0069] In one possible implementation of this application embodiment, the state prediction model performs current sharing control on multiple circuits through the following steps 501 to 502, which are described in detail below: Step 501: Calculate the current current deviation and the predicted current deviation, and generate a comprehensive deviation signal by weighted fusion.

[0070] In some implementations, the target current value for current sharing is calculated in real time based on the total load current and the number of circuits. The difference between the voltage signal, which is instantaneously equivalent to the inductor current, and the target current value is calculated and denoted as the current deviation ΔI. current Simultaneously calculate the difference between the predicted inductor current and the target current value, denoted as the predicted current deviation ΔI. pred Based on the preset weight coefficients Y1 and Y2, the weighted fusion formula can be used. The current current deviation and the predicted current deviation are weighted and fused to obtain the comprehensive deviation signal ΔI_fused.

[0071] It should be noted that the weighting coefficients are adjusted according to the dynamic response requirements of the system through an adaptive algorithm based on the inductor current change rate and output voltage ripple. When the change rate is large, the weight of Y2 is increased to emphasize predictive control, and when the ripple is large, the weight of Y1 is increased to strengthen the current control.

[0072] Step 502: Feed back the comprehensive deviation signal to the current equalization controller to generate a duty cycle adjustment command.

[0073] In some implementations, the comprehensive deviation signal is transmitted to the input port of the current sharing controller in voltage or digital form, activating the proportional-integral-derivative (PID) algorithm. The proportional term handles instantaneous deviations, the integral term eliminates steady-state errors, and the derivative term suppresses oscillations. This allows for real-time calculation of the comprehensive deviation signal, generating corresponding control quantities. These control quantities are then converted into duty cycle adjustment commands (i.e., pulse width modulation waveforms), which are applied to the gates of the switching transistors in each Buck circuit via a drive circuit. This dynamically adjusts the on-time, thereby achieving current sharing control for multiple parallel Buck circuits.

[0074] It should be noted that the proportional-integral-derivative (PID) parameters of the current sharing controller should be tuned according to the system switching frequency and load characteristics. For example, in high-frequency applications, the integral time constant should be reduced to avoid overshoot.

[0075] Based on the above technical solution, a weighted fusion algorithm is used to dynamically combine the current and predicted current deviations, solving the technical problems of response delay and insufficient accuracy in traditional current sharing control. Simultaneously, through adaptive adjustment of the weighting coefficients, the system's adaptability to dynamic loads is enhanced, improving the speed and stability of current sharing control. Thus, the overall technical solution optimizes the current sharing performance of multi-parallel systems through digital domain processing, reducing costs while increasing power density.

[0076] The above primarily describes the solutions of the embodiments of this application from the perspective of device implementation. It is understood that each device, such as a Buck circuit parallel current sharing detection circuit, includes at least one of the hardware structures and software modules corresponding to the execution of each function in order to achieve the above-mentioned functions. Those skilled in the art should readily recognize that, based on the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein, this application can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed in hardware or by computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0077] This application embodiment can divide the Buck circuit parallel current sharing detection circuit into functional units according to the above method example. For example, each function can be divided into separate functional units, or two or more functions can be integrated into the same processing unit. The integrated unit can be implemented in hardware or as a software functional unit. It should be noted that the unit division in this application embodiment is illustrative and only represents one logical functional division; other division methods may be used in actual implementation.

[0078] For example, a current sampling module includes a sampling resistor Rsns connected to a freewheeling diode to form a current path, used to collect freewheeling diode current data and convert it into a microvolt-level voltage signal; a signal conditioning module includes an operational amplifier (OPA), resistors, and capacitors, connected to the current sampling module, used to amplify and filter the microvolt-level voltage signal to obtain a conditioned signal; a signal splitting module is connected to the signal conditioning module and performs hardware splitting through a PCB splitter or a voltage divider network at the op-amp output, used to synchronously split the conditioned signal to the smoothing module and the analog-to-digital converter module; the smoothing module includes a resistor Rf and a switching transistor Q controlled by the freewheeling diode drive signal G2. The system consists of a smoothing circuit composed of capacitor f and capacitor Cf, connected to the signal shunting module and outputting an average current signal; an analog-to-digital converter module, including a dual-channel synchronous sampling analog-to-digital converter (ADC), used to convert the shunted signal into the original digital current signal; a digital processing module, connected to the smoothing module and the ADC module, used to perform digital domain processing on the average current signal and the original digital current signal through a fusion algorithm to reconstruct a voltage signal that is instantaneously equivalent to inductor current; and a current sharing control module, connected to the digital processing module, used to generate a duty cycle adjustment command based on the voltage signal that is instantaneously equivalent to inductor current to perform current sharing control on the Buck circuit parallel system.

[0079] In one possible implementation, the Buck circuit in parallel with the current sharing detection circuit is also used to construct the signal shunting module, smoothing module, and analog-to-digital converter module into a two-layer independent processing architecture, which includes a smoothing circuit layer and an analog-to-digital converter layer: The smoothing circuit layer classifies the conditioning signal based on the on and off states of the freewheeling diode: In the on state, the switch Qf is closed, the resistor Rf and the capacitor Cf form an RC low-pass filter circuit, which charges the capacitor Cf and outputs the tracking mode voltage signal; in the off state, the switch Qf is open, the capacitor Cf maintains the voltage, and the output signal maintains the mode voltage signal. The analog-to-digital converter (ADC) layer has two channels: Channel 1 and Channel 2. Channel 1 generates the original pulse signal CH1 based on the conditioning signal, while Channel 2 generates the average current signal CH2 based on the voltage signal output from the smoothing circuit layer.

[0080] In one possible implementation, the Buck circuit parallel current sharing detection circuit also includes a state prediction module, which is connected to the digital processing module and the current sharing control module. The state prediction module receives the freewheeling diode drive signal G2, the instantaneous voltage signal equivalent to the inductor current from the digital processing module, and the input voltage Vin and output voltage Vout sampled by the analog-to-digital conversion module. The input data is processed by a multi-cycle prediction algorithm to predict the inductor current data of each Buck circuit in multiple future switching cycles and feed it back to the current sharing control module. This is used to adjust the duty cycle of the switching transistor in advance to perform current sharing control on multiple circuits in advance.

[0081] In one possible implementation, the Buck circuit parallel current sharing detection circuit also includes a temperature compensation module, which is connected to the current sampling module and the signal conditioning module. The temperature compensation module collects real-time temperature data from the sampling node through the sampling resistor Rsns and the operational amplifier OPA; Construct a temperature-voltage correspondence table and embed the expected values ​​of the voltage signals that are instantaneously equivalent to inductor currents at different temperatures; The voltage deviation between the real-time voltage signal and the expected value is calculated, and the inductance parameter L of the state prediction module is adaptively adjusted using a proportional-integral algorithm. The calibrated inductance parameter is then output to the state prediction module.

[0082] When using integrated units, Figure 11 A possible structural schematic diagram of a Buck circuit parallel current sharing detection circuit (referred to as a Buck circuit parallel current sharing detection circuit 110) involved in the above embodiments is shown. The Buck circuit parallel current sharing detection circuit 110 includes a processing unit 1101 and a communication unit 1102, and may also include a storage unit 1103. Figure 11 The schematic diagram shown can be used to illustrate the structure of a Buck circuit parallel current sharing detection circuit involved in the above embodiments.

[0083] when Figure 11 The schematic diagram shown illustrates the structure of the Buck circuit parallel current sharing detection circuit involved in the above embodiments. The processing unit 1101 is used to control and manage the operation of the Buck circuit parallel current sharing detection circuit, the communication unit 1102 is used for the Buck circuit parallel current sharing detection circuit to communicate with other devices, and the storage unit 1103 is used to store the program code and data of the Buck circuit parallel current sharing detection circuit.

[0084] For example, communication unit 1102 is used to communicate with a host computer or other Buck circuit modules to transmit current data, status information and current sharing control commands; The processing unit 1101 is used to execute the fusion algorithm of the digital processing module and the multi-cycle prediction algorithm of the state prediction module, and to coordinate the data flow of the current sampling module, the signal conditioning module, and the temperature compensation module.

[0085] The processing unit 1101 can be a processor or a controller, and the communication unit 1102 can be a communication interface, transceiver, transceiver circuit, transceiver device, etc. The term "communication interface" is a general term and may include one or more interfaces. The storage unit 1103 can be a memory. When the Buck circuit parallel current sharing detection circuit 110 is a chip, the processing unit 1101 can be a processor or a controller, and the communication unit 1102 can be an input interface and / or an output interface, pins, or circuits, etc. The storage unit 1103 can be a storage unit within the chip (e.g., a register, cache, etc.) or a storage unit located outside the chip (e.g., read-only memory (ROM), random access memory (RAM, etc.)).

[0086] The communication unit can also be called a transceiver unit. The antenna and control circuit with transceiver functions in the Buck circuit parallel current sharing detection circuit 110 can be considered as the communication unit 1102 of the Buck circuit parallel current sharing detection circuit 110, and the processor with processing functions can be considered as the processing unit 1101 of the Buck circuit parallel current sharing detection circuit 110. Optionally, the device in the communication unit 1102 that implements the receiving function can be considered as a communication unit, which is used to execute the receiving steps in the embodiments of this application. The communication unit can be a receiver, a receiver circuit, etc. The device in the communication unit 1102 that implements the transmitting function can be considered as a transmitting unit, which is used to execute the transmitting steps in the embodiments of this application. The transmitting unit can be a transmitter, a transmitter, a transmitting circuit, etc.

[0087] Figure 11 If the integrated units in the process are implemented as software functional modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solutions of the embodiments of this application, in essence, or the parts that contribute to the prior art, or all or part of the technical solutions, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) or processor to execute all or part of the steps of the methods described in the various embodiments of this application. Storage media for storing computer software products include various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory, random access memory, magnetic disks, or optical disks.

[0088] In implementation, each step of the method provided in this embodiment can be completed by integrated logic circuits in the processor or by instructions in software form. The steps of the method disclosed in the embodiments of this application can be directly manifested as being executed by a hardware processor, or being executed by a combination of hardware and software modules in the processor.

[0089] The processor in this application may include, but is not limited to, at least one of the following: a central processing unit (CPU), a microprocessor, a digital signal processor (DSP), a microcontroller unit (MCU), or an artificial intelligence processor, etc., and other computing devices that run software. Each computing device may include one or more cores for executing software instructions to perform calculations or processing. The processor may be a standalone semiconductor chip or integrated with other circuits into a single semiconductor chip. For example, it may form a System-on-a-Chip (SoC) with other circuits (such as encoding / decoding circuits, hardware acceleration circuits, or various bus and interface circuits), or it may be integrated as a built-in processor within an ASIC. The ASIC of this integrated processor may be packaged separately or together with other circuits. In addition to the cores for executing software instructions to perform calculations or processing, the processor may further include necessary hardware accelerators, such as field-programmable gate arrays (FPGAs), programmable logic devices (PLDs), or logic circuits that implement dedicated logic operations.

[0090] The memory in the embodiments of this application may include at least one of the following types: read-only memory (ROM) or other types of static storage devices capable of storing static information and instructions; random access memory (RAM) or other types of dynamic storage devices capable of storing information and instructions; or electrically erasable programmable-only memory (EEPROM). In some scenarios, the memory may also be compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compressed optical discs, laser discs, optical discs, digital universal optical discs, Blu-ray discs, etc.), magnetic disk storage media, or other magnetic storage devices, or any other medium capable of carrying or storing desired program code in the form of instructions or data structures and accessible by a computer, but is not limited thereto.

[0091] In the above embodiments, implementation can be achieved, in whole or in part, through software, hardware, firmware, or any combination thereof. When implemented using software programs, implementation can be, in whole or in part, in the form of a computer program product. This computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of this application are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium accessible to a computer or a data storage device containing one or more servers, data centers, etc., that can be integrated with the medium. The available media can be magnetic media (e.g., floppy disks, hard disks, magnetic tapes), optical media (e.g., DVDs), or semiconductor media (e.g., solid-state drives (SSDs)).

[0092] Although this application has been described herein in conjunction with various embodiments, those skilled in the art, by reviewing the accompanying drawings, the disclosure, and the appended claims, will understand and implement other variations of the disclosed embodiments in carrying out the claimed application. In the claims, the word "comprising" does not exclude other components or steps, and "a" or "an" does not exclude multiple components. A single processor or other unit can implement several functions listed in the claims. While different dependent claims may recite certain measures, this does not mean that these measures cannot be combined to produce good results.

[0093] Although this application has been described in conjunction with specific features and embodiments, it is apparent that various modifications and combinations can be made thereto without departing from the spirit and scope of this application. Accordingly, this specification and drawings are merely illustrative examples of the application as defined by the appended claims, and are considered to cover any and all modifications, variations, combinations, or equivalents within the scope of this application. Clearly, those skilled in the art can make various alterations and modifications to this application without departing from the spirit and scope of this application. Thus, if such modifications and variations of this application fall within the scope of the claims of this application and their equivalents, this application is also intended to include such modifications and variations.

Claims

1. A method for detecting the current sharing in a parallel Buck circuit, characterized in that, Including open-loop circuit reconstruction models: The current data of the freewheeling diode is collected and processed by the conditioning circuit to obtain the conditioning signal; The conditioning signal is synchronously split into the smoothing circuit and the analog-to-digital converter, and the average current signal and the original digital current signal are output respectively. The average current signal and the original digital current signal are processed in the digital domain by a fusion algorithm to reconstruct a voltage signal that is instantaneously equivalent to inductor current. Current sharing control is performed on the Buck circuit parallel system based on the instantaneous voltage signal equivalent to inductor current.

2. The method for detecting parallel current sharing in a Buck circuit according to claim 1, characterized in that, The process of synchronously splitting the conditioning signal to the smoothing circuit and the analog-to-digital converter to output the average current signal and the original digital current signal respectively includes: A dual-layer independent processing architecture is constructed, which includes a smoothing circuit layer and an analog-to-digital converter layer; The smoothing circuit layer classifies the conditioning signal based on the on and off states of the freewheeling diode, and fuses the signals to generate a voltage signal according to the classification results. The on state enters the tracking mode, and the off state enters the signal holding mode. The analog-to-digital converter layer includes channel one and channel two. Channel one obtains the original pulse signal CH1 based on the conditioning signal, and channel two generates the average current signal CH2 based on the voltage signal output by the smoothing circuit layer.

3. The method for detecting parallel current sharing in a Buck circuit according to claim 2, characterized in that, It also includes state prediction models: The state prediction model is based on the freewheeling diode drive signal and the voltage signal that is equivalent to the inductor current at instantaneous moment. It uses a multi-cycle prediction algorithm to predict the inductor current data of each Buck circuit in multiple future switching cycles. The predicted inductor current value is input into the current sharing controller to adjust the duty cycle of the switching transistors in each Buck circuit, thereby enabling advance current sharing control of multiple circuits.

4. The method for detecting parallel current sharing in a Buck circuit according to claim 3, characterized in that, The process of calibrating the detection and control model using the voltage signal, which is equivalent to the instantaneous inductor current, specifically includes: The sampling nodes of key components in the sampling resistor and signal conditioning circuit are obtained, and the real-time temperature data of the sampling nodes are collected. Construct a temperature-voltage correspondence table and embed the expected values ​​of the instantaneous voltage signals equivalent to inductor current at different temperatures; The voltage deviation between the instantaneous voltage signal equivalent to inductor current and the expected voltage value corresponding to the current temperature in the temperature-voltage correspondence table is calculated, and the inductor parameters of the state prediction model are adaptively adjusted using a proportional-integral algorithm.

5. The method for detecting parallel current sharing in a Buck circuit according to claim 4, characterized in that, The process of current sharing control for multiple circuits by the state prediction model specifically includes: Calculate the current current deviation and the predicted current deviation, and generate a comprehensive deviation signal by weighted fusion; The overall deviation signal is fed back to the current equalization controller to generate a duty cycle adjustment command.

6. A Buck circuit parallel current sharing detection circuit, applied to the Buck circuit parallel current sharing detection method described in claims 1-5, characterized in that, include: The current sampling module includes a sampling resistor Rsns connected to a freewheeling diode to form a current path, used to collect freewheeling diode current data and convert it into a microvolt-level voltage signal. The signal conditioning module includes an operational amplifier (OPA), resistors, and capacitors, and is connected to the current sampling module. It is used to amplify and filter the microvolt-level voltage signal to obtain a conditioned signal. A signal splitting module is connected to the signal conditioning module and performs hardware splitting through a voltage divider network at the output of a PCB splitter or operational amplifier, used to synchronously split the conditioning signal to the smoothing module and the analog-to-digital conversion module. The smoothing module includes a smoothing circuit consisting of a resistor Rf, a switching transistor Qf controlled by the freewheeling transistor drive signal G2, and a capacitor Cf, and is connected to the signal shunt module to output an average current signal. The analog-to-digital conversion module includes a dual-channel synchronous sampling analog-to-digital converter (ADC) used to convert the shunt signal into the original digital current signal. A digital processing module, connected to the smoothing processing module and the analog-to-digital conversion module, is used to perform digital domain processing on the average current signal and the original digital current signal through a fusion algorithm to reconstruct a voltage signal that is instantaneously equivalent to inductor current. The current sharing control module, connected to the digital processing module, is used to generate a duty cycle adjustment command based on the instantaneous voltage signal equivalent to inductor current, and to perform current sharing control on the Buck circuit parallel system.

7. A Buck circuit parallel current sharing detection circuit according to claim 6, characterized in that, The signal splitting module, smoothing module, and analog-to-digital converter module are constructed into a two-layer independent processing architecture, which includes a smoothing circuit layer and an analog-to-digital converter layer: The smoothing circuit layer classifies the conditioning signal based on the on and off states of the freewheeling diode: in the on state, the switch Qf is closed, the resistor Rf and the capacitor Cf form an RC low-pass filter circuit, the capacitor Cf is charged, and the tracking mode voltage signal is output; in the off state, the switch Qf is open, the capacitor Cf maintains the voltage, and the output signal maintains the mode voltage signal. The analog-to-digital converter (ADC) in the analog-to-digital converter layer has two channels: channel one and channel two. Channel one generates the original pulse signal CH1 based on the conditioning signal, and channel two generates the average current signal CH2 based on the voltage signal output by the smoothing circuit layer.

8. A Buck circuit parallel current sharing detection circuit according to claim 7, characterized in that, It also includes a state prediction module, which is connected to the digital processing module and the flow sharing control module: The state prediction module receives the freewheeling diode drive signal G2, the instantaneous voltage signal equivalent to inductor current from the digital processing module, and the input voltage Vin and output voltage Vout sampled by the analog-to-digital conversion module. The input data is processed by a multi-cycle prediction algorithm to predict the inductor current data of each Buck circuit in multiple future switching cycles and feed it back to the current sharing control module. This is used to adjust the duty cycle of the switching transistor in advance to perform current sharing control on multiple circuits in advance.

9. A Buck circuit parallel current sharing detection circuit according to claim 8, characterized in that, It also includes a temperature compensation module, which is connected to the current sampling module and the signal conditioning module: The temperature compensation module acquires real-time temperature data of the sampling node through the sampling resistor Rsns and the operational amplifier OPA. Construct a temperature-voltage correspondence table and embed the expected values ​​of the instantaneous voltage signals equivalent to inductor current at different temperatures; The voltage deviation between the real-time voltage signal and the expected value is calculated, and the inductance parameter L of the state prediction module is adaptively adjusted using a proportional-integral algorithm. The calibrated inductance parameter is then output to the state prediction module.

10. A Buck circuit parallel current sharing detection circuit according to claim 6 or 9, characterized in that, It also includes a communication unit and a processing unit; The communication unit is used to communicate with the host computer or other Buck circuit modules to transmit current data, status information and current sharing control commands; The processing unit is used to execute the fusion algorithm of the digital processing module and the multi-cycle prediction algorithm of the state prediction module, and to coordinate the data flow of the current sampling module, the signal conditioning module, and the temperature compensation module.

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