Double-pulse test method suitable for multi-module parallel connection in three-phase bridge arm

By constructing a complete dual-pulse test circuit in the three-phase bridge arm to simulate the current path of the entire inverter, and using a Rogowski coil test device, the problem of inaccurate dynamic current sharing evaluation in traditional test methods is solved, and a more accurate dynamic current sharing performance evaluation is achieved.

CN121476882APending Publication Date: 2026-02-06HEFEI UNIV
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Patent Information

Application Number
CN202511705257.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-11-20
Publication Date
2026-02-06

AI Technical Summary

Technical Problem

Traditional dual-pulse testing methods cannot accurately reflect the effects of stray inductance in the circuit that the device experiences in the whole system, cannot simulate critical commutation processes, and cannot effectively assess the dynamic current distribution imbalance when multiple IGBT or MOSFET modules are connected in parallel.

Method used

A dual-pulse test method suitable for multiple modules in parallel in a three-phase bridge arm is designed. By constructing a complete test circuit including load inductance, the current path of the entire inverter is simulated. A Rogowski coil is used as the test device to control the switching process of the power switching devices to evaluate the dynamic current sharing performance.

Benefits of technology

The test results are more realistic and can accurately assess the dynamic current sharing performance of parallel modules in the bridge arm, preventing inverter overload and switch device damage caused by inaccurate data.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention provides a double-pulse testing method suitable for multi-module parallel connection in a three-phase bridge arm, and belongs to the technical field of power semiconductor device testing. The testing step comprises the steps of selecting a tested module, a loop module and a tested power switch device, constructing a double-pulse testing loop, controlling each tested power switch device through a double-pulse signal, and testing the current stress of the tested power switch device when the control is finished. According to the method, the current path of the whole inverter is simulated, and the influence of circuit stray inductance in the actual operation process of the inverter is considered, so that the obtained test result is more practical, and the dynamic performance evaluation of the power switch device is more accurate.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of power semiconductor device testing, and particularly relates to a dynamic current sharing performance test suitable for three-phase bridge arm multi-module parallel application. BACKGROUND

[0002] Double-pulse test is a standard method for evaluating the switching dynamic characteristics of power semiconductor devices (such as IGBT, MOSFET), and is widely used in device selection, drive circuit parameter verification and system loss evaluation.

[0003] The traditional double-pulse test method usually connects a load inductance between the AC output end of the bridge arm and the negative end of the DC bus to form a simplified test loop. However, this method has significant limitations: 1. Incomplete path: The test loop of the traditional method lacks stray inductance and other parameters outside the measured phase, and cannot truly reflect the influence of loop stray inductance on the device in actual operation, resulting in a large deviation between the test results and the actual situation.

[0004] 2. Distorted working condition simulation: The traditional method cannot simulate the key commutation process generated when the upper and lower tubes are switched complementarily, so it is difficult to accurately evaluate the voltage overshoot, oscillation and electromagnetic interference during switching.

[0005] 3. Parallel application evaluation failure: When testing the dynamic current sharing of multi-IGBT or MOSFET modules in parallel, the test loop of the traditional method has essential differences with the shared main power loop of the parallel devices in the actual machine, and the test results cannot effectively predict the problem of uneven dynamic current distribution caused by layout asymmetry in real working conditions.

[0006] Therefore, there is an urgent need in the art for a double-pulse test method that can highly restore the actual operation conditions of the machine to provide more accurate and more meaningful test data. SUMMARY

[0007] The technical problem to be solved by the present application is to overcome the above-mentioned defects of the existing traditional double-pulse test method, and to provide a double-pulse test method with a more complete test loop and higher working condition fidelity. This method can especially accurately evaluate the dynamic current sharing performance in parallel module applications in the bridge arm.

[0008] The technical solution of the present application is as follows.

[0009] The application discloses a double-pulse test method suitable for multi-module parallel connection in a three-phase bridge arm, and relates to a test system comprising a direct-current power supply, a three-phase bridge arm, a load inductor, a double-pulse emitting device and a test device, wherein the three-phase bridge arm is connected in parallel between positive and negative bus bars of the direct-current power supply; each bridge arm in the three-phase bridge arm is recorded as a module, the module is composed of N parallel-connected same modules, the module is a full-bridge arm composed of four power switching devices and two clamping diodes; the serial number of the power switching device is recorded as i from the positive bus bar to the negative bus bar, i=1, 2, 3, 4; the anode and the cathode of the two clamping diodes are connected in a butt joint manner, the other cathode is connected to the collector of the power switching device with i=2, and the other anode is connected to the emitter of the power switching device with i=3. The power switching devices in each module are tested in the same way, an arbitrary module is selected as a measured module y, y is the serial number of the measured module, y=A, B or C; and the test steps of the measured module y are as follows. Step 1: an arbitrary module is selected as a loop module from two modules other than the measured module y, and is recorded as a loop module x, x is the serial number of the loop module, x=A, B or C, and x≠y; Step 2: a group of power switching devices with the same serial number i are selected as measured power switching devices from N modules in the measured module y, and N groups of measured power switching devices with the same serial number i are obtained; in particular, when N=1, the measured power switching device is one. Step 3: a double-pulse test loop of the measured module y is constructed, specifically, a load inductor is connected between the alternating current output end of the measured module y and the alternating current output end of the loop module x, so as to form a complete-path test loop. Step 4: the test device is connected to the collector of each measured power switching device; the double-pulse emitting device is connected to the gate of each measured power switching device, and each measured power switching device is controlled through a double-pulse signal, and the current stress of the measured power switching device is tested at the end of the control.

[0010] Preferably, the control of each measured power switching device through the double-pulse signal comprises the following three stages: The first pulse stage: each measured power switching device is turned on, and the state of other power switching devices is given, so that the current flows through the load inductor, and a charging loop is formed; The interval stage: each measured power switching device is turned off, and the current of the load inductor flows through the clamping diode; The second pulse stage: each measured power switching device is turned on again, and the current stress of the turn-off process is tested and recorded when the measured power switching device is turned off.

[0011] Preferably, the specific case of the given other power switch device state is as follows: Any one of the N modules is denoted as module j, j is the serial number of the module, j=1, 2, …, N; any one of the power switch devices in the module is denoted as power switch device V dji , d is the state of the module, d=y, x, z; z is the serial number of the alternative module, z=A, B, C, and z≠y, z≠x; When the measured power switch device is V yj1 , V yj2 , V xj3 are kept on, and the rest of the power switch devices are turned off by default; When the measured power switch device is V yj2 , V xj3 , V xj4 are kept on, and the rest of the power switch devices are turned off by default; When the measured power switch device is V yj3 , V xj1 , V xj2 are kept on, and the rest of the power switch devices are turned off by default; When the measured power switch device is V yj4 , V yj3 , V xj2 are kept on, and the rest of the power switch devices are turned off by default.

[0012] Preferably, the test device is a Rogowski coil.

[0013] Compared with the prior art, the present application has the following beneficial effects: 1. The method simulates the current path of the inverter complete machine, considers the influence of the circuit stray inductance in the actual operation process of the inverter, and the test result is more in line with the actual situation, and the dynamic performance evaluation of the switch device is more accurate. Specifically, compared with the traditional double-pulse test method, the voltage stress, current peak value, and uneven current degree obtained by the method are more in line with the operation results of the inverter complete machine, which can effectively prevent the inverter complete machine overload and switch device damage caused by inaccurate data.

[0014] 2. The present application provides a double-pulse test method with a more complete test loop and higher working condition fidelity, which can especially accurately evaluate the dynamic current sharing performance in the application of parallel modules in the bridge arm. BRIEF DESCRIPTION OF DRAWINGS

[0015] Figure 1 It is a topology diagram of the test system of the module in the module of the present application, and the number of modules is 1; Figure 2 It is a topology diagram of the test system of the module in the module of the present application, and the number of modules is 3; Figure 3A schematic diagram of double pulse current waveform when the existing test method is adopted; Figure 4 A schematic diagram of double pulse current waveform when the double pulse test method of the application is adopted. DETAILED DESCRIPTION

[0016] The application will be described in detail below with reference to the drawings and specific embodiments.

[0017] Figure 1 A topology diagram of a test system in which the number of modules in the module group is 1, Figure 2 A topology diagram of a test system in which the number of modules in the module group is 1, Figure 1 and Figure 2 As can be seen from the above, the double pulse test method involves a topology structure including a direct current power supply, three-phase bridge arms, a load inductor, a double pulse wave device and a test device, wherein the three-phase bridge arms are connected in parallel between the positive and negative buses of the direct current power supply; each of the three-phase bridge arms is recorded as a module group, the module group is composed of N identical modules connected in parallel, the module is a full-bridge arm composed of four power switching devices and two clamping diodes; from the positive bus to the negative bus, the serial number of the power switching device is recorded as i, i = 1, 2, 3, 4; the anode and cathode of the two clamping diodes are connected in pairs, the other cathode is connected to the collector of the power switching device with i = 2, and the other anode is connected to the emitter of the power switching device with i = 3.

[0018] In Figure 1 and Figure 2 , C1 and C2 are two filter capacitors connected in series and then connected in parallel between the direct current power supply and the three-phase bridge arms.

[0019] Embodiment 1.

[0020] The double pulse test is performed on the power switching devices in each module group in the same way, and any one module group is selected as the measured module group y, y is the serial number of the measured module group, y = A, B, C; the test steps of the measured module group y are as follows: Step 1, select one of the two module groups other than the measured module group y as the loop module group and record it as the loop module group x, x is the serial number of the loop module group, x = A, B, C, and x ≠ y.

[0021] Step 2, select a group of power switching devices with the same serial number i in each module in the measured module group y as the measured power switching device, and obtain N measured power switching devices with the same serial number i; in particular, when N = 1, the measured power switching device is one.

[0022] Step 3: Construct a double-pulse test circuit for the module under test y. Specifically, connect a load inductor between the AC output terminal of the module under test y and the AC output terminal of the circuit module x to form a complete test circuit.

[0023] Step 4: Connect the test device to the collector of each power switch device under test; connect the dual-pulse wave generator to the gate of each power switch device under test, and control each power switch device under test through the dual-pulse signal; and test the current stress of the power switch device under test at the end of the control.

[0024] In this embodiment, the testing device is a Rogowski coil.

[0025] In this embodiment, the control of each power switching device under test via a dual-pulse signal includes the following three stages: First pulse stage: Turn on each power switching device under test and give the state of other power switching devices, so that the current flows through the load inductor to form a charging circuit; Interval phase: Each power switching device under test is turned off, and the current of the load inductor freewheels through the clamping diode; Second pulse phase: Each power switch under test is turned on again, and the current stress during the turn-off process is tested and recorded when it is turned off.

[0026] In this embodiment, the specific details of the given other power switching device states are as follows: Let any one of the N modules be denoted as module j, where j is the module number, j=1,2,…,N; and let any one of the power switching devices in the module be denoted as power switching device V. dji d represents the state of the module, d = y, x, z; z represents the sequence number of the candidate module, z = A, B, C, and z ≠ y, z ≠ x; When the power switching device under test is V yj1 At that time, V yj2 V xj3 All devices remain on, while the remaining power switching devices are off by default; When the power switching device under test is V yj2 At that time, V xj3 V xj4 All devices remain on, while the remaining power switching devices are off by default; When the power switching device under test is V yj3 At that time, V xj1 V xj2 All devices remain on, while the remaining power switching devices are off by default; When the power switching device under test is V yj4 At that time, V yj3 Vxj2 All remain on. The remaining power switching devices are off by default.

[0027] Example 2: Each module contains only one module, i.e., N=1.

[0028] Choose y=A, x=C, i=1, that is, choose module A as the module under test and module C as the loop module, V A11 The device under test is a power switching device.

[0029] Connect the load inductor between the AC output terminal of module A and the AC output terminal of module C to form a complete double-pulse test circuit; connect the double-pulse generating device to V A11 The gate is connected, and V is controlled by a double-pulse signal. A11 The control is described in Example 1. Specific control steps are detailed in Example 1.

[0030] The states of the remaining power switching devices are: V A12 V C13 All of them remain on, while the remaining power switching devices are off by default.

[0031] Figure 1 This is the topology diagram corresponding to Example 2.

[0032] Example 3: Each module includes three modules, i.e., N=3.

[0033] Choosing y=A, x=B, i=3, means selecting module A as the module under test and module B as the loop module. Aj3 For the power switching device under test, specifically, including V A13 V A23 V A33 .

[0034] Connect the load inductor between the AC output terminal of module A and the AC output terminal of module B to form a complete test loop; connect the dual-pulse waveform generator to V A13 V A23 V A33 The gate is connected, and V is controlled by a double-pulse signal. A13 V A23 V A33 Control measures are described in Example 1.

[0035] The power switching device state is: V B11 V B21 V B31 V B12 V B22 V B32 All devices remain on, while the remaining power switching devices are off by default.

[0036] Figure 2 This is the topology diagram corresponding to Example 3. Due to the large number of power switching devices, the testing equipment and dual-pulse generator have been omitted.

[0037] To demonstrate the beneficial effects of this invention, a parallel test was conducted.

[0038] Because the dual-pulse test circuit includes the complete path from each parallel branch to any arm of the bridge other than the phase under test, the circuit asymmetry (stray inductance difference) experienced by each branch is truly reflected in the test. By testing the current waveform of each parallel branch separately using the test device, the current imbalance under static and dynamic conditions can be accurately calculated. Figure 4 This is a schematic diagram of the double-pulse current waveform when using the double-pulse testing method of the present invention. Figure 3 The diagram shows a double-pulse current waveform when using existing testing methods. Test data shows that the double-pulse testing method of this invention can expose more significant current unevenness compared to existing testing methods. Specifically, the static current unevenness increases from 11.64% to 23.51%, and the dynamic current unevenness increases from 5.6% to 10.13%. This fully demonstrates that this invention provides a more reliable basis for optimized design.

[0039] In addition, the use of a Rogowski coil as the testing device in this parallel test application can ensure that it is perpendicular to the current loop, thereby reducing test errors.

Claims

1. A dual-pulse test method applicable to multiple modules connected in parallel in a three-phase bridge arm, the test system involved in the dual-pulse test method includes a DC power supply, three-phase bridge arms, load inductors, a dual-pulse wave generator, and a test device, wherein the three-phase bridge arms are connected in parallel between the positive and negative buses of the DC power supply; each bridge arm in the three-phase bridge arm is denoted as a module, the module is composed of N identical modules connected in parallel, the module is a full-bridge bridge arm, which is composed of 4 power switching devices and 2 clamping diodes; from the positive bus to the negative bus, the serial number of the power switching device is denoted as i, i=1,2,3,4; the anode and cathode of the two clamping diodes are connected together, the other cathode is connected to the collector of the power switching device i=2, and the other anode is connected to the emitter of the power switching device i=3; Its features are, The power switching devices in each module are subjected to a double-pulse test using the same method. Any module is selected and denoted as module y under test, where y is the module number (A, B, C). The test steps for module y are as follows: Step 1: Randomly select one module from the two modules other than the module being tested y as the loop module, and denot it as loop module x, where x is the sequence number of the loop module, x=A,B,C, and x≠y; Step 2: Randomly select a group of power switching devices with the same serial number i from the N modules in the module under test y as the power switching devices under test, and obtain N power switching devices with the same serial number i; In particular, when N=1, there is only one power switching device under test. Step 3: Construct a double-pulse test circuit for the module under test y. Specifically, connect a load inductor between the AC output terminal of the module under test y and the AC output terminal of the circuit module x to form a complete test circuit. Step 4: Connect the test device to the collector of each power switch device under test; connect the dual-pulse wave generator to the gate of each power switch device under test, and control each power switch device under test through the dual-pulse signal; and test the current stress of the power switch device under test at the end of the control.

2. The double-pulse testing method applicable to multiple modules in parallel according to claim 1, characterized in that, The control of each power switching device under test via dual-pulse signals includes the following three stages: First pulse stage: Turn on each power switching device under test and give the state of other power switching devices, so that the current flows through the load inductor to form a charging circuit; Interval phase: Each power switching device under test is turned off, and the current of the load inductor freewheels through the clamping diode; Second pulse phase: Each power switch under test is turned on again, and the current stress during the turn-off process is tested and recorded when it is turned off.

3. The double-pulse testing method applicable to multiple modules in parallel according to claim 2, characterized in that, The specific details of the given states of other power switching devices are as follows: Let any one of the N modules be denoted as module j, where j is the module number, j=1,2,…,N; and let any one of the power switching devices in the module be denoted as power switching device V. dji d represents the state of the module, d = y, x, z; z represents the sequence number of the candidate module, z = A, B, C, and z ≠ y, z ≠ x; When the power switching device under test is V yj1 At that time, V yj2 V xj3 All devices remain on, while the remaining power switching devices are off by default; When the power switching device under test is V yj2 At that time, V xj3 V xj4 All devices remain on, while the remaining power switching devices are off by default; When the power switching device under test is V yj3 At that time, V xj1 V xj2 All devices remain on, while the remaining power switching devices are off by default; When the power switching device under test is V yj4 At that time, V yj3 V xj2 All remain on. The remaining power switching devices are off by default.

4. The double-pulse test method applicable to multiple modules in parallel connection in a three-phase bridge arm according to claim 1, characterized in that, The testing device is a Rogowski coil.