Automatic test method for multi-channel high-precision bias current operational amplifier chip

Abstract

The invention discloses an automatic test method for a multi-channel high-precision bias current operational amplifier chip, and the method comprises the steps: connecting the in-phase input ends and reverse input ends of two to-be-tested operational amplifiers CHA and CHB in a to-be-tested chip with the in-phase input end of an auxiliary operational amplifier and a feedback resistor through four relays respectively; the other end of the feedback resistor is connected with the output end of the auxiliary operational amplifier; the reverse input end of the auxiliary operational amplifier is grounded; collecting an output value VM3 of the auxiliary operational amplifier and an output value VM4 of the auxiliary operational amplifier after the auxiliary operational amplifier is connected to the two operational amplifiers CHA and CHB to be tested; and the bias current IB is solved through the following formula, and automatic testing of the to-be-tested chip is achieved. 50 samples to be tested are tested and verified, all chips pass the test, and the test time is shortened by about 600ms and is optimized by about 33%.

Description

Technical Field

[0001] This invention belongs to the field of integrated circuit chip testing, and in particular relates to an automated testing method for multi-channel high-precision bias current operational amplifier chips. Background Technology

[0002] The typical input bias current of the chip under test is 1 picoampere. Input bias current testing usually uses a current-to-voltage method, with common methods including the resistance method and the capacitance method. Most analog testers equipped with op-amp test boards can only achieve nanoampere-level accuracy when using the resistance method to test the input bias current. Since high-precision op-amp chips require input bias current at the picoampere level, the resistance measurement method directs the input bias current to a resistor to generate an offset voltage. This offset voltage is then amplified and measured to calculate the value of the input bias current. However, the testing of picoampere-level input bias current is easily affected by circuit noise, which can mask weak currents and result in inaccurate values.

[0003] Because this testing method is intended for mass production testing, it cannot guarantee that tens of thousands of chips will be tested under the same environment and conditions. Variations in factory temperature and humidity, as well as the number of charge-discharge cycles, can affect capacitor performance and lifespan, thus impacting the accuracy of the test results. Furthermore, capacitor leakage current also contributes to instability. Although the impact of leakage current can be reduced by changing the capacitor material, the typical input bias current of the chip under test is 1 picoamp, meaning leakage current still has a significant effect. In conclusion, the traditional capacitor method cannot meet the requirements of mass production testing for input bias current testing. Summary of the Invention

[0004] Purpose of the invention: The purpose of this invention is to provide an automated testing method for multi-channel high-precision bias current operational amplifier chips.

[0005] Technical Solution: This invention provides an automated testing method for multi-channel high-precision bias current operational amplifier chips. The non-inverting and inverting inputs of the two operational amplifiers CHA and CHB in the chip under test are connected to the non-inverting input of an auxiliary operational amplifier and a feedback resistor via four relays. The other end of the feedback resistor is connected to the output of the auxiliary operational amplifier, and the inverting input of the auxiliary operational amplifier is grounded. The output value V of the auxiliary operational amplifier is acquired. M3 The output value V after connecting the auxiliary operational amplifier to the two operational amplifiers under test, CHA and CHB. M4 The bias current I is calculated using the following formula. B This enables automated testing of the chip under test.

[0006]

[0007] R0 is the value of the feedback resistor.

[0008] Furthermore, the maximum input offset voltage of the auxiliary operational amplifier is ±50uV, and the typical value is 9uV; the maximum input offset current is ±20fA, and the typical value is 1fA; the maximum input bias current is ±20fA, and the typical value is 1fA.

[0009] Furthermore, the typical value of the input resistance of the auxiliary operational amplifier is 100TΩ; the maximum value of the temperature coefficient is ±0.5uV / ℃, and the typical value is 0.13uV / ℃.

[0010] Furthermore, the typical low noise density of the auxiliary operational amplifier is 14 nV / √Hz.

[0011] Furthermore, the auxiliary operational amplifier is model ADA4530-1.

[0012] The present invention also discloses a computer device, including a memory, a processor, and a computer program stored in the memory, wherein the processor executes the computer program to implement the steps of the method of the present invention.

[0013] The present invention also discloses a computer-readable storage medium having a computer program / instructions stored thereon, which, when executed by a processor, implements the steps of the method of the present invention.

[0014] The present invention also discloses a computer program product, including a computer program / instructions that, when executed by a processor, implement the steps of the method of the present invention.

[0015] Beneficial effects: Compared with the prior art, the present invention has the following significant advantages:

[0016] Because the capacitance method has high requirements for the type of capacitor and strict testing environment, it is not suitable for mass production testing. This invention abandons the conventional capacitance method used for testing weak currents and uses a combination of resistors and an additional auxiliary operational amplifier connected to the input terminal of the chip under test (DUT) to monitor picoampere-level bias current. This significantly shortens the testing time for a single chip from 1838ms using the traditional capacitance method to 1242ms, and increases the chip's test pass rate from 70% to 100%, greatly reducing material costs. The improved resistance method has been proven effective through experiments, and its simple principle makes it easier to implement. Furthermore, the bias current testing method of this invention is also fully applicable to the testing needs of most single / multi-channel high-precision operational amplifiers, greatly reducing the testing and development cycle for such chips. Attached Figure Description

[0017] Figure 1This is a pin diagram of a dual-channel operational amplifier chip.

[0018] Figure 2 This is a schematic diagram of a dual-channel operational amplifier test.

[0019] Figure 3 This is a graph showing the chip test results.

[0020] Figure 4 This is a graph showing the chip testing time.

[0021] Figure 5 The output voltage waveform of the auxiliary operational amplifier when the capacitor is being charged stably.

[0022] Figure 6 The output voltage waveform of the auxiliary operational amplifier when the capacitor is being charged unstablely.

[0023] Figure 7 The circuit diagram for testing the input bias current using the improved resistance method is shown below.

[0024] Figure 8 This is a graph showing the testing time of the improved chip. Detailed Implementation

[0025] The technical solution of the present invention will be further described below with reference to the accompanying drawings.

[0026] A dual-channel operational amplifier chip was used as the test object. Figure 1 This is a pin diagram of the chip. Figure 2 This diagram shows a chip testing circuit. CHA and CHB are two operational amplifiers (op-amps) in the chip under test (DUT), and AMP is an auxiliary op-amp used to improve testing accuracy and reduce testing errors. The typical input bias current of the DUT is 1 picoampere. Input bias current testing typically uses a current-to-voltage conversion method, commonly the resistance method and the capacitance method. Most analog testers equipped with op-amp test boards using the resistance method can only achieve nanoampere-level accuracy in testing input bias current. Since high-precision op-amp chips require picoampere-level input bias current, the resistance method directs the input bias current through a resistor to generate an offset voltage. This offset voltage is then amplified and measured to calculate the input bias current value. However, testing picoampere-level input bias current is easily affected by circuit noise, which can mask weak current readings, leading to inaccurate values. Generally, when testing op-amps with picoampere-level bias currents, the capacitance method is more accurate than the resistance method. Therefore, the capacitance method is used for testing. The measurement principle of the capacitance method is based on charging the capacitor with the bias current of the chip under test, and monitoring the voltage change across the capacitor during this period. By measuring the rate of voltage rise, the bias current I can be calculated. BThe specific value is determined by: First, applying the specified power supply voltage to the operational amplifier under test through source VI and grounding the input terminal. Then, activating relays K4, K7, and K8, connecting capacitors, and sampling a segment of the waveform at the output terminal of the auxiliary operational amplifier. The result is then calculated according to the formula...

[0027]

[0028] Obtain the input bias current I at the non-inverting terminal. BP Similarly, the input bias current I at the reverse end is obtained. BN Finally, I is obtained according to the formula. B value

[0029]

[0030] To verify the correctness of the above method, 50 test samples were selected for testing. The test results are as follows: Figure 3 As shown, the test pass rate is only 70%, and some test values ​​far exceed typical values, and as... Figure 4 As shown in the chip testing time graph, the overall testing time is longer due to the excessive delay required by the capacitance method, which increases production costs.

[0031] Therefore, it is necessary to troubleshoot the test plan, based on I. B The testing principle involves calculating the slope of the voltage change at the output terminal of the auxiliary operational amplifier. Therefore, it's crucial to ensure the capacitor charges stably and doesn't reach saturation during the voltage sampling process. Figure 5 shows the output voltage waveform of the stably charging auxiliary operational amplifier, measured with a digital oscilloscope. It can be seen that the ideal capacitor charging process involves a linear voltage increase. However, after measuring multiple chips and capturing the output voltage waveforms of the auxiliary operational amplifiers, it was found that the output waveforms of some chips were very unstable, such as... Figure 6 As shown, the overall waveform exhibits an oscillating pattern with a large amplitude, and also shows an unstable upward trend. Therefore, this capacitance method cannot meet the requirements for mass production testing.

[0032] This invention optimizes and improves traditional testing methods. After eliminating the use of capacitors for monitoring input bias current, it attempts to use resistors for picoampere-level bias current monitoring. The method employed in this invention involves adding an auxiliary operational amplifier connected to the input terminal of the chip under test (DUT). This auxiliary operational amplifier must meet ultra-low noise and have an input bias current much smaller than that of the DUT. Through comprehensive comparative analysis, the ADA4530-1 operational amplifier was selected as this auxiliary operational amplifier. Its specific parameters are shown in Table 1. This operational amplifier has a femtoampere-level input bias current, and its small offset current and offset voltage demonstrate its stability. Its extremely small temperature coefficient also reduces the impact of ambient temperature on the output results. The schematic diagram of the improved feedback resistor method circuit is shown below. Figure 7As shown, by energizing relays K10, K11, K12, and K13 respectively, and utilizing the virtual short characteristic of the operational amplifier and the large input resistance of the auxiliary operational amplifier of 100TΩ, the current flows into the feedback resistor R0 as much as possible. The bias current can be calculated by equations (2) and (3).

[0033]

[0034] In the formula: To assist the op-amp's own output; To assist the output of the operational amplifier after it is connected to the operational amplifier under test; This is the feedback resistor.

[0035] Table 1 Main performance parameters of ADA4530-1

[0036]

[0037] Similarly, 50 test samples were selected again for testing and verification. All chips passed the test, and as... Figure 8 As shown in the chip test duration graph, the test time has been reduced by nearly 600ms, an optimization of approximately 33%.

Claims

1. An automated testing method for multi-channel high-precision bias current operational amplifier chips, characterized in that, The non-inverting and inverting inputs of the two operational amplifiers CHA and CHB in the chip under test are connected to the non-inverting input of an auxiliary operational amplifier and a feedback resistor via four relays, respectively. The other end of the feedback resistor is connected to the output of the auxiliary operational amplifier, and the inverting input of the auxiliary operational amplifier is grounded. The output value V of the auxiliary operational amplifier is acquired. M3 The output value V after connecting the auxiliary operational amplifier to the two operational amplifiers under test, CHA and CHB. M4 ; The bias current I is calculated using the following formula. B This enables automated testing of the chip under test. R0 is the value of the feedback resistor.

2. The automated testing method for multi-channel high-precision bias current operational amplifier chips according to claim 1, characterized in that, The maximum input offset voltage of the auxiliary operational amplifier is ±50uV, and the typical value is 9uV; the maximum input offset current is ±20fA, and the typical value is 1fA; the maximum input bias current is ±20fA, and the typical value is 1fA.

3. The automated testing method for multi-channel high-precision bias current operational amplifier chips according to claim 1, characterized in that, The typical input resistance of the auxiliary operational amplifier is 100 TΩ; the maximum temperature coefficient is ±0.5 uV / ℃, and the typical value is 0.13 uV / ℃.

4. The automated testing method for multi-channel high-precision bias current operational amplifier chips according to claim 1, characterized in that, The typical low noise density of the auxiliary operational amplifier is 14 nV / √Hz.

5. The automated testing method for multi-channel high-precision bias current operational amplifier chips according to claim 1, characterized in that, The auxiliary operational amplifier is model ADA4530-1.

6. A computer device comprising a memory, a processor, and a computer program stored in the memory, characterized in that, The processor executes the computer program to implement the steps of the method of claim 1.

7. A computer-readable storage medium having a computer program / instructions stored thereon, characterized in that, When the computer program / instructions are executed by the processor, they implement the steps of the method of claim 1.

8. A computer program product comprising a computer program / instructions, characterized in that, When the computer program / instructions are executed by the processor, they implement the steps of the method of claim 1.

Images