Task scheduling method and system, electronic equipment and storage medium

Abstract

The invention provides a task scheduling method and system, electronic equipment and a storage medium. The method comprises the following steps: reconstructing a task directed acyclic graph into a parallel node segment model; the parallel node segment model comprises a linear sequence composed of a plurality of parallel node segments, each parallel node segment comprises a plurality of task nodes, and the task nodes correspond to tasks executed in parallel on different processor cores of the heterogeneous multi-core processor; and determining a target task scheduling execution sequence according to the linear sequence. According to the method, a task directed acyclic graph is reconstructed into a parallel node segment model, all task nodes in the same parallel node segment in a linear sequence in the parallel node segment model are scheduled to be executed in parallel, and different parallel node segments in the linear sequence are executed in sequence according to the sequence of the parallel node segments in the linear sequence. The tasks in the same parallel node segment can be scheduled to different processor cores for parallel execution, and different node segments depend on sequential serial execution, so that the task scheduling efficiency is improved.

Description

Technical Field

[0001] This invention relates to the field of task scheduling technology, and in particular to a task scheduling method, system, electronic device, and storage medium. Background Technology

[0002] With the development of heterogeneous multi-core processors, how to rationally divide and allocate tasks to different types of processor cores has become the key to improving system execution efficiency.

[0003] However, existing traditional task scheduling algorithms are usually too conservative, with excessively long scheduling lengths and insufficient accuracy in judging the schedulability of tasks, thus failing to fully leverage the performance advantages of heterogeneous multi-core processors. Summary of the Invention

[0004] This invention provides a task scheduling method, system, electronic device, and storage medium to address the shortcomings of existing traditional task scheduling algorithms, which are often too conservative, have excessively long scheduling lengths, are not accurate enough in judging the schedulability of tasks, and cannot fully utilize the performance advantages of heterogeneous multi-core processors.

[0005] This invention provides a task scheduling method applied to heterogeneous multi-core processors, the method comprising the following steps: Obtain a directed acyclic graph of tasks; the directed acyclic graph of tasks includes each task node; The directed acyclic graph of the task is reconstructed into a parallel node segment model; the parallel node segment model includes a linear sequence of multiple parallel node segments, wherein the parallel node segment includes multiple task nodes, and the task nodes correspond to tasks executed in parallel on different processor cores of the heterogeneous multi-core processor. Based on the linear sequence, a target task scheduling execution sequence is determined; wherein, all tasks within the same parallel node segment in the linear sequence are scheduled for parallel execution, and different parallel node segments in the linear sequence are executed sequentially according to the order of the parallel node segments in the linear sequence.

[0006] According to a task scheduling method provided by the present invention, the step of reconstructing the directed acyclic graph of tasks into a parallel node segment model includes: The following operations are performed repeatedly until a preset termination condition is met; the termination condition is that all nodes in the directed acyclic graph of the task are assigned to a parallel node segment. Identify the ready nodes with an in-degree of zero in the directed acyclic graph of the task, and determine the set of ready nodes based on all the ready nodes; Determine the scheduling priority of each ready node in the ready node set, and select candidate nodes from the ready node set based on the scheduling priority to construct the current parallel node segment; Remove the candidate nodes that have been assigned to the current parallel node segment from the task directed acyclic graph, update the in-degree of the remaining nodes in the task directed acyclic graph, and return the ready nodes that have an in-degree of zero in the task directed acyclic graph.

[0007] According to a task scheduling method provided by the present invention, the step of determining the scheduling priority of each ready node includes: Based on the local critical path length of each ready node and the number of direct successor nodes of each ready node, the critical factors of each ready node are determined; the local critical path length is used to characterize the cumulative execution time corresponding to the longest execution path from each ready node to the terminal node of the task's directed acyclic graph. The scheduling priority is determined based on the key factors.

[0008] According to a task scheduling method provided by the present invention, determining the scheduling priority based on the key factor includes: When the critical factors of ready nodes in the set of ready nodes are the same, the relative priority of each ready node is determined based on the local critical path length of each ready node and the relative importance of the number of direct successor nodes of each ready node. The scheduling priority is determined based on the relative priority.

[0009] According to a task scheduling method provided by the present invention, the method further includes: When the critical factors, local critical path lengths, and number of direct successor nodes of each ready node are all the same, the scheduling priority is determined based on the preset node sequence number of each ready node or the natural order of each ready node in the ready node set.

[0010] According to a task scheduling method provided by the present invention, the directed acyclic graph of tasks further includes the task attributes of each task node; The task attributes include the task execution duration of each task node; The step of reconstructing the directed acyclic graph of the task into a parallel node segment model includes, prior to: Determine the greatest common divisor of the task execution times of all task nodes in the directed acyclic graph of the task; Based on the greatest common divisor, the task execution time is unitized to establish a unified scheduling time granularity.

[0011] According to a task scheduling method provided by the present invention, the task attributes further include the processor type corresponding to each task node; The step of selecting candidate nodes from the set of ready nodes based on the scheduling priority and constructing the current parallel node segment includes: Based on the scheduling priority and the availability of processors that match the processor type corresponding to the ready node, candidate nodes are selected from the set of ready nodes to construct the current parallel node segment.

[0012] The present invention also provides a task scheduling system, comprising the following units: The acquisition unit is used to acquire a directed acyclic graph of tasks; the directed acyclic graph of tasks includes each task node; The reconstruction unit is used to reconstruct the directed acyclic graph of the task into a parallel node segment model; the parallel node segment model includes a linear sequence of multiple parallel node segments, wherein the parallel node segment includes multiple task nodes, and the task nodes correspond to tasks executed in parallel on different processor cores of a heterogeneous multi-core processor. A determining unit is configured to determine a target task scheduling execution sequence based on the linear sequence; wherein all tasks within the same parallel node segment in the linear sequence are scheduled for parallel execution, and different parallel node segments in the linear sequence are executed sequentially according to the order of the parallel node segments in the linear sequence.

[0013] The present invention also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement any of the task scheduling methods described above.

[0014] The present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the task scheduling method as described above.

[0015] The present invention also provides a computer program product, including a computer program that, when executed by a processor, implements the task scheduling method described above.

[0016] This invention provides a task scheduling method, system, electronic device, and storage medium. The method obtains a directed acyclic graph (DAG) of tasks, which includes task nodes. The DAG is reconstructed into a parallel node segment model. This model comprises a linear sequence of multiple parallel node segments, where each segment includes multiple task nodes, corresponding to tasks executed in parallel on different processor cores of a heterogeneous multi-core processor. Based on the linear sequence, a target task scheduling execution sequence is determined. This method reconstructs the DAG into a parallel node segment model, where all task nodes within the same parallel node segment in the linear sequence are scheduled for parallel execution. Different parallel node segments in the linear sequence are executed sequentially according to their order within the sequence. This significantly improves task scheduling efficiency by scheduling tasks within the same parallel node segment to different processor cores for parallel execution, while different node segments are executed sequentially. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in this invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0018] Figure 1 This is one of the flowcharts of the task scheduling method provided by the present invention.

[0019] Figure 2 This is the second flowchart of the task scheduling method provided by the present invention.

[0020] Figure 3 This is a task scheduling example diagram provided by the present invention.

[0021] Figure 4 This is a schematic diagram of the task scheduling system provided by the present invention.

[0022] Figure 5 This is a schematic diagram of the structure of the electronic device provided by the present invention. Detailed Implementation

[0023] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0024] This invention provides a task scheduling method applicable to heterogeneous multi-core processors. Figure 1 This is one of the flowcharts illustrating the task scheduling method provided by the present invention, such as... Figure 1 As shown, the method includes steps 110, 120 and 130.

[0025] Step 110: Obtain the task directed acyclic graph; the task directed acyclic graph includes each task node.

[0026] Specifically, a Directed Acyclic Graph (DAG) can be obtained, which includes each task node. Furthermore, the DAG may also include the task attributes of each task node. A DAG is a mathematical graph structure, and in this embodiment of the invention, it is used to model a set of tasks with dependencies.

[0027] Specifically, each task node represents a computational task that needs to be executed. The directed edges in the task-directed acyclic graph represent the dependencies between tasks. For example, if there is a directed edge from task node A to task node B, it means that the execution of task node B can only begin after task node A has completed its execution. The task-directed acyclic graph is acyclic, meaning that no task directly or indirectly depends on its own execution result, ensuring the termination of the task flow.

[0028] Task attributes are information associated with each task node, used to describe the characteristics of the task. In some implementations, task attributes may include the estimated execution time of the task, the type of processor cores required for task execution, the memory requirements of the task, power consumption information, etc., but this embodiment of the invention does not specifically limit these.

[0029] Step 120: Reconstruct the directed acyclic graph of the task into a parallel node segment model; the parallel node segment model includes a linear sequence of multiple parallel node segments, wherein the parallel node segment includes multiple task nodes, and the task nodes correspond to tasks executed in parallel on different processor cores of the heterogeneous multi-core processor.

[0030] Specifically, after obtaining the task directed acyclic graph (DAG), it can be reconstructed into a parallel node segment model. Here, reconstructing the task DAG into a parallel node segment model means transforming the data structure of the task DAG without violating the original task dependencies, forming a new model structure that is easier to schedule.

[0031] Understandably, in a parallel node segment model, tasks within each node segment execute in parallel within the same time period. This refactoring process transforms the directed acyclic graph data structure of tasks without violating the original task dependencies, thereby forming a new model structure that is easier to schedule.

[0032] In one embodiment, tasks in each node segment (e.g., Segment1, Segment2, Segment3) of the parallel node segment model are executed in parallel within the same time period. Specifically, in the Segment1 node segment, the CPU (Central Processing Unit) of task1 and the GPU (Graphics Processing Unit) of task2 start at the same time unit 0 and execute in parallel within their respective time units. This verifies the characteristic of the parallel node segment model, namely, that tasks within the same node segment are executed in parallel. After the tasks in Segment1 are completed, the NPU (Neural Processing Unit) of task3 in the subsequent node segment (e.g., Segment2) begins to execute, demonstrating that the transformed model strictly adheres to the original task dependencies. This diagram clearly shows the order of task progression across different node segments and the parallel execution relationship within the same node segment through a time unit axis and different task colors (corresponding to different types of processors, such as CPU, GPU, and NPU), vividly illustrating how the parallel node segment model optimizes task scheduling.

[0033] The parallel node segment model is a novel task representation model, consisting of a linear sequence of multiple parallel node segments. A linear sequence means that all parallel node segments are arranged in a defined order. This linear arrangement determines the execution order of the parallel node segments; that is, the next parallel node segment can only begin execution after the previous one has finished.

[0034] Here, a parallel node segment is the basic unit of a linear sequence, containing one or more task nodes. All task nodes within the same parallel node segment represent tasks that are considered to be executable in parallel on different processor cores of a heterogeneous multi-core processor during scheduling. This means that there are no direct dependencies between these tasks, and at the time of scheduling, all their predecessor tasks have already been completed.

[0035] Understandably, by transforming the complex network of task-directed acyclic graphs with intricate network dependencies into a parallel node segment model, the complexity of scheduling decisions is greatly simplified.

[0036] Step 130: Determine the target task scheduling execution sequence based on the linear sequence; wherein, all tasks within the same parallel node segment in the linear sequence are scheduled for parallel execution, and different parallel node segments in the linear sequence are executed sequentially according to the order of the parallel node segments in the linear sequence.

[0037] Specifically, the target task scheduling and execution sequence can be determined based on the linear sequence. In this sequence, all tasks within the same parallel node segment are scheduled for parallel execution, and different parallel node segments are executed sequentially according to their order within the linear sequence. That is, after all tasks within a parallel node segment have been executed, the scheduling and execution of the next parallel node segment begins, until all parallel node segments in the linear sequence have been executed.

[0038] The method provided in this invention obtains a directed acyclic graph (DAG) of tasks, which includes task nodes. The DAG is then reconstructed into a parallel node segment model, comprising a linear sequence of multiple parallel node segments, where each parallel node segment includes multiple task nodes, each task node corresponding to a task executed in parallel on different processor cores of a heterogeneous multi-core processor. Based on the linear sequence, a target task scheduling execution sequence is determined. This method reconstructs the DAG into a parallel node segment model, where all task nodes within the same parallel node segment in the linear sequence are scheduled for parallel execution. Different parallel node segments in the linear sequence are executed sequentially according to their order within the sequence. This significantly improves task scheduling efficiency by scheduling tasks within the same parallel node segment to different processor cores for parallel execution, while different node segments are executed sequentially.

[0039] Based on the above embodiments, step 120 includes: The following operations are performed repeatedly until a preset termination condition is met; the termination condition is that all nodes in the directed acyclic graph of the task are assigned to a parallel node segment. Step 121: Determine the ready nodes with an in-degree of zero in the directed acyclic graph of the task, and determine the set of ready nodes based on all the ready nodes. Step 122: Determine the scheduling priority of each ready node in the ready node set, and select candidate nodes from the ready node set based on the scheduling priority to construct the current parallel node segment; Step 123: Remove the candidate nodes that have been assigned to the current parallel node segment from the task directed acyclic graph, update the in-degree of the remaining nodes in the task directed acyclic graph, and return the ready nodes that have an in-degree of zero in the task directed acyclic graph.

[0040] Specifically, the reconstruction process of transforming the directed acyclic graph of a task into a parallel node segment model can be an iterative process, which includes: The operation is repeated until a preset termination condition is met, whereby all task nodes in the directed acyclic graph of tasks are successfully assigned to a certain parallel node segment.

[0041] First, identify the ready nodes with an in-degree of zero in the task's directed acyclic graph (DAG), and then determine the set of ready nodes based on all ready nodes. Here, the in-degree of a node refers to the number of other nodes that depend on it. Therefore, a ready node with an in-degree of zero is a task node that, in the current state, has no predecessor tasks that have not yet been completed. Ready nodes are candidate tasks that can be scheduled for execution at present. The set of ready nodes is the set of all such ready nodes in the current iteration round. In the initial state, the set of ready nodes typically includes the starting node of the task's DAG or all task nodes without predecessor nodes.

[0042] Next, the scheduling priority of each ready node in the ready node set is determined, and candidate nodes are selected from the ready node set based on the scheduling priority to construct the current parallel node segment. For each ready node in the ready node set, its urgency or importance for scheduling needs to be evaluated through a preset rule, i.e., its scheduling priority is determined. The scheduling priority can be a numerical value, with a higher value indicating a higher priority. After determining the scheduling priority of each ready node, the algorithm selects task nodes as candidate nodes from the ready node set according to the order of priority from high to low, and puts these candidate nodes into the current parallel node segment being constructed. The selection process may be limited by the number and type of available cores in heterogeneous multi-core processors. For example, when all processor core resources of the corresponding type are occupied, or when the ready node set is empty, the construction process of the current parallel node segment ends.

[0043] Finally, remove the candidate nodes already assigned to the current parallel node segment from the task's directed acyclic graph (DAG), and return the updated in-degree of the remaining nodes in the DAG. That is, once a parallel node segment is constructed, the state of the task's DAG needs to be updated to prepare for the next iteration. Specifically, logically remove all candidate nodes already assigned to the current parallel node segment from the task's DAG. This removal operation means that for each remaining node in the DAG, check if the node to be removed is its predecessor. If so, decrement the in-degree of that remaining node by one. Updating the in-degree of a node may cause some nodes that originally had a non-zero in-degree to have an in-degree of zero, thus becoming new ready nodes in the next iteration. Then, begin constructing the next parallel node segment, and repeat this process until all task nodes have been assigned.

[0044] The method provided in this invention iteratively performs the following operations until all nodes in the directed acyclic graph of the task are assigned to a parallel node segment: First, it identifies ready nodes with an in-degree of zero in the graph, forming a set of ready nodes; then, it calculates the scheduling priority of each ready node, and selects candidate nodes from the set based on the priority to construct the current parallel node segment; finally, it removes the assigned candidate nodes from the graph, updates the in-degree of the remaining nodes, and returns to the ready node determination step. This achieves hierarchical scheduling of task nodes, ensures the integrity of parallel allocation by dynamically updating node states, avoids the problem of node dependency disruption, and improves task scheduling efficiency and resource utilization.

[0045] In related technologies, existing task scheduling algorithms often fail to consider the overall impact of the current task's execution on subsequent tasks, resulting in low scheduling efficiency. For example, some existing methods have not been specifically optimized for DAG tasks with multiple types of processing cores. When the parallelism and dependencies between tasks are complex, the scheduling process generates many idle and blocked nodes, thus affecting response time and overall performance.

[0046] Based on the above embodiments, the step of determining the scheduling priority of each ready node includes: Step 210: Based on the local critical path length of each ready node and the number of direct successor nodes of each ready node, determine the critical factors of each ready node; the local critical path length is used to characterize the cumulative execution time corresponding to the longest execution path from each ready node to the terminal node of the task's directed acyclic graph. Step 220: Determine the scheduling priority based on the key factors.

[0047] Specifically, firstly, the critical factors of each ready node can be determined based on the local critical path length of each ready node and the number of direct successor nodes of each ready node.

[0048] The local critical path length (LCL) characterizes the cumulative execution time of the longest possible path from the currently evaluated ready node along the directed acyclic graph (DAG) to the final terminal node of the task. Understandably, the LCL reflects the lower bound of the execution time of the subsequent task chain for that node; the longer the LCL, the more critical the path, and any delay to that node is more likely to extend the total completion time of the entire task set.

[0049] The number of direct successor nodes indicates how many task nodes in a directed acyclic graph directly use the currently evaluated ready node as their predecessor. The more direct successor nodes a node has, the more subsequent tasks that directly depend on it can enter the ready state after that node completes its execution. Therefore, prioritizing the scheduling of such nodes can trigger the readiness of more subsequent tasks earlier, thereby increasing the likelihood of parallel execution of subsequent tasks.

[0050] Here, the critical factor can be a weighted sum, product, or other combination function of the local critical path length of each ready node and the number of direct successor nodes of each ready node. This embodiment of the invention does not specifically limit this.

[0051] In an optional embodiment, the critical factor can be directly defined as the sum of the local critical path length and the number of direct successor nodes, i.e., critical factor = local critical path length + number of direct successor nodes.

[0052] Finally, after calculating the key factors for each node in the set of ready nodes, the scheduling priority can be determined based on the key factors.

[0053] In one alternative embodiment, a ready node with a higher criticality factor has a higher scheduling priority. For example, suppose there are two ready nodes, A and B. Node A has a local critical path length of 10 time units, 3 direct successor nodes, and a criticality factor of 13 (10+3). Node B has a local critical path length of 8 time units, 4 direct successor nodes, and a criticality factor of 12 (8+4). In this case, node A has a higher criticality factor, therefore its scheduling priority is higher than that of node B.

[0054] The method provided in this invention calculates critical factors based on the local critical path length and the number of direct successor nodes of each ready node, and determines the scheduling priority accordingly. The local critical path length represents the cumulative time of the longest execution path from each ready node to the terminal node of the directed acyclic graph of the task. Therefore, by comprehensively considering the temporal urgency of ready nodes in the global task flow and their activation ability for subsequent tasks, a refined priority ranking of parallel task nodes is achieved. This ensures that critical path tasks are executed first to shorten the overall completion time, and also improves the utilization rate of system parallel resources by releasing more subsequent tasks as early as possible, thereby optimizing the overall efficiency of task scheduling.

[0055] Based on the above embodiments, step 220 includes: Step 221: When the critical factors of ready nodes in the ready node set are the same, determine the relative priority of each ready node based on the local critical path length of each ready node and the relative importance of the number of direct successor nodes of each ready node. Step 222: Determine the scheduling priority based on the relative priority.

[0056] Specifically, when ready nodes in the ready node set have the same critical factor, further rules are needed to distinguish their priorities. In this case, the relative priority of each ready node can be determined based on the local critical path length of each ready node and the relative importance of the number of its direct successor nodes.

[0057] Relative importance refers to a pre-defined comparison order. For example, it can be stipulated that the length of the local critical path of each node is compared first, with the node having a longer local critical path having higher priority. If the local critical path lengths are still the same, then the number of direct successor nodes of each node is compared, with the node having more direct successor nodes having higher priority. Based on this relative priority rule, the scheduling priority of nodes with the same critical factors can be finally determined.

[0058] In one embodiment, it is assumed that the critical factor of ready nodes C and D is 15. The local critical path length of node C is 10, and the number of direct successor nodes is 5. The local critical path length of node D is 11, and the number of direct successor nodes is 4. According to the above rules, the local critical path lengths are compared first. Node D (11) is greater than node C (10). Therefore, the scheduling priority of node D is determined to be higher than that of node C.

[0059] The method provided in this invention determines the relative priority of ready nodes in a ready node set when the critical factors are the same, based on the relative importance of the local critical path length and the number of direct successor nodes, and then determines the scheduling priority. Thus, in specific cases where the primary ranking indicator, the critical factor, fails, a more refined decision-making mechanism is established by introducing a secondary evaluation dimension, resolving the ambiguity problem of priority determination, ensuring that scheduling decisions can continue even in complex scenarios, enhancing the robustness and adaptability of task scheduling, and thereby guaranteeing the smoothness and efficiency of the overall scheduling process.

[0060] Based on the above embodiments, the method further includes: When the critical factors, local critical path lengths, and number of direct successor nodes of each ready node are all the same, the scheduling priority is determined based on the preset node sequence number of each ready node or the natural order of each ready node in the ready node set.

[0061] Specifically, when all ready nodes have the same critical factors, local critical path length, and number of direct successor nodes, scheduling priority can be determined based on the preset node number of each ready node or the natural order of each ready node in the ready node set.

[0062] The preset node number can be a unique identifier assigned to each task node when the input task is in a directed acyclic graph (e.g., node 1, node 2, ...). When all other priority indicators are the same, it can be stipulated that the node with the smaller number has a higher priority; however, this embodiment of the invention does not specifically limit this.

[0063] Here, the natural order of each ready node in the ready node set can refer to the order in which the nodes are stored in the data structure within the program. Similarly, it can be stipulated that ready nodes with earlier positions have higher priority; however, this embodiment of the invention does not impose specific limitations on this.

[0064] In one embodiment, if all priority indicators of node E and node F are the same, but the sequence number of node E is 5 and the sequence number of node F is 8, then it can be determined that the priority of node E is higher than that of node F.

[0065] The method provided in this invention determines scheduling priority based on a preset node number or the natural order of nodes in the set, when all ready nodes have the same critical factors, local critical path lengths, and number of direct successor nodes. Thus, by introducing a deterministic final decision rule, it provides an unambiguous solution for all possible node equivalence cases, ensuring that the task scheduling algorithm can make a unique and predictable decision under any extreme conditions. This eliminates the risk of the task scheduling process stalling due to incomparability and guarantees the stability of task scheduling.

[0066] Based on the above embodiments, the directed acyclic graph of tasks also includes the task attributes of each task node; The task attributes include the task execution duration of each task node; Step 120, which also includes the following: Step 120-1: Determine the greatest common divisor of the task execution times of each task node in the directed acyclic graph of the task. Step 120-2: Based on the greatest common divisor, the task execution time is processed in units to establish a unified scheduling time granularity.

[0067] Specifically, the directed acyclic graph of tasks also includes the task attributes of each task node. The task attributes include the task execution time of each task node. Accordingly, before executing step 120, the greatest common divisor of the task execution time of each task node in the directed acyclic graph of tasks can be determined.

[0068] Then, based on the greatest common divisor (GCD), the task execution duration can be standardized to establish a unified scheduling granularity. This step uses the calculated GCD as the basic unit of time or scheduling time slice. For each task node, its new, standardized execution duration is equal to its original task execution duration divided by the GCD.

[0069] For example, suppose a directed acyclic graph of a task contains three task nodes with execution times of 12, 8, and 4 time units, respectively. Their greatest common divisor is 4. After normalization, the execution times of these three task nodes become 3 (12 / 4), 2 (8 / 4), and 1 (4 / 4), respectively.

[0070] In some implementations, this normalization can manifest as logically splitting an original task node into multiple child nodes with an execution duration of one unit of time, connected by a sequential dependency relationship. This ensures that the scheduler treats all tasks as having uniform integer time units of execution time, simplifying the scheduling algorithm's calculations and alignment in the time dimension. For example, if the greatest common divisor is 1, no splitting or transformation is necessary.

[0071] The method provided in this invention determines the greatest common divisor of the execution times of each task node in a directed acyclic graph (DAG), and then normalizes the execution times to establish a unified scheduling granularity. This normalizes the execution times, which could originally be arbitrary real numbers, into a unified time unit that is an integer multiple, eliminating the interference of heterogeneous duration values ​​on the complexity of scheduling calculations. This simplifies and standardizes subsequent priority determination and resource allocation algorithms based on duration comparisons, improving the computational efficiency and numerical stability of the scheduling process, thereby ensuring the feasibility and reliability of large-scale task graph scheduling optimization.

[0072] Based on the above embodiments, the task attributes also include the processor type corresponding to each task node; Step 122 includes: Step 1221: Based on the scheduling priority and the availability of processors that match the processor type corresponding to the ready node, select candidate nodes from the set of ready nodes to construct the current parallel node segment.

[0073] Specifically, in addition to the task execution duration, the task attributes also include the processor type corresponding to each task node.

[0074] Accordingly, candidate nodes can be selected from the set of ready nodes based on scheduling priority and the processor type corresponding to the ready nodes to construct the current parallel node segment. In other words, when constructing a parallel node segment, the algorithm must consider not only the priority of the ready nodes, but also the availability of heterogeneous multi-core processors.

[0075] In one embodiment, the required processor type of each node in the ready node set can be checked, and it can be queried whether there are any idle processor cores of that type in the current system. If an idle, matching core exists, the node is selected as a candidate node, added to the current parallel node segment, and a core of that type is marked as occupied. If no idle, matching core exists, the node is skipped, and the next priority ready node is considered. This process is repeated until no more nodes can be added to the current parallel node segment, for example, because all available cores are occupied, or because no matching idle core can be found for any of the remaining ready nodes.

[0076] For example, on a processor with 2 Type A cores and 1 Type B core, the currently ready node set has three nodes: NodeX (priority 10, Type A), NodeY (priority 9, Type A), and NodeZ (priority 8, Type B). First, NodeX, with the highest priority, is selected and allocated a Type A core. Next, NodeY is selected, and since there is one Type A core remaining, it is allocated to NodeY. Finally, NodeZ is selected and allocated a Type B core. At this point, the parallel node segment is complete, containing {NodeX, NodeY, NodeZ}.

[0077] The method provided in this embodiment of the invention selects candidate nodes from the set of ready nodes based on scheduling priority and the availability of processors that match the processor type corresponding to the ready nodes, and constructs the current parallel node segment.

[0078] The method provided in this invention selects candidate nodes from the set of ready nodes to construct the current parallel node segment based on scheduling priority and the availability of processors that match the processor type corresponding to the ready node. Thus, by dynamically matching the logical priority of task nodes with the physical resource status of the underlying processor, it maximizes resource utilization while meeting the specific requirements of the task type. This follows a global scheduling strategy to optimize overall completion time and avoids scheduling conflicts or resource idleness caused by resource type mismatches, thereby improving task scheduling efficiency while ensuring scheduling quality.

[0079] Based on any of the above embodiments Figure 2 This is the second flowchart illustrating the task scheduling method provided by the present invention, as shown below. Figure 2 As shown, the method includes: Step 1, Task Preprocessing: For each task node in the DAG graph, excluding the start and end nodes, its execution time is standardized into units. The unit execution time is set to the greatest common divisor of all task execution times. Each task node is then divided into multiple sub-nodes with the same unit execution time, ensuring that the execution time of each node is uniformly set to one unit. This step avoids processor idle time caused by inconsistent task execution times and provides a unified time scale reference for subsequent scheduling algorithms.

[0080] Step 2, Task Priority Calculation: To reduce the overall scheduling time of DAG tasks, this embodiment of the invention designs a key factor as a priority indicator. The key factor consists of two parts: one part is the length of the local critical path from the current node to the terminal node, which reflects the lower limit of the longest execution time of the connected subgraph from the current node to the terminal node; the other part is the influence of the current node on subsequent tasks, which is usually related to the number of direct successor nodes of that node. Combining these two parts of information, a key factor value is calculated for each task node. The larger the key factor, the higher the priority of scheduling for the task. This allows for the priority scheduling of key task nodes that have a greater impact on subsequent tasks, thereby effectively reducing the idle waiting time of subsequent scheduling.

[0081] Step 3, Task Graph Reconstruction: Based on the task priority information calculated in Step 2, the original DAG task graph is transformed into a parallel node segment model. During the reconstruction process, parallel task nodes are divided into multiple node segments, each representing a set of tasks that can be executed in parallel. Specifically, the algorithm allocates tasks according to the following strategy: First, all ready task nodes with an in-degree of 0 are set as the Ready set. If the Ready set is not empty, candidate tasks are allocated to the available processors of the current node segment in descending order of priority based on critical factors, prioritizing tasks with higher priority. If the critical factors are the same, the local critical path length and the number of direct successor nodes of the nodes are further compared to determine the allocation order. If the order is still undecided, tasks are allocated according to their serial number or natural order. When all corresponding type processor core resources of the current node segment are occupied or the candidate set is empty, the allocated task nodes are removed and the task graph is updated. The ready task set is regenerated, and the above process is repeated until all task nodes are allocated. This method determines the execution range of each task without changing task dependencies, avoiding unnecessary task blocking and thus reducing the worst-case response time of the tasks.

[0082] Step four, multi-core mapping and scheduling: In the parallel node segment model, task nodes are mapped to multiple types of processor cores for execution based on their type. Specifically, for each task node in a node segment, its task type k and the availability of the corresponding type of processor core are checked. When an idle processor core of type k is detected, the task node of type k is assigned to that core for execution. The entire system executes each parallel node segment in turn according to the node segment sequence, ensuring that tasks within the same node segment can be started in parallel on the corresponding type of multi-core. The resulting task scheduling sequence can be used to evaluate the actual scheduling of the DAG task on a heterogeneous multi-core platform.

[0083] Through the above steps, the task scheduling method proposed in this invention can convert the DAG task graph into a parallel node segment model, making reasonable use of the parallel execution capabilities of various types of processor cores. Simultaneously, it employs a priority allocation strategy combining path length and impact to prioritize the scheduling of important tasks. This method not only reduces idle waiting and blocking during task scheduling but also reduces the overall scheduling time and improves task scheduling efficiency.

[0084] Based on any of the above embodiments Figure 3 This is a task scheduling example diagram provided by the present invention, such as... Figure 3 The diagram illustrates a DAG task structure with dependencies, including a start node, task nodes, and an end node. Each node is labeled with its task execution duration and processor type. Assume a heterogeneous multi-core system with three processor types: type 1, type 2, and type 3, with 2, 1, and 1 processor cores respectively. Consider a simple task DAG containing a start node, three task nodes, and an end node, where: Node 0: Starting node; Node 1: Task node, type 1 processor core, execution time is 5; Node 2: Task node, type 2 processor core, execution time is 4; Node 3: Task node, type 3 processor cores, execution time is 3; Node 4: Termination node.

[0085] The dependencies between tasks are as follows: node 0 precedes nodes 1 and 2; nodes 1 and 2 both precede node 3; node 3 precedes node 4. That is, 0→{1,2}, {1,2}→3, 3→4. The task graph is scheduled according to the method of this embodiment of the invention, as shown below: (1) Task preprocessing: Calculate the greatest common divisor d of the execution times of all task nodes. In this example, the execution times of nodes 1, 2, and 3 are 5, 4, and 3 respectively, and their greatest common divisor d = 1. Since d = 1, there is no need to further split the task into smaller units. In this embodiment, each task retains its original execution time. If unitization is required, each task node can be split into d child nodes with the same execution time unit.

[0086] (2) Task priority calculation: According to the steps, the key factors of each task node are calculated in this embodiment of the invention: For node 1, the longest path from node 1 to the terminal node is 1→3→4, and the corresponding execution time is 5+3=8, that is, the local critical path length L(1)=8; node 1 has 1 direct successor node, so the influence degree f(1)=1, and the critical factor K(1)=8+1=9.

[0087] For node 2, the longest path from node 2 to the terminal node is 2→3→4, and the corresponding execution time is 4+3=7, that is, L(2)=7; node 2 has 1 direct successor, f(2)=1, K(2)=7+1=8.

[0088] For node 3, the longest path from node 3 to the terminal node is 3→4, with a corresponding execution time of 3, i.e., L(3)=3; node 3 has 1 direct successor (terminal node), f(3)=1, K(3)=3+1=4.

[0089] Based on the above calculations, a task priority list is obtained: Node 1 has the highest critical factor, followed by Node 2, and finally Node 3. This is consistent with the definition of critical factors mentioned above.

[0090] (3) Task graph reconstruction: Tasks are segmented and scheduled according to priority. In this example, the set of direct successor nodes of node 0 is {1,2}, which constitutes the ready set. Sorted from largest to smallest according to the key factor, the order is node 1 (9) → node 2 (8). Since there are 2 idle cores of type 1 processor cores in the system, node 1 can be assigned to one of the type 1 cores; there is 1 idle core of type 2 processor core, so node 2 is assigned to the type 2 core. At this time, the first node segment (Segment 1) is generated, which contains node 1 and node 2 in parallel. According to the algorithm, when the processor core resources in the node segment are insufficient or there are no more ready nodes, the allocation of this node segment ends: at this time, the resources required by node segment 1 have been fully occupied.

[0091] After removing the assigned nodes 1 and 2, only node 3 remains as a ready node in the original task graph. At this point, a reallocation is performed: node 3 has the highest criticality factor (4), and the type 3 processor core is idle. Node 3 is then assigned to the type 3 core, generating a second node segment (Segment 2) containing only node 3. At this point, all task nodes except the termination node have been assigned, completing the DAG transformation. This yields a parallel node segment model: node segment 1 contains {node 1, node 2}, node segment 2 contains {node 3}, and they are connected sequentially.

[0092] (4) Multi-core mapping scheduling: Task scheduling is performed sequentially according to the generated node segment model. The tasks in node segment 1 are executed in parallel in the system: type 1 cores execute node 1 (execution time 5), type 2 cores execute node 2 (execution time 4). Since type 1 cores have two cores, only one is used in this example, and the rest are idle; node 3 is not executed for the time being. The worst execution time of node segment 1 is max(5,4)=5. After completing node segment 1, nodes 1 and 2 are removed, and node segment 2 is entered: at this time, task 3 can be executed and is assigned to type 3 processor cores for execution (execution time 3). The worst execution time of node segment 2 is 3. After task 3 is completed, the scheduling ends at the termination node. According to the execution results of each node segment, the worst response time of the task in this example is 5+3=8.

[0093] Throughout the process, the mapping between tasks and processor cores follows the scheduling pseudocode logic proposed in this invention: when a task node is of type k and the corresponding type k processor core is idle, the task is immediately assigned to that node segment. As shown in the example above, node 1 and node 2 are successfully mapped to type 1 and type 2 processor cores for parallel execution, respectively, and then node 3 is mapped to type 3 processor cores for execution.

[0094] In summary, as can be seen from the above specific embodiments, the scheduling method of the present invention effectively converts the original DAG task graph into a parallel node segment model and arranges its execution, making reasonable use of multiple types of processor core resources, avoiding unnecessary task blocking, thereby improving scheduling efficiency and optimizing worst-case response time.

[0095] In one embodiment, node 1 (processor type 1): execution time 12; node 2 (processor type 2): execution time 8; node 3 (processor type 3): execution time 4; processor resources: type 1 cores: 2, type 2 cores: 1, type 3 cores: 1 The following is a detailed step-by-step execution process of the method of the present invention in this scenario: (1) Task preprocessing Calculate the greatest common divisor: Calculate the greatest common divisor of the execution times of all task nodes {node1, node2, node3} {12, 8, 4}, i.e., GCD(12, 8, 4) = 4.

[0096] Therefore, the unit execution time d = 4.

[0097] Split task nodes into unit child nodes: Each original task node is split into unit child nodes with an execution time of d=4, according to the number of original execution time / d.

[0098] Node 1 (duration 12): Divided into 12 / 4 = 3 child nodes. These can be named 1_1, 1_2, and 1_3. There is a sequential dependency between them: 1_1 → 1_2 → 1_3. Each child node has an execution duration of 4.

[0099] Node 2 (duration 8): Split into 8 / 4 = 2 child nodes. These can be named 2_1 and 2_2. There is a sequential dependency between them: 2_1 → 2_2. Each child node has an execution duration of 4.

[0100] Node 3 (duration 4): Split into 4 / 4 = 1 child node. It can be named 3_1. Its execution time is 4.

[0101] Construct a new unitized DAG graph: reconstruct task dependencies based on the split child nodes.

[0102] The original dependency 0 → 1 becomes 0 → 1_1.

[0103] The original dependency 0 → 2 becomes 0 → 2_1.

[0104] The original dependency 1 → 3 becomes 1_3 → 3_1 (the last child node of the original task 1 points to the first child node of the original task 3).

[0105] The original dependency 2 → 3 becomes 2_2 → 3_1 (the last child node of the original task 2 points to the first child node of the original task 3).

[0106] The original dependency 3 → 4 becomes 3_1 → 4.

[0107] After preprocessing, we obtained a brand new, more refined DAG graph, in which the execution time of all tasks (child nodes) is a uniform 4 units.

[0108] (2) Task priority calculation Now, we compute the critical factor K(n) = L(n) + f(n) for all new unit child nodes. Remember, the execution time for each node is now 4.

[0109] For 3_1: The longest path L(3_1): 3_1 → 4, execution time = 4.

[0110] Direct successor f(3_1): 1 (node ​​4).

[0111] The key factor K(3_1) = 4 + 1 = 5.

[0112] For 1_3: The longest path L(1_3): 1_3 → 3_1 → 4, execution time = 4 + 4 = 8.

[0113] Direct successor f(1_3): 1 (node ​​3_1).

[0114] The key factor K(1_3) = 8 + 1 = 9.

[0115] For 2_2: The longest path L(2_2): 2_2 → 3_1 → 4, execution time = 4 + 4 = 8.

[0116] Direct successor f(2_2): 1 (node ​​3_1).

[0117] The key factor K(2_2) = 8 + 1 = 9.

[0118] For 1_2: The longest path L(1_2): 1_2 → 1_3 → 3_1 → 4, execution time = 4 + 4 + 4 = 12.

[0119] Direct successor f(1_2): 1 (node ​​1_3).

[0120] The key factor K(1_2) = 12 + 1 = 13.

[0121] For 2_1: The longest path L(2_1): 2_1 → 2_2 → 3_1 → 4, execution time = 4 + 4 + 4 = 12.

[0122] Direct successor f(2_1): 1 (node ​​2_2).

[0123] The key factor K(2_1) = 12 + 1 = 13.

[0124] For 1_1: The longest path L(1_1): 1_1 → 1_2 → 1_3 → 3_1 → 4, execution time = 4 + 4 + 4 + 4 = 16.

[0125] Direct successor f(1_1): 1 (node ​​1_2).

[0126] The key factor K(1_1) = 16 + 1 = 17.

[0127] Priority sorting (handling cases with the same critical factors): When K values ​​are different, sort in descending order of K values. When K values ​​are the same, compare L values. When L values ​​are still the same, prioritize the task with the smaller original task node number.

[0128] K(1_1) = 17, K(1_2) = 13, K(2_1) = 13. Their L values ​​are also the same (12). Based on the original task sequence number, 1_2 takes precedence over 2_1.

[0129] K(1_3) = 9, K(2_2) = 9. Their L values ​​are also the same (8). Based on the original task sequence number, 1_3 takes precedence over 2_2. K(3_1) = 5 (3) Task graph reconstruction (generating parallel node segments) We build the node segments in a loop.

[0130] Round 1 (Generate Segment 1): Ready set: Initially, only {1_1, 2_1} has an in-degree of 0.

[0131] Select the highest priority 1_1 (K=17) from the ready set. It requires a type 1 processor. The system has 2 free processors, and the allocation is successful.

[0132] Next, select 2_1 (K=13). It requires a type 2 processor. The system has 1 free processor; allocation successful. The ready set is now empty; first round ends.

[0133] Parallel node segment 1: {1_1, 2_1} Second round (generating Segment 2): Updated graph: After removing 1_1 and 2_1, 1_2 and 2_2 become the new ready nodes.

[0134] Ready set: {1_2, 2_2} Select the highest priority 1_2 (K=13). Requires a type 1 processor, available, allocation successful.

[0135] Next, select 2_2 (K=9). Type 2 processors are required, there are available processors, and the allocation is successful.

[0136] The ready set is empty; the second round is over.

[0137] Parallel node segment 2: {1_2, 2_2} Third round (generating Segment 3): Updated graph: After removing 1_2 and 2_2, 1_3 becomes a ready node (its predecessor 1_2 is already complete). Note that 3_1 is still not ready at this point because it still depends on 1_3.

[0138] Ready set: {1_3} Allocation: Select 1_3 (K=9). Type 1 processor required, available, allocation successful.

[0139] The ready set is empty; the third round is over.

[0140] Parallel node segment 3: {1_3} Fourth round (generating Segment 4): Updated graph: After removing 1_3, all predecessors (1_3, 2_2) of 3_1 are now complete and ready nodes.

[0141] Ready set: {3_1} Allocation: Select 3_1 (K=5). Type 3 processors are required, available, allocation successful.

[0142] Parallel node segment 4: {3_1} All unit child nodes have been assigned, and the reconstruction is complete. Our resulting parallel node segment model is as follows: [Segment 1: {1_1, 2_1}] → [Segment 2: {1_2, 2_2}] → [Segment 3: {1_3}] → [Segment 4: {3_1}] (4) Multi-type kernel mapping and scheduling Now, execution will proceed in the order of the generated node segment models. The execution time for each child node is 4 seconds.

[0143] Execution of Segment 1: Node 1_1 runs on a type 1 core, and Node 2_1 runs on a type 2 core, executing in parallel.

[0144] The time taken for this segment is max(time(1_1), time(2_1)) = max(4, 4) = 4.

[0145] Executing Segment 2: Node 1_2 runs on a Type 1 core, and Node 2_2 runs on a Type 2 core, executing in parallel.

[0146] The time taken for this segment is max(time(1_2), time(2_2)) = max(4, 4) = 4.

[0147] Execute Segment 3: Node 1_3 on a Type 1 core.

[0148] The time taken for this segment is time(1_3) = 4.

[0149] Execute Segment 4: Node 3_1 on a type 3 core.

[0150] The time taken for this segment is time(3_1) = 4.

[0151] Total execution time calculation: Add up the time consumed by each node segment: Worst response time = 4 (Seg 1) + 4 (Seg 2) + 4 (Seg 3) + 4 (Seg 4) = 16.

[0152] The task scheduling system provided by the present invention is described below. The task scheduling system described below and the task scheduling method described above can be referred to in correspondence.

[0153] Based on any of the above embodiments, the present invention provides a task scheduling system. Figure 4 This is a schematic diagram of the task scheduling system provided by the present invention, as shown below. Figure 4 As shown, the system includes: The acquisition unit 410 is used to acquire a directed acyclic graph of tasks; the directed acyclic graph of tasks includes each task node; The reconstruction unit 420 is used to reconstruct the task directed acyclic graph into a parallel node segment model; the parallel node segment model includes a linear sequence composed of multiple parallel node segments, wherein the parallel node segment includes multiple task nodes, and the task nodes correspond to tasks executed in parallel on different processor cores of heterogeneous multi-core processors. The determining unit 430 is used to determine the target task scheduling execution sequence based on the linear sequence; wherein, all tasks within the same parallel node segment in the linear sequence are scheduled to be executed in parallel, and different parallel node segments in the linear sequence are executed sequentially according to the order of the parallel node segments in the linear sequence.

[0154] The system provided in this invention obtains a directed acyclic graph (DAG) of tasks, which includes task nodes. The DAG is then reconstructed into a parallel node segment model, comprising a linear sequence of multiple parallel node segments, where each parallel node segment includes multiple task nodes, each task node corresponding to a task executed in parallel on different processor cores of a heterogeneous multi-core processor. Based on the linear sequence, a target task scheduling execution sequence is determined. This method reconstructs the DAG into a parallel node segment model, where all task nodes within the same parallel node segment in the linear sequence are scheduled for parallel execution. Different parallel node segments in the linear sequence are executed sequentially according to their order within the sequence. This significantly improves task scheduling efficiency by scheduling tasks within the same parallel node segment to different processor cores for parallel execution, while different node segments are executed sequentially.

[0155] Based on any of the above embodiments, the reconstruction unit 420 specifically includes: A loop unit is used to perform the following operations repeatedly until a preset termination condition is met; the termination condition is that all nodes in the directed acyclic graph of the task are assigned to a parallel node segment. Identify the ready nodes with an in-degree of zero in the directed acyclic graph of the task, and determine the set of ready nodes based on all the ready nodes; Determine the scheduling priority of each ready node in the ready node set, and select candidate nodes from the ready node set based on the scheduling priority to construct the current parallel node segment; Remove the candidate nodes that have been assigned to the current parallel node segment from the task directed acyclic graph, update the in-degree of the remaining nodes in the task directed acyclic graph, and return the ready nodes that have an in-degree of zero in the task directed acyclic graph.

[0156] Based on any of the above embodiments, the system further includes a first scheduling priority determination unit, wherein the first scheduling priority determination unit specifically includes: The critical factor determination unit is used to determine the critical factors of each ready node based on the local critical path length of each ready node and the number of direct successor nodes of each ready node; the local critical path length is used to characterize the cumulative execution time corresponding to the longest execution path from each ready node to the terminal node of the task's directed acyclic graph. A scheduling priority determination subunit is used to determine the scheduling priority based on the key factors.

[0157] Based on any of the above embodiments, the scheduling priority determination subunit is specifically used for: When the critical factors of ready nodes in the set of ready nodes are the same, the relative priority of each ready node is determined based on the local critical path length of each ready node and the relative importance of the number of direct successor nodes of each ready node. The scheduling priority is determined based on the relative priority.

[0158] Based on any of the above embodiments, a second scheduling priority determination unit is further included, wherein the second scheduling priority determination unit is specifically used for: When the critical factors, local critical path lengths, and number of direct successor nodes of each ready node are all the same, the scheduling priority is determined based on the preset node sequence number of each ready node or the natural order of each ready node in the ready node set.

[0159] Based on any of the above embodiments, the directed acyclic graph of tasks further includes the task attributes of each task node; The task attributes include the task execution duration of each task node; It also includes a unitization processing unit, which is specifically used for: Determine the greatest common divisor of the task execution times of all task nodes in the directed acyclic graph of the task; Based on the greatest common divisor, the task execution time is unitized to establish a unified scheduling time granularity.

[0160] Based on any of the above embodiments, the task attributes also include the processor type corresponding to each task node; The loop unit is specifically used for: Based on the scheduling priority and the availability of processors that match the processor type corresponding to the ready node, candidate nodes are selected from the set of ready nodes to construct the current parallel node segment.

[0161] Figure 5 This is a schematic diagram of the structure of the electronic device provided by the present invention, such as... Figure 5As shown, the electronic device may include: a processor 510, a communications interface 520, a memory 530, and a communication bus 540, wherein the processor 510, the communications interface 520, and the memory 530 communicate with each other through the communication bus 540. The processor 510 can call logical instructions in the memory 530 to execute a task scheduling method, which includes: obtaining a directed acyclic graph of tasks; the directed acyclic graph of tasks including each task node; reconstructing the directed acyclic graph of tasks into a parallel node segment model; the parallel node segment model including a linear sequence of multiple parallel node segments, wherein each parallel node segment includes multiple task nodes, and each task node corresponds to a task executed in parallel on different processor cores of the heterogeneous multi-core processor; determining a target task scheduling execution sequence based on the linear sequence; wherein all tasks within the same parallel node segment in the linear sequence are scheduled for parallel execution, and different parallel node segments in the linear sequence are executed sequentially according to the order of the parallel node segments in the linear sequence.

[0162] Furthermore, the logical instructions in the aforementioned memory 530 can be implemented as software functional units and, when sold or used as independent products, can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0163] On the other hand, the present invention also provides a computer program product, which includes a computer program that can be stored on a non-transitory computer-readable storage medium. When the computer program is executed by a processor, the computer can execute the task scheduling method provided by the above methods. The method includes: obtaining a directed acyclic graph of tasks; the directed acyclic graph of tasks includes task nodes; reconstructing the directed acyclic graph of tasks into a parallel node segment model; the parallel node segment model includes a linear sequence composed of multiple parallel node segments, wherein the parallel node segment includes multiple task nodes, and the task nodes correspond to tasks executed in parallel on different processor cores of the heterogeneous multi-core processor; determining a target task scheduling execution sequence according to the linear sequence; wherein all tasks within the same parallel node segment in the linear sequence are scheduled for parallel execution, and different parallel node segments in the linear sequence are executed sequentially according to the order of the parallel node segments in the linear sequence.

[0164] In another aspect, the present invention also provides a non-transitory computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements the task scheduling method provided by the above methods. The method includes: obtaining a directed acyclic graph of tasks; the directed acyclic graph of tasks including task nodes; reconstructing the directed acyclic graph of tasks into a parallel node segment model; the parallel node segment model including a linear sequence composed of multiple parallel node segments, wherein the parallel node segment includes multiple task nodes, and the task nodes correspond to tasks executed in parallel on different processor cores of the heterogeneous multi-core processor; determining a target task scheduling execution sequence based on the linear sequence; wherein all tasks within the same parallel node segment in the linear sequence are scheduled for parallel execution, and different parallel node segments in the linear sequence are executed sequentially according to the order of the parallel node segments in the linear sequence.

[0165] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without any creative effort.

[0166] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus necessary general-purpose hardware platforms, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments or some parts of the embodiments.

[0167] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A task scheduling method, characterized in that, Applied to heterogeneous multi-core processors, the method includes: Obtain a directed acyclic graph of tasks; the directed acyclic graph of tasks includes each task node; The directed acyclic graph of the task is reconstructed into a parallel node segment model; the parallel node segment model includes a linear sequence of multiple parallel node segments, wherein the parallel node segment includes multiple task nodes, and the task nodes correspond to tasks executed in parallel on different processor cores of the heterogeneous multi-core processor. Based on the linear sequence, a target task scheduling execution sequence is determined; wherein, all tasks within the same parallel node segment in the linear sequence are scheduled for parallel execution, and different parallel node segments in the linear sequence are executed sequentially according to the order of the parallel node segments in the linear sequence.

2. The task scheduling method according to claim 1, characterized in that, The process of reconstructing the directed acyclic graph of the task into a parallel node segment model includes: The following operations are performed repeatedly until a preset termination condition is met; the termination condition is that all nodes in the directed acyclic graph of the task are assigned to a parallel node segment. Identify the ready nodes with an in-degree of zero in the directed acyclic graph of the task, and determine the set of ready nodes based on all the ready nodes; Determine the scheduling priority of each ready node in the ready node set, and select candidate nodes from the ready node set based on the scheduling priority to construct the current parallel node segment; Remove the candidate nodes that have been assigned to the current parallel node segment from the task directed acyclic graph, update the in-degree of the remaining nodes in the task directed acyclic graph, and return the ready nodes that have an in-degree of zero in the task directed acyclic graph.

3. The task scheduling method according to claim 2, characterized in that, The steps for determining the scheduling priority of each ready node include: Based on the local critical path length of each ready node and the number of direct successor nodes of each ready node, the critical factors of each ready node are determined; the local critical path length is used to characterize the cumulative execution time corresponding to the longest execution path from each ready node to the terminal node of the task's directed acyclic graph. The scheduling priority is determined based on the key factors.

4. The task scheduling method according to claim 3, characterized in that, Determining the scheduling priority based on the key factors includes: When the critical factors of ready nodes in the set of ready nodes are the same, the relative priority of each ready node is determined based on the local critical path length of each ready node and the relative importance of the number of direct successor nodes of each ready node. The scheduling priority is determined based on the relative priority.

5. The task scheduling method according to claim 4, characterized in that, The method further includes: When the critical factors, local critical path lengths, and number of direct successor nodes of each ready node are all the same, the scheduling priority is determined based on the preset node sequence number of each ready node or the natural order of each ready node in the ready node set.

6. The task scheduling method according to claim 2, characterized in that, The directed acyclic graph of tasks also includes the task attributes of each task node; The task attributes include the task execution duration of each task node; The step of reconstructing the directed acyclic graph of the task into a parallel node segment model includes, prior to: Determine the greatest common divisor of the task execution times of all task nodes in the directed acyclic graph of the task; Based on the greatest common divisor, the task execution time is unitized to establish a unified scheduling time granularity.

7. The task scheduling method according to claim 6, characterized in that, The task attributes also include the processor type corresponding to each task node; The step of selecting candidate nodes from the set of ready nodes based on the scheduling priority and constructing the current parallel node segment includes: Based on the scheduling priority and the availability of processors that match the processor type corresponding to the ready node, candidate nodes are selected from the set of ready nodes to construct the current parallel node segment.

8. A task scheduling system, characterized in that, include: The acquisition unit is used to acquire a directed acyclic graph of tasks; the directed acyclic graph of tasks includes each task node; The reconstruction unit is used to reconstruct the directed acyclic graph of the task into a parallel node segment model; the parallel node segment model includes a linear sequence of multiple parallel node segments, wherein the parallel node segment includes multiple task nodes, and the task nodes correspond to tasks executed in parallel on different processor cores of a heterogeneous multi-core processor. A determining unit is configured to determine a target task scheduling execution sequence based on the linear sequence; wherein all tasks within the same parallel node segment in the linear sequence are scheduled for parallel execution, and different parallel node segments in the linear sequence are executed sequentially according to the order of the parallel node segments in the linear sequence.

9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and running on the processor, characterized in that, When the processor executes the computer program, it implements the task scheduling method as described in any one of claims 1 to 7.

10. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the task scheduling method as described in any one of claims 1 to 7.

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